./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5b1736736c06966e3b4f5adb4865787ef8bbb0ebdf6c77cc2a8afb60cf5fc8db --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:53:54,465 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:53:54,522 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-12-02 08:53:54,527 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:53:54,528 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:53:54,550 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:53:54,551 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:53:54,551 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:53:54,551 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:53:54,551 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:53:54,551 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:53:54,551 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:53:54,552 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:53:54,552 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:53:54,552 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:53:54,552 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:53:54,552 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:53:54,553 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 08:53:54,553 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:53:54,553 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:53:54,553 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:53:54,553 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:53:54,553 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:53:54,553 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:53:54,553 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:53:54,553 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:53:54,554 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:53:54,554 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:53:54,554 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:53:54,554 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:53:54,554 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:53:54,554 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:53:54,554 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:53:54,554 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:53:54,555 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:53:54,555 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:53:54,555 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:53:54,555 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:53:54,555 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:53:54,555 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 08:53:54,555 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 08:53:54,555 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:53:54,555 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:53:54,555 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:53:54,556 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:53:54,556 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5b1736736c06966e3b4f5adb4865787ef8bbb0ebdf6c77cc2a8afb60cf5fc8db [2024-12-02 08:53:54,769 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:53:54,776 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:53:54,778 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:53:54,779 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:53:54,779 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:53:54,780 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c [2024-12-02 08:53:57,499 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data/13e7e77d3/b960f7db595c4f89b6d939254704d4e0/FLAGcfb6efc8b [2024-12-02 08:53:57,754 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:53:57,755 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c [2024-12-02 08:53:57,765 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data/13e7e77d3/b960f7db595c4f89b6d939254704d4e0/FLAGcfb6efc8b [2024-12-02 08:53:57,779 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data/13e7e77d3/b960f7db595c4f89b6d939254704d4e0 [2024-12-02 08:53:57,781 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:53:57,782 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:53:57,784 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:53:57,784 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:53:57,789 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:53:57,790 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:53:57" (1/1) ... [2024-12-02 08:53:57,791 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@24569da9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:57, skipping insertion in model container [2024-12-02 08:53:57,791 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:53:57" (1/1) ... [2024-12-02 08:53:57,828 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:53:57,993 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c[1279,1292] [2024-12-02 08:53:58,201 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:53:58,209 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:53:58,220 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c[1279,1292] [2024-12-02 08:53:58,325 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:53:58,338 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:53:58,338 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58 WrapperNode [2024-12-02 08:53:58,339 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:53:58,339 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:53:58,340 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:53:58,340 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:53:58,344 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,371 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,591 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1976 [2024-12-02 08:53:58,592 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:53:58,592 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:53:58,592 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:53:58,592 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:53:58,603 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,604 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,637 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,707 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:53:58,707 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,707 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,759 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,767 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,778 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,798 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,807 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,851 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:53:58,851 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:53:58,852 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:53:58,852 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:53:58,853 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (1/1) ... [2024-12-02 08:53:58,859 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:53:58,871 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:53:58,884 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:53:58,887 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:53:58,915 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:53:58,915 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:53:58,915 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:53:58,915 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 08:53:58,915 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:53:58,916 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:53:59,144 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:53:59,146 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:54:01,407 INFO L? ?]: Removed 1091 outVars from TransFormulas that were not future-live. [2024-12-02 08:54:01,407 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:54:01,428 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:54:01,428 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 08:54:01,429 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:54:01 BoogieIcfgContainer [2024-12-02 08:54:01,429 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:54:01,431 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:54:01,431 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:54:01,436 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:54:01,436 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:53:57" (1/3) ... [2024-12-02 08:54:01,437 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c539aa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:54:01, skipping insertion in model container [2024-12-02 08:54:01,437 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:53:58" (2/3) ... [2024-12-02 08:54:01,437 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c539aa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:54:01, skipping insertion in model container [2024-12-02 08:54:01,437 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:54:01" (3/3) ... [2024-12-02 08:54:01,438 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c [2024-12-02 08:54:01,455 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:54:01,457 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c that has 2 procedures, 552 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:54:01,521 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:54:01,533 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3f218804, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:54:01,533 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:54:01,539 INFO L276 IsEmpty]: Start isEmpty. Operand has 552 states, 546 states have (on average 1.4945054945054945) internal successors, (816), 547 states have internal predecessors, (816), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:01,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-12-02 08:54:01,553 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:01,553 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:01,554 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:01,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:01,559 INFO L85 PathProgramCache]: Analyzing trace with hash 105595379, now seen corresponding path program 1 times [2024-12-02 08:54:01,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:01,567 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585295911] [2024-12-02 08:54:01,567 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:01,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:01,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:01,978 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:54:01,978 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:01,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585295911] [2024-12-02 08:54:01,979 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1585295911] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:54:01,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1921737328] [2024-12-02 08:54:01,980 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:01,980 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:54:01,980 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:54:01,982 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:54:01,985 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:54:02,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:02,454 INFO L256 TraceCheckSpWp]: Trace formula consists of 929 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-12-02 08:54:02,464 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:54:02,488 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:54:02,489 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:54:02,489 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1921737328] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:02,489 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:54:02,489 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-12-02 08:54:02,492 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1348880573] [2024-12-02 08:54:02,492 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:02,497 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 08:54:02,497 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:02,519 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 08:54:02,520 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:54:02,523 INFO L87 Difference]: Start difference. First operand has 552 states, 546 states have (on average 1.4945054945054945) internal successors, (816), 547 states have internal predecessors, (816), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 69.5) internal successors, (139), 2 states have internal predecessors, (139), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:54:02,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:02,584 INFO L93 Difference]: Finished difference Result 999 states and 1493 transitions. [2024-12-02 08:54:02,585 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 08:54:02,586 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 69.5) internal successors, (139), 2 states have internal predecessors, (139), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 149 [2024-12-02 08:54:02,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:02,595 INFO L225 Difference]: With dead ends: 999 [2024-12-02 08:54:02,595 INFO L226 Difference]: Without dead ends: 549 [2024-12-02 08:54:02,599 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:54:02,603 INFO L435 NwaCegarLoop]: 817 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 817 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:02,603 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 817 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:02,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 549 states. [2024-12-02 08:54:02,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 549 to 549. [2024-12-02 08:54:02,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 549 states, 544 states have (on average 1.4908088235294117) internal successors, (811), 544 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:02,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 549 states to 549 states and 817 transitions. [2024-12-02 08:54:02,667 INFO L78 Accepts]: Start accepts. Automaton has 549 states and 817 transitions. Word has length 149 [2024-12-02 08:54:02,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:02,667 INFO L471 AbstractCegarLoop]: Abstraction has 549 states and 817 transitions. [2024-12-02 08:54:02,668 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 69.5) internal successors, (139), 2 states have internal predecessors, (139), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:54:02,668 INFO L276 IsEmpty]: Start isEmpty. Operand 549 states and 817 transitions. [2024-12-02 08:54:02,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-12-02 08:54:02,671 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:02,671 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:02,680 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:54:02,872 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:54:02,872 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:02,873 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:02,873 INFO L85 PathProgramCache]: Analyzing trace with hash 677396781, now seen corresponding path program 1 times [2024-12-02 08:54:02,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:02,873 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1232341126] [2024-12-02 08:54:02,873 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:02,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:03,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:03,950 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:03,951 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:03,951 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1232341126] [2024-12-02 08:54:03,951 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1232341126] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:03,951 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:03,951 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:03,951 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2137849837] [2024-12-02 08:54:03,951 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:03,952 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:03,952 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:03,953 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:03,954 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:03,954 INFO L87 Difference]: Start difference. First operand 549 states and 817 transitions. Second operand has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:04,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:04,002 INFO L93 Difference]: Finished difference Result 553 states and 821 transitions. [2024-12-02 08:54:04,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:04,003 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 149 [2024-12-02 08:54:04,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:04,006 INFO L225 Difference]: With dead ends: 553 [2024-12-02 08:54:04,006 INFO L226 Difference]: Without dead ends: 551 [2024-12-02 08:54:04,007 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:04,008 INFO L435 NwaCegarLoop]: 815 mSDtfsCounter, 0 mSDsluCounter, 1624 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2439 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:04,008 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2439 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:04,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2024-12-02 08:54:04,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551. [2024-12-02 08:54:04,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 551 states, 546 states have (on average 1.489010989010989) internal successors, (813), 546 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:04,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 819 transitions. [2024-12-02 08:54:04,029 INFO L78 Accepts]: Start accepts. Automaton has 551 states and 819 transitions. Word has length 149 [2024-12-02 08:54:04,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:04,030 INFO L471 AbstractCegarLoop]: Abstraction has 551 states and 819 transitions. [2024-12-02 08:54:04,030 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:04,031 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 819 transitions. [2024-12-02 08:54:04,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2024-12-02 08:54:04,033 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:04,033 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:04,033 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 08:54:04,034 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:04,034 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:04,034 INFO L85 PathProgramCache]: Analyzing trace with hash -473840291, now seen corresponding path program 1 times [2024-12-02 08:54:04,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:04,034 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350780838] [2024-12-02 08:54:04,034 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:04,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:04,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:04,585 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:04,585 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:04,585 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350780838] [2024-12-02 08:54:04,585 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1350780838] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:04,585 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:04,585 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:04,586 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648615324] [2024-12-02 08:54:04,586 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:04,586 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:04,586 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:04,587 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:04,587 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:04,588 INFO L87 Difference]: Start difference. First operand 551 states and 819 transitions. Second operand has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:05,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:05,065 INFO L93 Difference]: Finished difference Result 1371 states and 2041 transitions. [2024-12-02 08:54:05,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:54:05,066 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 150 [2024-12-02 08:54:05,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:05,069 INFO L225 Difference]: With dead ends: 1371 [2024-12-02 08:54:05,069 INFO L226 Difference]: Without dead ends: 551 [2024-12-02 08:54:05,070 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:54:05,071 INFO L435 NwaCegarLoop]: 861 mSDtfsCounter, 1618 mSDsluCounter, 1490 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1618 SdHoareTripleChecker+Valid, 2351 SdHoareTripleChecker+Invalid, 339 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:05,071 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1618 Valid, 2351 Invalid, 339 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:54:05,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2024-12-02 08:54:05,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551. [2024-12-02 08:54:05,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 551 states, 546 states have (on average 1.4871794871794872) internal successors, (812), 546 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:05,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 818 transitions. [2024-12-02 08:54:05,087 INFO L78 Accepts]: Start accepts. Automaton has 551 states and 818 transitions. Word has length 150 [2024-12-02 08:54:05,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:05,087 INFO L471 AbstractCegarLoop]: Abstraction has 551 states and 818 transitions. [2024-12-02 08:54:05,087 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:05,088 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 818 transitions. [2024-12-02 08:54:05,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2024-12-02 08:54:05,089 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:05,090 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:05,090 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 08:54:05,090 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:05,090 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:05,090 INFO L85 PathProgramCache]: Analyzing trace with hash -1290588625, now seen corresponding path program 1 times [2024-12-02 08:54:05,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:05,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321264121] [2024-12-02 08:54:05,091 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:05,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:05,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:05,555 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:05,555 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:05,555 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1321264121] [2024-12-02 08:54:05,555 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1321264121] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:05,555 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:05,556 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:05,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [372353867] [2024-12-02 08:54:05,556 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:05,556 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:05,556 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:05,557 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:05,557 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:05,557 INFO L87 Difference]: Start difference. First operand 551 states and 818 transitions. Second operand has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:05,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:05,602 INFO L93 Difference]: Finished difference Result 1002 states and 1487 transitions. [2024-12-02 08:54:05,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:05,603 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 151 [2024-12-02 08:54:05,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:05,606 INFO L225 Difference]: With dead ends: 1002 [2024-12-02 08:54:05,606 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:05,607 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:05,608 INFO L435 NwaCegarLoop]: 814 mSDtfsCounter, 0 mSDsluCounter, 1618 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2432 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:05,608 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2432 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:05,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:05,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:05,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4854014598540146) internal successors, (814), 548 states have internal predecessors, (814), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:05,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 820 transitions. [2024-12-02 08:54:05,624 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 820 transitions. Word has length 151 [2024-12-02 08:54:05,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:05,625 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 820 transitions. [2024-12-02 08:54:05,625 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:05,625 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 820 transitions. [2024-12-02 08:54:05,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2024-12-02 08:54:05,627 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:05,627 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:05,627 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 08:54:05,628 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:05,628 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:05,628 INFO L85 PathProgramCache]: Analyzing trace with hash 1843460468, now seen corresponding path program 1 times [2024-12-02 08:54:05,628 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:05,628 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173537042] [2024-12-02 08:54:05,628 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:05,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:05,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:06,268 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:06,268 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:06,268 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173537042] [2024-12-02 08:54:06,268 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1173537042] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:06,268 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:06,268 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:06,269 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [537820215] [2024-12-02 08:54:06,269 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:06,269 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:06,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:06,270 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:06,270 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:06,270 INFO L87 Difference]: Start difference. First operand 553 states and 820 transitions. Second operand has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:06,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:06,484 INFO L93 Difference]: Finished difference Result 1004 states and 1488 transitions. [2024-12-02 08:54:06,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:06,485 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 152 [2024-12-02 08:54:06,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:06,487 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:06,488 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:06,488 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:06,489 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 688 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 688 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:06,489 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [688 Valid, 1470 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:54:06,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:06,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:06,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4835766423357664) internal successors, (813), 548 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:06,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 819 transitions. [2024-12-02 08:54:06,510 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 819 transitions. Word has length 152 [2024-12-02 08:54:06,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:06,511 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 819 transitions. [2024-12-02 08:54:06,511 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:06,511 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 819 transitions. [2024-12-02 08:54:06,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2024-12-02 08:54:06,513 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:06,513 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:06,513 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 08:54:06,514 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:06,514 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:06,514 INFO L85 PathProgramCache]: Analyzing trace with hash 390645355, now seen corresponding path program 1 times [2024-12-02 08:54:06,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:06,514 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225914121] [2024-12-02 08:54:06,515 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:06,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:06,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:07,014 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:07,015 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:07,015 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225914121] [2024-12-02 08:54:07,015 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [225914121] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:07,015 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:07,015 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:07,015 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [262680726] [2024-12-02 08:54:07,015 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:07,016 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:07,016 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:07,016 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:07,016 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:07,017 INFO L87 Difference]: Start difference. First operand 553 states and 819 transitions. Second operand has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:07,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:07,191 INFO L93 Difference]: Finished difference Result 1016 states and 1503 transitions. [2024-12-02 08:54:07,192 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:54:07,192 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 153 [2024-12-02 08:54:07,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:07,195 INFO L225 Difference]: With dead ends: 1016 [2024-12-02 08:54:07,195 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:07,196 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:54:07,196 INFO L435 NwaCegarLoop]: 803 mSDtfsCounter, 711 mSDsluCounter, 1541 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 711 SdHoareTripleChecker+Valid, 2344 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:07,196 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [711 Valid, 2344 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:07,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:07,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:07,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4817518248175183) internal successors, (812), 548 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:07,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 818 transitions. [2024-12-02 08:54:07,213 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 818 transitions. Word has length 153 [2024-12-02 08:54:07,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:07,214 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 818 transitions. [2024-12-02 08:54:07,214 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:07,214 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 818 transitions. [2024-12-02 08:54:07,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2024-12-02 08:54:07,216 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:07,216 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:07,216 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 08:54:07,216 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:07,217 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:07,217 INFO L85 PathProgramCache]: Analyzing trace with hash 2036349610, now seen corresponding path program 1 times [2024-12-02 08:54:07,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:07,217 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [861891468] [2024-12-02 08:54:07,217 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:07,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:07,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:07,646 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:07,646 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:07,646 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [861891468] [2024-12-02 08:54:07,646 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [861891468] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:07,646 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:07,647 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:07,647 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309712920] [2024-12-02 08:54:07,647 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:07,647 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:07,647 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:07,648 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:07,648 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:07,648 INFO L87 Difference]: Start difference. First operand 553 states and 818 transitions. Second operand has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:07,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:07,846 INFO L93 Difference]: Finished difference Result 1004 states and 1484 transitions. [2024-12-02 08:54:07,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:07,847 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 154 [2024-12-02 08:54:07,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:07,849 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:07,849 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:07,850 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:07,851 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 1495 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1498 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:07,851 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1498 Valid, 1470 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:54:07,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:07,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:07,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.47992700729927) internal successors, (811), 548 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:07,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 817 transitions. [2024-12-02 08:54:07,868 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 817 transitions. Word has length 154 [2024-12-02 08:54:07,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:07,868 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 817 transitions. [2024-12-02 08:54:07,868 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:07,868 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 817 transitions. [2024-12-02 08:54:07,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2024-12-02 08:54:07,870 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:07,870 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:07,870 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 08:54:07,870 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:07,871 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:07,871 INFO L85 PathProgramCache]: Analyzing trace with hash -99097038, now seen corresponding path program 1 times [2024-12-02 08:54:07,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:07,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664797735] [2024-12-02 08:54:07,871 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:07,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:07,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:08,248 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:08,248 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:08,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664797735] [2024-12-02 08:54:08,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664797735] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:08,249 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:08,249 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:08,249 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689642223] [2024-12-02 08:54:08,249 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:08,249 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:08,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:08,250 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:08,250 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:08,250 INFO L87 Difference]: Start difference. First operand 553 states and 817 transitions. Second operand has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:08,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:08,427 INFO L93 Difference]: Finished difference Result 1004 states and 1482 transitions. [2024-12-02 08:54:08,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:08,428 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 155 [2024-12-02 08:54:08,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:08,430 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:08,431 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:08,431 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:08,432 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 798 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 801 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:08,432 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [801 Valid, 1477 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:08,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:08,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:08,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4781021897810218) internal successors, (810), 548 states have internal predecessors, (810), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:08,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 816 transitions. [2024-12-02 08:54:08,447 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 816 transitions. Word has length 155 [2024-12-02 08:54:08,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:08,447 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 816 transitions. [2024-12-02 08:54:08,448 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:08,448 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 816 transitions. [2024-12-02 08:54:08,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-02 08:54:08,449 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:08,449 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:08,450 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 08:54:08,450 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:08,450 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:08,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1803096401, now seen corresponding path program 1 times [2024-12-02 08:54:08,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:08,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430870160] [2024-12-02 08:54:08,450 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:08,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:08,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:08,805 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:08,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:08,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430870160] [2024-12-02 08:54:08,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1430870160] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:08,805 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:08,805 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:08,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2080078254] [2024-12-02 08:54:08,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:08,806 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:08,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:08,806 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:08,806 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:08,807 INFO L87 Difference]: Start difference. First operand 553 states and 816 transitions. Second operand has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:08,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:08,993 INFO L93 Difference]: Finished difference Result 1004 states and 1480 transitions. [2024-12-02 08:54:08,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:08,994 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 156 [2024-12-02 08:54:08,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:08,997 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:08,997 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:08,998 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:08,998 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 1479 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1482 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:08,998 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1482 Valid, 1470 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:09,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:09,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:09,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4762773722627738) internal successors, (809), 548 states have internal predecessors, (809), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:09,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 815 transitions. [2024-12-02 08:54:09,015 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 815 transitions. Word has length 156 [2024-12-02 08:54:09,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:09,015 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 815 transitions. [2024-12-02 08:54:09,016 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:09,016 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 815 transitions. [2024-12-02 08:54:09,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2024-12-02 08:54:09,018 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:09,018 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:09,018 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 08:54:09,018 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:09,018 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:09,019 INFO L85 PathProgramCache]: Analyzing trace with hash 377220473, now seen corresponding path program 1 times [2024-12-02 08:54:09,019 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:09,019 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [348321015] [2024-12-02 08:54:09,019 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:09,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:09,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:09,374 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:09,374 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:09,375 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [348321015] [2024-12-02 08:54:09,375 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [348321015] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:09,375 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:09,375 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:09,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [361769694] [2024-12-02 08:54:09,375 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:09,375 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:09,375 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:09,376 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:09,376 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:09,376 INFO L87 Difference]: Start difference. First operand 553 states and 815 transitions. Second operand has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:09,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:09,559 INFO L93 Difference]: Finished difference Result 1004 states and 1478 transitions. [2024-12-02 08:54:09,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:09,560 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 157 [2024-12-02 08:54:09,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:09,562 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:09,563 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:09,563 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:09,564 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 790 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 793 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:09,564 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [793 Valid, 1477 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:09,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:09,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:09,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4744525547445255) internal successors, (808), 548 states have internal predecessors, (808), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:09,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 814 transitions. [2024-12-02 08:54:09,580 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 814 transitions. Word has length 157 [2024-12-02 08:54:09,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:09,580 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 814 transitions. [2024-12-02 08:54:09,581 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:09,581 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 814 transitions. [2024-12-02 08:54:09,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-02 08:54:09,583 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:09,583 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:09,583 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 08:54:09,583 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:09,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:09,584 INFO L85 PathProgramCache]: Analyzing trace with hash 644015992, now seen corresponding path program 1 times [2024-12-02 08:54:09,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:09,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248026336] [2024-12-02 08:54:09,584 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:09,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:09,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:09,967 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:09,967 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:09,968 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248026336] [2024-12-02 08:54:09,968 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1248026336] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:09,968 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:09,968 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:09,968 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1229125543] [2024-12-02 08:54:09,968 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:09,968 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:09,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:09,969 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:09,969 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:09,969 INFO L87 Difference]: Start difference. First operand 553 states and 814 transitions. Second operand has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:10,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:10,153 INFO L93 Difference]: Finished difference Result 1004 states and 1476 transitions. [2024-12-02 08:54:10,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:10,154 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 158 [2024-12-02 08:54:10,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:10,157 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:10,157 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:10,157 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:10,158 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 1463 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1466 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:10,158 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1466 Valid, 1470 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:10,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:10,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:10,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4726277372262773) internal successors, (807), 548 states have internal predecessors, (807), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:10,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 813 transitions. [2024-12-02 08:54:10,175 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 813 transitions. Word has length 158 [2024-12-02 08:54:10,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:10,176 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 813 transitions. [2024-12-02 08:54:10,176 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:10,176 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 813 transitions. [2024-12-02 08:54:10,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-12-02 08:54:10,178 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:10,178 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:10,178 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 08:54:10,178 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:10,179 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:10,179 INFO L85 PathProgramCache]: Analyzing trace with hash -808870848, now seen corresponding path program 1 times [2024-12-02 08:54:10,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:10,179 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [681005617] [2024-12-02 08:54:10,179 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:10,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:10,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:10,573 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:10,573 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:10,573 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [681005617] [2024-12-02 08:54:10,573 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [681005617] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:10,573 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:10,574 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:10,574 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1954132622] [2024-12-02 08:54:10,574 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:10,574 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:10,574 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:10,575 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:10,575 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:10,575 INFO L87 Difference]: Start difference. First operand 553 states and 813 transitions. Second operand has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:10,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:10,767 INFO L93 Difference]: Finished difference Result 1004 states and 1474 transitions. [2024-12-02 08:54:10,767 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:10,768 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 159 [2024-12-02 08:54:10,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:10,770 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:10,770 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:10,771 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:10,772 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 779 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 782 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:10,772 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [782 Valid, 1477 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:10,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:10,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:10,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4708029197080292) internal successors, (806), 548 states have internal predecessors, (806), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:10,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 812 transitions. [2024-12-02 08:54:10,794 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 812 transitions. Word has length 159 [2024-12-02 08:54:10,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:10,795 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 812 transitions. [2024-12-02 08:54:10,795 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:10,795 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 812 transitions. [2024-12-02 08:54:10,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2024-12-02 08:54:10,798 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:10,798 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:10,798 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 08:54:10,798 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:10,799 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:10,799 INFO L85 PathProgramCache]: Analyzing trace with hash -476571176, now seen corresponding path program 1 times [2024-12-02 08:54:10,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:10,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522710592] [2024-12-02 08:54:10,799 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:10,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:10,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:11,140 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:11,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:11,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1522710592] [2024-12-02 08:54:11,140 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1522710592] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:11,140 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:11,141 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:11,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1363018137] [2024-12-02 08:54:11,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:11,141 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:11,141 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:11,142 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:11,142 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:11,142 INFO L87 Difference]: Start difference. First operand 553 states and 812 transitions. Second operand has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:11,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:11,204 INFO L93 Difference]: Finished difference Result 1004 states and 1472 transitions. [2024-12-02 08:54:11,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:11,204 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 160 [2024-12-02 08:54:11,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:11,206 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:11,206 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:11,206 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:11,207 INFO L435 NwaCegarLoop]: 786 mSDtfsCounter, 703 mSDsluCounter, 788 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 703 SdHoareTripleChecker+Valid, 1574 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:11,207 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [703 Valid, 1574 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:11,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:11,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:11,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.467153284671533) internal successors, (804), 548 states have internal predecessors, (804), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:11,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 810 transitions. [2024-12-02 08:54:11,216 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 810 transitions. Word has length 160 [2024-12-02 08:54:11,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:11,217 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 810 transitions. [2024-12-02 08:54:11,217 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:11,217 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 810 transitions. [2024-12-02 08:54:11,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-12-02 08:54:11,218 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:11,219 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:11,219 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 08:54:11,219 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:11,219 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:11,219 INFO L85 PathProgramCache]: Analyzing trace with hash -702605099, now seen corresponding path program 1 times [2024-12-02 08:54:11,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:11,219 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [143897886] [2024-12-02 08:54:11,219 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:11,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:11,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:11,617 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:11,617 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:11,617 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [143897886] [2024-12-02 08:54:11,617 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [143897886] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:11,617 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:11,617 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:11,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1479339423] [2024-12-02 08:54:11,617 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:11,618 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:11,618 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:11,618 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:11,618 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:11,619 INFO L87 Difference]: Start difference. First operand 553 states and 810 transitions. Second operand has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:11,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:11,684 INFO L93 Difference]: Finished difference Result 1004 states and 1468 transitions. [2024-12-02 08:54:11,685 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:11,685 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 162 [2024-12-02 08:54:11,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:11,687 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:11,687 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:11,688 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:11,688 INFO L435 NwaCegarLoop]: 786 mSDtfsCounter, 793 mSDsluCounter, 795 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 796 SdHoareTripleChecker+Valid, 1581 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:11,688 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [796 Valid, 1581 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:11,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:11,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:11,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4653284671532847) internal successors, (803), 548 states have internal predecessors, (803), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:11,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 809 transitions. [2024-12-02 08:54:11,703 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 809 transitions. Word has length 162 [2024-12-02 08:54:11,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:11,703 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 809 transitions. [2024-12-02 08:54:11,703 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:11,703 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 809 transitions. [2024-12-02 08:54:11,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2024-12-02 08:54:11,705 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:11,705 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:11,705 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 08:54:11,705 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:11,705 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:11,705 INFO L85 PathProgramCache]: Analyzing trace with hash 1219800063, now seen corresponding path program 1 times [2024-12-02 08:54:11,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:11,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386030362] [2024-12-02 08:54:11,706 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:11,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:11,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:12,172 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:12,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:12,172 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [386030362] [2024-12-02 08:54:12,172 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [386030362] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:12,172 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:12,172 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:12,173 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87609575] [2024-12-02 08:54:12,173 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:12,173 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:12,173 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:12,174 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:12,174 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:12,174 INFO L87 Difference]: Start difference. First operand 553 states and 809 transitions. Second operand has 4 states, 4 states have (on average 37.75) internal successors, (151), 4 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:12,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:12,278 INFO L93 Difference]: Finished difference Result 1004 states and 1466 transitions. [2024-12-02 08:54:12,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:12,278 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 37.75) internal successors, (151), 4 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 163 [2024-12-02 08:54:12,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:12,280 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:12,280 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:12,281 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:12,281 INFO L435 NwaCegarLoop]: 763 mSDtfsCounter, 690 mSDsluCounter, 765 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 690 SdHoareTripleChecker+Valid, 1528 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:12,281 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [690 Valid, 1528 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:12,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:12,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:12,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4635036496350364) internal successors, (802), 548 states have internal predecessors, (802), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:12,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 808 transitions. [2024-12-02 08:54:12,291 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 808 transitions. Word has length 163 [2024-12-02 08:54:12,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:12,291 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 808 transitions. [2024-12-02 08:54:12,291 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 37.75) internal successors, (151), 4 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:12,291 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 808 transitions. [2024-12-02 08:54:12,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2024-12-02 08:54:12,293 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:12,293 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:12,293 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-02 08:54:12,293 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:12,293 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:12,293 INFO L85 PathProgramCache]: Analyzing trace with hash -1228913216, now seen corresponding path program 1 times [2024-12-02 08:54:12,293 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:12,293 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962200473] [2024-12-02 08:54:12,293 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:12,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:12,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:12,508 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:12,508 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:12,508 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1962200473] [2024-12-02 08:54:12,508 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1962200473] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:12,509 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:12,509 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:12,509 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [550211016] [2024-12-02 08:54:12,509 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:12,509 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:12,509 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:12,509 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:12,510 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:12,510 INFO L87 Difference]: Start difference. First operand 553 states and 808 transitions. Second operand has 5 states, 5 states have (on average 30.4) internal successors, (152), 5 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:12,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:12,602 INFO L93 Difference]: Finished difference Result 1008 states and 1469 transitions. [2024-12-02 08:54:12,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:54:12,603 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.4) internal successors, (152), 5 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 164 [2024-12-02 08:54:12,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:12,605 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:12,605 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:12,605 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:54:12,606 INFO L435 NwaCegarLoop]: 796 mSDtfsCounter, 697 mSDsluCounter, 1563 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 697 SdHoareTripleChecker+Valid, 2359 SdHoareTripleChecker+Invalid, 57 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:12,606 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [697 Valid, 2359 Invalid, 57 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:12,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:12,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:12,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4616788321167884) internal successors, (801), 548 states have internal predecessors, (801), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:12,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 807 transitions. [2024-12-02 08:54:12,616 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 807 transitions. Word has length 164 [2024-12-02 08:54:12,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:12,617 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 807 transitions. [2024-12-02 08:54:12,617 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.4) internal successors, (152), 5 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:12,617 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 807 transitions. [2024-12-02 08:54:12,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2024-12-02 08:54:12,618 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:12,619 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:12,619 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-12-02 08:54:12,619 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:12,619 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:12,619 INFO L85 PathProgramCache]: Analyzing trace with hash 1451541137, now seen corresponding path program 1 times [2024-12-02 08:54:12,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:12,619 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915850814] [2024-12-02 08:54:12,619 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:12,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:12,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:12,850 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:12,850 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:12,850 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1915850814] [2024-12-02 08:54:12,850 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1915850814] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:12,850 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:12,851 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:12,851 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1565389771] [2024-12-02 08:54:12,851 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:12,851 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:12,851 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:12,852 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:12,852 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:12,852 INFO L87 Difference]: Start difference. First operand 553 states and 807 transitions. Second operand has 5 states, 5 states have (on average 30.6) internal successors, (153), 5 states have internal predecessors, (153), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:12,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:12,980 INFO L93 Difference]: Finished difference Result 1004 states and 1462 transitions. [2024-12-02 08:54:12,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:12,981 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.6) internal successors, (153), 5 states have internal predecessors, (153), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 165 [2024-12-02 08:54:12,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:12,983 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:12,983 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:12,984 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:12,984 INFO L435 NwaCegarLoop]: 763 mSDtfsCounter, 791 mSDsluCounter, 772 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 794 SdHoareTripleChecker+Valid, 1535 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:12,984 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [794 Valid, 1535 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:12,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:12,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:12,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4598540145985401) internal successors, (800), 548 states have internal predecessors, (800), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:12,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 806 transitions. [2024-12-02 08:54:12,999 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 806 transitions. Word has length 165 [2024-12-02 08:54:13,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:13,000 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 806 transitions. [2024-12-02 08:54:13,000 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.6) internal successors, (153), 5 states have internal predecessors, (153), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:13,000 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 806 transitions. [2024-12-02 08:54:13,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2024-12-02 08:54:13,002 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:13,002 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:13,002 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 08:54:13,002 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:13,003 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:13,003 INFO L85 PathProgramCache]: Analyzing trace with hash -1972778553, now seen corresponding path program 1 times [2024-12-02 08:54:13,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:13,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1928888444] [2024-12-02 08:54:13,003 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:13,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:13,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:13,328 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:13,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:13,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1928888444] [2024-12-02 08:54:13,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1928888444] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:13,328 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:13,328 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:13,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [703490073] [2024-12-02 08:54:13,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:13,329 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:13,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:13,329 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:13,329 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:13,330 INFO L87 Difference]: Start difference. First operand 553 states and 806 transitions. Second operand has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:13,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:13,441 INFO L93 Difference]: Finished difference Result 1004 states and 1460 transitions. [2024-12-02 08:54:13,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:13,442 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 166 [2024-12-02 08:54:13,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:13,444 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:13,444 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:13,444 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:13,445 INFO L435 NwaCegarLoop]: 763 mSDtfsCounter, 1464 mSDsluCounter, 765 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1467 SdHoareTripleChecker+Valid, 1528 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:13,445 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1467 Valid, 1528 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:13,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:13,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:13,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4580291970802919) internal successors, (799), 548 states have internal predecessors, (799), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:13,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 805 transitions. [2024-12-02 08:54:13,461 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 805 transitions. Word has length 166 [2024-12-02 08:54:13,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:13,461 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 805 transitions. [2024-12-02 08:54:13,461 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:13,461 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 805 transitions. [2024-12-02 08:54:13,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-12-02 08:54:13,463 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:13,463 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:13,463 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 08:54:13,464 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:13,464 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:13,464 INFO L85 PathProgramCache]: Analyzing trace with hash 430318257, now seen corresponding path program 1 times [2024-12-02 08:54:13,464 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:13,464 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [674830108] [2024-12-02 08:54:13,465 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:13,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:13,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:13,971 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:13,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:13,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [674830108] [2024-12-02 08:54:13,971 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [674830108] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:13,971 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:13,972 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:13,972 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [388945126] [2024-12-02 08:54:13,972 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:13,972 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:13,973 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:13,973 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:13,974 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:13,974 INFO L87 Difference]: Start difference. First operand 553 states and 805 transitions. Second operand has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:54:14,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:14,052 INFO L93 Difference]: Finished difference Result 1004 states and 1458 transitions. [2024-12-02 08:54:14,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:14,053 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 167 [2024-12-02 08:54:14,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:14,056 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:14,056 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:14,056 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:14,057 INFO L435 NwaCegarLoop]: 785 mSDtfsCounter, 734 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 736 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:14,057 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [736 Valid, 1572 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:14,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:14,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:14,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4562043795620438) internal successors, (798), 548 states have internal predecessors, (798), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:14,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 804 transitions. [2024-12-02 08:54:14,076 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 804 transitions. Word has length 167 [2024-12-02 08:54:14,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:14,076 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 804 transitions. [2024-12-02 08:54:14,077 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:54:14,077 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 804 transitions. [2024-12-02 08:54:14,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-12-02 08:54:14,078 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:14,078 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:14,078 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 08:54:14,079 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:14,079 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:14,079 INFO L85 PathProgramCache]: Analyzing trace with hash -274414691, now seen corresponding path program 1 times [2024-12-02 08:54:14,079 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:14,079 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949851504] [2024-12-02 08:54:14,079 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:14,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:14,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:14,624 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:14,625 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:14,625 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949851504] [2024-12-02 08:54:14,625 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [949851504] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:14,625 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:14,625 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:14,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1615104829] [2024-12-02 08:54:14,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:14,626 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:14,626 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:14,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:14,626 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:14,627 INFO L87 Difference]: Start difference. First operand 553 states and 804 transitions. Second operand has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:54:14,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:14,700 INFO L93 Difference]: Finished difference Result 1004 states and 1456 transitions. [2024-12-02 08:54:14,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:14,701 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 168 [2024-12-02 08:54:14,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:14,703 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:54:14,703 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:54:14,704 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:14,704 INFO L435 NwaCegarLoop]: 785 mSDtfsCounter, 732 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 734 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:14,705 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [734 Valid, 1572 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:14,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:54:14,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:54:14,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4543795620437956) internal successors, (797), 548 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:14,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 803 transitions. [2024-12-02 08:54:14,719 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 803 transitions. Word has length 168 [2024-12-02 08:54:14,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:14,719 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 803 transitions. [2024-12-02 08:54:14,719 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:54:14,719 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 803 transitions. [2024-12-02 08:54:14,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2024-12-02 08:54:14,720 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:14,721 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:14,721 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 08:54:14,721 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:14,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:14,721 INFO L85 PathProgramCache]: Analyzing trace with hash 848604686, now seen corresponding path program 1 times [2024-12-02 08:54:14,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:14,721 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869271966] [2024-12-02 08:54:14,722 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:14,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:15,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:15,636 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:15,636 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:15,636 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869271966] [2024-12-02 08:54:15,637 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869271966] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:15,637 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:15,637 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:15,637 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044509461] [2024-12-02 08:54:15,637 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:15,637 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:15,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:15,638 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:15,638 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:15,638 INFO L87 Difference]: Start difference. First operand 553 states and 803 transitions. Second operand has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:15,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:15,845 INFO L93 Difference]: Finished difference Result 1010 states and 1462 transitions. [2024-12-02 08:54:15,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:54:15,846 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 169 [2024-12-02 08:54:15,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:15,848 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:54:15,848 INFO L226 Difference]: Without dead ends: 557 [2024-12-02 08:54:15,849 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:15,849 INFO L435 NwaCegarLoop]: 793 mSDtfsCounter, 2 mSDsluCounter, 2186 mSDsCounter, 0 mSdLazyCounter, 216 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2979 SdHoareTripleChecker+Invalid, 216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 216 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:15,849 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2979 Invalid, 216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 216 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:54:15,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2024-12-02 08:54:15,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 555. [2024-12-02 08:54:15,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4527272727272726) internal successors, (799), 550 states have internal predecessors, (799), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:15,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 805 transitions. [2024-12-02 08:54:15,860 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 805 transitions. Word has length 169 [2024-12-02 08:54:15,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:15,860 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 805 transitions. [2024-12-02 08:54:15,860 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:15,860 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 805 transitions. [2024-12-02 08:54:15,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2024-12-02 08:54:15,861 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:15,861 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:15,861 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 08:54:15,862 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:15,862 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:15,862 INFO L85 PathProgramCache]: Analyzing trace with hash -2121667287, now seen corresponding path program 1 times [2024-12-02 08:54:15,862 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:15,862 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490013327] [2024-12-02 08:54:15,862 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:15,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:16,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:16,247 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:16,247 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:16,247 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490013327] [2024-12-02 08:54:16,247 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1490013327] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:16,247 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:16,247 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:16,247 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1066695303] [2024-12-02 08:54:16,247 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:16,248 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:16,248 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:16,248 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:16,248 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:16,248 INFO L87 Difference]: Start difference. First operand 555 states and 805 transitions. Second operand has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:16,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:16,342 INFO L93 Difference]: Finished difference Result 1008 states and 1458 transitions. [2024-12-02 08:54:16,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:16,343 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 170 [2024-12-02 08:54:16,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:16,345 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:16,345 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:16,346 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:16,347 INFO L435 NwaCegarLoop]: 761 mSDtfsCounter, 684 mSDsluCounter, 763 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 684 SdHoareTripleChecker+Valid, 1524 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:16,347 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [684 Valid, 1524 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:16,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:16,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:16,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.450909090909091) internal successors, (798), 550 states have internal predecessors, (798), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:16,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 804 transitions. [2024-12-02 08:54:16,355 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 804 transitions. Word has length 170 [2024-12-02 08:54:16,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:16,355 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 804 transitions. [2024-12-02 08:54:16,355 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:16,355 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 804 transitions. [2024-12-02 08:54:16,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-12-02 08:54:16,356 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:16,356 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:16,356 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 08:54:16,356 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:16,356 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:16,357 INFO L85 PathProgramCache]: Analyzing trace with hash 1629691787, now seen corresponding path program 1 times [2024-12-02 08:54:16,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:16,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567698038] [2024-12-02 08:54:16,357 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:16,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:16,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:16,728 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:16,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:16,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567698038] [2024-12-02 08:54:16,728 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [567698038] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:16,728 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:16,728 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:16,728 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [715885136] [2024-12-02 08:54:16,728 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:16,729 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:16,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:16,729 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:16,729 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:16,730 INFO L87 Difference]: Start difference. First operand 555 states and 804 transitions. Second operand has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:16,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:16,833 INFO L93 Difference]: Finished difference Result 1008 states and 1456 transitions. [2024-12-02 08:54:16,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:16,834 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 171 [2024-12-02 08:54:16,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:16,836 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:16,837 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:16,837 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:16,837 INFO L435 NwaCegarLoop]: 761 mSDtfsCounter, 1360 mSDsluCounter, 763 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1360 SdHoareTripleChecker+Valid, 1524 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:16,838 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1360 Valid, 1524 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:16,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:16,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:16,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.449090909090909) internal successors, (797), 550 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:16,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 803 transitions. [2024-12-02 08:54:16,846 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 803 transitions. Word has length 171 [2024-12-02 08:54:16,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:16,846 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 803 transitions. [2024-12-02 08:54:16,846 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:16,846 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 803 transitions. [2024-12-02 08:54:16,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2024-12-02 08:54:16,847 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:16,847 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:16,847 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 08:54:16,847 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:16,848 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:16,848 INFO L85 PathProgramCache]: Analyzing trace with hash -649195798, now seen corresponding path program 1 times [2024-12-02 08:54:16,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:16,848 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712177220] [2024-12-02 08:54:16,848 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:16,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:16,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:17,196 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:17,196 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:17,196 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [712177220] [2024-12-02 08:54:17,196 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [712177220] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:17,196 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:17,196 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:17,197 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [581347866] [2024-12-02 08:54:17,197 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:17,197 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:17,197 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:17,197 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:17,198 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:17,198 INFO L87 Difference]: Start difference. First operand 555 states and 803 transitions. Second operand has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:17,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:17,294 INFO L93 Difference]: Finished difference Result 1008 states and 1454 transitions. [2024-12-02 08:54:17,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:17,295 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 172 [2024-12-02 08:54:17,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:17,296 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:17,296 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:17,297 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:17,297 INFO L435 NwaCegarLoop]: 761 mSDtfsCounter, 1354 mSDsluCounter, 763 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1354 SdHoareTripleChecker+Valid, 1524 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:17,297 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1354 Valid, 1524 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:17,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:17,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:17,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4472727272727273) internal successors, (796), 550 states have internal predecessors, (796), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:17,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 802 transitions. [2024-12-02 08:54:17,310 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 802 transitions. Word has length 172 [2024-12-02 08:54:17,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:17,310 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 802 transitions. [2024-12-02 08:54:17,310 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:17,310 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 802 transitions. [2024-12-02 08:54:17,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-12-02 08:54:17,311 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:17,311 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:17,311 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 08:54:17,311 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:17,312 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:17,312 INFO L85 PathProgramCache]: Analyzing trace with hash -63304310, now seen corresponding path program 1 times [2024-12-02 08:54:17,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:17,312 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635676888] [2024-12-02 08:54:17,312 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:17,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:17,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:17,731 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:17,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:17,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635676888] [2024-12-02 08:54:17,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1635676888] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:17,732 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:17,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:17,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092551947] [2024-12-02 08:54:17,732 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:17,732 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:17,732 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:17,733 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:17,733 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:17,733 INFO L87 Difference]: Start difference. First operand 555 states and 802 transitions. Second operand has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:17,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:17,906 INFO L93 Difference]: Finished difference Result 1008 states and 1452 transitions. [2024-12-02 08:54:17,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:17,907 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 173 [2024-12-02 08:54:17,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:17,909 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:17,909 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:17,909 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:17,910 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 666 mSDsluCounter, 724 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 666 SdHoareTripleChecker+Valid, 1446 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:17,910 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [666 Valid, 1446 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:17,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:17,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:17,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4454545454545455) internal successors, (795), 550 states have internal predecessors, (795), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:17,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 801 transitions. [2024-12-02 08:54:17,921 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 801 transitions. Word has length 173 [2024-12-02 08:54:17,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:17,922 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 801 transitions. [2024-12-02 08:54:17,922 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:17,922 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 801 transitions. [2024-12-02 08:54:17,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2024-12-02 08:54:17,923 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:17,924 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:17,924 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 08:54:17,924 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:17,924 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:17,924 INFO L85 PathProgramCache]: Analyzing trace with hash 310833802, now seen corresponding path program 1 times [2024-12-02 08:54:17,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:17,925 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079013254] [2024-12-02 08:54:17,925 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:17,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:18,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:18,355 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:18,356 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:18,356 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2079013254] [2024-12-02 08:54:18,356 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2079013254] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:18,356 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:18,356 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:18,356 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318955765] [2024-12-02 08:54:18,356 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:18,357 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:18,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:18,357 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:18,357 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:18,358 INFO L87 Difference]: Start difference. First operand 555 states and 801 transitions. Second operand has 5 states, 5 states have (on average 32.4) internal successors, (162), 5 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:18,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:18,533 INFO L93 Difference]: Finished difference Result 1008 states and 1450 transitions. [2024-12-02 08:54:18,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:18,534 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.4) internal successors, (162), 5 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 174 [2024-12-02 08:54:18,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:18,536 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:18,536 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:18,536 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:18,536 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 664 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 664 SdHoareTripleChecker+Valid, 1453 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:18,537 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [664 Valid, 1453 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:18,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:18,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:18,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4436363636363636) internal successors, (794), 550 states have internal predecessors, (794), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:18,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 800 transitions. [2024-12-02 08:54:18,554 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 800 transitions. Word has length 174 [2024-12-02 08:54:18,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:18,555 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 800 transitions. [2024-12-02 08:54:18,555 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.4) internal successors, (162), 5 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:18,555 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 800 transitions. [2024-12-02 08:54:18,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2024-12-02 08:54:18,557 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:18,557 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:18,557 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 08:54:18,557 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:18,557 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:18,558 INFO L85 PathProgramCache]: Analyzing trace with hash -361759605, now seen corresponding path program 1 times [2024-12-02 08:54:18,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:18,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944602444] [2024-12-02 08:54:18,558 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:18,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:18,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:19,037 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:19,037 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:19,037 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944602444] [2024-12-02 08:54:19,037 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [944602444] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:19,037 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:19,037 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:19,037 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1416980262] [2024-12-02 08:54:19,037 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:19,038 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:19,038 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:19,038 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:19,038 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:19,038 INFO L87 Difference]: Start difference. First operand 555 states and 800 transitions. Second operand has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:19,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:19,220 INFO L93 Difference]: Finished difference Result 1008 states and 1448 transitions. [2024-12-02 08:54:19,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:19,221 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 175 [2024-12-02 08:54:19,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:19,223 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:19,223 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:19,224 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:19,225 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 663 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 663 SdHoareTripleChecker+Valid, 1453 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:19,225 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [663 Valid, 1453 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:19,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:19,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:19,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4418181818181819) internal successors, (793), 550 states have internal predecessors, (793), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:19,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 799 transitions. [2024-12-02 08:54:19,241 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 799 transitions. Word has length 175 [2024-12-02 08:54:19,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:19,241 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 799 transitions. [2024-12-02 08:54:19,241 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:19,242 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 799 transitions. [2024-12-02 08:54:19,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-12-02 08:54:19,243 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:19,243 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:19,243 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-02 08:54:19,243 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:19,244 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:19,244 INFO L85 PathProgramCache]: Analyzing trace with hash 204745545, now seen corresponding path program 1 times [2024-12-02 08:54:19,244 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:19,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670605521] [2024-12-02 08:54:19,244 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:19,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:19,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:19,768 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:19,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:19,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670605521] [2024-12-02 08:54:19,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1670605521] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:19,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:19,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:19,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761217514] [2024-12-02 08:54:19,769 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:19,769 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:19,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:19,770 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:19,770 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:19,770 INFO L87 Difference]: Start difference. First operand 555 states and 799 transitions. Second operand has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:19,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:19,906 INFO L93 Difference]: Finished difference Result 1008 states and 1446 transitions. [2024-12-02 08:54:19,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:19,906 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 176 [2024-12-02 08:54:19,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:19,908 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:19,908 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:19,909 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:19,909 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 662 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 662 SdHoareTripleChecker+Valid, 1453 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:19,910 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [662 Valid, 1453 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:19,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:19,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:19,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.44) internal successors, (792), 550 states have internal predecessors, (792), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:19,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 798 transitions. [2024-12-02 08:54:19,922 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 798 transitions. Word has length 176 [2024-12-02 08:54:19,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:19,922 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 798 transitions. [2024-12-02 08:54:19,923 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:19,923 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 798 transitions. [2024-12-02 08:54:19,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-12-02 08:54:19,924 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:19,924 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:19,924 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-12-02 08:54:19,924 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:19,924 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:19,924 INFO L85 PathProgramCache]: Analyzing trace with hash 1282586636, now seen corresponding path program 1 times [2024-12-02 08:54:19,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:19,925 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1878255571] [2024-12-02 08:54:19,925 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:19,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:20,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:20,430 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:20,430 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:20,430 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1878255571] [2024-12-02 08:54:20,430 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1878255571] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:20,430 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:20,430 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:20,430 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366478857] [2024-12-02 08:54:20,431 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:20,431 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:20,431 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:20,431 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:20,432 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:20,432 INFO L87 Difference]: Start difference. First operand 555 states and 798 transitions. Second operand has 4 states, 4 states have (on average 41.25) internal successors, (165), 4 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:20,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:20,563 INFO L93 Difference]: Finished difference Result 1008 states and 1444 transitions. [2024-12-02 08:54:20,564 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:20,564 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 41.25) internal successors, (165), 4 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 177 [2024-12-02 08:54:20,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:20,566 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:20,566 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:20,567 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:20,567 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 646 mSDsluCounter, 724 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 646 SdHoareTripleChecker+Valid, 1446 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:20,567 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [646 Valid, 1446 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:20,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:20,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:20,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4381818181818182) internal successors, (791), 550 states have internal predecessors, (791), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:20,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 797 transitions. [2024-12-02 08:54:20,579 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 797 transitions. Word has length 177 [2024-12-02 08:54:20,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:20,580 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 797 transitions. [2024-12-02 08:54:20,580 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 41.25) internal successors, (165), 4 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:20,580 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 797 transitions. [2024-12-02 08:54:20,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2024-12-02 08:54:20,581 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:20,581 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:20,581 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-12-02 08:54:20,581 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:20,582 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:20,582 INFO L85 PathProgramCache]: Analyzing trace with hash 77881224, now seen corresponding path program 1 times [2024-12-02 08:54:20,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:20,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253098838] [2024-12-02 08:54:20,582 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:20,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:20,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:21,073 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:21,073 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:21,073 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253098838] [2024-12-02 08:54:21,073 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1253098838] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:21,073 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:21,073 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:21,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240991562] [2024-12-02 08:54:21,073 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:21,073 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:21,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:21,074 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:21,074 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:21,074 INFO L87 Difference]: Start difference. First operand 555 states and 797 transitions. Second operand has 5 states, 5 states have (on average 33.2) internal successors, (166), 5 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:21,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:21,204 INFO L93 Difference]: Finished difference Result 1008 states and 1442 transitions. [2024-12-02 08:54:21,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:21,205 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.2) internal successors, (166), 5 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 178 [2024-12-02 08:54:21,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:21,206 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:21,206 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:21,206 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:21,207 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 660 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 660 SdHoareTripleChecker+Valid, 1453 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:21,207 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [660 Valid, 1453 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:21,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:21,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:21,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4363636363636363) internal successors, (790), 550 states have internal predecessors, (790), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:21,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 796 transitions. [2024-12-02 08:54:21,213 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 796 transitions. Word has length 178 [2024-12-02 08:54:21,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:21,213 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 796 transitions. [2024-12-02 08:54:21,213 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.2) internal successors, (166), 5 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:21,213 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 796 transitions. [2024-12-02 08:54:21,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2024-12-02 08:54:21,214 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:21,214 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:21,215 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-12-02 08:54:21,215 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:21,215 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:21,215 INFO L85 PathProgramCache]: Analyzing trace with hash -2054770675, now seen corresponding path program 1 times [2024-12-02 08:54:21,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:21,215 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [553556582] [2024-12-02 08:54:21,215 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:21,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:21,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:21,625 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:21,625 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:21,625 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [553556582] [2024-12-02 08:54:21,625 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [553556582] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:21,625 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:21,625 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:21,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [216432094] [2024-12-02 08:54:21,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:21,625 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:21,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:21,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:21,626 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:21,626 INFO L87 Difference]: Start difference. First operand 555 states and 796 transitions. Second operand has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:21,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:21,785 INFO L93 Difference]: Finished difference Result 1008 states and 1440 transitions. [2024-12-02 08:54:21,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:21,786 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 179 [2024-12-02 08:54:21,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:21,787 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:54:21,787 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 08:54:21,787 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:21,788 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 659 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 659 SdHoareTripleChecker+Valid, 1453 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:21,788 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [659 Valid, 1453 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:21,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 08:54:21,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 08:54:21,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4345454545454546) internal successors, (789), 550 states have internal predecessors, (789), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:21,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 795 transitions. [2024-12-02 08:54:21,796 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 795 transitions. Word has length 179 [2024-12-02 08:54:21,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:21,796 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 795 transitions. [2024-12-02 08:54:21,796 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:21,796 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 795 transitions. [2024-12-02 08:54:21,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2024-12-02 08:54:21,797 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:21,798 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:21,798 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-02 08:54:21,798 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:21,798 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:21,798 INFO L85 PathProgramCache]: Analyzing trace with hash -1540677817, now seen corresponding path program 1 times [2024-12-02 08:54:21,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:21,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1596592061] [2024-12-02 08:54:21,799 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:21,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:21,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:22,383 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:22,383 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:22,383 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1596592061] [2024-12-02 08:54:22,383 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1596592061] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:22,383 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:22,383 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:22,383 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985673081] [2024-12-02 08:54:22,383 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:22,384 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:22,384 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:22,384 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:22,384 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:22,384 INFO L87 Difference]: Start difference. First operand 555 states and 795 transitions. Second operand has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:22,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:22,689 INFO L93 Difference]: Finished difference Result 1010 states and 1441 transitions. [2024-12-02 08:54:22,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:54:22,689 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 180 [2024-12-02 08:54:22,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:22,691 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:54:22,691 INFO L226 Difference]: Without dead ends: 557 [2024-12-02 08:54:22,691 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:22,691 INFO L435 NwaCegarLoop]: 599 mSDtfsCounter, 690 mSDsluCounter, 1177 mSDsCounter, 0 mSdLazyCounter, 583 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 690 SdHoareTripleChecker+Valid, 1776 SdHoareTripleChecker+Invalid, 583 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 583 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:22,692 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [690 Valid, 1776 Invalid, 583 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 583 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:54:22,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2024-12-02 08:54:22,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 556. [2024-12-02 08:54:22,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4337568058076224) internal successors, (790), 551 states have internal predecessors, (790), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:22,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 796 transitions. [2024-12-02 08:54:22,705 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 796 transitions. Word has length 180 [2024-12-02 08:54:22,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:22,706 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 796 transitions. [2024-12-02 08:54:22,706 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:22,706 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 796 transitions. [2024-12-02 08:54:22,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2024-12-02 08:54:22,707 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:22,707 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:22,707 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-12-02 08:54:22,707 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:22,707 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:22,707 INFO L85 PathProgramCache]: Analyzing trace with hash 445710734, now seen corresponding path program 1 times [2024-12-02 08:54:22,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:22,707 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141659093] [2024-12-02 08:54:22,707 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:22,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:22,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:23,291 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:23,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:23,291 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141659093] [2024-12-02 08:54:23,292 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1141659093] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:23,292 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:23,292 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:54:23,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593049523] [2024-12-02 08:54:23,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:23,292 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:54:23,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:23,293 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:54:23,293 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:23,293 INFO L87 Difference]: Start difference. First operand 556 states and 796 transitions. Second operand has 6 states, 6 states have (on average 28.0) internal successors, (168), 6 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:23,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:23,592 INFO L93 Difference]: Finished difference Result 1079 states and 1515 transitions. [2024-12-02 08:54:23,592 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:54:23,592 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.0) internal successors, (168), 6 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 180 [2024-12-02 08:54:23,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:23,594 INFO L225 Difference]: With dead ends: 1079 [2024-12-02 08:54:23,594 INFO L226 Difference]: Without dead ends: 621 [2024-12-02 08:54:23,594 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:54:23,595 INFO L435 NwaCegarLoop]: 830 mSDtfsCounter, 73 mSDsluCounter, 3055 mSDsCounter, 0 mSdLazyCounter, 325 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 3885 SdHoareTripleChecker+Invalid, 327 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 325 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:23,595 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 3885 Invalid, 327 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 325 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:54:23,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 621 states. [2024-12-02 08:54:23,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 621 to 556. [2024-12-02 08:54:23,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4319419237749547) internal successors, (789), 551 states have internal predecessors, (789), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:54:23,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 795 transitions. [2024-12-02 08:54:23,605 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 795 transitions. Word has length 180 [2024-12-02 08:54:23,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:23,605 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 795 transitions. [2024-12-02 08:54:23,605 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.0) internal successors, (168), 6 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:23,605 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 795 transitions. [2024-12-02 08:54:23,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2024-12-02 08:54:23,606 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:23,606 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:23,606 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-12-02 08:54:23,606 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:23,607 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:23,607 INFO L85 PathProgramCache]: Analyzing trace with hash 203821865, now seen corresponding path program 1 times [2024-12-02 08:54:23,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:23,607 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014593524] [2024-12-02 08:54:23,607 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:23,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:23,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:24,532 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:54:24,532 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:24,532 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1014593524] [2024-12-02 08:54:24,532 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1014593524] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:24,532 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:24,532 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:54:24,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737002541] [2024-12-02 08:54:24,533 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:24,533 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:54:24,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:24,534 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:54:24,534 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:24,534 INFO L87 Difference]: Start difference. First operand 556 states and 795 transitions. Second operand has 6 states, 6 states have (on average 28.166666666666668) internal successors, (169), 6 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:24,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:24,653 INFO L93 Difference]: Finished difference Result 1165 states and 1640 transitions. [2024-12-02 08:54:24,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:54:24,653 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.166666666666668) internal successors, (169), 6 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 181 [2024-12-02 08:54:24,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:24,656 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:24,656 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:24,656 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:54:24,657 INFO L435 NwaCegarLoop]: 776 mSDtfsCounter, 1134 mSDsluCounter, 2322 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1137 SdHoareTripleChecker+Valid, 3098 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:24,657 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1137 Valid, 3098 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:24,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:24,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:24,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.399715504978663) internal successors, (984), 703 states have internal predecessors, (984), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:24,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 996 transitions. [2024-12-02 08:54:24,676 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 996 transitions. Word has length 181 [2024-12-02 08:54:24,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:24,676 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 996 transitions. [2024-12-02 08:54:24,676 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.166666666666668) internal successors, (169), 6 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:54:24,676 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 996 transitions. [2024-12-02 08:54:24,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 449 [2024-12-02 08:54:24,679 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:24,680 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:24,680 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-12-02 08:54:24,680 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:24,680 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:24,681 INFO L85 PathProgramCache]: Analyzing trace with hash -1787257894, now seen corresponding path program 1 times [2024-12-02 08:54:24,681 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:24,681 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [452343316] [2024-12-02 08:54:24,681 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:24,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:24,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:25,466 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:25,467 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:25,467 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [452343316] [2024-12-02 08:54:25,467 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [452343316] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:25,467 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:25,467 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:25,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1126057981] [2024-12-02 08:54:25,467 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:25,467 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:25,468 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:25,468 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:25,468 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:25,468 INFO L87 Difference]: Start difference. First operand 711 states and 996 transitions. Second operand has 5 states, 5 states have (on average 84.2) internal successors, (421), 5 states have internal predecessors, (421), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:25,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:25,602 INFO L93 Difference]: Finished difference Result 1165 states and 1639 transitions. [2024-12-02 08:54:25,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:25,603 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.2) internal successors, (421), 5 states have internal predecessors, (421), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 448 [2024-12-02 08:54:25,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:25,605 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:25,605 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:25,606 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:25,606 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 724 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 727 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:25,607 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [727 Valid, 1451 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:25,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:25,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:25,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3982930298719773) internal successors, (983), 703 states have internal predecessors, (983), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:25,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 995 transitions. [2024-12-02 08:54:25,625 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 995 transitions. Word has length 448 [2024-12-02 08:54:25,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:25,625 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 995 transitions. [2024-12-02 08:54:25,626 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.2) internal successors, (421), 5 states have internal predecessors, (421), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:25,626 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 995 transitions. [2024-12-02 08:54:25,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 450 [2024-12-02 08:54:25,628 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:25,629 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:25,629 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-12-02 08:54:25,629 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:25,629 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:25,629 INFO L85 PathProgramCache]: Analyzing trace with hash 2025497410, now seen corresponding path program 1 times [2024-12-02 08:54:25,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:25,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020234300] [2024-12-02 08:54:25,630 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:25,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:25,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:26,420 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:26,420 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:26,420 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020234300] [2024-12-02 08:54:26,420 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2020234300] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:26,420 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:26,420 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:26,420 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [679753077] [2024-12-02 08:54:26,420 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:26,421 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:26,421 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:26,421 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:26,421 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:26,421 INFO L87 Difference]: Start difference. First operand 711 states and 995 transitions. Second operand has 5 states, 5 states have (on average 84.4) internal successors, (422), 5 states have internal predecessors, (422), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:26,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:26,558 INFO L93 Difference]: Finished difference Result 1165 states and 1637 transitions. [2024-12-02 08:54:26,558 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:26,558 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.4) internal successors, (422), 5 states have internal predecessors, (422), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 449 [2024-12-02 08:54:26,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:26,560 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:26,560 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:26,561 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:26,561 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1309 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1312 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:26,561 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1312 Valid, 1444 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:26,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:26,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:26,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3968705547652915) internal successors, (982), 703 states have internal predecessors, (982), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:26,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 994 transitions. [2024-12-02 08:54:26,579 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 994 transitions. Word has length 449 [2024-12-02 08:54:26,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:26,579 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 994 transitions. [2024-12-02 08:54:26,579 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.4) internal successors, (422), 5 states have internal predecessors, (422), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:26,579 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 994 transitions. [2024-12-02 08:54:26,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 451 [2024-12-02 08:54:26,583 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:26,583 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:26,583 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-12-02 08:54:26,583 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:26,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:26,584 INFO L85 PathProgramCache]: Analyzing trace with hash -19188593, now seen corresponding path program 1 times [2024-12-02 08:54:26,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:26,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2113047553] [2024-12-02 08:54:26,584 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:26,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:26,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:27,255 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:27,255 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:27,255 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2113047553] [2024-12-02 08:54:27,255 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2113047553] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:27,255 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:27,256 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:27,256 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1361501964] [2024-12-02 08:54:27,256 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:27,256 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:27,256 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:27,257 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:27,257 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:27,257 INFO L87 Difference]: Start difference. First operand 711 states and 994 transitions. Second operand has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:27,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:27,383 INFO L93 Difference]: Finished difference Result 1165 states and 1635 transitions. [2024-12-02 08:54:27,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:27,383 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 450 [2024-12-02 08:54:27,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:27,385 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:27,385 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:27,385 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:27,386 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 708 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 711 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:27,386 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [711 Valid, 1451 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:27,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:27,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:27,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.395448079658606) internal successors, (981), 703 states have internal predecessors, (981), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:27,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 993 transitions. [2024-12-02 08:54:27,397 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 993 transitions. Word has length 450 [2024-12-02 08:54:27,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:27,398 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 993 transitions. [2024-12-02 08:54:27,398 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:27,398 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 993 transitions. [2024-12-02 08:54:27,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 452 [2024-12-02 08:54:27,400 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:27,400 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:27,400 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-12-02 08:54:27,400 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:27,401 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:27,401 INFO L85 PathProgramCache]: Analyzing trace with hash -189619113, now seen corresponding path program 1 times [2024-12-02 08:54:27,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:27,401 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104829218] [2024-12-02 08:54:27,401 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:27,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:27,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:28,302 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:28,303 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:28,303 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104829218] [2024-12-02 08:54:28,303 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2104829218] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:28,303 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:28,303 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:28,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259592289] [2024-12-02 08:54:28,303 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:28,304 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:28,304 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:28,304 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:28,304 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:28,304 INFO L87 Difference]: Start difference. First operand 711 states and 993 transitions. Second operand has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:28,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:28,420 INFO L93 Difference]: Finished difference Result 1165 states and 1633 transitions. [2024-12-02 08:54:28,420 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:28,420 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 451 [2024-12-02 08:54:28,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:28,422 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:28,422 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:28,423 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:28,423 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1277 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1280 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:28,424 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1280 Valid, 1444 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:28,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:28,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:28,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3940256045519204) internal successors, (980), 703 states have internal predecessors, (980), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:28,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 992 transitions. [2024-12-02 08:54:28,440 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 992 transitions. Word has length 451 [2024-12-02 08:54:28,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:28,440 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 992 transitions. [2024-12-02 08:54:28,440 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:28,440 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 992 transitions. [2024-12-02 08:54:28,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 453 [2024-12-02 08:54:28,443 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:28,443 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:28,443 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-12-02 08:54:28,443 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:28,444 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:28,444 INFO L85 PathProgramCache]: Analyzing trace with hash -353435452, now seen corresponding path program 1 times [2024-12-02 08:54:28,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:28,444 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335019118] [2024-12-02 08:54:28,444 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:28,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:28,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:29,194 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:29,194 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:29,194 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [335019118] [2024-12-02 08:54:29,194 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [335019118] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:29,194 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:29,195 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:29,195 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [686900974] [2024-12-02 08:54:29,195 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:29,195 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:29,195 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:29,196 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:29,196 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:29,196 INFO L87 Difference]: Start difference. First operand 711 states and 992 transitions. Second operand has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:29,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:29,334 INFO L93 Difference]: Finished difference Result 1165 states and 1631 transitions. [2024-12-02 08:54:29,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:29,334 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 452 [2024-12-02 08:54:29,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:29,336 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:29,336 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:29,337 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:29,337 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1261 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1264 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:29,337 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1264 Valid, 1444 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:29,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:29,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:29,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3926031294452348) internal successors, (979), 703 states have internal predecessors, (979), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:29,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 991 transitions. [2024-12-02 08:54:29,355 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 991 transitions. Word has length 452 [2024-12-02 08:54:29,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:29,356 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 991 transitions. [2024-12-02 08:54:29,356 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:29,356 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 991 transitions. [2024-12-02 08:54:29,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 454 [2024-12-02 08:54:29,361 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:29,361 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:29,361 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-12-02 08:54:29,361 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:29,362 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:29,362 INFO L85 PathProgramCache]: Analyzing trace with hash 1715196140, now seen corresponding path program 1 times [2024-12-02 08:54:29,362 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:29,362 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [420958137] [2024-12-02 08:54:29,362 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:29,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:29,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:29,989 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:29,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:29,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [420958137] [2024-12-02 08:54:29,989 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [420958137] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:29,989 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:29,989 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:29,989 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1877566385] [2024-12-02 08:54:29,989 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:29,990 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:29,990 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:29,990 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:29,990 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:29,990 INFO L87 Difference]: Start difference. First operand 711 states and 991 transitions. Second operand has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:30,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:30,088 INFO L93 Difference]: Finished difference Result 1165 states and 1629 transitions. [2024-12-02 08:54:30,088 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:30,089 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 453 [2024-12-02 08:54:30,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:30,090 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:30,090 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:30,091 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:30,091 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 684 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 687 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:30,091 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [687 Valid, 1451 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:30,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:30,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:30,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.391180654338549) internal successors, (978), 703 states have internal predecessors, (978), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:30,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 990 transitions. [2024-12-02 08:54:30,101 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 990 transitions. Word has length 453 [2024-12-02 08:54:30,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:30,102 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 990 transitions. [2024-12-02 08:54:30,102 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:30,102 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 990 transitions. [2024-12-02 08:54:30,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 455 [2024-12-02 08:54:30,103 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:30,103 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:30,103 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-12-02 08:54:30,103 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:30,104 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:30,104 INFO L85 PathProgramCache]: Analyzing trace with hash -1189986183, now seen corresponding path program 1 times [2024-12-02 08:54:30,104 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:30,104 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240692527] [2024-12-02 08:54:30,104 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:30,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:30,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:30,775 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:30,775 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:30,775 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240692527] [2024-12-02 08:54:30,775 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1240692527] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:30,776 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:30,776 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:30,776 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86455145] [2024-12-02 08:54:30,776 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:30,776 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:30,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:30,776 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:30,777 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:30,777 INFO L87 Difference]: Start difference. First operand 711 states and 990 transitions. Second operand has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:30,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:30,877 INFO L93 Difference]: Finished difference Result 1165 states and 1627 transitions. [2024-12-02 08:54:30,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:30,878 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 454 [2024-12-02 08:54:30,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:30,882 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:30,882 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:30,882 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:30,882 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 676 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 679 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:30,883 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [679 Valid, 1451 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:30,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:30,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:30,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3897581792318634) internal successors, (977), 703 states have internal predecessors, (977), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:30,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 989 transitions. [2024-12-02 08:54:30,893 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 989 transitions. Word has length 454 [2024-12-02 08:54:30,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:30,893 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 989 transitions. [2024-12-02 08:54:30,894 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:30,894 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 989 transitions. [2024-12-02 08:54:30,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 456 [2024-12-02 08:54:30,895 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:30,896 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:30,896 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-12-02 08:54:30,896 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:30,896 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:30,896 INFO L85 PathProgramCache]: Analyzing trace with hash 686713089, now seen corresponding path program 1 times [2024-12-02 08:54:30,896 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:30,896 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [656131755] [2024-12-02 08:54:30,896 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:30,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:31,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:31,561 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:31,562 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:31,562 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [656131755] [2024-12-02 08:54:31,562 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [656131755] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:31,562 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:31,562 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:31,562 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004877220] [2024-12-02 08:54:31,562 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:31,563 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:31,563 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:31,563 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:31,563 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:31,563 INFO L87 Difference]: Start difference. First operand 711 states and 989 transitions. Second operand has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:31,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:31,664 INFO L93 Difference]: Finished difference Result 1165 states and 1625 transitions. [2024-12-02 08:54:31,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:31,664 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 455 [2024-12-02 08:54:31,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:31,666 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:31,666 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:31,667 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:31,667 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1213 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1216 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:31,668 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1216 Valid, 1444 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:31,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:31,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:31,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3883357041251778) internal successors, (976), 703 states have internal predecessors, (976), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:31,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 988 transitions. [2024-12-02 08:54:31,680 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 988 transitions. Word has length 455 [2024-12-02 08:54:31,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:31,680 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 988 transitions. [2024-12-02 08:54:31,680 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:31,680 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 988 transitions. [2024-12-02 08:54:31,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 457 [2024-12-02 08:54:31,682 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:31,682 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:31,682 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-12-02 08:54:31,682 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:31,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:31,683 INFO L85 PathProgramCache]: Analyzing trace with hash -188533842, now seen corresponding path program 1 times [2024-12-02 08:54:31,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:31,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34789329] [2024-12-02 08:54:31,683 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:31,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:31,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:32,410 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:32,410 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:32,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34789329] [2024-12-02 08:54:32,411 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [34789329] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:32,411 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:32,411 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:32,411 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693506931] [2024-12-02 08:54:32,411 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:32,411 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:32,411 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:32,412 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:32,412 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:32,412 INFO L87 Difference]: Start difference. First operand 711 states and 988 transitions. Second operand has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:32,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:32,497 INFO L93 Difference]: Finished difference Result 1165 states and 1623 transitions. [2024-12-02 08:54:32,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:32,498 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 456 [2024-12-02 08:54:32,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:32,500 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:32,501 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:32,501 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:32,502 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 1182 mSDsluCounter, 747 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1185 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:32,502 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1185 Valid, 1492 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:32,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:32,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:32,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3869132290184922) internal successors, (975), 703 states have internal predecessors, (975), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:32,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 987 transitions. [2024-12-02 08:54:32,521 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 987 transitions. Word has length 456 [2024-12-02 08:54:32,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:32,521 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 987 transitions. [2024-12-02 08:54:32,522 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:32,522 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 987 transitions. [2024-12-02 08:54:32,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 458 [2024-12-02 08:54:32,526 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:32,526 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:32,526 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-12-02 08:54:32,526 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:32,527 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:32,527 INFO L85 PathProgramCache]: Analyzing trace with hash 1644342422, now seen corresponding path program 1 times [2024-12-02 08:54:32,527 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:32,527 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633898074] [2024-12-02 08:54:32,527 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:32,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:32,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:33,184 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:33,184 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:33,185 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1633898074] [2024-12-02 08:54:33,185 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1633898074] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:33,185 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:33,185 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:33,185 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [704557512] [2024-12-02 08:54:33,185 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:33,185 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:33,185 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:33,186 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:33,186 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:33,186 INFO L87 Difference]: Start difference. First operand 711 states and 987 transitions. Second operand has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:33,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:33,286 INFO L93 Difference]: Finished difference Result 1165 states and 1621 transitions. [2024-12-02 08:54:33,286 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:33,287 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 457 [2024-12-02 08:54:33,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:33,288 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:33,288 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:33,289 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:33,289 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 637 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 640 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:33,289 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [640 Valid, 1499 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:33,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:33,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:33,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3854907539118066) internal successors, (974), 703 states have internal predecessors, (974), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:33,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 986 transitions. [2024-12-02 08:54:33,299 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 986 transitions. Word has length 457 [2024-12-02 08:54:33,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:33,300 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 986 transitions. [2024-12-02 08:54:33,300 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:33,300 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 986 transitions. [2024-12-02 08:54:33,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 459 [2024-12-02 08:54:33,301 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:33,302 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:33,302 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-02 08:54:33,302 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:33,302 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:33,302 INFO L85 PathProgramCache]: Analyzing trace with hash 1436555875, now seen corresponding path program 1 times [2024-12-02 08:54:33,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:33,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383007075] [2024-12-02 08:54:33,303 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:33,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:33,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:33,924 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:33,924 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:33,924 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383007075] [2024-12-02 08:54:33,924 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [383007075] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:33,924 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:33,924 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:33,924 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [214224905] [2024-12-02 08:54:33,924 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:33,924 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:33,924 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:33,925 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:33,925 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:33,925 INFO L87 Difference]: Start difference. First operand 711 states and 986 transitions. Second operand has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:34,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:34,001 INFO L93 Difference]: Finished difference Result 1165 states and 1619 transitions. [2024-12-02 08:54:34,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:34,002 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 458 [2024-12-02 08:54:34,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:34,004 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:34,004 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:34,004 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:34,004 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 1150 mSDsluCounter, 747 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1153 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:34,004 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1153 Valid, 1492 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:34,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:34,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:34,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3840682788051208) internal successors, (973), 703 states have internal predecessors, (973), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:34,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 985 transitions. [2024-12-02 08:54:34,013 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 985 transitions. Word has length 458 [2024-12-02 08:54:34,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:34,014 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 985 transitions. [2024-12-02 08:54:34,014 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:34,014 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 985 transitions. [2024-12-02 08:54:34,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 460 [2024-12-02 08:54:34,015 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:34,015 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:34,015 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-12-02 08:54:34,015 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:34,016 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:34,016 INFO L85 PathProgramCache]: Analyzing trace with hash -1605313621, now seen corresponding path program 1 times [2024-12-02 08:54:34,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:34,016 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769291834] [2024-12-02 08:54:34,016 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:34,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:34,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:34,639 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:34,639 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:34,639 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769291834] [2024-12-02 08:54:34,639 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [769291834] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:34,639 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:34,639 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:34,639 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747015259] [2024-12-02 08:54:34,639 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:34,640 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:34,640 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:34,640 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:34,640 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:34,640 INFO L87 Difference]: Start difference. First operand 711 states and 985 transitions. Second operand has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:34,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:34,710 INFO L93 Difference]: Finished difference Result 1165 states and 1617 transitions. [2024-12-02 08:54:34,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:34,711 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 459 [2024-12-02 08:54:34,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:34,712 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:34,713 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:34,713 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:34,713 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 1134 mSDsluCounter, 747 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1137 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:34,714 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1137 Valid, 1492 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:34,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:34,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:34,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3826458036984353) internal successors, (972), 703 states have internal predecessors, (972), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:34,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 984 transitions. [2024-12-02 08:54:34,724 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 984 transitions. Word has length 459 [2024-12-02 08:54:34,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:34,724 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 984 transitions. [2024-12-02 08:54:34,724 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:34,724 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 984 transitions. [2024-12-02 08:54:34,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 461 [2024-12-02 08:54:34,725 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:34,726 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:34,726 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-12-02 08:54:34,726 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:34,726 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:34,726 INFO L85 PathProgramCache]: Analyzing trace with hash -1083755368, now seen corresponding path program 1 times [2024-12-02 08:54:34,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:34,727 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931074282] [2024-12-02 08:54:34,727 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:34,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:34,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:35,386 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:35,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:35,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1931074282] [2024-12-02 08:54:35,387 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1931074282] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:35,387 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:35,387 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:35,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [406952786] [2024-12-02 08:54:35,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:35,387 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:35,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:35,387 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:35,387 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:35,387 INFO L87 Difference]: Start difference. First operand 711 states and 984 transitions. Second operand has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:35,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:35,433 INFO L93 Difference]: Finished difference Result 1165 states and 1615 transitions. [2024-12-02 08:54:35,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:35,434 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 460 [2024-12-02 08:54:35,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:35,435 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:35,435 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:35,436 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:35,436 INFO L435 NwaCegarLoop]: 757 mSDtfsCounter, 1111 mSDsluCounter, 759 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1114 SdHoareTripleChecker+Valid, 1516 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:35,436 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1114 Valid, 1516 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:35,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:35,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:35,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3812233285917497) internal successors, (971), 703 states have internal predecessors, (971), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:35,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 983 transitions. [2024-12-02 08:54:35,446 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 983 transitions. Word has length 460 [2024-12-02 08:54:35,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:35,446 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 983 transitions. [2024-12-02 08:54:35,446 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:35,446 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 983 transitions. [2024-12-02 08:54:35,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 462 [2024-12-02 08:54:35,448 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:35,448 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:35,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-12-02 08:54:35,448 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:35,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:35,448 INFO L85 PathProgramCache]: Analyzing trace with hash 2085697088, now seen corresponding path program 1 times [2024-12-02 08:54:35,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:35,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795925533] [2024-12-02 08:54:35,448 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:35,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:35,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:36,271 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:36,271 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:36,271 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795925533] [2024-12-02 08:54:36,271 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1795925533] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:36,272 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:36,272 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:36,272 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362835946] [2024-12-02 08:54:36,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:36,272 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:36,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:36,273 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:36,273 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:36,273 INFO L87 Difference]: Start difference. First operand 711 states and 983 transitions. Second operand has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:36,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:36,325 INFO L93 Difference]: Finished difference Result 1165 states and 1613 transitions. [2024-12-02 08:54:36,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:36,326 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 461 [2024-12-02 08:54:36,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:36,327 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:36,327 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:36,327 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:36,328 INFO L435 NwaCegarLoop]: 757 mSDtfsCounter, 1095 mSDsluCounter, 759 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1098 SdHoareTripleChecker+Valid, 1516 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:36,328 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1098 Valid, 1516 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:36,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:36,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:36,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.379800853485064) internal successors, (970), 703 states have internal predecessors, (970), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:36,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 982 transitions. [2024-12-02 08:54:36,340 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 982 transitions. Word has length 461 [2024-12-02 08:54:36,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:36,340 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 982 transitions. [2024-12-02 08:54:36,340 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:36,340 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 982 transitions. [2024-12-02 08:54:36,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 463 [2024-12-02 08:54:36,341 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:36,342 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:36,342 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-12-02 08:54:36,342 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:36,342 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:36,342 INFO L85 PathProgramCache]: Analyzing trace with hash 1106690637, now seen corresponding path program 1 times [2024-12-02 08:54:36,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:36,342 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [203171814] [2024-12-02 08:54:36,342 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:36,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:36,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:37,042 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:37,043 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:37,043 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [203171814] [2024-12-02 08:54:37,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [203171814] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:37,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:37,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:37,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1717737527] [2024-12-02 08:54:37,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:37,043 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:37,043 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:37,044 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:37,044 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:37,044 INFO L87 Difference]: Start difference. First operand 711 states and 982 transitions. Second operand has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:37,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:37,316 INFO L93 Difference]: Finished difference Result 1165 states and 1611 transitions. [2024-12-02 08:54:37,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:37,316 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 462 [2024-12-02 08:54:37,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:37,317 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:37,317 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:37,318 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:37,318 INFO L435 NwaCegarLoop]: 578 mSDtfsCounter, 1072 mSDsluCounter, 580 mSDsCounter, 0 mSdLazyCounter, 392 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1075 SdHoareTripleChecker+Valid, 1158 SdHoareTripleChecker+Invalid, 393 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 392 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:37,318 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1075 Valid, 1158 Invalid, 393 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 392 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:54:37,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:37,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:37,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3783783783783783) internal successors, (969), 703 states have internal predecessors, (969), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:37,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 981 transitions. [2024-12-02 08:54:37,329 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 981 transitions. Word has length 462 [2024-12-02 08:54:37,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:37,329 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 981 transitions. [2024-12-02 08:54:37,329 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:37,329 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 981 transitions. [2024-12-02 08:54:37,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 464 [2024-12-02 08:54:37,331 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:37,331 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:37,331 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-12-02 08:54:37,331 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:37,331 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:37,332 INFO L85 PathProgramCache]: Analyzing trace with hash 941358165, now seen corresponding path program 1 times [2024-12-02 08:54:37,332 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:37,332 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088724833] [2024-12-02 08:54:37,332 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:37,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:37,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:38,563 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:38,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:38,564 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088724833] [2024-12-02 08:54:38,564 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2088724833] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:38,564 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:38,564 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:38,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061974288] [2024-12-02 08:54:38,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:38,564 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:38,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:38,564 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:38,564 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:38,565 INFO L87 Difference]: Start difference. First operand 711 states and 981 transitions. Second operand has 4 states, 4 states have (on average 109.0) internal successors, (436), 4 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:38,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:38,611 INFO L93 Difference]: Finished difference Result 1165 states and 1609 transitions. [2024-12-02 08:54:38,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:38,612 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 109.0) internal successors, (436), 4 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 463 [2024-12-02 08:54:38,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:38,613 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:38,613 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:38,614 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:38,614 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 496 mSDsluCounter, 758 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 496 SdHoareTripleChecker+Valid, 1514 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:38,614 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [496 Valid, 1514 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:38,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:38,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:38,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3769559032716927) internal successors, (968), 703 states have internal predecessors, (968), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:38,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 980 transitions. [2024-12-02 08:54:38,626 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 980 transitions. Word has length 463 [2024-12-02 08:54:38,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:38,626 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 980 transitions. [2024-12-02 08:54:38,626 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 109.0) internal successors, (436), 4 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:38,626 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 980 transitions. [2024-12-02 08:54:38,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 465 [2024-12-02 08:54:38,628 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:38,629 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:38,629 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-12-02 08:54:38,629 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:38,629 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:38,629 INFO L85 PathProgramCache]: Analyzing trace with hash 2059983743, now seen corresponding path program 1 times [2024-12-02 08:54:38,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:38,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [318364895] [2024-12-02 08:54:38,629 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:38,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:39,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:39,951 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:39,951 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:39,951 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [318364895] [2024-12-02 08:54:39,951 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [318364895] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:39,951 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:39,951 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:39,951 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1951757120] [2024-12-02 08:54:39,951 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:39,951 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:39,951 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:39,952 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:39,952 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:39,952 INFO L87 Difference]: Start difference. First operand 711 states and 980 transitions. Second operand has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:40,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:40,049 INFO L93 Difference]: Finished difference Result 1165 states and 1607 transitions. [2024-12-02 08:54:40,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:40,050 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 464 [2024-12-02 08:54:40,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:40,051 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:40,052 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:40,052 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:40,052 INFO L435 NwaCegarLoop]: 741 mSDtfsCounter, 1177 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1177 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:40,052 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1177 Valid, 1484 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:40,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:40,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:40,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3755334281650071) internal successors, (967), 703 states have internal predecessors, (967), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:40,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 979 transitions. [2024-12-02 08:54:40,064 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 979 transitions. Word has length 464 [2024-12-02 08:54:40,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:40,064 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 979 transitions. [2024-12-02 08:54:40,064 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:40,065 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 979 transitions. [2024-12-02 08:54:40,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 466 [2024-12-02 08:54:40,067 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:40,067 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:40,067 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-12-02 08:54:40,067 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:40,067 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:40,067 INFO L85 PathProgramCache]: Analyzing trace with hash 2072196053, now seen corresponding path program 1 times [2024-12-02 08:54:40,067 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:40,067 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105185519] [2024-12-02 08:54:40,068 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:40,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:40,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:41,732 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:41,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:41,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2105185519] [2024-12-02 08:54:41,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2105185519] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:41,732 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:41,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:41,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [618585685] [2024-12-02 08:54:41,732 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:41,732 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:41,732 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:41,733 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:41,733 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:41,733 INFO L87 Difference]: Start difference. First operand 711 states and 979 transitions. Second operand has 5 states, 5 states have (on average 87.6) internal successors, (438), 5 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:41,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:41,804 INFO L93 Difference]: Finished difference Result 1165 states and 1605 transitions. [2024-12-02 08:54:41,805 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:41,805 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.6) internal successors, (438), 5 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 465 [2024-12-02 08:54:41,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:41,806 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:41,806 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:41,806 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:41,807 INFO L435 NwaCegarLoop]: 741 mSDtfsCounter, 654 mSDsluCounter, 750 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 654 SdHoareTripleChecker+Valid, 1491 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:41,807 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [654 Valid, 1491 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:41,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:41,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:41,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3741109530583215) internal successors, (966), 703 states have internal predecessors, (966), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:41,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 978 transitions. [2024-12-02 08:54:41,817 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 978 transitions. Word has length 465 [2024-12-02 08:54:41,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:41,818 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 978 transitions. [2024-12-02 08:54:41,818 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.6) internal successors, (438), 5 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:41,818 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 978 transitions. [2024-12-02 08:54:41,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 467 [2024-12-02 08:54:41,819 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:41,820 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:41,820 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-12-02 08:54:41,820 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:41,820 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:41,820 INFO L85 PathProgramCache]: Analyzing trace with hash 512722894, now seen corresponding path program 1 times [2024-12-02 08:54:41,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:41,820 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121896042] [2024-12-02 08:54:41,820 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:41,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:42,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:43,163 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:43,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:43,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121896042] [2024-12-02 08:54:43,163 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1121896042] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:43,163 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:43,163 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:43,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1217409990] [2024-12-02 08:54:43,163 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:43,164 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:43,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:43,165 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:43,165 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:43,165 INFO L87 Difference]: Start difference. First operand 711 states and 978 transitions. Second operand has 4 states, 4 states have (on average 109.75) internal successors, (439), 4 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:43,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:43,236 INFO L93 Difference]: Finished difference Result 1165 states and 1603 transitions. [2024-12-02 08:54:43,236 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:43,236 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 109.75) internal successors, (439), 4 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 466 [2024-12-02 08:54:43,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:43,237 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:43,237 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:43,238 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:43,238 INFO L435 NwaCegarLoop]: 741 mSDtfsCounter, 505 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 505 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:43,238 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [505 Valid, 1484 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:43,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:43,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:43,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.372688477951636) internal successors, (965), 703 states have internal predecessors, (965), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:43,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 977 transitions. [2024-12-02 08:54:43,248 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 977 transitions. Word has length 466 [2024-12-02 08:54:43,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:43,248 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 977 transitions. [2024-12-02 08:54:43,248 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 109.75) internal successors, (439), 4 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:43,248 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 977 transitions. [2024-12-02 08:54:43,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 468 [2024-12-02 08:54:43,250 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:43,250 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:43,250 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-12-02 08:54:43,250 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:43,250 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:43,251 INFO L85 PathProgramCache]: Analyzing trace with hash 861938758, now seen corresponding path program 1 times [2024-12-02 08:54:43,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:43,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159657227] [2024-12-02 08:54:43,251 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:43,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:43,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:44,599 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:44,600 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:44,600 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159657227] [2024-12-02 08:54:44,600 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1159657227] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:44,600 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:44,600 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:44,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1704983518] [2024-12-02 08:54:44,600 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:44,601 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:44,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:44,601 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:44,601 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:44,601 INFO L87 Difference]: Start difference. First operand 711 states and 977 transitions. Second operand has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:44,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:44,731 INFO L93 Difference]: Finished difference Result 1165 states and 1601 transitions. [2024-12-02 08:54:44,731 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:44,731 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 467 [2024-12-02 08:54:44,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:44,732 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:44,732 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:44,733 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:44,733 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 1212 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1212 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:44,733 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1212 Valid, 1422 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:44,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:44,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:44,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3712660028449501) internal successors, (964), 703 states have internal predecessors, (964), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:44,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 976 transitions. [2024-12-02 08:54:44,742 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 976 transitions. Word has length 467 [2024-12-02 08:54:44,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:44,742 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 976 transitions. [2024-12-02 08:54:44,742 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:44,742 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 976 transitions. [2024-12-02 08:54:44,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 469 [2024-12-02 08:54:44,744 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:44,744 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:44,744 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-12-02 08:54:44,744 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:44,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:44,745 INFO L85 PathProgramCache]: Analyzing trace with hash 1901367216, now seen corresponding path program 1 times [2024-12-02 08:54:44,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:44,745 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904726628] [2024-12-02 08:54:44,745 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:44,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:45,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:46,028 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:46,028 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:46,028 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904726628] [2024-12-02 08:54:46,028 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1904726628] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:46,028 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:46,029 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:46,029 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925292330] [2024-12-02 08:54:46,029 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:46,029 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:46,029 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:46,030 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:46,030 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:46,030 INFO L87 Difference]: Start difference. First operand 711 states and 976 transitions. Second operand has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:46,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:46,161 INFO L93 Difference]: Finished difference Result 1165 states and 1599 transitions. [2024-12-02 08:54:46,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:46,162 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 468 [2024-12-02 08:54:46,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:46,163 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:46,163 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:46,164 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:46,164 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 636 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 636 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:46,164 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [636 Valid, 1429 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:46,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:46,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:46,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3698435277382646) internal successors, (963), 703 states have internal predecessors, (963), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:46,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 975 transitions. [2024-12-02 08:54:46,173 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 975 transitions. Word has length 468 [2024-12-02 08:54:46,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:46,174 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 975 transitions. [2024-12-02 08:54:46,174 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:46,174 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 975 transitions. [2024-12-02 08:54:46,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 470 [2024-12-02 08:54:46,175 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:46,175 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:46,176 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-12-02 08:54:46,176 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:46,176 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:46,176 INFO L85 PathProgramCache]: Analyzing trace with hash 1536682647, now seen corresponding path program 1 times [2024-12-02 08:54:46,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:46,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1896418819] [2024-12-02 08:54:46,176 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:46,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:46,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:47,515 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:47,515 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:47,515 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1896418819] [2024-12-02 08:54:47,515 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1896418819] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:47,515 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:47,515 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:47,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1092134897] [2024-12-02 08:54:47,515 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:47,516 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:47,516 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:47,516 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:47,516 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:47,516 INFO L87 Difference]: Start difference. First operand 711 states and 975 transitions. Second operand has 4 states, 4 states have (on average 110.5) internal successors, (442), 4 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:47,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:47,612 INFO L93 Difference]: Finished difference Result 1165 states and 1597 transitions. [2024-12-02 08:54:47,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:47,612 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 110.5) internal successors, (442), 4 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 469 [2024-12-02 08:54:47,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:47,613 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:47,613 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:47,614 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:47,614 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 558 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 558 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:47,614 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [558 Valid, 1422 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:47,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:47,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:47,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.368421052631579) internal successors, (962), 703 states have internal predecessors, (962), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:47,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 974 transitions. [2024-12-02 08:54:47,623 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 974 transitions. Word has length 469 [2024-12-02 08:54:47,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:47,623 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 974 transitions. [2024-12-02 08:54:47,623 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 110.5) internal successors, (442), 4 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:47,623 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 974 transitions. [2024-12-02 08:54:47,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 471 [2024-12-02 08:54:47,625 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:47,625 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:47,625 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-12-02 08:54:47,625 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:47,625 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:47,626 INFO L85 PathProgramCache]: Analyzing trace with hash 1546007711, now seen corresponding path program 1 times [2024-12-02 08:54:47,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:47,626 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730525917] [2024-12-02 08:54:47,626 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:47,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:48,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:48,996 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:48,996 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:48,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [730525917] [2024-12-02 08:54:48,997 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [730525917] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:48,997 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:48,997 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:48,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [48271066] [2024-12-02 08:54:48,997 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:48,997 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:48,997 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:48,998 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:48,998 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:48,998 INFO L87 Difference]: Start difference. First operand 711 states and 974 transitions. Second operand has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:49,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:49,137 INFO L93 Difference]: Finished difference Result 1165 states and 1595 transitions. [2024-12-02 08:54:49,137 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:49,137 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 470 [2024-12-02 08:54:49,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:49,139 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:49,139 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:49,140 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:49,140 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 1182 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1182 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:49,140 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1182 Valid, 1422 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:49,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:49,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:49,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3669985775248934) internal successors, (961), 703 states have internal predecessors, (961), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:49,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 973 transitions. [2024-12-02 08:54:49,157 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 973 transitions. Word has length 470 [2024-12-02 08:54:49,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:49,157 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 973 transitions. [2024-12-02 08:54:49,157 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:49,157 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 973 transitions. [2024-12-02 08:54:49,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 472 [2024-12-02 08:54:49,162 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:49,162 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:49,163 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-12-02 08:54:49,163 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:49,163 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:49,163 INFO L85 PathProgramCache]: Analyzing trace with hash 916407912, now seen corresponding path program 1 times [2024-12-02 08:54:49,163 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:49,163 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205027941] [2024-12-02 08:54:49,164 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:49,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:50,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:50,580 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:50,580 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:50,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205027941] [2024-12-02 08:54:50,580 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1205027941] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:50,580 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:50,580 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:50,580 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [679039480] [2024-12-02 08:54:50,580 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:50,581 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:50,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:50,581 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:50,581 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:50,581 INFO L87 Difference]: Start difference. First operand 711 states and 973 transitions. Second operand has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:50,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:50,704 INFO L93 Difference]: Finished difference Result 1165 states and 1593 transitions. [2024-12-02 08:54:50,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:50,705 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 471 [2024-12-02 08:54:50,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:50,706 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:50,706 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:50,707 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:50,707 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 1172 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1172 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:50,708 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1172 Valid, 1422 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:50,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:50,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:50,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3655761024182076) internal successors, (960), 703 states have internal predecessors, (960), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:50,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 972 transitions. [2024-12-02 08:54:50,719 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 972 transitions. Word has length 471 [2024-12-02 08:54:50,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:50,719 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 972 transitions. [2024-12-02 08:54:50,719 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:50,719 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 972 transitions. [2024-12-02 08:54:50,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 473 [2024-12-02 08:54:50,721 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:50,721 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:50,721 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-12-02 08:54:50,721 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:50,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:50,721 INFO L85 PathProgramCache]: Analyzing trace with hash -426939378, now seen corresponding path program 1 times [2024-12-02 08:54:50,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:50,722 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186936476] [2024-12-02 08:54:50,722 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:50,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:51,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:52,119 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:52,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:52,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [186936476] [2024-12-02 08:54:52,120 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [186936476] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:52,120 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:52,120 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:52,120 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [341359766] [2024-12-02 08:54:52,120 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:52,120 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:52,120 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:52,121 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:52,121 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:52,121 INFO L87 Difference]: Start difference. First operand 711 states and 972 transitions. Second operand has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:52,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:52,237 INFO L93 Difference]: Finished difference Result 1165 states and 1591 transitions. [2024-12-02 08:54:52,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:52,238 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 472 [2024-12-02 08:54:52,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:52,239 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:52,239 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:52,239 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:52,240 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 632 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 632 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:52,240 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [632 Valid, 1429 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:52,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:52,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:52,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.364153627311522) internal successors, (959), 703 states have internal predecessors, (959), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:52,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 971 transitions. [2024-12-02 08:54:52,249 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 971 transitions. Word has length 472 [2024-12-02 08:54:52,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:52,249 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 971 transitions. [2024-12-02 08:54:52,249 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:52,249 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 971 transitions. [2024-12-02 08:54:52,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 474 [2024-12-02 08:54:52,251 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:52,251 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:52,251 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-12-02 08:54:52,251 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:52,251 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:52,251 INFO L85 PathProgramCache]: Analyzing trace with hash 1135077305, now seen corresponding path program 1 times [2024-12-02 08:54:52,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:52,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [848323112] [2024-12-02 08:54:52,252 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:52,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:53,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:53,560 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:53,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:53,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [848323112] [2024-12-02 08:54:53,560 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [848323112] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:53,560 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:53,561 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:54:53,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [527630954] [2024-12-02 08:54:53,561 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:53,561 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:54:53,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:53,561 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:54:53,561 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:54:53,562 INFO L87 Difference]: Start difference. First operand 711 states and 971 transitions. Second operand has 4 states, 4 states have (on average 111.5) internal successors, (446), 4 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:53,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:53,651 INFO L93 Difference]: Finished difference Result 1165 states and 1589 transitions. [2024-12-02 08:54:53,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:54:53,652 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 111.5) internal successors, (446), 4 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 473 [2024-12-02 08:54:53,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:53,653 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:54:53,653 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:54:53,654 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:53,654 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 522 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 522 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:53,654 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [522 Valid, 1422 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:54:53,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:54:53,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:54:53,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3627311522048364) internal successors, (958), 703 states have internal predecessors, (958), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:53,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 970 transitions. [2024-12-02 08:54:53,665 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 970 transitions. Word has length 473 [2024-12-02 08:54:53,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:53,665 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 970 transitions. [2024-12-02 08:54:53,665 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 111.5) internal successors, (446), 4 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:53,665 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 970 transitions. [2024-12-02 08:54:53,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 475 [2024-12-02 08:54:53,667 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:53,667 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:53,667 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-12-02 08:54:53,667 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:53,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:53,668 INFO L85 PathProgramCache]: Analyzing trace with hash 1287685629, now seen corresponding path program 1 times [2024-12-02 08:54:53,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:53,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276303798] [2024-12-02 08:54:53,668 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:53,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:54,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:55,815 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 108 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-12-02 08:54:55,816 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:55,816 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [276303798] [2024-12-02 08:54:55,816 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [276303798] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:55,816 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:55,816 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:54:55,816 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1606866988] [2024-12-02 08:54:55,816 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:55,816 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:54:55,816 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:55,817 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:54:55,817 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:55,817 INFO L87 Difference]: Start difference. First operand 711 states and 970 transitions. Second operand has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:55,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:55,857 INFO L93 Difference]: Finished difference Result 1325 states and 1769 transitions. [2024-12-02 08:54:55,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:54:55,857 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 474 [2024-12-02 08:54:55,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:55,858 INFO L225 Difference]: With dead ends: 1325 [2024-12-02 08:54:55,858 INFO L226 Difference]: Without dead ends: 869 [2024-12-02 08:54:55,859 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:54:55,859 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 19 mSDsluCounter, 2259 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 3015 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:55,859 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 3015 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:54:55,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 869 states. [2024-12-02 08:54:55,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 869 to 865. [2024-12-02 08:54:55,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3185530921820303) internal successors, (1130), 857 states have internal predecessors, (1130), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:54:55,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1142 transitions. [2024-12-02 08:54:55,869 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1142 transitions. Word has length 474 [2024-12-02 08:54:55,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:55,869 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1142 transitions. [2024-12-02 08:54:55,869 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:55,869 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1142 transitions. [2024-12-02 08:54:55,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 477 [2024-12-02 08:54:55,871 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:55,871 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:55,871 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-12-02 08:54:55,871 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:55,871 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:55,871 INFO L85 PathProgramCache]: Analyzing trace with hash -798493947, now seen corresponding path program 1 times [2024-12-02 08:54:55,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:55,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519157505] [2024-12-02 08:54:55,871 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:55,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:57,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:54:57,577 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:54:57,577 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:54:57,577 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1519157505] [2024-12-02 08:54:57,577 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1519157505] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:54:57,577 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:54:57,577 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:54:57,577 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [192924053] [2024-12-02 08:54:57,577 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:54:57,578 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:54:57,578 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:54:57,578 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:54:57,578 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:54:57,578 INFO L87 Difference]: Start difference. First operand 865 states and 1142 transitions. Second operand has 6 states, 6 states have (on average 74.83333333333333) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:57,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:54:57,922 INFO L93 Difference]: Finished difference Result 1999 states and 2653 transitions. [2024-12-02 08:54:57,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:54:57,922 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 74.83333333333333) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 476 [2024-12-02 08:54:57,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:54:57,925 INFO L225 Difference]: With dead ends: 1999 [2024-12-02 08:54:57,925 INFO L226 Difference]: Without dead ends: 1468 [2024-12-02 08:54:57,925 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:54:57,926 INFO L435 NwaCegarLoop]: 692 mSDtfsCounter, 685 mSDsluCounter, 2186 mSDsCounter, 0 mSdLazyCounter, 580 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 688 SdHoareTripleChecker+Valid, 2878 SdHoareTripleChecker+Invalid, 588 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 580 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:54:57,926 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [688 Valid, 2878 Invalid, 588 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 580 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:54:57,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1468 states. [2024-12-02 08:54:57,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1468 to 1352. [2024-12-02 08:54:57,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1352 states, 1341 states have (on average 1.3154362416107384) internal successors, (1764), 1341 states have internal predecessors, (1764), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:54:57,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1352 states to 1352 states and 1782 transitions. [2024-12-02 08:54:57,953 INFO L78 Accepts]: Start accepts. Automaton has 1352 states and 1782 transitions. Word has length 476 [2024-12-02 08:54:57,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:54:57,953 INFO L471 AbstractCegarLoop]: Abstraction has 1352 states and 1782 transitions. [2024-12-02 08:54:57,953 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 74.83333333333333) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:54:57,953 INFO L276 IsEmpty]: Start isEmpty. Operand 1352 states and 1782 transitions. [2024-12-02 08:54:57,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 478 [2024-12-02 08:54:57,956 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:54:57,957 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:54:57,957 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-12-02 08:54:57,957 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:54:57,957 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:54:57,957 INFO L85 PathProgramCache]: Analyzing trace with hash 557524213, now seen corresponding path program 1 times [2024-12-02 08:54:57,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:54:57,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1277261389] [2024-12-02 08:54:57,958 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:54:57,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:54:59,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:00,107 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:55:00,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:00,107 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1277261389] [2024-12-02 08:55:00,107 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1277261389] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:00,107 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:00,107 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:55:00,107 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1950211577] [2024-12-02 08:55:00,107 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:00,108 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:55:00,108 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:00,108 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:55:00,108 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:55:00,109 INFO L87 Difference]: Start difference. First operand 1352 states and 1782 transitions. Second operand has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:55:00,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:00,607 INFO L93 Difference]: Finished difference Result 1906 states and 2519 transitions. [2024-12-02 08:55:00,607 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:55:00,607 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 477 [2024-12-02 08:55:00,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:00,609 INFO L225 Difference]: With dead ends: 1906 [2024-12-02 08:55:00,609 INFO L226 Difference]: Without dead ends: 1375 [2024-12-02 08:55:00,610 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:55:00,610 INFO L435 NwaCegarLoop]: 568 mSDtfsCounter, 1028 mSDsluCounter, 1688 mSDsCounter, 0 mSdLazyCounter, 791 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1031 SdHoareTripleChecker+Valid, 2256 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 791 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:00,610 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1031 Valid, 2256 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 791 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:55:00,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1375 states. [2024-12-02 08:55:00,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1375 to 1353. [2024-12-02 08:55:00,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1353 states, 1342 states have (on average 1.3152011922503726) internal successors, (1765), 1342 states have internal predecessors, (1765), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:55:00,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1353 states to 1353 states and 1783 transitions. [2024-12-02 08:55:00,626 INFO L78 Accepts]: Start accepts. Automaton has 1353 states and 1783 transitions. Word has length 477 [2024-12-02 08:55:00,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:00,626 INFO L471 AbstractCegarLoop]: Abstraction has 1353 states and 1783 transitions. [2024-12-02 08:55:00,626 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:55:00,626 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 1783 transitions. [2024-12-02 08:55:00,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 478 [2024-12-02 08:55:00,627 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:00,628 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:00,628 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-12-02 08:55:00,628 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:00,628 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:00,628 INFO L85 PathProgramCache]: Analyzing trace with hash 1156124924, now seen corresponding path program 1 times [2024-12-02 08:55:00,628 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:00,628 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391584332] [2024-12-02 08:55:00,628 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:00,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:01,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:02,723 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2024-12-02 08:55:02,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:02,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1391584332] [2024-12-02 08:55:02,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1391584332] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:02,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:02,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 08:55:02,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112326458] [2024-12-02 08:55:02,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:02,724 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:55:02,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:02,724 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:55:02,725 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:55:02,725 INFO L87 Difference]: Start difference. First operand 1353 states and 1783 transitions. Second operand has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:55:02,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:02,864 INFO L93 Difference]: Finished difference Result 3074 states and 4032 transitions. [2024-12-02 08:55:02,864 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:55:02,864 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 477 [2024-12-02 08:55:02,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:02,867 INFO L225 Difference]: With dead ends: 3074 [2024-12-02 08:55:02,867 INFO L226 Difference]: Without dead ends: 2361 [2024-12-02 08:55:02,868 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:55:02,868 INFO L435 NwaCegarLoop]: 1844 mSDtfsCounter, 1139 mSDsluCounter, 7913 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1142 SdHoareTripleChecker+Valid, 9757 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:02,868 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1142 Valid, 9757 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:55:02,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2361 states. [2024-12-02 08:55:02,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2361 to 1420. [2024-12-02 08:55:02,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1420 states, 1406 states have (on average 1.3200568990042674) internal successors, (1856), 1406 states have internal predecessors, (1856), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:55:02,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1420 states to 1420 states and 1880 transitions. [2024-12-02 08:55:02,891 INFO L78 Accepts]: Start accepts. Automaton has 1420 states and 1880 transitions. Word has length 477 [2024-12-02 08:55:02,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:02,891 INFO L471 AbstractCegarLoop]: Abstraction has 1420 states and 1880 transitions. [2024-12-02 08:55:02,891 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:55:02,891 INFO L276 IsEmpty]: Start isEmpty. Operand 1420 states and 1880 transitions. [2024-12-02 08:55:02,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 479 [2024-12-02 08:55:02,893 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:02,894 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:02,894 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-12-02 08:55:02,894 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:02,894 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:02,894 INFO L85 PathProgramCache]: Analyzing trace with hash -1031637214, now seen corresponding path program 1 times [2024-12-02 08:55:02,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:02,894 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842685192] [2024-12-02 08:55:02,894 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:02,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:04,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:04,852 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 129 trivial. 0 not checked. [2024-12-02 08:55:04,852 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:04,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842685192] [2024-12-02 08:55:04,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [842685192] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:04,853 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:04,853 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:55:04,853 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2031376124] [2024-12-02 08:55:04,853 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:04,853 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:55:04,853 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:04,854 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:55:04,854 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:55:04,854 INFO L87 Difference]: Start difference. First operand 1420 states and 1880 transitions. Second operand has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:05,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:05,129 INFO L93 Difference]: Finished difference Result 2724 states and 3581 transitions. [2024-12-02 08:55:05,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:55:05,129 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 478 [2024-12-02 08:55:05,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:05,131 INFO L225 Difference]: With dead ends: 2724 [2024-12-02 08:55:05,131 INFO L226 Difference]: Without dead ends: 1436 [2024-12-02 08:55:05,132 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:55:05,133 INFO L435 NwaCegarLoop]: 782 mSDtfsCounter, 715 mSDsluCounter, 2908 mSDsCounter, 0 mSdLazyCounter, 286 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 716 SdHoareTripleChecker+Valid, 3690 SdHoareTripleChecker+Invalid, 289 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 286 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:05,133 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [716 Valid, 3690 Invalid, 289 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 286 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:55:05,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1436 states. [2024-12-02 08:55:05,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 1428. [2024-12-02 08:55:05,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1428 states, 1414 states have (on average 1.3154172560113153) internal successors, (1860), 1414 states have internal predecessors, (1860), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:55:05,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1428 states to 1428 states and 1884 transitions. [2024-12-02 08:55:05,154 INFO L78 Accepts]: Start accepts. Automaton has 1428 states and 1884 transitions. Word has length 478 [2024-12-02 08:55:05,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:05,154 INFO L471 AbstractCegarLoop]: Abstraction has 1428 states and 1884 transitions. [2024-12-02 08:55:05,154 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:05,154 INFO L276 IsEmpty]: Start isEmpty. Operand 1428 states and 1884 transitions. [2024-12-02 08:55:05,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 481 [2024-12-02 08:55:05,156 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:05,156 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:05,156 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-12-02 08:55:05,156 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:05,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:05,157 INFO L85 PathProgramCache]: Analyzing trace with hash -1196724032, now seen corresponding path program 1 times [2024-12-02 08:55:05,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:05,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100892203] [2024-12-02 08:55:05,157 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:05,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:06,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:07,325 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2024-12-02 08:55:07,325 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:07,325 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100892203] [2024-12-02 08:55:07,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1100892203] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:07,325 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:07,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:55:07,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [265040583] [2024-12-02 08:55:07,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:07,326 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:55:07,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:07,326 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:55:07,326 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:55:07,326 INFO L87 Difference]: Start difference. First operand 1428 states and 1884 transitions. Second operand has 7 states, 7 states have (on average 52.42857142857143) internal successors, (367), 7 states have internal predecessors, (367), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:55:07,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:07,635 INFO L93 Difference]: Finished difference Result 2838 states and 3728 transitions. [2024-12-02 08:55:07,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:55:07,635 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 52.42857142857143) internal successors, (367), 7 states have internal predecessors, (367), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) Word has length 480 [2024-12-02 08:55:07,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:07,638 INFO L225 Difference]: With dead ends: 2838 [2024-12-02 08:55:07,638 INFO L226 Difference]: Without dead ends: 1444 [2024-12-02 08:55:07,639 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:55:07,639 INFO L435 NwaCegarLoop]: 754 mSDtfsCounter, 788 mSDsluCounter, 2825 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 790 SdHoareTripleChecker+Valid, 3579 SdHoareTripleChecker+Invalid, 296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:07,639 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [790 Valid, 3579 Invalid, 296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:55:07,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1444 states. [2024-12-02 08:55:07,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1444 to 1436. [2024-12-02 08:55:07,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1436 states, 1422 states have (on average 1.310829817158931) internal successors, (1864), 1422 states have internal predecessors, (1864), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:55:07,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1436 states to 1436 states and 1888 transitions. [2024-12-02 08:55:07,663 INFO L78 Accepts]: Start accepts. Automaton has 1436 states and 1888 transitions. Word has length 480 [2024-12-02 08:55:07,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:07,663 INFO L471 AbstractCegarLoop]: Abstraction has 1436 states and 1888 transitions. [2024-12-02 08:55:07,663 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 52.42857142857143) internal successors, (367), 7 states have internal predecessors, (367), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:55:07,663 INFO L276 IsEmpty]: Start isEmpty. Operand 1436 states and 1888 transitions. [2024-12-02 08:55:07,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 483 [2024-12-02 08:55:07,665 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:07,665 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:07,666 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65 [2024-12-02 08:55:07,666 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:07,666 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:07,666 INFO L85 PathProgramCache]: Analyzing trace with hash 1879075376, now seen corresponding path program 1 times [2024-12-02 08:55:07,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:07,666 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707093118] [2024-12-02 08:55:07,666 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:07,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:09,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:09,990 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 159 trivial. 0 not checked. [2024-12-02 08:55:09,990 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:09,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1707093118] [2024-12-02 08:55:09,990 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1707093118] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:09,990 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:09,990 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:55:09,990 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520691194] [2024-12-02 08:55:09,991 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:09,991 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:55:09,991 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:09,992 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:55:09,992 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:55:09,992 INFO L87 Difference]: Start difference. First operand 1436 states and 1888 transitions. Second operand has 7 states, 7 states have (on average 51.57142857142857) internal successors, (361), 7 states have internal predecessors, (361), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:55:10,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:10,301 INFO L93 Difference]: Finished difference Result 2980 states and 3903 transitions. [2024-12-02 08:55:10,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:55:10,301 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 51.57142857142857) internal successors, (361), 7 states have internal predecessors, (361), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 482 [2024-12-02 08:55:10,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:10,303 INFO L225 Difference]: With dead ends: 2980 [2024-12-02 08:55:10,303 INFO L226 Difference]: Without dead ends: 1452 [2024-12-02 08:55:10,304 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:55:10,304 INFO L435 NwaCegarLoop]: 737 mSDtfsCounter, 844 mSDsluCounter, 2771 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 847 SdHoareTripleChecker+Valid, 3508 SdHoareTripleChecker+Invalid, 300 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:10,305 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [847 Valid, 3508 Invalid, 300 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:55:10,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1452 states. [2024-12-02 08:55:10,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1452 to 1444. [2024-12-02 08:55:10,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1444 states, 1430 states have (on average 1.3062937062937063) internal successors, (1868), 1430 states have internal predecessors, (1868), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:55:10,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 1444 states and 1892 transitions. [2024-12-02 08:55:10,327 INFO L78 Accepts]: Start accepts. Automaton has 1444 states and 1892 transitions. Word has length 482 [2024-12-02 08:55:10,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:10,327 INFO L471 AbstractCegarLoop]: Abstraction has 1444 states and 1892 transitions. [2024-12-02 08:55:10,327 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 51.57142857142857) internal successors, (361), 7 states have internal predecessors, (361), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:55:10,327 INFO L276 IsEmpty]: Start isEmpty. Operand 1444 states and 1892 transitions. [2024-12-02 08:55:10,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 485 [2024-12-02 08:55:10,329 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:10,329 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:10,329 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-12-02 08:55:10,330 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:10,330 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:10,330 INFO L85 PathProgramCache]: Analyzing trace with hash 529239552, now seen corresponding path program 1 times [2024-12-02 08:55:10,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:10,330 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114931895] [2024-12-02 08:55:10,330 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:10,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:11,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:12,836 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 98 proven. 4 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 08:55:12,837 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:12,837 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1114931895] [2024-12-02 08:55:12,837 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1114931895] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:55:12,837 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [550179956] [2024-12-02 08:55:12,837 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:12,837 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:55:12,837 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:55:12,838 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:55:12,839 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 08:55:15,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:15,088 INFO L256 TraceCheckSpWp]: Trace formula consists of 2970 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 08:55:15,099 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:55:15,354 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 148 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-12-02 08:55:15,354 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:55:15,354 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [550179956] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:15,354 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:55:15,354 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [6] total 12 [2024-12-02 08:55:15,354 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199244654] [2024-12-02 08:55:15,354 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:15,355 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:55:15,355 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:15,356 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:55:15,356 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:55:15,356 INFO L87 Difference]: Start difference. First operand 1444 states and 1892 transitions. Second operand has 8 states, 8 states have (on average 57.125) internal successors, (457), 8 states have internal predecessors, (457), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:55:15,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:15,869 INFO L93 Difference]: Finished difference Result 3301 states and 4342 transitions. [2024-12-02 08:55:15,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:55:15,869 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 57.125) internal successors, (457), 8 states have internal predecessors, (457), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 484 [2024-12-02 08:55:15,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:15,873 INFO L225 Difference]: With dead ends: 3301 [2024-12-02 08:55:15,873 INFO L226 Difference]: Without dead ends: 2525 [2024-12-02 08:55:15,874 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 494 GetRequests, 482 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=141, Unknown=0, NotChecked=0, Total=182 [2024-12-02 08:55:15,875 INFO L435 NwaCegarLoop]: 565 mSDtfsCounter, 1770 mSDsluCounter, 2105 mSDsCounter, 0 mSdLazyCounter, 968 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1776 SdHoareTripleChecker+Valid, 2670 SdHoareTripleChecker+Invalid, 968 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 968 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:15,875 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1776 Valid, 2670 Invalid, 968 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 968 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:55:15,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2525 states. [2024-12-02 08:55:15,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2525 to 1987. [2024-12-02 08:55:15,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1987 states, 1964 states have (on average 1.2836048879837068) internal successors, (2521), 1964 states have internal predecessors, (2521), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 08:55:15,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1987 states to 1987 states and 2563 transitions. [2024-12-02 08:55:15,917 INFO L78 Accepts]: Start accepts. Automaton has 1987 states and 2563 transitions. Word has length 484 [2024-12-02 08:55:15,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:15,918 INFO L471 AbstractCegarLoop]: Abstraction has 1987 states and 2563 transitions. [2024-12-02 08:55:15,918 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 57.125) internal successors, (457), 8 states have internal predecessors, (457), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:55:15,918 INFO L276 IsEmpty]: Start isEmpty. Operand 1987 states and 2563 transitions. [2024-12-02 08:55:15,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 485 [2024-12-02 08:55:15,920 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:15,920 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:15,941 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-12-02 08:55:16,121 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:55:16,121 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:16,121 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:16,121 INFO L85 PathProgramCache]: Analyzing trace with hash -3753841, now seen corresponding path program 1 times [2024-12-02 08:55:16,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:16,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609108483] [2024-12-02 08:55:16,122 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:16,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:16,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:16,922 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2024-12-02 08:55:16,922 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:16,922 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1609108483] [2024-12-02 08:55:16,922 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1609108483] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:16,922 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:16,923 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:55:16,923 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2087558516] [2024-12-02 08:55:16,923 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:16,923 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:55:16,923 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:16,924 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:55:16,924 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:55:16,924 INFO L87 Difference]: Start difference. First operand 1987 states and 2563 transitions. Second operand has 6 states, 6 states have (on average 64.83333333333333) internal successors, (389), 6 states have internal predecessors, (389), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:55:16,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:16,988 INFO L93 Difference]: Finished difference Result 3171 states and 4093 transitions. [2024-12-02 08:55:16,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:55:16,989 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 64.83333333333333) internal successors, (389), 6 states have internal predecessors, (389), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 484 [2024-12-02 08:55:16,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:16,991 INFO L225 Difference]: With dead ends: 3171 [2024-12-02 08:55:16,991 INFO L226 Difference]: Without dead ends: 2077 [2024-12-02 08:55:16,992 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:55:16,992 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 16 mSDsluCounter, 3006 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 3762 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:16,992 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 3762 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:55:16,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2077 states. [2024-12-02 08:55:17,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2077 to 2077. [2024-12-02 08:55:17,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2077 states, 2054 states have (on average 1.2906523855890943) internal successors, (2651), 2054 states have internal predecessors, (2651), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 08:55:17,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2077 states to 2077 states and 2693 transitions. [2024-12-02 08:55:17,024 INFO L78 Accepts]: Start accepts. Automaton has 2077 states and 2693 transitions. Word has length 484 [2024-12-02 08:55:17,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:17,024 INFO L471 AbstractCegarLoop]: Abstraction has 2077 states and 2693 transitions. [2024-12-02 08:55:17,024 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 64.83333333333333) internal successors, (389), 6 states have internal predecessors, (389), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:55:17,025 INFO L276 IsEmpty]: Start isEmpty. Operand 2077 states and 2693 transitions. [2024-12-02 08:55:17,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 486 [2024-12-02 08:55:17,027 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:17,027 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:17,027 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-12-02 08:55:17,027 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:17,028 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:17,028 INFO L85 PathProgramCache]: Analyzing trace with hash 1139381739, now seen corresponding path program 1 times [2024-12-02 08:55:17,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:17,028 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196837095] [2024-12-02 08:55:17,028 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:17,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:18,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:19,602 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 171 trivial. 0 not checked. [2024-12-02 08:55:19,602 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:19,602 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [196837095] [2024-12-02 08:55:19,602 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [196837095] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:19,602 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:19,602 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:55:19,602 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1922912154] [2024-12-02 08:55:19,602 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:19,602 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:55:19,603 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:19,603 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:55:19,603 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:55:19,603 INFO L87 Difference]: Start difference. First operand 2077 states and 2693 transitions. Second operand has 6 states, 6 states have (on average 59.0) internal successors, (354), 6 states have internal predecessors, (354), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:55:20,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:20,076 INFO L93 Difference]: Finished difference Result 3915 states and 5043 transitions. [2024-12-02 08:55:20,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:55:20,076 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 59.0) internal successors, (354), 6 states have internal predecessors, (354), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 485 [2024-12-02 08:55:20,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:20,079 INFO L225 Difference]: With dead ends: 3915 [2024-12-02 08:55:20,079 INFO L226 Difference]: Without dead ends: 2091 [2024-12-02 08:55:20,080 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:55:20,080 INFO L435 NwaCegarLoop]: 559 mSDtfsCounter, 703 mSDsluCounter, 1670 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 706 SdHoareTripleChecker+Valid, 2229 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:20,081 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [706 Valid, 2229 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:55:20,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2091 states. [2024-12-02 08:55:20,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2091 to 2084. [2024-12-02 08:55:20,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2084 states, 2061 states have (on average 1.289665211062591) internal successors, (2658), 2061 states have internal predecessors, (2658), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 08:55:20,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2084 states to 2084 states and 2700 transitions. [2024-12-02 08:55:20,113 INFO L78 Accepts]: Start accepts. Automaton has 2084 states and 2700 transitions. Word has length 485 [2024-12-02 08:55:20,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:20,113 INFO L471 AbstractCegarLoop]: Abstraction has 2084 states and 2700 transitions. [2024-12-02 08:55:20,113 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 59.0) internal successors, (354), 6 states have internal predecessors, (354), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:55:20,113 INFO L276 IsEmpty]: Start isEmpty. Operand 2084 states and 2700 transitions. [2024-12-02 08:55:20,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 488 [2024-12-02 08:55:20,115 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:20,116 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:20,116 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-12-02 08:55:20,116 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:20,116 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:20,116 INFO L85 PathProgramCache]: Analyzing trace with hash -498686621, now seen corresponding path program 1 times [2024-12-02 08:55:20,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:20,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006346217] [2024-12-02 08:55:20,116 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:20,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:21,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:22,503 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 158 trivial. 0 not checked. [2024-12-02 08:55:22,504 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:22,504 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006346217] [2024-12-02 08:55:22,504 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2006346217] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:22,504 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:22,504 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:55:22,504 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1517351158] [2024-12-02 08:55:22,504 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:22,504 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:55:22,504 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:22,504 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:55:22,504 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:55:22,505 INFO L87 Difference]: Start difference. First operand 2084 states and 2700 transitions. Second operand has 6 states, 6 states have (on average 61.333333333333336) internal successors, (368), 6 states have internal predecessors, (368), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:55:22,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:22,923 INFO L93 Difference]: Finished difference Result 3803 states and 4895 transitions. [2024-12-02 08:55:22,924 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:55:22,924 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 61.333333333333336) internal successors, (368), 6 states have internal predecessors, (368), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 487 [2024-12-02 08:55:22,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:22,926 INFO L225 Difference]: With dead ends: 3803 [2024-12-02 08:55:22,926 INFO L226 Difference]: Without dead ends: 2098 [2024-12-02 08:55:22,927 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:55:22,927 INFO L435 NwaCegarLoop]: 559 mSDtfsCounter, 690 mSDsluCounter, 1670 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 692 SdHoareTripleChecker+Valid, 2229 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:22,927 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [692 Valid, 2229 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:55:22,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2098 states. [2024-12-02 08:55:22,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2098 to 2091. [2024-12-02 08:55:22,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2091 states, 2068 states have (on average 1.2886847195357833) internal successors, (2665), 2068 states have internal predecessors, (2665), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 08:55:22,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2091 states to 2091 states and 2707 transitions. [2024-12-02 08:55:22,956 INFO L78 Accepts]: Start accepts. Automaton has 2091 states and 2707 transitions. Word has length 487 [2024-12-02 08:55:22,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:22,957 INFO L471 AbstractCegarLoop]: Abstraction has 2091 states and 2707 transitions. [2024-12-02 08:55:22,957 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 61.333333333333336) internal successors, (368), 6 states have internal predecessors, (368), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:55:22,957 INFO L276 IsEmpty]: Start isEmpty. Operand 2091 states and 2707 transitions. [2024-12-02 08:55:22,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 490 [2024-12-02 08:55:22,959 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:22,959 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:22,959 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2024-12-02 08:55:22,959 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:22,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:22,960 INFO L85 PathProgramCache]: Analyzing trace with hash -319512153, now seen corresponding path program 1 times [2024-12-02 08:55:22,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:22,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410812167] [2024-12-02 08:55:22,960 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:22,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:24,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:25,253 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 56 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2024-12-02 08:55:25,254 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:25,254 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410812167] [2024-12-02 08:55:25,254 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [410812167] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:25,254 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:25,254 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 08:55:25,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354947217] [2024-12-02 08:55:25,254 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:25,254 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:55:25,254 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:25,255 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:55:25,255 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:55:25,255 INFO L87 Difference]: Start difference. First operand 2091 states and 2707 transitions. Second operand has 8 states, 8 states have (on average 50.25) internal successors, (402), 8 states have internal predecessors, (402), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:26,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:26,098 INFO L93 Difference]: Finished difference Result 5003 states and 6368 transitions. [2024-12-02 08:55:26,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:55:26,098 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 50.25) internal successors, (402), 8 states have internal predecessors, (402), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 489 [2024-12-02 08:55:26,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:26,100 INFO L225 Difference]: With dead ends: 5003 [2024-12-02 08:55:26,100 INFO L226 Difference]: Without dead ends: 3713 [2024-12-02 08:55:26,101 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:55:26,102 INFO L435 NwaCegarLoop]: 1160 mSDtfsCounter, 1256 mSDsluCounter, 4973 mSDsCounter, 0 mSdLazyCounter, 1408 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1259 SdHoareTripleChecker+Valid, 6133 SdHoareTripleChecker+Invalid, 1408 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1408 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:26,102 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1259 Valid, 6133 Invalid, 1408 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1408 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-12-02 08:55:26,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3713 states. [2024-12-02 08:55:26,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3713 to 3702. [2024-12-02 08:55:26,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3702 states, 3670 states have (on average 1.2779291553133516) internal successors, (4690), 3670 states have internal predecessors, (4690), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-12-02 08:55:26,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3702 states to 3702 states and 4750 transitions. [2024-12-02 08:55:26,174 INFO L78 Accepts]: Start accepts. Automaton has 3702 states and 4750 transitions. Word has length 489 [2024-12-02 08:55:26,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:26,174 INFO L471 AbstractCegarLoop]: Abstraction has 3702 states and 4750 transitions. [2024-12-02 08:55:26,175 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 50.25) internal successors, (402), 8 states have internal predecessors, (402), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:26,175 INFO L276 IsEmpty]: Start isEmpty. Operand 3702 states and 4750 transitions. [2024-12-02 08:55:26,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-12-02 08:55:26,178 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:26,179 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:26,179 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-12-02 08:55:26,179 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:26,179 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:26,179 INFO L85 PathProgramCache]: Analyzing trace with hash -456250685, now seen corresponding path program 1 times [2024-12-02 08:55:26,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:26,179 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [679099283] [2024-12-02 08:55:26,179 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:26,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:27,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:28,611 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2024-12-02 08:55:28,611 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:28,611 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [679099283] [2024-12-02 08:55:28,611 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [679099283] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:28,611 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:28,611 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:55:28,611 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18070736] [2024-12-02 08:55:28,611 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:28,612 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:55:28,612 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:28,612 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:55:28,612 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:55:28,612 INFO L87 Difference]: Start difference. First operand 3702 states and 4750 transitions. Second operand has 6 states, 6 states have (on average 63.166666666666664) internal successors, (379), 6 states have internal predecessors, (379), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:55:29,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:29,036 INFO L93 Difference]: Finished difference Result 3715 states and 4761 transitions. [2024-12-02 08:55:29,036 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:55:29,036 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 63.166666666666664) internal successors, (379), 6 states have internal predecessors, (379), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 491 [2024-12-02 08:55:29,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:29,038 INFO L225 Difference]: With dead ends: 3715 [2024-12-02 08:55:29,038 INFO L226 Difference]: Without dead ends: 2105 [2024-12-02 08:55:29,039 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:55:29,039 INFO L435 NwaCegarLoop]: 559 mSDtfsCounter, 681 mSDsluCounter, 1670 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 682 SdHoareTripleChecker+Valid, 2229 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:29,039 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [682 Valid, 2229 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:55:29,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2105 states. [2024-12-02 08:55:29,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2105 to 2098. [2024-12-02 08:55:29,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2098 states, 2075 states have (on average 1.287710843373494) internal successors, (2672), 2075 states have internal predecessors, (2672), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 08:55:29,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2098 states to 2098 states and 2714 transitions. [2024-12-02 08:55:29,069 INFO L78 Accepts]: Start accepts. Automaton has 2098 states and 2714 transitions. Word has length 491 [2024-12-02 08:55:29,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:29,069 INFO L471 AbstractCegarLoop]: Abstraction has 2098 states and 2714 transitions. [2024-12-02 08:55:29,069 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 63.166666666666664) internal successors, (379), 6 states have internal predecessors, (379), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:55:29,069 INFO L276 IsEmpty]: Start isEmpty. Operand 2098 states and 2714 transitions. [2024-12-02 08:55:29,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-12-02 08:55:29,072 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:29,072 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:29,072 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2024-12-02 08:55:29,072 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:29,073 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:29,073 INFO L85 PathProgramCache]: Analyzing trace with hash -522456701, now seen corresponding path program 1 times [2024-12-02 08:55:29,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:29,073 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1108909340] [2024-12-02 08:55:29,073 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:29,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:31,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:32,862 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2024-12-02 08:55:32,862 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:32,862 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1108909340] [2024-12-02 08:55:32,862 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1108909340] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:32,862 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:32,863 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 08:55:32,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057986555] [2024-12-02 08:55:32,863 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:32,863 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 08:55:32,863 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:32,863 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 08:55:32,863 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:55:32,863 INFO L87 Difference]: Start difference. First operand 2098 states and 2714 transitions. Second operand has 9 states, 9 states have (on average 43.44444444444444) internal successors, (391), 9 states have internal predecessors, (391), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:34,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:34,062 INFO L93 Difference]: Finished difference Result 5188 states and 6594 transitions. [2024-12-02 08:55:34,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:55:34,062 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 43.44444444444444) internal successors, (391), 9 states have internal predecessors, (391), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 491 [2024-12-02 08:55:34,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:34,065 INFO L225 Difference]: With dead ends: 5188 [2024-12-02 08:55:34,065 INFO L226 Difference]: Without dead ends: 3721 [2024-12-02 08:55:34,066 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:55:34,067 INFO L435 NwaCegarLoop]: 881 mSDtfsCounter, 1981 mSDsluCounter, 4032 mSDsCounter, 0 mSdLazyCounter, 1947 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1982 SdHoareTripleChecker+Valid, 4913 SdHoareTripleChecker+Invalid, 1953 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 1947 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:34,067 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1982 Valid, 4913 Invalid, 1953 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 1947 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-12-02 08:55:34,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3721 states. [2024-12-02 08:55:34,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3721 to 2347. [2024-12-02 08:55:34,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2347 states, 2317 states have (on average 1.2956409149762624) internal successors, (3002), 2317 states have internal predecessors, (3002), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 08:55:34,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2347 states to 2347 states and 3058 transitions. [2024-12-02 08:55:34,129 INFO L78 Accepts]: Start accepts. Automaton has 2347 states and 3058 transitions. Word has length 491 [2024-12-02 08:55:34,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:34,130 INFO L471 AbstractCegarLoop]: Abstraction has 2347 states and 3058 transitions. [2024-12-02 08:55:34,130 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 43.44444444444444) internal successors, (391), 9 states have internal predecessors, (391), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:34,130 INFO L276 IsEmpty]: Start isEmpty. Operand 2347 states and 3058 transitions. [2024-12-02 08:55:34,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-12-02 08:55:34,134 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:34,134 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:34,134 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73 [2024-12-02 08:55:34,135 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:34,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:34,135 INFO L85 PathProgramCache]: Analyzing trace with hash -79043197, now seen corresponding path program 1 times [2024-12-02 08:55:34,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:34,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118466833] [2024-12-02 08:55:34,135 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:34,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:37,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:39,686 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 4 proven. 117 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:55:39,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:39,686 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118466833] [2024-12-02 08:55:39,686 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2118466833] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:55:39,686 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1246879641] [2024-12-02 08:55:39,686 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:39,686 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:55:39,686 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:55:39,688 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:55:39,689 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:55:42,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:42,012 INFO L256 TraceCheckSpWp]: Trace formula consists of 2979 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:55:42,019 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:55:42,066 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 76 proven. 0 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-12-02 08:55:42,066 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:55:42,066 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1246879641] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:42,066 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:55:42,067 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-12-02 08:55:42,067 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843162720] [2024-12-02 08:55:42,067 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:42,067 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:55:42,067 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:42,068 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:55:42,068 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:55:42,068 INFO L87 Difference]: Start difference. First operand 2347 states and 3058 transitions. Second operand has 6 states, 5 states have (on average 77.4) internal successors, (387), 6 states have internal predecessors, (387), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:42,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:42,146 INFO L93 Difference]: Finished difference Result 4133 states and 5350 transitions. [2024-12-02 08:55:42,146 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:55:42,146 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 77.4) internal successors, (387), 6 states have internal predecessors, (387), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 491 [2024-12-02 08:55:42,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:42,149 INFO L225 Difference]: With dead ends: 4133 [2024-12-02 08:55:42,149 INFO L226 Difference]: Without dead ends: 2347 [2024-12-02 08:55:42,151 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 501 GetRequests, 488 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:55:42,151 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 0 mSDsluCounter, 3005 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3761 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:42,151 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3761 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:55:42,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2347 states. [2024-12-02 08:55:42,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2347 to 2347. [2024-12-02 08:55:42,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2347 states, 2317 states have (on average 1.289598618903755) internal successors, (2988), 2317 states have internal predecessors, (2988), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 08:55:42,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2347 states to 2347 states and 3044 transitions. [2024-12-02 08:55:42,197 INFO L78 Accepts]: Start accepts. Automaton has 2347 states and 3044 transitions. Word has length 491 [2024-12-02 08:55:42,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:42,197 INFO L471 AbstractCegarLoop]: Abstraction has 2347 states and 3044 transitions. [2024-12-02 08:55:42,197 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 77.4) internal successors, (387), 6 states have internal predecessors, (387), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:42,198 INFO L276 IsEmpty]: Start isEmpty. Operand 2347 states and 3044 transitions. [2024-12-02 08:55:42,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 494 [2024-12-02 08:55:42,200 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:42,201 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:42,223 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:55:42,401 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:55:42,401 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:42,401 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:42,401 INFO L85 PathProgramCache]: Analyzing trace with hash 315561759, now seen corresponding path program 1 times [2024-12-02 08:55:42,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:42,401 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308908451] [2024-12-02 08:55:42,402 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:42,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:45,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:47,183 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 122 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:55:47,184 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:47,184 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1308908451] [2024-12-02 08:55:47,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1308908451] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:55:47,184 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:55:47,184 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 08:55:47,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709009467] [2024-12-02 08:55:47,184 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:55:47,184 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 08:55:47,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:55:47,184 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 08:55:47,185 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:55:47,185 INFO L87 Difference]: Start difference. First operand 2347 states and 3044 transitions. Second operand has 9 states, 9 states have (on average 51.77777777777778) internal successors, (466), 9 states have internal predecessors, (466), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:48,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:55:48,300 INFO L93 Difference]: Finished difference Result 4525 states and 5810 transitions. [2024-12-02 08:55:48,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:55:48,301 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 51.77777777777778) internal successors, (466), 9 states have internal predecessors, (466), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 493 [2024-12-02 08:55:48,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:55:48,303 INFO L225 Difference]: With dead ends: 4525 [2024-12-02 08:55:48,303 INFO L226 Difference]: Without dead ends: 3721 [2024-12-02 08:55:48,305 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:55:48,305 INFO L435 NwaCegarLoop]: 881 mSDtfsCounter, 1882 mSDsluCounter, 4031 mSDsCounter, 0 mSdLazyCounter, 1929 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1883 SdHoareTripleChecker+Valid, 4912 SdHoareTripleChecker+Invalid, 1935 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 1929 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:55:48,305 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1883 Valid, 4912 Invalid, 1935 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 1929 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-12-02 08:55:48,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3721 states. [2024-12-02 08:55:48,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3721 to 3281. [2024-12-02 08:55:48,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3281 states, 3251 states have (on average 1.2565364503229774) internal successors, (4085), 3251 states have internal predecessors, (4085), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 08:55:48,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3281 states to 3281 states and 4141 transitions. [2024-12-02 08:55:48,364 INFO L78 Accepts]: Start accepts. Automaton has 3281 states and 4141 transitions. Word has length 493 [2024-12-02 08:55:48,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:55:48,365 INFO L471 AbstractCegarLoop]: Abstraction has 3281 states and 4141 transitions. [2024-12-02 08:55:48,365 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 51.77777777777778) internal successors, (466), 9 states have internal predecessors, (466), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:55:48,365 INFO L276 IsEmpty]: Start isEmpty. Operand 3281 states and 4141 transitions. [2024-12-02 08:55:48,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 494 [2024-12-02 08:55:48,369 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:55:48,369 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:55:48,369 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2024-12-02 08:55:48,369 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:55:48,370 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:55:48,370 INFO L85 PathProgramCache]: Analyzing trace with hash -2068612000, now seen corresponding path program 1 times [2024-12-02 08:55:48,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:55:48,370 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251143761] [2024-12-02 08:55:48,370 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:48,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:55:51,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:53,221 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 4 proven. 116 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:55:53,221 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:55:53,222 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251143761] [2024-12-02 08:55:53,222 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251143761] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:55:53,222 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1580971592] [2024-12-02 08:55:53,222 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:55:53,222 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:55:53,222 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:55:53,223 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:55:53,224 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 08:55:56,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:55:56,253 INFO L256 TraceCheckSpWp]: Trace formula consists of 2985 conjuncts, 186 conjuncts are in the unsatisfiable core [2024-12-02 08:55:56,303 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:55:59,815 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 81 proven. 39 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:55:59,816 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:56:10,197 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 79 proven. 41 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:56:10,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1580971592] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:56:10,197 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:56:10,198 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 28, 23] total 58 [2024-12-02 08:56:10,198 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059406827] [2024-12-02 08:56:10,198 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:56:10,198 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 58 states [2024-12-02 08:56:10,198 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:56:10,199 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2024-12-02 08:56:10,199 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=3007, Unknown=0, NotChecked=0, Total=3306 [2024-12-02 08:56:10,200 INFO L87 Difference]: Start difference. First operand 3281 states and 4141 transitions. Second operand has 58 states, 58 states have (on average 22.448275862068964) internal successors, (1302), 58 states have internal predecessors, (1302), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-12-02 08:56:52,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:56:52,981 INFO L93 Difference]: Finished difference Result 34888 states and 44242 transitions. [2024-12-02 08:56:52,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 281 states. [2024-12-02 08:56:52,982 INFO L78 Accepts]: Start accepts. Automaton has has 58 states, 58 states have (on average 22.448275862068964) internal successors, (1302), 58 states have internal predecessors, (1302), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) Word has length 493 [2024-12-02 08:56:52,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:56:52,999 INFO L225 Difference]: With dead ends: 34888 [2024-12-02 08:56:53,000 INFO L226 Difference]: Without dead ends: 32332 [2024-12-02 08:56:53,013 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1267 GetRequests, 939 SyntacticMatches, 0 SemanticMatches, 328 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38870 ImplicationChecksByTransitivity, 17.7s TimeCoverageRelationStatistics Valid=12316, Invalid=96254, Unknown=0, NotChecked=0, Total=108570 [2024-12-02 08:56:53,014 INFO L435 NwaCegarLoop]: 2218 mSDtfsCounter, 19149 mSDsluCounter, 68946 mSDsCounter, 0 mSdLazyCounter, 40361 mSolverCounterSat, 83 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 20.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19150 SdHoareTripleChecker+Valid, 71164 SdHoareTripleChecker+Invalid, 40444 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.3s SdHoareTripleChecker+Time, 83 IncrementalHoareTripleChecker+Valid, 40361 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 23.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:56:53,014 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [19150 Valid, 71164 Invalid, 40444 Unknown, 0 Unchecked, 0.3s Time], IncrementalHoareTripleChecker [83 Valid, 40361 Invalid, 0 Unknown, 0 Unchecked, 23.4s Time] [2024-12-02 08:56:53,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32332 states. [2024-12-02 08:56:53,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32332 to 6882. [2024-12-02 08:56:53,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6882 states, 6790 states have (on average 1.2711340206185566) internal successors, (8631), 6790 states have internal predecessors, (8631), 90 states have call successors, (90), 1 states have call predecessors, (90), 1 states have return successors, (90), 90 states have call predecessors, (90), 90 states have call successors, (90) [2024-12-02 08:56:53,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6882 states to 6882 states and 8811 transitions. [2024-12-02 08:56:53,304 INFO L78 Accepts]: Start accepts. Automaton has 6882 states and 8811 transitions. Word has length 493 [2024-12-02 08:56:53,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:56:53,304 INFO L471 AbstractCegarLoop]: Abstraction has 6882 states and 8811 transitions. [2024-12-02 08:56:53,305 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 58 states, 58 states have (on average 22.448275862068964) internal successors, (1302), 58 states have internal predecessors, (1302), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-12-02 08:56:53,305 INFO L276 IsEmpty]: Start isEmpty. Operand 6882 states and 8811 transitions. [2024-12-02 08:56:53,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 495 [2024-12-02 08:56:53,311 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:56:53,312 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:56:53,342 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-12-02 08:56:53,512 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:56:53,512 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:56:53,513 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:56:53,513 INFO L85 PathProgramCache]: Analyzing trace with hash 2087294471, now seen corresponding path program 1 times [2024-12-02 08:56:53,513 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:56:53,513 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [600357332] [2024-12-02 08:56:53,513 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:56:53,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:56:57,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:00,271 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 120 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:57:00,271 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:57:00,271 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [600357332] [2024-12-02 08:57:00,271 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [600357332] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:57:00,271 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:57:00,271 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-12-02 08:57:00,271 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084978608] [2024-12-02 08:57:00,271 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:57:00,271 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-12-02 08:57:00,271 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:57:00,272 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-12-02 08:57:00,272 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:57:00,272 INFO L87 Difference]: Start difference. First operand 6882 states and 8811 transitions. Second operand has 12 states, 12 states have (on average 38.916666666666664) internal successors, (467), 12 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:57:02,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:57:02,807 INFO L93 Difference]: Finished difference Result 13411 states and 17347 transitions. [2024-12-02 08:57:02,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-12-02 08:57:02,808 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 38.916666666666664) internal successors, (467), 12 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 494 [2024-12-02 08:57:02,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:57:02,815 INFO L225 Difference]: With dead ends: 13411 [2024-12-02 08:57:02,816 INFO L226 Difference]: Without dead ends: 11229 [2024-12-02 08:57:02,819 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=156, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:57:02,820 INFO L435 NwaCegarLoop]: 1263 mSDtfsCounter, 1564 mSDsluCounter, 8445 mSDsCounter, 0 mSdLazyCounter, 4752 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1567 SdHoareTripleChecker+Valid, 9708 SdHoareTripleChecker+Invalid, 4752 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4752 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:57:02,820 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1567 Valid, 9708 Invalid, 4752 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4752 Invalid, 0 Unknown, 0 Unchecked, 2.3s Time] [2024-12-02 08:57:02,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11229 states. [2024-12-02 08:57:02,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11229 to 7403. [2024-12-02 08:57:02,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7403 states, 7293 states have (on average 1.2742355683532154) internal successors, (9293), 7293 states have internal predecessors, (9293), 108 states have call successors, (108), 1 states have call predecessors, (108), 1 states have return successors, (108), 108 states have call predecessors, (108), 108 states have call successors, (108) [2024-12-02 08:57:02,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7403 states to 7403 states and 9509 transitions. [2024-12-02 08:57:03,000 INFO L78 Accepts]: Start accepts. Automaton has 7403 states and 9509 transitions. Word has length 494 [2024-12-02 08:57:03,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:57:03,000 INFO L471 AbstractCegarLoop]: Abstraction has 7403 states and 9509 transitions. [2024-12-02 08:57:03,000 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 38.916666666666664) internal successors, (467), 12 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:57:03,000 INFO L276 IsEmpty]: Start isEmpty. Operand 7403 states and 9509 transitions. [2024-12-02 08:57:03,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 495 [2024-12-02 08:57:03,007 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:57:03,007 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:57:03,007 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77 [2024-12-02 08:57:03,007 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:57:03,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:57:03,008 INFO L85 PathProgramCache]: Analyzing trace with hash -2060021018, now seen corresponding path program 1 times [2024-12-02 08:57:03,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:57:03,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65419942] [2024-12-02 08:57:03,008 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:03,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:57:07,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:09,920 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 2 proven. 120 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:57:09,920 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:57:09,920 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65419942] [2024-12-02 08:57:09,920 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [65419942] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:57:09,920 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1978857614] [2024-12-02 08:57:09,920 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:09,920 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:57:09,920 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:57:09,922 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:57:09,922 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:57:12,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:12,896 INFO L256 TraceCheckSpWp]: Trace formula consists of 2986 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:57:12,903 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:57:12,961 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2024-12-02 08:57:12,962 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:57:12,962 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1978857614] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:57:12,962 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:57:12,962 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [14] total 18 [2024-12-02 08:57:12,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [500952257] [2024-12-02 08:57:12,962 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:57:12,963 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:57:12,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:57:12,963 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:57:12,963 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=266, Unknown=0, NotChecked=0, Total=306 [2024-12-02 08:57:12,964 INFO L87 Difference]: Start difference. First operand 7403 states and 9509 transitions. Second operand has 6 states, 5 states have (on average 76.2) internal successors, (381), 6 states have internal predecessors, (381), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:57:13,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:57:13,125 INFO L93 Difference]: Finished difference Result 13649 states and 17477 transitions. [2024-12-02 08:57:13,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:57:13,125 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 76.2) internal successors, (381), 6 states have internal predecessors, (381), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 494 [2024-12-02 08:57:13,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:57:13,131 INFO L225 Difference]: With dead ends: 13649 [2024-12-02 08:57:13,131 INFO L226 Difference]: Without dead ends: 7403 [2024-12-02 08:57:13,135 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 507 GetRequests, 491 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=40, Invalid=266, Unknown=0, NotChecked=0, Total=306 [2024-12-02 08:57:13,135 INFO L435 NwaCegarLoop]: 755 mSDtfsCounter, 0 mSDsluCounter, 3001 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3756 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:57:13,136 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3756 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:57:13,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7403 states. [2024-12-02 08:57:13,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7403 to 7403. [2024-12-02 08:57:13,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7403 states, 7293 states have (on average 1.2717674482380366) internal successors, (9275), 7293 states have internal predecessors, (9275), 108 states have call successors, (108), 1 states have call predecessors, (108), 1 states have return successors, (108), 108 states have call predecessors, (108), 108 states have call successors, (108) [2024-12-02 08:57:13,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7403 states to 7403 states and 9491 transitions. [2024-12-02 08:57:13,277 INFO L78 Accepts]: Start accepts. Automaton has 7403 states and 9491 transitions. Word has length 494 [2024-12-02 08:57:13,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:57:13,277 INFO L471 AbstractCegarLoop]: Abstraction has 7403 states and 9491 transitions. [2024-12-02 08:57:13,277 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 76.2) internal successors, (381), 6 states have internal predecessors, (381), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:57:13,277 INFO L276 IsEmpty]: Start isEmpty. Operand 7403 states and 9491 transitions. [2024-12-02 08:57:13,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 496 [2024-12-02 08:57:13,283 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:57:13,283 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:57:13,302 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:57:13,484 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable78,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:57:13,484 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:57:13,484 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:57:13,484 INFO L85 PathProgramCache]: Analyzing trace with hash 650123480, now seen corresponding path program 1 times [2024-12-02 08:57:13,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:57:13,484 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164098811] [2024-12-02 08:57:13,484 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:13,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:57:14,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:15,810 INFO L134 CoverageAnalysis]: Checked inductivity of 183 backedges. 123 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:57:15,811 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:57:15,811 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164098811] [2024-12-02 08:57:15,811 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [164098811] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:57:15,811 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:57:15,811 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:57:15,811 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [456052053] [2024-12-02 08:57:15,811 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:57:15,812 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:57:15,812 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:57:15,812 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:57:15,812 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:57:15,812 INFO L87 Difference]: Start difference. First operand 7403 states and 9491 transitions. Second operand has 6 states, 6 states have (on average 78.0) internal successors, (468), 6 states have internal predecessors, (468), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:57:16,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:57:16,425 INFO L93 Difference]: Finished difference Result 10688 states and 13844 transitions. [2024-12-02 08:57:16,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:57:16,426 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 78.0) internal successors, (468), 6 states have internal predecessors, (468), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 495 [2024-12-02 08:57:16,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:57:16,433 INFO L225 Difference]: With dead ends: 10688 [2024-12-02 08:57:16,433 INFO L226 Difference]: Without dead ends: 7985 [2024-12-02 08:57:16,437 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:57:16,438 INFO L435 NwaCegarLoop]: 565 mSDtfsCounter, 976 mSDsluCounter, 1666 mSDsCounter, 0 mSdLazyCounter, 770 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 979 SdHoareTripleChecker+Valid, 2231 SdHoareTripleChecker+Invalid, 773 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 770 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:57:16,438 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [979 Valid, 2231 Invalid, 773 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 770 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:57:16,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7985 states. [2024-12-02 08:57:16,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7985 to 5537. [2024-12-02 08:57:16,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5537 states, 5455 states have (on average 1.2861594867094408) internal successors, (7016), 5455 states have internal predecessors, (7016), 80 states have call successors, (80), 1 states have call predecessors, (80), 1 states have return successors, (80), 80 states have call predecessors, (80), 80 states have call successors, (80) [2024-12-02 08:57:16,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5537 states to 5537 states and 7176 transitions. [2024-12-02 08:57:16,560 INFO L78 Accepts]: Start accepts. Automaton has 5537 states and 7176 transitions. Word has length 495 [2024-12-02 08:57:16,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:57:16,561 INFO L471 AbstractCegarLoop]: Abstraction has 5537 states and 7176 transitions. [2024-12-02 08:57:16,561 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 78.0) internal successors, (468), 6 states have internal predecessors, (468), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:57:16,561 INFO L276 IsEmpty]: Start isEmpty. Operand 5537 states and 7176 transitions. [2024-12-02 08:57:16,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2024-12-02 08:57:16,564 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:57:16,565 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:57:16,565 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable79 [2024-12-02 08:57:16,565 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:57:16,565 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:57:16,565 INFO L85 PathProgramCache]: Analyzing trace with hash -417680014, now seen corresponding path program 1 times [2024-12-02 08:57:16,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:57:16,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228628942] [2024-12-02 08:57:16,565 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:16,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:57:16,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:17,466 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2024-12-02 08:57:17,466 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:57:17,466 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228628942] [2024-12-02 08:57:17,466 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1228628942] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:57:17,466 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:57:17,467 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:57:17,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [12418813] [2024-12-02 08:57:17,467 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:57:17,467 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:57:17,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:57:17,468 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:57:17,468 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:57:17,468 INFO L87 Difference]: Start difference. First operand 5537 states and 7176 transitions. Second operand has 6 states, 6 states have (on average 65.83333333333333) internal successors, (395), 6 states have internal predecessors, (395), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:57:17,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:57:17,997 INFO L93 Difference]: Finished difference Result 9979 states and 12894 transitions. [2024-12-02 08:57:17,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:57:17,997 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 65.83333333333333) internal successors, (395), 6 states have internal predecessors, (395), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 496 [2024-12-02 08:57:17,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:57:18,001 INFO L225 Difference]: With dead ends: 9979 [2024-12-02 08:57:18,001 INFO L226 Difference]: Without dead ends: 5649 [2024-12-02 08:57:18,004 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:57:18,004 INFO L435 NwaCegarLoop]: 569 mSDtfsCounter, 715 mSDsluCounter, 1680 mSDsCounter, 0 mSdLazyCounter, 786 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 715 SdHoareTripleChecker+Valid, 2249 SdHoareTripleChecker+Invalid, 787 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 786 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:57:18,004 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [715 Valid, 2249 Invalid, 787 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 786 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:57:18,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5649 states. [2024-12-02 08:57:18,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5649 to 5585. [2024-12-02 08:57:18,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5585 states, 5503 states have (on average 1.2836634562965654) internal successors, (7064), 5503 states have internal predecessors, (7064), 80 states have call successors, (80), 1 states have call predecessors, (80), 1 states have return successors, (80), 80 states have call predecessors, (80), 80 states have call successors, (80) [2024-12-02 08:57:18,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5585 states to 5585 states and 7224 transitions. [2024-12-02 08:57:18,107 INFO L78 Accepts]: Start accepts. Automaton has 5585 states and 7224 transitions. Word has length 496 [2024-12-02 08:57:18,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:57:18,108 INFO L471 AbstractCegarLoop]: Abstraction has 5585 states and 7224 transitions. [2024-12-02 08:57:18,108 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 65.83333333333333) internal successors, (395), 6 states have internal predecessors, (395), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:57:18,108 INFO L276 IsEmpty]: Start isEmpty. Operand 5585 states and 7224 transitions. [2024-12-02 08:57:18,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2024-12-02 08:57:18,112 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:57:18,112 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:57:18,112 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80 [2024-12-02 08:57:18,112 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:57:18,113 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:57:18,113 INFO L85 PathProgramCache]: Analyzing trace with hash 1496674404, now seen corresponding path program 1 times [2024-12-02 08:57:18,113 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:57:18,113 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138085209] [2024-12-02 08:57:18,113 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:18,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:57:18,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:18,900 INFO L134 CoverageAnalysis]: Checked inductivity of 183 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2024-12-02 08:57:18,900 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:57:18,900 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138085209] [2024-12-02 08:57:18,900 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [138085209] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:57:18,900 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:57:18,901 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:57:18,901 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1386760632] [2024-12-02 08:57:18,901 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:57:18,901 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:57:18,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:57:18,901 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:57:18,902 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:57:18,902 INFO L87 Difference]: Start difference. First operand 5585 states and 7224 transitions. Second operand has 5 states, 5 states have (on average 77.6) internal successors, (388), 5 states have internal predecessors, (388), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:57:19,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:57:19,061 INFO L93 Difference]: Finished difference Result 12603 states and 16211 transitions. [2024-12-02 08:57:19,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:57:19,062 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 77.6) internal successors, (388), 5 states have internal predecessors, (388), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 496 [2024-12-02 08:57:19,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:57:19,067 INFO L225 Difference]: With dead ends: 12603 [2024-12-02 08:57:19,067 INFO L226 Difference]: Without dead ends: 8049 [2024-12-02 08:57:19,070 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:57:19,070 INFO L435 NwaCegarLoop]: 749 mSDtfsCounter, 525 mSDsluCounter, 2236 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 525 SdHoareTripleChecker+Valid, 2985 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:57:19,070 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [525 Valid, 2985 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:57:19,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8049 states. [2024-12-02 08:57:19,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8049 to 6115. [2024-12-02 08:57:19,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6115 states, 6005 states have (on average 1.2804329725228976) internal successors, (7689), 6005 states have internal predecessors, (7689), 108 states have call successors, (108), 1 states have call predecessors, (108), 1 states have return successors, (108), 108 states have call predecessors, (108), 108 states have call successors, (108) [2024-12-02 08:57:19,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6115 states to 6115 states and 7905 transitions. [2024-12-02 08:57:19,242 INFO L78 Accepts]: Start accepts. Automaton has 6115 states and 7905 transitions. Word has length 496 [2024-12-02 08:57:19,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:57:19,242 INFO L471 AbstractCegarLoop]: Abstraction has 6115 states and 7905 transitions. [2024-12-02 08:57:19,242 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 77.6) internal successors, (388), 5 states have internal predecessors, (388), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:57:19,242 INFO L276 IsEmpty]: Start isEmpty. Operand 6115 states and 7905 transitions. [2024-12-02 08:57:19,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2024-12-02 08:57:19,246 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:57:19,246 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:57:19,246 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81 [2024-12-02 08:57:19,246 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:57:19,246 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:57:19,246 INFO L85 PathProgramCache]: Analyzing trace with hash -2116569502, now seen corresponding path program 1 times [2024-12-02 08:57:19,246 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:57:19,246 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5960264] [2024-12-02 08:57:19,247 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:19,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:57:22,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:25,921 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 85 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:57:25,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:57:25,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5960264] [2024-12-02 08:57:25,921 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [5960264] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:57:25,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1198399878] [2024-12-02 08:57:25,921 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:25,921 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:57:25,921 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:57:25,923 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:57:25,924 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 08:57:29,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:29,430 INFO L256 TraceCheckSpWp]: Trace formula consists of 2992 conjuncts, 55 conjuncts are in the unsatisfiable core [2024-12-02 08:57:29,438 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:57:30,734 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 153 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 08:57:30,734 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:57:32,449 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 117 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:57:32,449 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1198399878] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:57:32,449 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:57:32,449 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 9] total 28 [2024-12-02 08:57:32,449 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [136750291] [2024-12-02 08:57:32,449 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:57:32,450 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2024-12-02 08:57:32,450 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:57:32,451 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-12-02 08:57:32,451 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=661, Unknown=0, NotChecked=0, Total=756 [2024-12-02 08:57:32,451 INFO L87 Difference]: Start difference. First operand 6115 states and 7905 transitions. Second operand has 28 states, 28 states have (on average 42.57142857142857) internal successors, (1192), 28 states have internal predecessors, (1192), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-12-02 08:57:36,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:57:36,977 INFO L93 Difference]: Finished difference Result 17371 states and 22526 transitions. [2024-12-02 08:57:36,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-12-02 08:57:36,977 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 42.57142857142857) internal successors, (1192), 28 states have internal predecessors, (1192), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) Word has length 496 [2024-12-02 08:57:36,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:57:36,986 INFO L225 Difference]: With dead ends: 17371 [2024-12-02 08:57:36,986 INFO L226 Difference]: Without dead ends: 14652 [2024-12-02 08:57:36,990 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1048 GetRequests, 977 SyntacticMatches, 0 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1349 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=707, Invalid=4549, Unknown=0, NotChecked=0, Total=5256 [2024-12-02 08:57:36,991 INFO L435 NwaCegarLoop]: 1054 mSDtfsCounter, 9811 mSDsluCounter, 15318 mSDsCounter, 0 mSdLazyCounter, 7445 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9814 SdHoareTripleChecker+Valid, 16372 SdHoareTripleChecker+Invalid, 7467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 7445 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:57:36,991 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [9814 Valid, 16372 Invalid, 7467 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [22 Valid, 7445 Invalid, 0 Unknown, 0 Unchecked, 3.3s Time] [2024-12-02 08:57:36,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14652 states. [2024-12-02 08:57:37,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14652 to 9238. [2024-12-02 08:57:37,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9238 states, 9064 states have (on average 1.2697484554280671) internal successors, (11509), 9064 states have internal predecessors, (11509), 172 states have call successors, (172), 1 states have call predecessors, (172), 1 states have return successors, (172), 172 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 08:57:37,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9238 states to 9238 states and 11853 transitions. [2024-12-02 08:57:37,264 INFO L78 Accepts]: Start accepts. Automaton has 9238 states and 11853 transitions. Word has length 496 [2024-12-02 08:57:37,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:57:37,265 INFO L471 AbstractCegarLoop]: Abstraction has 9238 states and 11853 transitions. [2024-12-02 08:57:37,265 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 42.57142857142857) internal successors, (1192), 28 states have internal predecessors, (1192), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-12-02 08:57:37,265 INFO L276 IsEmpty]: Start isEmpty. Operand 9238 states and 11853 transitions. [2024-12-02 08:57:37,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2024-12-02 08:57:37,274 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:57:37,275 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:57:37,293 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 08:57:37,475 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:57:37,475 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:57:37,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:57:37,476 INFO L85 PathProgramCache]: Analyzing trace with hash 938439236, now seen corresponding path program 1 times [2024-12-02 08:57:37,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:57:37,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627622499] [2024-12-02 08:57:37,476 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:37,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:57:41,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:42,958 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 118 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:57:42,959 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:57:42,959 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1627622499] [2024-12-02 08:57:42,959 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1627622499] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:57:42,959 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1585468717] [2024-12-02 08:57:42,959 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:42,959 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:57:42,959 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:57:42,961 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:57:42,963 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 08:57:47,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:47,572 INFO L256 TraceCheckSpWp]: Trace formula consists of 2992 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:57:47,581 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:57:47,630 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 156 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-02 08:57:47,630 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:57:47,630 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1585468717] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:57:47,630 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:57:47,630 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-12-02 08:57:47,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036306712] [2024-12-02 08:57:47,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:57:47,630 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:57:47,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:57:47,631 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:57:47,631 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:57:47,631 INFO L87 Difference]: Start difference. First operand 9238 states and 11853 transitions. Second operand has 6 states, 5 states have (on average 94.2) internal successors, (471), 6 states have internal predecessors, (471), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:57:47,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:57:47,895 INFO L93 Difference]: Finished difference Result 18019 states and 23067 transitions. [2024-12-02 08:57:47,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:57:47,896 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 94.2) internal successors, (471), 6 states have internal predecessors, (471), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 496 [2024-12-02 08:57:47,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:57:47,903 INFO L225 Difference]: With dead ends: 18019 [2024-12-02 08:57:47,903 INFO L226 Difference]: Without dead ends: 9238 [2024-12-02 08:57:47,910 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 503 GetRequests, 494 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:57:47,910 INFO L435 NwaCegarLoop]: 754 mSDtfsCounter, 0 mSDsluCounter, 2997 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3751 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:57:47,910 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3751 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:57:47,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9238 states. [2024-12-02 08:57:48,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9238 to 9238. [2024-12-02 08:57:48,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9238 states, 9064 states have (on average 1.2666593115622242) internal successors, (11481), 9064 states have internal predecessors, (11481), 172 states have call successors, (172), 1 states have call predecessors, (172), 1 states have return successors, (172), 172 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 08:57:48,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9238 states to 9238 states and 11825 transitions. [2024-12-02 08:57:48,150 INFO L78 Accepts]: Start accepts. Automaton has 9238 states and 11825 transitions. Word has length 496 [2024-12-02 08:57:48,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:57:48,150 INFO L471 AbstractCegarLoop]: Abstraction has 9238 states and 11825 transitions. [2024-12-02 08:57:48,150 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 94.2) internal successors, (471), 6 states have internal predecessors, (471), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:57:48,150 INFO L276 IsEmpty]: Start isEmpty. Operand 9238 states and 11825 transitions. [2024-12-02 08:57:48,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-12-02 08:57:48,158 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:57:48,158 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:57:48,180 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-12-02 08:57:48,358 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:57:48,359 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:57:48,359 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:57:48,359 INFO L85 PathProgramCache]: Analyzing trace with hash 768773700, now seen corresponding path program 1 times [2024-12-02 08:57:48,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:57:48,359 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730176589] [2024-12-02 08:57:48,359 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:48,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:57:51,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:54,582 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:57:54,582 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:57:54,582 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [730176589] [2024-12-02 08:57:54,582 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [730176589] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:57:54,582 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1467031985] [2024-12-02 08:57:54,582 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:57:54,582 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:57:54,582 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:57:54,584 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:57:54,585 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 08:57:58,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:57:58,240 INFO L256 TraceCheckSpWp]: Trace formula consists of 2995 conjuncts, 77 conjuncts are in the unsatisfiable core [2024-12-02 08:57:58,252 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:58:00,129 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:58:00,129 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:58:05,041 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:58:05,041 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1467031985] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:58:05,041 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:58:05,042 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 19, 18] total 42 [2024-12-02 08:58:05,042 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1467767324] [2024-12-02 08:58:05,042 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:58:05,042 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2024-12-02 08:58:05,042 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:58:05,043 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2024-12-02 08:58:05,043 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=179, Invalid=1543, Unknown=0, NotChecked=0, Total=1722 [2024-12-02 08:58:05,044 INFO L87 Difference]: Start difference. First operand 9238 states and 11825 transitions. Second operand has 42 states, 42 states have (on average 32.11904761904762) internal successors, (1349), 42 states have internal predecessors, (1349), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-12-02 08:58:08,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:58:08,071 INFO L93 Difference]: Finished difference Result 16177 states and 20677 transitions. [2024-12-02 08:58:08,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-12-02 08:58:08,072 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 32.11904761904762) internal successors, (1349), 42 states have internal predecessors, (1349), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) Word has length 497 [2024-12-02 08:58:08,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:58:08,078 INFO L225 Difference]: With dead ends: 16177 [2024-12-02 08:58:08,079 INFO L226 Difference]: Without dead ends: 9356 [2024-12-02 08:58:08,083 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1023 GetRequests, 967 SyntacticMatches, 1 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 800 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=387, Invalid=2805, Unknown=0, NotChecked=0, Total=3192 [2024-12-02 08:58:08,083 INFO L435 NwaCegarLoop]: 697 mSDtfsCounter, 1705 mSDsluCounter, 14989 mSDsCounter, 0 mSdLazyCounter, 5891 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1705 SdHoareTripleChecker+Valid, 15686 SdHoareTripleChecker+Invalid, 5901 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 5891 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:58:08,083 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1705 Valid, 15686 Invalid, 5901 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 5891 Invalid, 0 Unknown, 0 Unchecked, 2.5s Time] [2024-12-02 08:58:08,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9356 states. [2024-12-02 08:58:08,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9356 to 9350. [2024-12-02 08:58:08,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9350 states, 9176 states have (on average 1.263404533565824) internal successors, (11593), 9176 states have internal predecessors, (11593), 172 states have call successors, (172), 1 states have call predecessors, (172), 1 states have return successors, (172), 172 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 08:58:08,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9350 states to 9350 states and 11937 transitions. [2024-12-02 08:58:08,381 INFO L78 Accepts]: Start accepts. Automaton has 9350 states and 11937 transitions. Word has length 497 [2024-12-02 08:58:08,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:58:08,382 INFO L471 AbstractCegarLoop]: Abstraction has 9350 states and 11937 transitions. [2024-12-02 08:58:08,382 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 32.11904761904762) internal successors, (1349), 42 states have internal predecessors, (1349), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-12-02 08:58:08,382 INFO L276 IsEmpty]: Start isEmpty. Operand 9350 states and 11937 transitions. [2024-12-02 08:58:08,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-12-02 08:58:08,391 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:58:08,392 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:58:08,410 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-12-02 08:58:08,592 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:58:08,592 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:58:08,592 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:58:08,593 INFO L85 PathProgramCache]: Analyzing trace with hash -1385373554, now seen corresponding path program 1 times [2024-12-02 08:58:08,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:58:08,593 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449245604] [2024-12-02 08:58:08,593 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:58:08,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:58:08,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:58:09,466 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-12-02 08:58:09,466 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:58:09,466 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449245604] [2024-12-02 08:58:09,466 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1449245604] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:58:09,466 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:58:09,466 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:58:09,466 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1742089184] [2024-12-02 08:58:09,466 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:58:09,467 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:58:09,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:58:09,467 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:58:09,467 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:58:09,467 INFO L87 Difference]: Start difference. First operand 9350 states and 11937 transitions. Second operand has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:58:09,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:58:09,654 INFO L93 Difference]: Finished difference Result 15719 states and 20045 transitions. [2024-12-02 08:58:09,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:58:09,655 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 497 [2024-12-02 08:58:09,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:58:09,661 INFO L225 Difference]: With dead ends: 15719 [2024-12-02 08:58:09,661 INFO L226 Difference]: Without dead ends: 8786 [2024-12-02 08:58:09,666 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:58:09,666 INFO L435 NwaCegarLoop]: 752 mSDtfsCounter, 0 mSDsluCounter, 1494 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2246 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:58:09,666 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2246 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:58:09,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8786 states. [2024-12-02 08:58:09,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8786 to 8786. [2024-12-02 08:58:09,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8786 states, 8612 states have (on average 1.2604505341384116) internal successors, (10855), 8612 states have internal predecessors, (10855), 172 states have call successors, (172), 1 states have call predecessors, (172), 1 states have return successors, (172), 172 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 08:58:09,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8786 states to 8786 states and 11199 transitions. [2024-12-02 08:58:09,873 INFO L78 Accepts]: Start accepts. Automaton has 8786 states and 11199 transitions. Word has length 497 [2024-12-02 08:58:09,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:58:09,873 INFO L471 AbstractCegarLoop]: Abstraction has 8786 states and 11199 transitions. [2024-12-02 08:58:09,873 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:58:09,873 INFO L276 IsEmpty]: Start isEmpty. Operand 8786 states and 11199 transitions. [2024-12-02 08:58:09,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-12-02 08:58:09,879 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:58:09,879 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:58:09,880 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85 [2024-12-02 08:58:09,880 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:58:09,880 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:58:09,880 INFO L85 PathProgramCache]: Analyzing trace with hash -415707967, now seen corresponding path program 1 times [2024-12-02 08:58:09,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:58:09,880 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356258007] [2024-12-02 08:58:09,880 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:58:09,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:58:10,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:58:11,274 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:58:11,274 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:58:11,275 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356258007] [2024-12-02 08:58:11,275 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [356258007] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:58:11,275 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:58:11,275 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:58:11,275 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008231749] [2024-12-02 08:58:11,275 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:58:11,275 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:58:11,276 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:58:11,276 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:58:11,276 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:58:11,276 INFO L87 Difference]: Start difference. First operand 8786 states and 11199 transitions. Second operand has 6 states, 6 states have (on average 78.5) internal successors, (471), 6 states have internal predecessors, (471), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:58:11,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:58:11,516 INFO L93 Difference]: Finished difference Result 13217 states and 16931 transitions. [2024-12-02 08:58:11,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:58:11,517 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 78.5) internal successors, (471), 6 states have internal predecessors, (471), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 498 [2024-12-02 08:58:11,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:58:11,524 INFO L225 Difference]: With dead ends: 13217 [2024-12-02 08:58:11,524 INFO L226 Difference]: Without dead ends: 10463 [2024-12-02 08:58:11,528 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:58:11,528 INFO L435 NwaCegarLoop]: 1308 mSDtfsCounter, 534 mSDsluCounter, 4662 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 534 SdHoareTripleChecker+Valid, 5970 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:58:11,528 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [534 Valid, 5970 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:58:11,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10463 states. [2024-12-02 08:58:11,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10463 to 9020. [2024-12-02 08:58:11,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9020 states, 8828 states have (on average 1.258948799275034) internal successors, (11114), 8828 states have internal predecessors, (11114), 190 states have call successors, (190), 1 states have call predecessors, (190), 1 states have return successors, (190), 190 states have call predecessors, (190), 190 states have call successors, (190) [2024-12-02 08:58:11,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9020 states to 9020 states and 11494 transitions. [2024-12-02 08:58:11,781 INFO L78 Accepts]: Start accepts. Automaton has 9020 states and 11494 transitions. Word has length 498 [2024-12-02 08:58:11,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:58:11,781 INFO L471 AbstractCegarLoop]: Abstraction has 9020 states and 11494 transitions. [2024-12-02 08:58:11,781 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 78.5) internal successors, (471), 6 states have internal predecessors, (471), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:58:11,781 INFO L276 IsEmpty]: Start isEmpty. Operand 9020 states and 11494 transitions. [2024-12-02 08:58:11,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-12-02 08:58:11,787 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:58:11,787 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:58:11,787 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86 [2024-12-02 08:58:11,787 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:58:11,787 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:58:11,787 INFO L85 PathProgramCache]: Analyzing trace with hash -1936033725, now seen corresponding path program 1 times [2024-12-02 08:58:11,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:58:11,788 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654029854] [2024-12-02 08:58:11,788 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:58:11,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:58:15,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:58:19,843 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 4 proven. 117 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:58:19,843 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:58:19,843 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1654029854] [2024-12-02 08:58:19,843 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1654029854] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:58:19,843 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1520323274] [2024-12-02 08:58:19,843 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:58:19,843 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:58:19,843 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:58:19,845 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:58:19,846 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 08:58:23,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:58:23,775 INFO L256 TraceCheckSpWp]: Trace formula consists of 2996 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-12-02 08:58:23,781 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:58:25,694 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:58:25,694 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:58:29,343 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:58:29,343 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1520323274] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:58:29,343 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:58:29,344 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 11] total 28 [2024-12-02 08:58:29,344 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2027073162] [2024-12-02 08:58:29,344 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:58:29,345 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2024-12-02 08:58:29,345 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:58:29,345 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-12-02 08:58:29,345 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2024-12-02 08:58:29,346 INFO L87 Difference]: Start difference. First operand 9020 states and 11494 transitions. Second operand has 28 states, 28 states have (on average 49.892857142857146) internal successors, (1397), 28 states have internal predecessors, (1397), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:58:32,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:58:32,084 INFO L93 Difference]: Finished difference Result 12004 states and 15368 transitions. [2024-12-02 08:58:32,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-12-02 08:58:32,085 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 49.892857142857146) internal successors, (1397), 28 states have internal predecessors, (1397), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 498 [2024-12-02 08:58:32,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:58:32,091 INFO L225 Difference]: With dead ends: 12004 [2024-12-02 08:58:32,091 INFO L226 Difference]: Without dead ends: 9016 [2024-12-02 08:58:32,094 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1026 GetRequests, 983 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 282 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=255, Invalid=1725, Unknown=0, NotChecked=0, Total=1980 [2024-12-02 08:58:32,094 INFO L435 NwaCegarLoop]: 698 mSDtfsCounter, 1379 mSDsluCounter, 11100 mSDsCounter, 0 mSdLazyCounter, 4372 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1379 SdHoareTripleChecker+Valid, 11798 SdHoareTripleChecker+Invalid, 4380 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 4372 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:58:32,094 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1379 Valid, 11798 Invalid, 4380 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 4372 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2024-12-02 08:58:32,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9016 states. [2024-12-02 08:58:32,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9016 to 9010. [2024-12-02 08:58:32,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9010 states, 8818 states have (on average 1.2581084146064867) internal successors, (11094), 8818 states have internal predecessors, (11094), 190 states have call successors, (190), 1 states have call predecessors, (190), 1 states have return successors, (190), 190 states have call predecessors, (190), 190 states have call successors, (190) [2024-12-02 08:58:32,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9010 states to 9010 states and 11474 transitions. [2024-12-02 08:58:32,384 INFO L78 Accepts]: Start accepts. Automaton has 9010 states and 11474 transitions. Word has length 498 [2024-12-02 08:58:32,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:58:32,385 INFO L471 AbstractCegarLoop]: Abstraction has 9010 states and 11474 transitions. [2024-12-02 08:58:32,385 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 49.892857142857146) internal successors, (1397), 28 states have internal predecessors, (1397), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:58:32,385 INFO L276 IsEmpty]: Start isEmpty. Operand 9010 states and 11474 transitions. [2024-12-02 08:58:32,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-12-02 08:58:32,391 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:58:32,391 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:58:32,414 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-12-02 08:58:32,591 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable87 [2024-12-02 08:58:32,592 INFO L396 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:58:32,592 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:58:32,592 INFO L85 PathProgramCache]: Analyzing trace with hash -373273150, now seen corresponding path program 1 times [2024-12-02 08:58:32,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:58:32,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [408584125] [2024-12-02 08:58:32,592 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:58:32,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:58:40,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:58:40,127 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 08:58:47,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:58:48,148 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 08:58:48,148 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 08:58:48,149 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 08:58:48,150 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable88 [2024-12-02 08:58:48,152 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:58:48,424 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 08:58:48,426 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 08:58:48 BoogieIcfgContainer [2024-12-02 08:58:48,427 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 08:58:48,427 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 08:58:48,427 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 08:58:48,427 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 08:58:48,428 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:54:01" (3/4) ... [2024-12-02 08:58:48,430 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-12-02 08:58:48,431 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 08:58:48,431 INFO L158 Benchmark]: Toolchain (without parser) took 290649.32ms. Allocated memory was 117.4MB in the beginning and 2.7GB in the end (delta: 2.6GB). Free memory was 90.9MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 1.6GB. Max. memory is 16.1GB. [2024-12-02 08:58:48,431 INFO L158 Benchmark]: CDTParser took 0.31ms. Allocated memory is still 117.4MB. Free memory is still 72.9MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:58:48,432 INFO L158 Benchmark]: CACSL2BoogieTranslator took 555.36ms. Allocated memory is still 117.4MB. Free memory was 90.7MB in the beginning and 52.2MB in the end (delta: 38.5MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-12-02 08:58:48,432 INFO L158 Benchmark]: Boogie Procedure Inliner took 252.21ms. Allocated memory was 117.4MB in the beginning and 192.9MB in the end (delta: 75.5MB). Free memory was 52.2MB in the beginning and 130.4MB in the end (delta: -78.2MB). Peak memory consumption was 39.0MB. Max. memory is 16.1GB. [2024-12-02 08:58:48,432 INFO L158 Benchmark]: Boogie Preprocessor took 258.55ms. Allocated memory is still 192.9MB. Free memory was 130.4MB in the beginning and 105.0MB in the end (delta: 25.4MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-12-02 08:58:48,432 INFO L158 Benchmark]: RCFGBuilder took 2577.19ms. Allocated memory is still 192.9MB. Free memory was 104.9MB in the beginning and 113.8MB in the end (delta: -8.9MB). Peak memory consumption was 87.5MB. Max. memory is 16.1GB. [2024-12-02 08:58:48,432 INFO L158 Benchmark]: TraceAbstraction took 286995.76ms. Allocated memory was 192.9MB in the beginning and 2.7GB in the end (delta: 2.5GB). Free memory was 113.8MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 1.5GB. Max. memory is 16.1GB. [2024-12-02 08:58:48,432 INFO L158 Benchmark]: Witness Printer took 3.70ms. Allocated memory is still 2.7GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 237.8kB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:58:48,433 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.31ms. Allocated memory is still 117.4MB. Free memory is still 72.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 555.36ms. Allocated memory is still 117.4MB. Free memory was 90.7MB in the beginning and 52.2MB in the end (delta: 38.5MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 252.21ms. Allocated memory was 117.4MB in the beginning and 192.9MB in the end (delta: 75.5MB). Free memory was 52.2MB in the beginning and 130.4MB in the end (delta: -78.2MB). Peak memory consumption was 39.0MB. Max. memory is 16.1GB. * Boogie Preprocessor took 258.55ms. Allocated memory is still 192.9MB. Free memory was 130.4MB in the beginning and 105.0MB in the end (delta: 25.4MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * RCFGBuilder took 2577.19ms. Allocated memory is still 192.9MB. Free memory was 104.9MB in the beginning and 113.8MB in the end (delta: -8.9MB). Peak memory consumption was 87.5MB. Max. memory is 16.1GB. * TraceAbstraction took 286995.76ms. Allocated memory was 192.9MB in the beginning and 2.7GB in the end (delta: 2.5GB). Free memory was 113.8MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 1.5GB. Max. memory is 16.1GB. * Witness Printer took 3.70ms. Allocated memory is still 2.7GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 237.8kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 164, overapproximation of bitwiseOr at line 389, overapproximation of bitwiseOr at line 145, overapproximation of bitwiseAnd at line 301, overapproximation of bitwiseAnd at line 165, overapproximation of bitwiseAnd at line 559, overapproximation of bitwiseAnd at line 241, overapproximation of bitwiseAnd at line 692, overapproximation of bitwiseAnd at line 578, overapproximation of bitwiseAnd at line 271, overapproximation of bitwiseAnd at line 616, overapproximation of bitwiseAnd at line 540, overapproximation of bitwiseAnd at line 635, overapproximation of bitwiseAnd at line 247, overapproximation of bitwiseAnd at line 221, overapproximation of bitwiseAnd at line 766, overapproximation of bitwiseAnd at line 283, overapproximation of bitwiseAnd at line 464, overapproximation of bitwiseAnd at line 129, overapproximation of bitwiseAnd at line 483, overapproximation of bitwiseAnd at line 289, overapproximation of bitwiseAnd at line 521, overapproximation of bitwiseAnd at line 253, overapproximation of bitwiseAnd at line 398, overapproximation of bitwiseAnd at line 277, overapproximation of bitwiseAnd at line 654, overapproximation of bitwiseAnd at line 265, overapproximation of bitwiseAnd at line 295, overapproximation of bitwiseAnd at line 125, overapproximation of bitwiseAnd at line 502, overapproximation of bitwiseAnd at line 229. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 8); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (8 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 6); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (6 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 5); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (5 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 4); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (4 - 1); [L41] const SORT_60 mask_SORT_60 = (SORT_60)-1 >> (sizeof(SORT_60) * 8 - 3); [L42] const SORT_60 msb_SORT_60 = (SORT_60)1 << (3 - 1); [L44] const SORT_81 mask_SORT_81 = (SORT_81)-1 >> (sizeof(SORT_81) * 8 - 2); [L45] const SORT_81 msb_SORT_81 = (SORT_81)1 << (2 - 1); [L47] const SORT_13 var_15 = 16; [L48] const SORT_19 var_20 = 15; [L49] const SORT_19 var_25 = 14; [L50] const SORT_19 var_30 = 13; [L51] const SORT_19 var_35 = 12; [L52] const SORT_19 var_40 = 11; [L53] const SORT_19 var_45 = 10; [L54] const SORT_19 var_50 = 9; [L55] const SORT_19 var_55 = 8; [L56] const SORT_60 var_61 = 7; [L57] const SORT_60 var_66 = 6; [L58] const SORT_60 var_71 = 5; [L59] const SORT_60 var_76 = 4; [L60] const SORT_81 var_82 = 3; [L61] const SORT_81 var_87 = 2; [L62] const SORT_1 var_92 = 1; [L63] const SORT_13 var_105 = 17; [L64] const SORT_11 var_122 = 0; [L65] const SORT_1 var_152 = 0; [L66] const SORT_3 var_373 = 0; [L68] SORT_1 input_2; [L69] SORT_3 input_4; [L70] SORT_1 input_5; [L71] SORT_1 input_6; [L72] SORT_1 input_7; [L73] SORT_1 input_8; [L74] SORT_3 input_9; [L75] SORT_1 input_150; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L77] SORT_3 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L78] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L79] SORT_3 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L80] SORT_3 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L81] SORT_3 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L82] SORT_3 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L83] SORT_3 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L84] SORT_3 state_44 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L85] SORT_3 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L86] SORT_3 state_54 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L87] SORT_3 state_59 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L88] SORT_3 state_65 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L89] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L89] SORT_3 state_70 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L90] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L90] SORT_3 state_75 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L91] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L91] SORT_3 state_80 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L92] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L92] SORT_3 state_86 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L93] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L93] SORT_3 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L94] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L94] SORT_3 state_96 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L95] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L95] SORT_11 state_101 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L96] SORT_1 state_109 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L97] SORT_1 state_110 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L98] SORT_11 state_113 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L99] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L99] SORT_3 state_128 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L100] SORT_1 state_132 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L101] SORT_11 state_185 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L103] SORT_1 init_133_arg_1 = var_92; [L104] state_132 = init_133_arg_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L107] input_2 = __VERIFIER_nondet_uchar() [L108] input_4 = __VERIFIER_nondet_uchar() [L109] input_5 = __VERIFIER_nondet_uchar() [L110] input_6 = __VERIFIER_nondet_uchar() [L111] input_7 = __VERIFIER_nondet_uchar() [L112] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L112] input_7 = input_7 & mask_SORT_1 [L113] input_8 = __VERIFIER_nondet_uchar() [L114] input_9 = __VERIFIER_nondet_uchar() [L115] input_150 = __VERIFIER_nondet_uchar() [L117] SORT_1 var_134_arg_0 = input_7; [L118] SORT_1 var_134_arg_1 = state_132; [L119] SORT_1 var_134 = var_134_arg_0 == var_134_arg_1; [L120] SORT_1 var_135_arg_0 = var_92; [L121] SORT_1 var_135 = ~var_135_arg_0; [L122] SORT_1 var_136_arg_0 = var_134; [L123] SORT_1 var_136_arg_1 = var_135; VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] EXPR var_136_arg_0 | var_136_arg_1 VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] SORT_1 var_136 = var_136_arg_0 | var_136_arg_1; [L125] EXPR var_136 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L125] var_136 = var_136 & mask_SORT_1 [L126] SORT_1 constr_137_arg_0 = var_136; VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L127] CALL assume_abort_if_not(constr_137_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L127] RET assume_abort_if_not(constr_137_arg_0) VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L128] SORT_13 var_106_arg_0 = var_105; VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] EXPR var_106_arg_0 & mask_SORT_13 VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] var_106_arg_0 = var_106_arg_0 & mask_SORT_13 [L130] SORT_11 var_106 = var_106_arg_0; [L131] SORT_11 var_107_arg_0 = state_101; [L132] SORT_11 var_107_arg_1 = var_106; [L133] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L134] SORT_1 var_138_arg_0 = var_107; [L135] SORT_1 var_138 = ~var_138_arg_0; [L136] SORT_1 var_139_arg_0 = input_6; [L137] SORT_1 var_139 = ~var_139_arg_0; [L138] SORT_1 var_140_arg_0 = var_138; [L139] SORT_1 var_140_arg_1 = var_139; VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L141] SORT_1 var_141_arg_0 = var_92; [L142] SORT_1 var_141 = ~var_141_arg_0; [L143] SORT_1 var_142_arg_0 = var_140; [L144] SORT_1 var_142_arg_1 = var_141; VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] EXPR var_142_arg_0 | var_142_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] SORT_1 var_142 = var_142_arg_0 | var_142_arg_1; [L146] EXPR var_142 & mask_SORT_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L146] var_142 = var_142 & mask_SORT_1 [L147] SORT_1 constr_143_arg_0 = var_142; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L148] CALL assume_abort_if_not(constr_143_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_143_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L149] SORT_11 var_102_arg_0 = state_101; [L150] SORT_1 var_102 = var_102_arg_0 != 0; [L151] SORT_1 var_103_arg_0 = var_102; [L152] SORT_1 var_103 = ~var_103_arg_0; [L153] SORT_1 var_144_arg_0 = var_103; [L154] SORT_1 var_144 = ~var_144_arg_0; [L155] SORT_1 var_145_arg_0 = input_5; [L156] SORT_1 var_145 = ~var_145_arg_0; [L157] SORT_1 var_146_arg_0 = var_144; [L158] SORT_1 var_146_arg_1 = var_145; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] EXPR var_146_arg_0 | var_146_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] SORT_1 var_146 = var_146_arg_0 | var_146_arg_1; [L160] SORT_1 var_147_arg_0 = var_92; [L161] SORT_1 var_147 = ~var_147_arg_0; [L162] SORT_1 var_148_arg_0 = var_146; [L163] SORT_1 var_148_arg_1 = var_147; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=255, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] EXPR var_148_arg_0 | var_148_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L165] EXPR var_148 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L165] var_148 = var_148 & mask_SORT_1 [L166] SORT_1 constr_149_arg_0 = var_148; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L167] CALL assume_abort_if_not(constr_149_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L167] RET assume_abort_if_not(constr_149_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L169] SORT_1 var_153_arg_0 = state_132; [L170] SORT_1 var_153_arg_1 = var_152; [L171] SORT_1 var_153_arg_2 = var_92; [L172] SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L173] SORT_1 var_111_arg_0 = state_110; [L174] SORT_1 var_111 = ~var_111_arg_0; [L175] SORT_1 var_112_arg_0 = state_109; [L176] SORT_1 var_112_arg_1 = var_111; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] EXPR var_112_arg_0 & var_112_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L178] SORT_11 var_114_arg_0 = state_113; [L179] SORT_1 var_114 = var_114_arg_0 != 0; [L180] SORT_1 var_115_arg_0 = var_112; [L181] SORT_1 var_115_arg_1 = var_114; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L183] SORT_1 var_116_arg_0 = state_109; [L184] SORT_1 var_116 = ~var_116_arg_0; [L185] SORT_1 var_117_arg_0 = input_6; [L186] SORT_1 var_117_arg_1 = var_116; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] EXPR var_117_arg_0 & var_117_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] SORT_1 var_117 = var_117_arg_0 & var_117_arg_1; [L188] SORT_1 var_118_arg_0 = var_117; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] EXPR var_118_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] var_118_arg_0 = var_118_arg_0 & mask_SORT_1 [L190] SORT_11 var_118 = var_118_arg_0; [L191] SORT_11 var_119_arg_0 = state_113; [L192] SORT_11 var_119_arg_1 = var_118; [L193] SORT_11 var_119 = var_119_arg_0 + var_119_arg_1; [L194] SORT_1 var_120_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] EXPR var_120_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] var_120_arg_0 = var_120_arg_0 & mask_SORT_1 [L196] SORT_11 var_120 = var_120_arg_0; [L197] SORT_11 var_121_arg_0 = var_119; [L198] SORT_11 var_121_arg_1 = var_120; [L199] SORT_11 var_121 = var_121_arg_0 - var_121_arg_1; [L200] SORT_1 var_123_arg_0 = input_7; [L201] SORT_11 var_123_arg_1 = var_122; [L202] SORT_11 var_123_arg_2 = var_121; [L203] SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] EXPR var_123 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] var_123 = var_123 & mask_SORT_11 [L205] SORT_11 var_124_arg_0 = var_123; [L206] SORT_1 var_124 = var_124_arg_0 != 0; [L207] SORT_1 var_125_arg_0 = var_124; [L208] SORT_1 var_125 = ~var_125_arg_0; [L209] SORT_1 var_126_arg_0 = var_115; [L210] SORT_1 var_126_arg_1 = var_125; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] EXPR var_126_arg_0 & var_126_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; [L212] SORT_1 var_127_arg_0 = var_126; [L213] SORT_1 var_127 = ~var_127_arg_0; [L214] SORT_11 var_14_arg_0 = state_12; [L215] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] EXPR var_14 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] var_14 = var_14 & mask_SORT_13 [L217] SORT_13 var_97_arg_0 = var_14; [L218] SORT_1 var_97 = var_97_arg_0 != 0; [L219] SORT_1 var_98_arg_0 = var_97; [L220] SORT_1 var_98 = ~var_98_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1] [L221] EXPR var_98 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L221] var_98 = var_98 & mask_SORT_1 [L222] SORT_1 var_93_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=0] [L223] EXPR var_93_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=0] [L223] var_93_arg_0 = var_93_arg_0 & mask_SORT_1 [L224] SORT_13 var_93 = var_93_arg_0; [L225] SORT_13 var_94_arg_0 = var_14; [L226] SORT_13 var_94_arg_1 = var_93; [L227] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L228] SORT_81 var_88_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=0] [L229] EXPR var_88_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=0] [L229] var_88_arg_0 = var_88_arg_0 & mask_SORT_81 [L230] SORT_13 var_88 = var_88_arg_0; [L231] SORT_13 var_89_arg_0 = var_14; [L232] SORT_13 var_89_arg_1 = var_88; [L233] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L234] SORT_81 var_83_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L235] EXPR var_83_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L235] var_83_arg_0 = var_83_arg_0 & mask_SORT_81 [L236] SORT_13 var_83 = var_83_arg_0; [L237] SORT_13 var_84_arg_0 = var_14; [L238] SORT_13 var_84_arg_1 = var_83; [L239] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L240] SORT_60 var_77_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L241] EXPR var_77_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L241] var_77_arg_0 = var_77_arg_0 & mask_SORT_60 [L242] SORT_13 var_77 = var_77_arg_0; [L243] SORT_13 var_78_arg_0 = var_14; [L244] SORT_13 var_78_arg_1 = var_77; [L245] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L246] SORT_60 var_72_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L247] EXPR var_72_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L247] var_72_arg_0 = var_72_arg_0 & mask_SORT_60 [L248] SORT_13 var_72 = var_72_arg_0; [L249] SORT_13 var_73_arg_0 = var_14; [L250] SORT_13 var_73_arg_1 = var_72; [L251] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L252] SORT_60 var_67_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L253] EXPR var_67_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L253] var_67_arg_0 = var_67_arg_0 & mask_SORT_60 [L254] SORT_13 var_67 = var_67_arg_0; [L255] SORT_13 var_68_arg_0 = var_14; [L256] SORT_13 var_68_arg_1 = var_67; [L257] SORT_1 var_68 = var_68_arg_0 == var_68_arg_1; [L258] SORT_60 var_62_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L259] EXPR var_62_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_60 [L260] SORT_13 var_62 = var_62_arg_0; [L261] SORT_13 var_63_arg_0 = var_14; [L262] SORT_13 var_63_arg_1 = var_62; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_19 var_56_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L265] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L265] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L266] SORT_13 var_56 = var_56_arg_0; [L267] SORT_13 var_57_arg_0 = var_14; [L268] SORT_13 var_57_arg_1 = var_56; [L269] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L270] SORT_19 var_51_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L271] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L271] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L272] SORT_13 var_51 = var_51_arg_0; [L273] SORT_13 var_52_arg_0 = var_14; [L274] SORT_13 var_52_arg_1 = var_51; [L275] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L276] SORT_19 var_46_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L277] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L277] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L278] SORT_13 var_46 = var_46_arg_0; [L279] SORT_13 var_47_arg_0 = var_14; [L280] SORT_13 var_47_arg_1 = var_46; [L281] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L282] SORT_19 var_41_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L283] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L283] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L284] SORT_13 var_41 = var_41_arg_0; [L285] SORT_13 var_42_arg_0 = var_14; [L286] SORT_13 var_42_arg_1 = var_41; [L287] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L288] SORT_19 var_36_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L289] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L289] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L290] SORT_13 var_36 = var_36_arg_0; [L291] SORT_13 var_37_arg_0 = var_14; [L292] SORT_13 var_37_arg_1 = var_36; [L293] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L294] SORT_19 var_31_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L295] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L295] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L296] SORT_13 var_31 = var_31_arg_0; [L297] SORT_13 var_32_arg_0 = var_14; [L298] SORT_13 var_32_arg_1 = var_31; [L299] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L300] SORT_19 var_26_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L301] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L301] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L302] SORT_13 var_26 = var_26_arg_0; [L303] SORT_13 var_27_arg_0 = var_14; [L304] SORT_13 var_27_arg_1 = var_26; [L305] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L306] SORT_19 var_21_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=0, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L307] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_27=0, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L307] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L308] SORT_13 var_21 = var_21_arg_0; [L309] SORT_13 var_22_arg_0 = var_14; [L310] SORT_13 var_22_arg_1 = var_21; [L311] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L312] SORT_13 var_16_arg_0 = var_14; [L313] SORT_13 var_16_arg_1 = var_15; [L314] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L315] SORT_1 var_17_arg_0 = var_16; [L316] SORT_3 var_17_arg_1 = state_10; [L317] SORT_3 var_17_arg_2 = input_9; [L318] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L319] SORT_1 var_23_arg_0 = var_22; [L320] SORT_3 var_23_arg_1 = state_18; [L321] SORT_3 var_23_arg_2 = var_17; [L322] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L323] SORT_1 var_28_arg_0 = var_27; [L324] SORT_3 var_28_arg_1 = state_24; [L325] SORT_3 var_28_arg_2 = var_23; [L326] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L327] SORT_1 var_33_arg_0 = var_32; [L328] SORT_3 var_33_arg_1 = state_29; [L329] SORT_3 var_33_arg_2 = var_28; [L330] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L331] SORT_1 var_38_arg_0 = var_37; [L332] SORT_3 var_38_arg_1 = state_34; [L333] SORT_3 var_38_arg_2 = var_33; [L334] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L335] SORT_1 var_43_arg_0 = var_42; [L336] SORT_3 var_43_arg_1 = state_39; [L337] SORT_3 var_43_arg_2 = var_38; [L338] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L339] SORT_1 var_48_arg_0 = var_47; [L340] SORT_3 var_48_arg_1 = state_44; [L341] SORT_3 var_48_arg_2 = var_43; [L342] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L343] SORT_1 var_53_arg_0 = var_52; [L344] SORT_3 var_53_arg_1 = state_49; [L345] SORT_3 var_53_arg_2 = var_48; [L346] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L347] SORT_1 var_58_arg_0 = var_57; [L348] SORT_3 var_58_arg_1 = state_54; [L349] SORT_3 var_58_arg_2 = var_53; [L350] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L351] SORT_1 var_64_arg_0 = var_63; [L352] SORT_3 var_64_arg_1 = state_59; [L353] SORT_3 var_64_arg_2 = var_58; [L354] SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L355] SORT_1 var_69_arg_0 = var_68; [L356] SORT_3 var_69_arg_1 = state_65; [L357] SORT_3 var_69_arg_2 = var_64; [L358] SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L359] SORT_1 var_74_arg_0 = var_73; [L360] SORT_3 var_74_arg_1 = state_70; [L361] SORT_3 var_74_arg_2 = var_69; [L362] SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L363] SORT_1 var_79_arg_0 = var_78; [L364] SORT_3 var_79_arg_1 = state_75; [L365] SORT_3 var_79_arg_2 = var_74; [L366] SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L367] SORT_1 var_85_arg_0 = var_84; [L368] SORT_3 var_85_arg_1 = state_80; [L369] SORT_3 var_85_arg_2 = var_79; [L370] SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L371] SORT_1 var_90_arg_0 = var_89; [L372] SORT_3 var_90_arg_1 = state_86; [L373] SORT_3 var_90_arg_2 = var_85; [L374] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L375] SORT_1 var_95_arg_0 = var_94; [L376] SORT_3 var_95_arg_1 = state_91; [L377] SORT_3 var_95_arg_2 = var_90; [L378] SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L379] SORT_1 var_99_arg_0 = var_98; [L380] SORT_3 var_99_arg_1 = state_96; [L381] SORT_3 var_99_arg_2 = var_95; [L382] SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=255] [L383] EXPR var_99 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L383] var_99 = var_99 & mask_SORT_3 [L384] SORT_3 var_129_arg_0 = state_128; [L385] SORT_3 var_129_arg_1 = var_99; [L386] SORT_1 var_129 = var_129_arg_0 == var_129_arg_1; [L387] SORT_1 var_130_arg_0 = var_127; [L388] SORT_1 var_130_arg_1 = var_129; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] EXPR var_130_arg_0 | var_130_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L390] SORT_1 var_151_arg_0 = state_132; [L391] SORT_1 var_151_arg_1 = input_150; [L392] SORT_1 var_151_arg_2 = var_130; [L393] SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L394] SORT_1 var_154_arg_0 = var_151; [L395] SORT_1 var_154 = ~var_154_arg_0; [L396] SORT_1 var_155_arg_0 = var_153; [L397] SORT_1 var_155_arg_1 = var_154; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=0, var_155_arg_1=-256, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] EXPR var_155_arg_0 & var_155_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] EXPR var_155 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L399] var_155 = var_155 & mask_SORT_1 [L400] SORT_1 bad_156_arg_0 = var_155; [L401] CALL __VERIFIER_assert(!(bad_156_arg_0)) [L21] COND FALSE !(!(cond)) [L401] RET __VERIFIER_assert(!(bad_156_arg_0)) [L403] SORT_11 var_186_arg_0 = state_185; [L404] SORT_13 var_186 = var_186_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L405] EXPR var_186 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L405] var_186 = var_186 & mask_SORT_13 [L406] SORT_13 var_236_arg_0 = var_186; [L407] SORT_13 var_236_arg_1 = var_15; [L408] SORT_1 var_236 = var_236_arg_0 == var_236_arg_1; [L409] SORT_1 var_237_arg_0 = input_6; [L410] SORT_1 var_237_arg_1 = var_236; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_237_arg_0=0, var_237_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L411] EXPR var_237_arg_0 & var_237_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L411] SORT_1 var_237 = var_237_arg_0 & var_237_arg_1; [L412] EXPR var_237 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L412] var_237 = var_237 & mask_SORT_1 [L413] SORT_1 var_372_arg_0 = var_237; [L414] SORT_3 var_372_arg_1 = input_4; [L415] SORT_3 var_372_arg_2 = state_10; [L416] SORT_3 var_372 = var_372_arg_0 ? var_372_arg_1 : var_372_arg_2; [L417] SORT_1 var_374_arg_0 = input_7; [L418] SORT_3 var_374_arg_1 = var_373; [L419] SORT_3 var_374_arg_2 = var_372; [L420] SORT_3 var_374 = var_374_arg_0 ? var_374_arg_1 : var_374_arg_2; [L421] SORT_3 next_375_arg_1 = var_374; [L422] SORT_1 var_160_arg_0 = input_6; [L423] SORT_1 var_160_arg_1 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_160_arg_0=0, var_160_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L424] EXPR var_160_arg_0 | var_160_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L424] SORT_1 var_160 = var_160_arg_0 | var_160_arg_1; [L425] SORT_1 var_161_arg_0 = var_160; [L426] SORT_1 var_161_arg_1 = input_7; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161_arg_0=0, var_161_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L427] EXPR var_161_arg_0 | var_161_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L427] SORT_1 var_161 = var_161_arg_0 | var_161_arg_1; [L428] EXPR var_161 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L428] var_161 = var_161 & mask_SORT_1 [L429] SORT_1 var_303_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_303_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L430] EXPR var_303_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L430] var_303_arg_0 = var_303_arg_0 & mask_SORT_1 [L431] SORT_11 var_303 = var_303_arg_0; [L432] SORT_11 var_304_arg_0 = state_12; [L433] SORT_11 var_304_arg_1 = var_303; [L434] SORT_11 var_304 = var_304_arg_0 + var_304_arg_1; [L435] SORT_1 var_376_arg_0 = var_161; [L436] SORT_11 var_376_arg_1 = var_304; [L437] SORT_11 var_376_arg_2 = state_12; [L438] SORT_11 var_376 = var_376_arg_0 ? var_376_arg_1 : var_376_arg_2; [L439] SORT_1 var_377_arg_0 = input_7; [L440] SORT_11 var_377_arg_1 = var_122; [L441] SORT_11 var_377_arg_2 = var_376; [L442] SORT_11 var_377 = var_377_arg_0 ? var_377_arg_1 : var_377_arg_2; [L443] SORT_11 next_378_arg_1 = var_377; [L444] SORT_19 var_229_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_229_arg_0=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L445] EXPR var_229_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L445] var_229_arg_0 = var_229_arg_0 & mask_SORT_19 [L446] SORT_13 var_229 = var_229_arg_0; [L447] SORT_13 var_230_arg_0 = var_186; [L448] SORT_13 var_230_arg_1 = var_229; [L449] SORT_1 var_230 = var_230_arg_0 == var_230_arg_1; [L450] SORT_1 var_231_arg_0 = input_6; [L451] SORT_1 var_231_arg_1 = var_230; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_231_arg_0=0, var_231_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L452] EXPR var_231_arg_0 & var_231_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L452] SORT_1 var_231 = var_231_arg_0 & var_231_arg_1; [L453] EXPR var_231 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L453] var_231 = var_231 & mask_SORT_1 [L454] SORT_1 var_379_arg_0 = var_231; [L455] SORT_3 var_379_arg_1 = input_4; [L456] SORT_3 var_379_arg_2 = state_18; [L457] SORT_3 var_379 = var_379_arg_0 ? var_379_arg_1 : var_379_arg_2; [L458] SORT_1 var_380_arg_0 = input_7; [L459] SORT_3 var_380_arg_1 = var_373; [L460] SORT_3 var_380_arg_2 = var_379; [L461] SORT_3 var_380 = var_380_arg_0 ? var_380_arg_1 : var_380_arg_2; [L462] SORT_3 next_381_arg_1 = var_380; [L463] SORT_19 var_222_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_222_arg_0=14, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L464] EXPR var_222_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L464] var_222_arg_0 = var_222_arg_0 & mask_SORT_19 [L465] SORT_13 var_222 = var_222_arg_0; [L466] SORT_13 var_223_arg_0 = var_186; [L467] SORT_13 var_223_arg_1 = var_222; [L468] SORT_1 var_223 = var_223_arg_0 == var_223_arg_1; [L469] SORT_1 var_224_arg_0 = input_6; [L470] SORT_1 var_224_arg_1 = var_223; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_224_arg_0=0, var_224_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L471] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L471] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L472] EXPR var_224 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L472] var_224 = var_224 & mask_SORT_1 [L473] SORT_1 var_382_arg_0 = var_224; [L474] SORT_3 var_382_arg_1 = input_4; [L475] SORT_3 var_382_arg_2 = state_24; [L476] SORT_3 var_382 = var_382_arg_0 ? var_382_arg_1 : var_382_arg_2; [L477] SORT_1 var_383_arg_0 = input_7; [L478] SORT_3 var_383_arg_1 = var_373; [L479] SORT_3 var_383_arg_2 = var_382; [L480] SORT_3 var_383 = var_383_arg_0 ? var_383_arg_1 : var_383_arg_2; [L481] SORT_3 next_384_arg_1 = var_383; [L482] SORT_19 var_215_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_215_arg_0=13, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L483] EXPR var_215_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L483] var_215_arg_0 = var_215_arg_0 & mask_SORT_19 [L484] SORT_13 var_215 = var_215_arg_0; [L485] SORT_13 var_216_arg_0 = var_186; [L486] SORT_13 var_216_arg_1 = var_215; [L487] SORT_1 var_216 = var_216_arg_0 == var_216_arg_1; [L488] SORT_1 var_217_arg_0 = input_6; [L489] SORT_1 var_217_arg_1 = var_216; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_217_arg_0=0, var_217_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L490] EXPR var_217_arg_0 & var_217_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L490] SORT_1 var_217 = var_217_arg_0 & var_217_arg_1; [L491] EXPR var_217 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L491] var_217 = var_217 & mask_SORT_1 [L492] SORT_1 var_385_arg_0 = var_217; [L493] SORT_3 var_385_arg_1 = input_4; [L494] SORT_3 var_385_arg_2 = state_29; [L495] SORT_3 var_385 = var_385_arg_0 ? var_385_arg_1 : var_385_arg_2; [L496] SORT_1 var_386_arg_0 = input_7; [L497] SORT_3 var_386_arg_1 = var_373; [L498] SORT_3 var_386_arg_2 = var_385; [L499] SORT_3 var_386 = var_386_arg_0 ? var_386_arg_1 : var_386_arg_2; [L500] SORT_3 next_387_arg_1 = var_386; [L501] SORT_19 var_208_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_208_arg_0=12, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L502] EXPR var_208_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L502] var_208_arg_0 = var_208_arg_0 & mask_SORT_19 [L503] SORT_13 var_208 = var_208_arg_0; [L504] SORT_13 var_209_arg_0 = var_186; [L505] SORT_13 var_209_arg_1 = var_208; [L506] SORT_1 var_209 = var_209_arg_0 == var_209_arg_1; [L507] SORT_1 var_210_arg_0 = input_6; [L508] SORT_1 var_210_arg_1 = var_209; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_210_arg_0=0, var_210_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L509] EXPR var_210_arg_0 & var_210_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L509] SORT_1 var_210 = var_210_arg_0 & var_210_arg_1; [L510] EXPR var_210 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L510] var_210 = var_210 & mask_SORT_1 [L511] SORT_1 var_388_arg_0 = var_210; [L512] SORT_3 var_388_arg_1 = input_4; [L513] SORT_3 var_388_arg_2 = state_34; [L514] SORT_3 var_388 = var_388_arg_0 ? var_388_arg_1 : var_388_arg_2; [L515] SORT_1 var_389_arg_0 = input_7; [L516] SORT_3 var_389_arg_1 = var_373; [L517] SORT_3 var_389_arg_2 = var_388; [L518] SORT_3 var_389 = var_389_arg_0 ? var_389_arg_1 : var_389_arg_2; [L519] SORT_3 next_390_arg_1 = var_389; [L520] SORT_19 var_201_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_201_arg_0=11, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L521] EXPR var_201_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L521] var_201_arg_0 = var_201_arg_0 & mask_SORT_19 [L522] SORT_13 var_201 = var_201_arg_0; [L523] SORT_13 var_202_arg_0 = var_186; [L524] SORT_13 var_202_arg_1 = var_201; [L525] SORT_1 var_202 = var_202_arg_0 == var_202_arg_1; [L526] SORT_1 var_203_arg_0 = input_6; [L527] SORT_1 var_203_arg_1 = var_202; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_203_arg_0=0, var_203_arg_1=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L528] EXPR var_203_arg_0 & var_203_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L528] SORT_1 var_203 = var_203_arg_0 & var_203_arg_1; [L529] EXPR var_203 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L529] var_203 = var_203 & mask_SORT_1 [L530] SORT_1 var_391_arg_0 = var_203; [L531] SORT_3 var_391_arg_1 = input_4; [L532] SORT_3 var_391_arg_2 = state_39; [L533] SORT_3 var_391 = var_391_arg_0 ? var_391_arg_1 : var_391_arg_2; [L534] SORT_1 var_392_arg_0 = input_7; [L535] SORT_3 var_392_arg_1 = var_373; [L536] SORT_3 var_392_arg_2 = var_391; [L537] SORT_3 var_392 = var_392_arg_0 ? var_392_arg_1 : var_392_arg_2; [L538] SORT_3 next_393_arg_1 = var_392; [L539] SORT_19 var_194_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_194_arg_0=10, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L540] EXPR var_194_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L540] var_194_arg_0 = var_194_arg_0 & mask_SORT_19 [L541] SORT_13 var_194 = var_194_arg_0; [L542] SORT_13 var_195_arg_0 = var_186; [L543] SORT_13 var_195_arg_1 = var_194; [L544] SORT_1 var_195 = var_195_arg_0 == var_195_arg_1; [L545] SORT_1 var_196_arg_0 = input_6; [L546] SORT_1 var_196_arg_1 = var_195; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_196_arg_0=0, var_196_arg_1=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L547] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L547] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L548] EXPR var_196 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L548] var_196 = var_196 & mask_SORT_1 [L549] SORT_1 var_394_arg_0 = var_196; [L550] SORT_3 var_394_arg_1 = input_4; [L551] SORT_3 var_394_arg_2 = state_44; [L552] SORT_3 var_394 = var_394_arg_0 ? var_394_arg_1 : var_394_arg_2; [L553] SORT_1 var_395_arg_0 = input_7; [L554] SORT_3 var_395_arg_1 = var_373; [L555] SORT_3 var_395_arg_2 = var_394; [L556] SORT_3 var_395 = var_395_arg_0 ? var_395_arg_1 : var_395_arg_2; [L557] SORT_3 next_396_arg_1 = var_395; [L558] SORT_19 var_298_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_298_arg_0=9, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L559] EXPR var_298_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L559] var_298_arg_0 = var_298_arg_0 & mask_SORT_19 [L560] SORT_13 var_298 = var_298_arg_0; [L561] SORT_13 var_299_arg_0 = var_186; [L562] SORT_13 var_299_arg_1 = var_298; [L563] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L564] SORT_1 var_300_arg_0 = input_6; [L565] SORT_1 var_300_arg_1 = var_299; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_300_arg_0=0, var_300_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L566] EXPR var_300_arg_0 & var_300_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L566] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L567] EXPR var_300 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L567] var_300 = var_300 & mask_SORT_1 [L568] SORT_1 var_397_arg_0 = var_300; [L569] SORT_3 var_397_arg_1 = input_4; [L570] SORT_3 var_397_arg_2 = state_49; [L571] SORT_3 var_397 = var_397_arg_0 ? var_397_arg_1 : var_397_arg_2; [L572] SORT_1 var_398_arg_0 = input_7; [L573] SORT_3 var_398_arg_1 = var_373; [L574] SORT_3 var_398_arg_2 = var_397; [L575] SORT_3 var_398 = var_398_arg_0 ? var_398_arg_1 : var_398_arg_2; [L576] SORT_3 next_399_arg_1 = var_398; [L577] SORT_19 var_291_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_291_arg_0=8, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L578] EXPR var_291_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L578] var_291_arg_0 = var_291_arg_0 & mask_SORT_19 [L579] SORT_13 var_291 = var_291_arg_0; [L580] SORT_13 var_292_arg_0 = var_186; [L581] SORT_13 var_292_arg_1 = var_291; [L582] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L583] SORT_1 var_293_arg_0 = input_6; [L584] SORT_1 var_293_arg_1 = var_292; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_293_arg_0=0, var_293_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L585] EXPR var_293_arg_0 & var_293_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L585] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L586] EXPR var_293 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L586] var_293 = var_293 & mask_SORT_1 [L587] SORT_1 var_400_arg_0 = var_293; [L588] SORT_3 var_400_arg_1 = input_4; [L589] SORT_3 var_400_arg_2 = state_54; [L590] SORT_3 var_400 = var_400_arg_0 ? var_400_arg_1 : var_400_arg_2; [L591] SORT_1 var_401_arg_0 = input_7; [L592] SORT_3 var_401_arg_1 = var_373; [L593] SORT_3 var_401_arg_2 = var_400; [L594] SORT_3 var_401 = var_401_arg_0 ? var_401_arg_1 : var_401_arg_2; [L595] SORT_3 next_402_arg_1 = var_401; [L596] SORT_60 var_284_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_284_arg_0=7, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L597] EXPR var_284_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L597] var_284_arg_0 = var_284_arg_0 & mask_SORT_60 [L598] SORT_13 var_284 = var_284_arg_0; [L599] SORT_13 var_285_arg_0 = var_186; [L600] SORT_13 var_285_arg_1 = var_284; [L601] SORT_1 var_285 = var_285_arg_0 == var_285_arg_1; [L602] SORT_1 var_286_arg_0 = input_6; [L603] SORT_1 var_286_arg_1 = var_285; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_286_arg_0=0, var_286_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L604] EXPR var_286_arg_0 & var_286_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L604] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L605] EXPR var_286 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L605] var_286 = var_286 & mask_SORT_1 [L606] SORT_1 var_403_arg_0 = var_286; [L607] SORT_3 var_403_arg_1 = input_4; [L608] SORT_3 var_403_arg_2 = state_59; [L609] SORT_3 var_403 = var_403_arg_0 ? var_403_arg_1 : var_403_arg_2; [L610] SORT_1 var_404_arg_0 = input_7; [L611] SORT_3 var_404_arg_1 = var_373; [L612] SORT_3 var_404_arg_2 = var_403; [L613] SORT_3 var_404 = var_404_arg_0 ? var_404_arg_1 : var_404_arg_2; [L614] SORT_3 next_405_arg_1 = var_404; [L615] SORT_60 var_277_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_277_arg_0=6, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L616] EXPR var_277_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L616] var_277_arg_0 = var_277_arg_0 & mask_SORT_60 [L617] SORT_13 var_277 = var_277_arg_0; [L618] SORT_13 var_278_arg_0 = var_186; [L619] SORT_13 var_278_arg_1 = var_277; [L620] SORT_1 var_278 = var_278_arg_0 == var_278_arg_1; [L621] SORT_1 var_279_arg_0 = input_6; [L622] SORT_1 var_279_arg_1 = var_278; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_279_arg_0=0, var_279_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L623] EXPR var_279_arg_0 & var_279_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L623] SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; [L624] EXPR var_279 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L624] var_279 = var_279 & mask_SORT_1 [L625] SORT_1 var_406_arg_0 = var_279; [L626] SORT_3 var_406_arg_1 = input_4; [L627] SORT_3 var_406_arg_2 = state_65; [L628] SORT_3 var_406 = var_406_arg_0 ? var_406_arg_1 : var_406_arg_2; [L629] SORT_1 var_407_arg_0 = input_7; [L630] SORT_3 var_407_arg_1 = var_373; [L631] SORT_3 var_407_arg_2 = var_406; [L632] SORT_3 var_407 = var_407_arg_0 ? var_407_arg_1 : var_407_arg_2; [L633] SORT_3 next_408_arg_1 = var_407; [L634] SORT_60 var_270_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_270_arg_0=5, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L635] EXPR var_270_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L635] var_270_arg_0 = var_270_arg_0 & mask_SORT_60 [L636] SORT_13 var_270 = var_270_arg_0; [L637] SORT_13 var_271_arg_0 = var_186; [L638] SORT_13 var_271_arg_1 = var_270; [L639] SORT_1 var_271 = var_271_arg_0 == var_271_arg_1; [L640] SORT_1 var_272_arg_0 = input_6; [L641] SORT_1 var_272_arg_1 = var_271; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_272_arg_0=0, var_272_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L642] EXPR var_272_arg_0 & var_272_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L642] SORT_1 var_272 = var_272_arg_0 & var_272_arg_1; [L643] EXPR var_272 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L643] var_272 = var_272 & mask_SORT_1 [L644] SORT_1 var_409_arg_0 = var_272; [L645] SORT_3 var_409_arg_1 = input_4; [L646] SORT_3 var_409_arg_2 = state_70; [L647] SORT_3 var_409 = var_409_arg_0 ? var_409_arg_1 : var_409_arg_2; [L648] SORT_1 var_410_arg_0 = input_7; [L649] SORT_3 var_410_arg_1 = var_373; [L650] SORT_3 var_410_arg_2 = var_409; [L651] SORT_3 var_410 = var_410_arg_0 ? var_410_arg_1 : var_410_arg_2; [L652] SORT_3 next_411_arg_1 = var_410; [L653] SORT_60 var_263_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_263_arg_0=4, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L654] EXPR var_263_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L654] var_263_arg_0 = var_263_arg_0 & mask_SORT_60 [L655] SORT_13 var_263 = var_263_arg_0; [L656] SORT_13 var_264_arg_0 = var_186; [L657] SORT_13 var_264_arg_1 = var_263; [L658] SORT_1 var_264 = var_264_arg_0 == var_264_arg_1; [L659] SORT_1 var_265_arg_0 = input_6; [L660] SORT_1 var_265_arg_1 = var_264; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_265_arg_0=0, var_265_arg_1=1, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L661] EXPR var_265_arg_0 & var_265_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L661] SORT_1 var_265 = var_265_arg_0 & var_265_arg_1; [L662] EXPR var_265 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L662] var_265 = var_265 & mask_SORT_1 [L663] SORT_1 var_412_arg_0 = var_265; [L664] SORT_3 var_412_arg_1 = input_4; [L665] SORT_3 var_412_arg_2 = state_75; [L666] SORT_3 var_412 = var_412_arg_0 ? var_412_arg_1 : var_412_arg_2; [L667] SORT_1 var_413_arg_0 = input_7; [L668] SORT_3 var_413_arg_1 = var_373; [L669] SORT_3 var_413_arg_2 = var_412; [L670] SORT_3 var_413 = var_413_arg_0 ? var_413_arg_1 : var_413_arg_2; [L671] SORT_3 next_414_arg_1 = var_413; [L672] SORT_81 var_256_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_256_arg_0=3, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L673] EXPR var_256_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L673] var_256_arg_0 = var_256_arg_0 & mask_SORT_81 [L674] SORT_13 var_256 = var_256_arg_0; [L675] SORT_13 var_257_arg_0 = var_186; [L676] SORT_13 var_257_arg_1 = var_256; [L677] SORT_1 var_257 = var_257_arg_0 == var_257_arg_1; [L678] SORT_1 var_258_arg_0 = input_6; [L679] SORT_1 var_258_arg_1 = var_257; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_258_arg_0=0, var_258_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L680] EXPR var_258_arg_0 & var_258_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L680] SORT_1 var_258 = var_258_arg_0 & var_258_arg_1; [L681] EXPR var_258 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L681] var_258 = var_258 & mask_SORT_1 [L682] SORT_1 var_415_arg_0 = var_258; [L683] SORT_3 var_415_arg_1 = input_4; [L684] SORT_3 var_415_arg_2 = state_80; [L685] SORT_3 var_415 = var_415_arg_0 ? var_415_arg_1 : var_415_arg_2; [L686] SORT_1 var_416_arg_0 = input_7; [L687] SORT_3 var_416_arg_1 = var_373; [L688] SORT_3 var_416_arg_2 = var_415; [L689] SORT_3 var_416 = var_416_arg_0 ? var_416_arg_1 : var_416_arg_2; [L690] SORT_3 next_417_arg_1 = var_416; [L691] SORT_81 var_249_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_249_arg_0=2, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L692] EXPR var_249_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L692] var_249_arg_0 = var_249_arg_0 & mask_SORT_81 [L693] SORT_13 var_249 = var_249_arg_0; [L694] SORT_13 var_250_arg_0 = var_186; [L695] SORT_13 var_250_arg_1 = var_249; [L696] SORT_1 var_250 = var_250_arg_0 == var_250_arg_1; [L697] SORT_1 var_251_arg_0 = input_6; [L698] SORT_1 var_251_arg_1 = var_250; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_251_arg_0=0, var_251_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L699] EXPR var_251_arg_0 & var_251_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L699] SORT_1 var_251 = var_251_arg_0 & var_251_arg_1; [L700] EXPR var_251 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L700] var_251 = var_251 & mask_SORT_1 [L701] SORT_1 var_418_arg_0 = var_251; [L702] SORT_3 var_418_arg_1 = input_4; [L703] SORT_3 var_418_arg_2 = state_86; [L704] SORT_3 var_418 = var_418_arg_0 ? var_418_arg_1 : var_418_arg_2; [L705] SORT_1 var_419_arg_0 = input_7; [L706] SORT_3 var_419_arg_1 = var_373; [L707] SORT_3 var_419_arg_2 = var_418; [L708] SORT_3 var_419 = var_419_arg_0 ? var_419_arg_1 : var_419_arg_2; [L709] SORT_3 next_420_arg_1 = var_419; [L710] SORT_1 var_242_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_242_arg_0=1, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L711] EXPR var_242_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L711] var_242_arg_0 = var_242_arg_0 & mask_SORT_1 [L712] SORT_13 var_242 = var_242_arg_0; [L713] SORT_13 var_243_arg_0 = var_186; [L714] SORT_13 var_243_arg_1 = var_242; [L715] SORT_1 var_243 = var_243_arg_0 == var_243_arg_1; [L716] SORT_1 var_244_arg_0 = input_6; [L717] SORT_1 var_244_arg_1 = var_243; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_244_arg_0=0, var_244_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L718] EXPR var_244_arg_0 & var_244_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L718] SORT_1 var_244 = var_244_arg_0 & var_244_arg_1; [L719] EXPR var_244 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L719] var_244 = var_244 & mask_SORT_1 [L720] SORT_1 var_421_arg_0 = var_244; [L721] SORT_3 var_421_arg_1 = input_4; [L722] SORT_3 var_421_arg_2 = state_91; [L723] SORT_3 var_421 = var_421_arg_0 ? var_421_arg_1 : var_421_arg_2; [L724] SORT_1 var_422_arg_0 = input_7; [L725] SORT_3 var_422_arg_1 = var_373; [L726] SORT_3 var_422_arg_2 = var_421; [L727] SORT_3 var_422 = var_422_arg_0 ? var_422_arg_1 : var_422_arg_2; [L728] SORT_3 next_423_arg_1 = var_422; [L729] SORT_13 var_187_arg_0 = var_186; [L730] SORT_1 var_187 = var_187_arg_0 != 0; [L731] SORT_1 var_188_arg_0 = var_187; [L732] SORT_1 var_188 = ~var_188_arg_0; [L733] SORT_1 var_189_arg_0 = input_6; [L734] SORT_1 var_189_arg_1 = var_188; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_189_arg_0=0, var_189_arg_1=-1, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L735] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L735] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L736] EXPR var_189 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L736] var_189 = var_189 & mask_SORT_1 [L737] SORT_1 var_424_arg_0 = var_189; [L738] SORT_3 var_424_arg_1 = input_4; [L739] SORT_3 var_424_arg_2 = state_96; [L740] SORT_3 var_424 = var_424_arg_0 ? var_424_arg_1 : var_424_arg_2; [L741] SORT_1 var_425_arg_0 = input_7; [L742] SORT_3 var_425_arg_1 = var_373; [L743] SORT_3 var_425_arg_2 = var_424; [L744] SORT_3 var_425 = var_425_arg_0 ? var_425_arg_1 : var_425_arg_2; [L745] SORT_3 next_426_arg_1 = var_425; [L746] SORT_1 var_427_arg_0 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_427_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L747] EXPR var_427_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L747] var_427_arg_0 = var_427_arg_0 & mask_SORT_1 [L748] SORT_11 var_427 = var_427_arg_0; [L749] SORT_11 var_428_arg_0 = state_101; [L750] SORT_11 var_428_arg_1 = var_427; [L751] SORT_11 var_428 = var_428_arg_0 + var_428_arg_1; [L752] SORT_1 var_429_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_429_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L753] EXPR var_429_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L753] var_429_arg_0 = var_429_arg_0 & mask_SORT_1 [L754] SORT_11 var_429 = var_429_arg_0; [L755] SORT_11 var_430_arg_0 = var_428; [L756] SORT_11 var_430_arg_1 = var_429; [L757] SORT_11 var_430 = var_430_arg_0 - var_430_arg_1; [L758] SORT_1 var_431_arg_0 = input_7; [L759] SORT_11 var_431_arg_1 = var_122; [L760] SORT_11 var_431_arg_2 = var_430; [L761] SORT_11 var_431 = var_431_arg_0 ? var_431_arg_1 : var_431_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_431=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L762] EXPR var_431 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L762] var_431 = var_431 & mask_SORT_11 [L763] SORT_11 next_432_arg_1 = var_431; [L764] SORT_1 var_333_arg_0 = state_109; [L765] SORT_1 var_333 = ~var_333_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=-1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L766] EXPR var_333 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L766] var_333 = var_333 & mask_SORT_1 [L767] SORT_1 var_329_arg_0 = input_8; [L768] SORT_1 var_329_arg_1 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329_arg_0=0, var_329_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L769] EXPR var_329_arg_0 & var_329_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L769] SORT_1 var_329 = var_329_arg_0 & var_329_arg_1; [L770] SORT_1 var_330_arg_0 = state_109; [L771] SORT_1 var_330_arg_1 = var_329; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_330_arg_0=0, var_330_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L772] EXPR var_330_arg_0 | var_330_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L772] SORT_1 var_330 = var_330_arg_0 | var_330_arg_1; [L773] SORT_1 var_433_arg_0 = var_333; [L774] SORT_1 var_433_arg_1 = var_330; [L775] SORT_1 var_433_arg_2 = state_109; [L776] SORT_1 var_433 = var_433_arg_0 ? var_433_arg_1 : var_433_arg_2; [L777] SORT_1 var_434_arg_0 = input_7; [L778] SORT_1 var_434_arg_1 = var_152; [L779] SORT_1 var_434_arg_2 = var_433; [L780] SORT_1 var_434 = var_434_arg_0 ? var_434_arg_1 : var_434_arg_2; [L781] SORT_1 next_435_arg_1 = var_434; [L782] SORT_1 var_341_arg_0 = var_126; [L783] SORT_1 var_341_arg_1 = state_110; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_341_arg_0=0, var_341_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L784] EXPR var_341_arg_0 | var_341_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L784] SORT_1 var_341 = var_341_arg_0 | var_341_arg_1; [L785] SORT_1 var_436_arg_0 = var_92; [L786] SORT_1 var_436_arg_1 = var_341; [L787] SORT_1 var_436_arg_2 = state_110; [L788] SORT_1 var_436 = var_436_arg_0 ? var_436_arg_1 : var_436_arg_2; [L789] SORT_1 var_437_arg_0 = input_7; [L790] SORT_1 var_437_arg_1 = var_152; [L791] SORT_1 var_437_arg_2 = var_436; [L792] SORT_1 var_437 = var_437_arg_0 ? var_437_arg_1 : var_437_arg_2; [L793] SORT_1 next_438_arg_1 = var_437; [L794] SORT_1 var_353_arg_0 = input_6; [L795] SORT_1 var_353_arg_1 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_353_arg_0=0, var_353_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L796] EXPR var_353_arg_0 | var_353_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L796] SORT_1 var_353 = var_353_arg_0 | var_353_arg_1; [L797] SORT_1 var_354_arg_0 = var_353; [L798] SORT_1 var_354_arg_1 = input_7; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_354_arg_0=0, var_354_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L799] EXPR var_354_arg_0 | var_354_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L799] SORT_1 var_354 = var_354_arg_0 | var_354_arg_1; [L800] SORT_1 var_355_arg_0 = var_354; [L801] SORT_1 var_355_arg_1 = state_109; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_355_arg_0=0, var_355_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L802] EXPR var_355_arg_0 | var_355_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L802] SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; [L803] EXPR var_355 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L803] var_355 = var_355 & mask_SORT_1 [L804] SORT_1 var_439_arg_0 = var_355; [L805] SORT_11 var_439_arg_1 = var_123; [L806] SORT_11 var_439_arg_2 = state_113; [L807] SORT_11 var_439 = var_439_arg_0 ? var_439_arg_1 : var_439_arg_2; [L808] SORT_1 var_440_arg_0 = input_7; [L809] SORT_11 var_440_arg_1 = var_122; [L810] SORT_11 var_440_arg_2 = var_439; [L811] SORT_11 var_440 = var_440_arg_0 ? var_440_arg_1 : var_440_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_440=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L812] EXPR var_440 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L812] var_440 = var_440 & mask_SORT_11 [L813] SORT_11 next_441_arg_1 = var_440; [L814] SORT_1 var_338_arg_0 = var_329; [L815] SORT_1 var_338_arg_1 = var_333; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_338_arg_0=0, var_338_arg_1=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L816] EXPR var_338_arg_0 & var_338_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L816] SORT_1 var_338 = var_338_arg_0 & var_338_arg_1; [L817] EXPR var_338 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L817] var_338 = var_338 & mask_SORT_1 [L818] SORT_1 var_442_arg_0 = var_338; [L819] SORT_3 var_442_arg_1 = input_4; [L820] SORT_3 var_442_arg_2 = state_128; [L821] SORT_3 var_442 = var_442_arg_0 ? var_442_arg_1 : var_442_arg_2; [L822] SORT_1 var_443_arg_0 = input_7; [L823] SORT_3 var_443_arg_1 = var_373; [L824] SORT_3 var_443_arg_2 = var_442; [L825] SORT_3 var_443 = var_443_arg_0 ? var_443_arg_1 : var_443_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_443=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L826] EXPR var_443 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L826] var_443 = var_443 & mask_SORT_3 [L827] SORT_3 next_444_arg_1 = var_443; [L828] SORT_1 next_445_arg_1 = var_152; [L829] SORT_1 var_309_arg_0 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_309_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L830] EXPR var_309_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L830] var_309_arg_0 = var_309_arg_0 & mask_SORT_1 [L831] SORT_11 var_309 = var_309_arg_0; [L832] SORT_11 var_310_arg_0 = state_185; [L833] SORT_11 var_310_arg_1 = var_309; [L834] SORT_11 var_310 = var_310_arg_0 + var_310_arg_1; [L835] SORT_1 var_446_arg_0 = var_161; [L836] SORT_11 var_446_arg_1 = var_310; [L837] SORT_11 var_446_arg_2 = state_185; [L838] SORT_11 var_446 = var_446_arg_0 ? var_446_arg_1 : var_446_arg_2; [L839] SORT_1 var_447_arg_0 = input_7; [L840] SORT_11 var_447_arg_1 = var_122; [L841] SORT_11 var_447_arg_2 = var_446; [L842] SORT_11 var_447 = var_447_arg_0 ? var_447_arg_1 : var_447_arg_2; [L843] SORT_11 next_448_arg_1 = var_447; [L845] state_10 = next_375_arg_1 [L846] state_12 = next_378_arg_1 [L847] state_18 = next_381_arg_1 [L848] state_24 = next_384_arg_1 [L849] state_29 = next_387_arg_1 [L850] state_34 = next_390_arg_1 [L851] state_39 = next_393_arg_1 [L852] state_44 = next_396_arg_1 [L853] state_49 = next_399_arg_1 [L854] state_54 = next_402_arg_1 [L855] state_59 = next_405_arg_1 [L856] state_65 = next_408_arg_1 [L857] state_70 = next_411_arg_1 [L858] state_75 = next_414_arg_1 [L859] state_80 = next_417_arg_1 [L860] state_86 = next_420_arg_1 [L861] state_91 = next_423_arg_1 [L862] state_96 = next_426_arg_1 [L863] state_101 = next_432_arg_1 [L864] state_109 = next_435_arg_1 [L865] state_110 = next_438_arg_1 [L866] state_113 = next_441_arg_1 [L867] state_128 = next_444_arg_1 [L868] state_132 = next_445_arg_1 [L869] state_185 = next_448_arg_1 [L107] input_2 = __VERIFIER_nondet_uchar() [L108] input_4 = __VERIFIER_nondet_uchar() [L109] input_5 = __VERIFIER_nondet_uchar() [L110] input_6 = __VERIFIER_nondet_uchar() [L111] input_7 = __VERIFIER_nondet_uchar() [L112] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L112] input_7 = input_7 & mask_SORT_1 [L113] input_8 = __VERIFIER_nondet_uchar() [L114] input_9 = __VERIFIER_nondet_uchar() [L115] input_150 = __VERIFIER_nondet_uchar() [L117] SORT_1 var_134_arg_0 = input_7; [L118] SORT_1 var_134_arg_1 = state_132; [L119] SORT_1 var_134 = var_134_arg_0 == var_134_arg_1; [L120] SORT_1 var_135_arg_0 = var_92; [L121] SORT_1 var_135 = ~var_135_arg_0; [L122] SORT_1 var_136_arg_0 = var_134; [L123] SORT_1 var_136_arg_1 = var_135; VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] EXPR var_136_arg_0 | var_136_arg_1 VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] SORT_1 var_136 = var_136_arg_0 | var_136_arg_1; [L125] EXPR var_136 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L125] var_136 = var_136 & mask_SORT_1 [L126] SORT_1 constr_137_arg_0 = var_136; VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L127] CALL assume_abort_if_not(constr_137_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L127] RET assume_abort_if_not(constr_137_arg_0) VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L128] SORT_13 var_106_arg_0 = var_105; VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] EXPR var_106_arg_0 & mask_SORT_13 VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] var_106_arg_0 = var_106_arg_0 & mask_SORT_13 [L130] SORT_11 var_106 = var_106_arg_0; [L131] SORT_11 var_107_arg_0 = state_101; [L132] SORT_11 var_107_arg_1 = var_106; [L133] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L134] SORT_1 var_138_arg_0 = var_107; [L135] SORT_1 var_138 = ~var_138_arg_0; [L136] SORT_1 var_139_arg_0 = input_6; [L137] SORT_1 var_139 = ~var_139_arg_0; [L138] SORT_1 var_140_arg_0 = var_138; [L139] SORT_1 var_140_arg_1 = var_139; VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L141] SORT_1 var_141_arg_0 = var_92; [L142] SORT_1 var_141 = ~var_141_arg_0; [L143] SORT_1 var_142_arg_0 = var_140; [L144] SORT_1 var_142_arg_1 = var_141; VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] EXPR var_142_arg_0 | var_142_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] SORT_1 var_142 = var_142_arg_0 | var_142_arg_1; [L146] EXPR var_142 & mask_SORT_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L146] var_142 = var_142 & mask_SORT_1 [L147] SORT_1 constr_143_arg_0 = var_142; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L148] CALL assume_abort_if_not(constr_143_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_143_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L149] SORT_11 var_102_arg_0 = state_101; [L150] SORT_1 var_102 = var_102_arg_0 != 0; [L151] SORT_1 var_103_arg_0 = var_102; [L152] SORT_1 var_103 = ~var_103_arg_0; [L153] SORT_1 var_144_arg_0 = var_103; [L154] SORT_1 var_144 = ~var_144_arg_0; [L155] SORT_1 var_145_arg_0 = input_5; [L156] SORT_1 var_145 = ~var_145_arg_0; [L157] SORT_1 var_146_arg_0 = var_144; [L158] SORT_1 var_146_arg_1 = var_145; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] EXPR var_146_arg_0 | var_146_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] SORT_1 var_146 = var_146_arg_0 | var_146_arg_1; [L160] SORT_1 var_147_arg_0 = var_92; [L161] SORT_1 var_147 = ~var_147_arg_0; [L162] SORT_1 var_148_arg_0 = var_146; [L163] SORT_1 var_148_arg_1 = var_147; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=254, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] EXPR var_148_arg_0 | var_148_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L165] EXPR var_148 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L165] var_148 = var_148 & mask_SORT_1 [L166] SORT_1 constr_149_arg_0 = var_148; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L167] CALL assume_abort_if_not(constr_149_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L167] RET assume_abort_if_not(constr_149_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L169] SORT_1 var_153_arg_0 = state_132; [L170] SORT_1 var_153_arg_1 = var_152; [L171] SORT_1 var_153_arg_2 = var_92; [L172] SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L173] SORT_1 var_111_arg_0 = state_110; [L174] SORT_1 var_111 = ~var_111_arg_0; [L175] SORT_1 var_112_arg_0 = state_109; [L176] SORT_1 var_112_arg_1 = var_111; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] EXPR var_112_arg_0 & var_112_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L178] SORT_11 var_114_arg_0 = state_113; [L179] SORT_1 var_114 = var_114_arg_0 != 0; [L180] SORT_1 var_115_arg_0 = var_112; [L181] SORT_1 var_115_arg_1 = var_114; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L183] SORT_1 var_116_arg_0 = state_109; [L184] SORT_1 var_116 = ~var_116_arg_0; [L185] SORT_1 var_117_arg_0 = input_6; [L186] SORT_1 var_117_arg_1 = var_116; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] EXPR var_117_arg_0 & var_117_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] SORT_1 var_117 = var_117_arg_0 & var_117_arg_1; [L188] SORT_1 var_118_arg_0 = var_117; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] EXPR var_118_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] var_118_arg_0 = var_118_arg_0 & mask_SORT_1 [L190] SORT_11 var_118 = var_118_arg_0; [L191] SORT_11 var_119_arg_0 = state_113; [L192] SORT_11 var_119_arg_1 = var_118; [L193] SORT_11 var_119 = var_119_arg_0 + var_119_arg_1; [L194] SORT_1 var_120_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=257, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] EXPR var_120_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] var_120_arg_0 = var_120_arg_0 & mask_SORT_1 [L196] SORT_11 var_120 = var_120_arg_0; [L197] SORT_11 var_121_arg_0 = var_119; [L198] SORT_11 var_121_arg_1 = var_120; [L199] SORT_11 var_121 = var_121_arg_0 - var_121_arg_1; [L200] SORT_1 var_123_arg_0 = input_7; [L201] SORT_11 var_123_arg_1 = var_122; [L202] SORT_11 var_123_arg_2 = var_121; [L203] SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] EXPR var_123 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] var_123 = var_123 & mask_SORT_11 [L205] SORT_11 var_124_arg_0 = var_123; [L206] SORT_1 var_124 = var_124_arg_0 != 0; [L207] SORT_1 var_125_arg_0 = var_124; [L208] SORT_1 var_125 = ~var_125_arg_0; [L209] SORT_1 var_126_arg_0 = var_115; [L210] SORT_1 var_126_arg_1 = var_125; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] EXPR var_126_arg_0 & var_126_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; [L212] SORT_1 var_127_arg_0 = var_126; [L213] SORT_1 var_127 = ~var_127_arg_0; [L214] SORT_11 var_14_arg_0 = state_12; [L215] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] EXPR var_14 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] var_14 = var_14 & mask_SORT_13 [L217] SORT_13 var_97_arg_0 = var_14; [L218] SORT_1 var_97 = var_97_arg_0 != 0; [L219] SORT_1 var_98_arg_0 = var_97; [L220] SORT_1 var_98 = ~var_98_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1] [L221] EXPR var_98 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L221] var_98 = var_98 & mask_SORT_1 [L222] SORT_1 var_93_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=1] [L223] EXPR var_93_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=1] [L223] var_93_arg_0 = var_93_arg_0 & mask_SORT_1 [L224] SORT_13 var_93 = var_93_arg_0; [L225] SORT_13 var_94_arg_0 = var_14; [L226] SORT_13 var_94_arg_1 = var_93; [L227] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L228] SORT_81 var_88_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=1] [L229] EXPR var_88_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=1] [L229] var_88_arg_0 = var_88_arg_0 & mask_SORT_81 [L230] SORT_13 var_88 = var_88_arg_0; [L231] SORT_13 var_89_arg_0 = var_14; [L232] SORT_13 var_89_arg_1 = var_88; [L233] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L234] SORT_81 var_83_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L235] EXPR var_83_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L235] var_83_arg_0 = var_83_arg_0 & mask_SORT_81 [L236] SORT_13 var_83 = var_83_arg_0; [L237] SORT_13 var_84_arg_0 = var_14; [L238] SORT_13 var_84_arg_1 = var_83; [L239] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L240] SORT_60 var_77_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L241] EXPR var_77_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L241] var_77_arg_0 = var_77_arg_0 & mask_SORT_60 [L242] SORT_13 var_77 = var_77_arg_0; [L243] SORT_13 var_78_arg_0 = var_14; [L244] SORT_13 var_78_arg_1 = var_77; [L245] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L246] SORT_60 var_72_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L247] EXPR var_72_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L247] var_72_arg_0 = var_72_arg_0 & mask_SORT_60 [L248] SORT_13 var_72 = var_72_arg_0; [L249] SORT_13 var_73_arg_0 = var_14; [L250] SORT_13 var_73_arg_1 = var_72; [L251] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L252] SORT_60 var_67_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L253] EXPR var_67_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L253] var_67_arg_0 = var_67_arg_0 & mask_SORT_60 [L254] SORT_13 var_67 = var_67_arg_0; [L255] SORT_13 var_68_arg_0 = var_14; [L256] SORT_13 var_68_arg_1 = var_67; [L257] SORT_1 var_68 = var_68_arg_0 == var_68_arg_1; [L258] SORT_60 var_62_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L259] EXPR var_62_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_60 [L260] SORT_13 var_62 = var_62_arg_0; [L261] SORT_13 var_63_arg_0 = var_14; [L262] SORT_13 var_63_arg_1 = var_62; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_19 var_56_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L265] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L265] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L266] SORT_13 var_56 = var_56_arg_0; [L267] SORT_13 var_57_arg_0 = var_14; [L268] SORT_13 var_57_arg_1 = var_56; [L269] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L270] SORT_19 var_51_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L271] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L271] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L272] SORT_13 var_51 = var_51_arg_0; [L273] SORT_13 var_52_arg_0 = var_14; [L274] SORT_13 var_52_arg_1 = var_51; [L275] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L276] SORT_19 var_46_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L277] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L277] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L278] SORT_13 var_46 = var_46_arg_0; [L279] SORT_13 var_47_arg_0 = var_14; [L280] SORT_13 var_47_arg_1 = var_46; [L281] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L282] SORT_19 var_41_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L283] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L283] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L284] SORT_13 var_41 = var_41_arg_0; [L285] SORT_13 var_42_arg_0 = var_14; [L286] SORT_13 var_42_arg_1 = var_41; [L287] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L288] SORT_19 var_36_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L289] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L289] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L290] SORT_13 var_36 = var_36_arg_0; [L291] SORT_13 var_37_arg_0 = var_14; [L292] SORT_13 var_37_arg_1 = var_36; [L293] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L294] SORT_19 var_31_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L295] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L295] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L296] SORT_13 var_31 = var_31_arg_0; [L297] SORT_13 var_32_arg_0 = var_14; [L298] SORT_13 var_32_arg_1 = var_31; [L299] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L300] SORT_19 var_26_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L301] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L301] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L302] SORT_13 var_26 = var_26_arg_0; [L303] SORT_13 var_27_arg_0 = var_14; [L304] SORT_13 var_27_arg_1 = var_26; [L305] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L306] SORT_19 var_21_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=1, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L307] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_27=1, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=1, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L307] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L308] SORT_13 var_21 = var_21_arg_0; [L309] SORT_13 var_22_arg_0 = var_14; [L310] SORT_13 var_22_arg_1 = var_21; [L311] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L312] SORT_13 var_16_arg_0 = var_14; [L313] SORT_13 var_16_arg_1 = var_15; [L314] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L315] SORT_1 var_17_arg_0 = var_16; [L316] SORT_3 var_17_arg_1 = state_10; [L317] SORT_3 var_17_arg_2 = input_9; [L318] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L319] SORT_1 var_23_arg_0 = var_22; [L320] SORT_3 var_23_arg_1 = state_18; [L321] SORT_3 var_23_arg_2 = var_17; [L322] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L323] SORT_1 var_28_arg_0 = var_27; [L324] SORT_3 var_28_arg_1 = state_24; [L325] SORT_3 var_28_arg_2 = var_23; [L326] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L327] SORT_1 var_33_arg_0 = var_32; [L328] SORT_3 var_33_arg_1 = state_29; [L329] SORT_3 var_33_arg_2 = var_28; [L330] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L331] SORT_1 var_38_arg_0 = var_37; [L332] SORT_3 var_38_arg_1 = state_34; [L333] SORT_3 var_38_arg_2 = var_33; [L334] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L335] SORT_1 var_43_arg_0 = var_42; [L336] SORT_3 var_43_arg_1 = state_39; [L337] SORT_3 var_43_arg_2 = var_38; [L338] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L339] SORT_1 var_48_arg_0 = var_47; [L340] SORT_3 var_48_arg_1 = state_44; [L341] SORT_3 var_48_arg_2 = var_43; [L342] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L343] SORT_1 var_53_arg_0 = var_52; [L344] SORT_3 var_53_arg_1 = state_49; [L345] SORT_3 var_53_arg_2 = var_48; [L346] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L347] SORT_1 var_58_arg_0 = var_57; [L348] SORT_3 var_58_arg_1 = state_54; [L349] SORT_3 var_58_arg_2 = var_53; [L350] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L351] SORT_1 var_64_arg_0 = var_63; [L352] SORT_3 var_64_arg_1 = state_59; [L353] SORT_3 var_64_arg_2 = var_58; [L354] SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L355] SORT_1 var_69_arg_0 = var_68; [L356] SORT_3 var_69_arg_1 = state_65; [L357] SORT_3 var_69_arg_2 = var_64; [L358] SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L359] SORT_1 var_74_arg_0 = var_73; [L360] SORT_3 var_74_arg_1 = state_70; [L361] SORT_3 var_74_arg_2 = var_69; [L362] SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L363] SORT_1 var_79_arg_0 = var_78; [L364] SORT_3 var_79_arg_1 = state_75; [L365] SORT_3 var_79_arg_2 = var_74; [L366] SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L367] SORT_1 var_85_arg_0 = var_84; [L368] SORT_3 var_85_arg_1 = state_80; [L369] SORT_3 var_85_arg_2 = var_79; [L370] SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L371] SORT_1 var_90_arg_0 = var_89; [L372] SORT_3 var_90_arg_1 = state_86; [L373] SORT_3 var_90_arg_2 = var_85; [L374] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L375] SORT_1 var_95_arg_0 = var_94; [L376] SORT_3 var_95_arg_1 = state_91; [L377] SORT_3 var_95_arg_2 = var_90; [L378] SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L379] SORT_1 var_99_arg_0 = var_98; [L380] SORT_3 var_99_arg_1 = state_96; [L381] SORT_3 var_99_arg_2 = var_95; [L382] SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=0] [L383] EXPR var_99 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L383] var_99 = var_99 & mask_SORT_3 [L384] SORT_3 var_129_arg_0 = state_128; [L385] SORT_3 var_129_arg_1 = var_99; [L386] SORT_1 var_129 = var_129_arg_0 == var_129_arg_1; [L387] SORT_1 var_130_arg_0 = var_127; [L388] SORT_1 var_130_arg_1 = var_129; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] EXPR var_130_arg_0 | var_130_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L390] SORT_1 var_151_arg_0 = state_132; [L391] SORT_1 var_151_arg_1 = input_150; [L392] SORT_1 var_151_arg_2 = var_130; [L393] SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L394] SORT_1 var_154_arg_0 = var_151; [L395] SORT_1 var_154 = ~var_154_arg_0; [L396] SORT_1 var_155_arg_0 = var_153; [L397] SORT_1 var_155_arg_1 = var_154; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=1, var_155_arg_1=-1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] EXPR var_155_arg_0 & var_155_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] EXPR var_155 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L399] var_155 = var_155 & mask_SORT_1 [L400] SORT_1 bad_156_arg_0 = var_155; [L401] CALL __VERIFIER_assert(!(bad_156_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 552 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 286.7s, OverallIterations: 89, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.2s, AutomataDifference: 73.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 100997 SdHoareTripleChecker+Valid, 46.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 100876 mSDsluCounter, 307533 SdHoareTripleChecker+Invalid, 40.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 238743 mSDsCounter, 242 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 82835 IncrementalHoareTripleChecker+Invalid, 83077 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 242 mSolverCounterUnsat, 68790 mSDtfsCounter, 82835 mSolverCounterSat, 0.8s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 7094 GetRequests, 6181 SyntacticMatches, 1 SemanticMatches, 912 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41525 ImplicationChecksByTransitivity, 23.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=9350occurred in iteration=85, InterpolantAutomatonStates: 783, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.9s AutomataMinimizationTime, 88 MinimizatonAttempts, 44150 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.6s SsaConstructionTime, 84.8s SatisfiabilityAnalysisTime, 91.6s InterpolantComputationTime, 35871 NumberOfCodeBlocks, 35871 NumberOfCodeBlocksAsserted, 98 NumberOfCheckSat, 37256 ConstructedInterpolants, 0 QuantifiedInterpolants, 218098 SizeOfPredicates, 36 NumberOfNonLiveVariables, 24824 ConjunctsInSsa, 399 ConjunctsInUnsatCore, 101 InterpolantComputations, 84 PerfectInterpolantSequences, 10929/12129 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-12-02 08:58:48,480 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5b1736736c06966e3b4f5adb4865787ef8bbb0ebdf6c77cc2a8afb60cf5fc8db --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:58:50,650 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:58:50,730 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-12-02 08:58:50,736 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:58:50,736 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:58:50,758 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:58:50,759 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:58:50,759 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:58:50,760 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:58:50,760 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:58:50,760 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:58:50,760 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:58:50,760 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:58:50,760 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:58:50,760 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:58:50,761 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:58:50,761 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:58:50,761 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:58:50,762 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:58:50,762 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:58:50,762 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:58:50,763 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:58:50,763 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-12-02 08:58:50,763 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-12-02 08:58:50,763 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:58:50,763 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:58:50,763 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:58:50,763 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:58:50,764 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5b1736736c06966e3b4f5adb4865787ef8bbb0ebdf6c77cc2a8afb60cf5fc8db [2024-12-02 08:58:51,007 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:58:51,015 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:58:51,017 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:58:51,018 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:58:51,019 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:58:51,020 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c [2024-12-02 08:58:53,668 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data/f4d488e8e/4583bbf196fa4605ac337b6a5066e63e/FLAG10859a61c [2024-12-02 08:58:53,891 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:58:53,892 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c [2024-12-02 08:58:53,902 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data/f4d488e8e/4583bbf196fa4605ac337b6a5066e63e/FLAG10859a61c [2024-12-02 08:58:53,917 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/data/f4d488e8e/4583bbf196fa4605ac337b6a5066e63e [2024-12-02 08:58:53,919 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:58:53,921 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:58:53,923 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:58:53,923 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:58:53,927 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:58:53,927 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:58:53" (1/1) ... [2024-12-02 08:58:53,928 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f0582e1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:53, skipping insertion in model container [2024-12-02 08:58:53,928 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:58:53" (1/1) ... [2024-12-02 08:58:53,958 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:58:54,099 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c[1279,1292] [2024-12-02 08:58:54,263 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:58:54,276 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:58:54,285 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c[1279,1292] [2024-12-02 08:58:54,382 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:58:54,398 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:58:54,399 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54 WrapperNode [2024-12-02 08:58:54,399 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:58:54,400 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:58:54,400 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:58:54,400 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:58:54,408 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,430 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,474 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 912 [2024-12-02 08:58:54,474 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:58:54,475 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:58:54,475 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:58:54,475 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:58:54,482 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,483 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,489 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,511 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:58:54,512 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,512 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,532 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,535 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,538 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,542 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,546 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,554 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:58:54,554 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:58:54,555 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:58:54,555 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:58:54,556 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (1/1) ... [2024-12-02 08:58:54,561 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:58:54,574 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:58:54,586 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:58:54,588 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:58:54,611 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:58:54,611 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-12-02 08:58:54,611 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:58:54,611 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:58:54,611 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:58:54,611 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:58:54,792 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:58:54,793 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:58:55,487 INFO L? ?]: Removed 271 outVars from TransFormulas that were not future-live. [2024-12-02 08:58:55,487 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:58:55,497 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:58:55,497 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 08:58:55,498 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:58:55 BoogieIcfgContainer [2024-12-02 08:58:55,498 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:58:55,501 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:58:55,501 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:58:55,507 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:58:55,507 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:58:53" (1/3) ... [2024-12-02 08:58:55,508 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@271398db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:58:55, skipping insertion in model container [2024-12-02 08:58:55,508 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:58:54" (2/3) ... [2024-12-02 08:58:55,508 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@271398db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:58:55, skipping insertion in model container [2024-12-02 08:58:55,509 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:58:55" (3/3) ... [2024-12-02 08:58:55,510 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c [2024-12-02 08:58:55,529 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:58:55,531 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w8_d16_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:58:55,584 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:58:55,595 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@251fe6a4, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:58:55,596 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:58:55,600 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:58:55,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-12-02 08:58:55,607 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:58:55,607 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:58:55,608 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:58:55,612 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:58:55,612 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-12-02 08:58:55,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:58:55,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [922941822] [2024-12-02 08:58:55,624 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:58:55,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:58:55,625 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:58:55,627 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:58:55,628 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:58:56,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:58:56,090 INFO L256 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 08:58:56,102 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:58:56,396 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-02 08:58:56,396 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:58:56,537 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:58:56,538 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [922941822] [2024-12-02 08:58:56,538 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [922941822] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:58:56,538 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [318661252] [2024-12-02 08:58:56,538 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:58:56,539 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:58:56,539 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:58:56,542 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:58:56,543 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-12-02 08:58:57,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:58:57,107 INFO L256 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-12-02 08:58:57,112 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:58:57,227 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:58:57,228 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:58:57,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [318661252] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:58:57,228 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:58:57,228 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-12-02 08:58:57,230 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1194549134] [2024-12-02 08:58:57,231 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:58:57,234 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:58:57,234 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:58:57,251 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:58:57,252 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:58:57,253 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:58:57,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:58:57,373 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-12-02 08:58:57,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:58:57,376 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-12-02 08:58:57,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:58:57,381 INFO L225 Difference]: With dead ends: 43 [2024-12-02 08:58:57,381 INFO L226 Difference]: Without dead ends: 25 [2024-12-02 08:58:57,384 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:58:57,386 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:58:57,387 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:58:57,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-12-02 08:58:57,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-12-02 08:58:57,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:58:57,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-12-02 08:58:57,419 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-12-02 08:58:57,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:58:57,420 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-12-02 08:58:57,420 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:58:57,420 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-12-02 08:58:57,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-12-02 08:58:57,422 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:58:57,422 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-12-02 08:58:57,432 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:58:57,626 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-12-02 08:58:57,823 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt [2024-12-02 08:58:57,823 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:58:57,823 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:58:57,823 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-12-02 08:58:57,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:58:57,824 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [243438074] [2024-12-02 08:58:57,824 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:58:57,825 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:58:57,825 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:58:57,826 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:58:57,827 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:58:58,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:58:58,302 INFO L256 TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-12-02 08:58:58,313 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:58:58,787 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:58:58,787 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:58:58,934 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:58:58,934 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [243438074] [2024-12-02 08:58:58,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [243438074] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:58:58,934 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1581752167] [2024-12-02 08:58:58,934 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:58:58,935 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:58:58,935 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:58:58,936 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:58:58,938 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-12-02 08:58:59,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:58:59,808 INFO L256 TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-12-02 08:58:59,817 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:59:00,148 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:59:00,148 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:59:00,285 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1581752167] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:59:00,285 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:59:00,285 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-12-02 08:59:00,285 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282163602] [2024-12-02 08:59:00,285 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 08:59:00,286 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 08:59:00,286 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:59:00,286 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 08:59:00,287 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:59:00,287 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:59:00,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:59:00,588 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-12-02 08:59:00,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:59:00,588 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-12-02 08:59:00,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:59:00,589 INFO L225 Difference]: With dead ends: 36 [2024-12-02 08:59:00,589 INFO L226 Difference]: Without dead ends: 34 [2024-12-02 08:59:00,590 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:59:00,590 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:59:00,591 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:59:00,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-12-02 08:59:00,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-12-02 08:59:00,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:59:00,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-12-02 08:59:00,598 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-12-02 08:59:00,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:59:00,598 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-12-02 08:59:00,598 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:59:00,598 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-12-02 08:59:00,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-12-02 08:59:00,599 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:59:00,599 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-12-02 08:59:00,605 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-12-02 08:59:00,808 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:59:01,000 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:59:01,000 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:59:01,001 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:59:01,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-12-02 08:59:01,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:59:01,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1441086632] [2024-12-02 08:59:01,003 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 08:59:01,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:59:01,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:59:01,004 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:59:01,005 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:59:01,603 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 08:59:01,603 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:59:01,612 INFO L256 TraceCheckSpWp]: Trace formula consists of 960 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-12-02 08:59:01,629 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:59:05,093 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 08:59:05,094 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:59:10,552 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse7 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse3 (forall ((|v_ULTIMATE.start_main_~var_155_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_151_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_151_arg_1~0#1_17|)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_155_arg_0~0#1_19|)))) .cse7))))) (.cse4 (= (_ bv0 8) |c_ULTIMATE.start_main_~state_132~0#1|))) (let ((.cse12 (or .cse3 .cse4)) (.cse10 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_109~0#1|)) (.cse11 (not .cse4))) (let ((.cse5 (and .cse12 (or (forall ((|v_ULTIMATE.start_main_~var_115_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_126_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_155_arg_0~0#1_19| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse7 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_17|) .cse10)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_155_arg_0~0#1_19|)))))))) .cse11))) (.cse2 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)) (.cse1 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_128~0#1|))) (let ((.cse6 (let ((.cse9 (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse2 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_96~0#1|)))))) .cse1))) (and (or .cse9 .cse5) (or (not .cse9) (and (or (forall ((|v_ULTIMATE.start_main_~var_115_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_126_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_155_arg_0~0#1_19| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_155_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_17|) .cse10)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_17|)))))))))))))))))) .cse7)))) .cse11) .cse12))))) (.cse8 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (let ((.cse0 (= ((_ extract 7 0) (bvand .cse7 (_ bv254 32))) (_ bv0 8)))) (and (or (not .cse0) (and (or (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_15| (_ BitVec 8))) (not (= .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse2 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_99_arg_2~0#1_15|))))))))) .cse3 .cse4) (or .cse5 (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_15| (_ BitVec 8))) (= .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse2 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_99_arg_2~0#1_15|))))))))))) (or .cse6 .cse0))) .cse8) (or .cse6 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse7 (_ bv255 32)))) (not .cse8)))))))) is different from false [2024-12-02 08:59:10,718 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:59:10,718 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1441086632] [2024-12-02 08:59:10,718 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1441086632] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:59:10,718 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1402475522] [2024-12-02 08:59:10,718 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 08:59:10,718 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:59:10,718 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:59:10,719 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:59:10,720 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-12-02 08:59:11,936 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 08:59:11,936 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:59:11,989 INFO L256 TraceCheckSpWp]: Trace formula consists of 960 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-12-02 08:59:12,000 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:59:24,618 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 08:59:24,618 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:59:28,746 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-12-02 08:59:28,746 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-12-02 08:59:28,747 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2024-12-02 08:59:28,755 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-12-02 08:59:28,955 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:59:29,148 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:59:29,148 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:842) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:555) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:395) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:267) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:325) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:181) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:267) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:317) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 46 more [2024-12-02 08:59:29,152 INFO L158 Benchmark]: Toolchain (without parser) took 35231.60ms. Allocated memory was 92.3MB in the beginning and 629.1MB in the end (delta: 536.9MB). Free memory was 68.7MB in the beginning and 475.4MB in the end (delta: -406.8MB). Peak memory consumption was 126.1MB. Max. memory is 16.1GB. [2024-12-02 08:59:29,152 INFO L158 Benchmark]: CDTParser took 0.47ms. Allocated memory is still 83.9MB. Free memory is still 48.1MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:59:29,153 INFO L158 Benchmark]: CACSL2BoogieTranslator took 476.38ms. Allocated memory is still 92.3MB. Free memory was 68.5MB in the beginning and 63.3MB in the end (delta: 5.1MB). Peak memory consumption was 39.5MB. Max. memory is 16.1GB. [2024-12-02 08:59:29,153 INFO L158 Benchmark]: Boogie Procedure Inliner took 74.52ms. Allocated memory is still 92.3MB. Free memory was 63.3MB in the beginning and 56.4MB in the end (delta: 6.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 08:59:29,153 INFO L158 Benchmark]: Boogie Preprocessor took 78.89ms. Allocated memory is still 92.3MB. Free memory was 56.4MB in the beginning and 48.4MB in the end (delta: 8.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 08:59:29,153 INFO L158 Benchmark]: RCFGBuilder took 943.41ms. Allocated memory was 92.3MB in the beginning and 159.4MB in the end (delta: 67.1MB). Free memory was 48.4MB in the beginning and 79.3MB in the end (delta: -30.9MB). Peak memory consumption was 35.6MB. Max. memory is 16.1GB. [2024-12-02 08:59:29,154 INFO L158 Benchmark]: TraceAbstraction took 33651.05ms. Allocated memory was 159.4MB in the beginning and 629.1MB in the end (delta: 469.8MB). Free memory was 78.4MB in the beginning and 475.4MB in the end (delta: -397.0MB). Peak memory consumption was 73.0MB. Max. memory is 16.1GB. [2024-12-02 08:59:29,155 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.47ms. Allocated memory is still 83.9MB. Free memory is still 48.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 476.38ms. Allocated memory is still 92.3MB. Free memory was 68.5MB in the beginning and 63.3MB in the end (delta: 5.1MB). Peak memory consumption was 39.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 74.52ms. Allocated memory is still 92.3MB. Free memory was 63.3MB in the beginning and 56.4MB in the end (delta: 6.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 78.89ms. Allocated memory is still 92.3MB. Free memory was 56.4MB in the beginning and 48.4MB in the end (delta: 8.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 943.41ms. Allocated memory was 92.3MB in the beginning and 159.4MB in the end (delta: 67.1MB). Free memory was 48.4MB in the beginning and 79.3MB in the end (delta: -30.9MB). Peak memory consumption was 35.6MB. Max. memory is 16.1GB. * TraceAbstraction took 33651.05ms. Allocated memory was 159.4MB in the beginning and 629.1MB in the end (delta: 469.8MB). Free memory was 78.4MB in the beginning and 475.4MB in the end (delta: -397.0MB). Peak memory consumption was 73.0MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5fee5cac-3718-43d9-b900-641f500e986e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")