./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 9bf56183f8b38642b96cd33ef82d3f4742c0dee70cc75a016d02fb74b1d4c964 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-01 13:20:41,817 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-01 13:20:41,874 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-12-01 13:20:41,880 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-01 13:20:41,880 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-01 13:20:41,903 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-01 13:20:41,903 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-01 13:20:41,903 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-01 13:20:41,904 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-01 13:20:41,904 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-01 13:20:41,904 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-01 13:20:41,904 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-01 13:20:41,904 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * Use SBE=true [2024-12-01 13:20:41,905 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-01 13:20:41,905 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-01 13:20:41,906 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-01 13:20:41,906 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-01 13:20:41,906 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-01 13:20:41,906 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-01 13:20:41,906 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-01 13:20:41,906 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-01 13:20:41,906 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-01 13:20:41,906 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-01 13:20:41,906 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-01 13:20:41,906 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-01 13:20:41,906 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-01 13:20:41,907 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-01 13:20:41,907 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9bf56183f8b38642b96cd33ef82d3f4742c0dee70cc75a016d02fb74b1d4c964 [2024-12-01 13:20:42,153 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-01 13:20:42,161 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-01 13:20:42,163 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-01 13:20:42,164 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-01 13:20:42,164 INFO L274 PluginConnector]: CDTParser initialized [2024-12-01 13:20:42,165 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c [2024-12-01 13:20:44,810 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data/3340647ec/8a4950f0ac8c4ee5b0a01f77a77de14b/FLAG10fd66644 [2024-12-01 13:20:45,070 INFO L384 CDTParser]: Found 1 translation units. [2024-12-01 13:20:45,071 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c [2024-12-01 13:20:45,083 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data/3340647ec/8a4950f0ac8c4ee5b0a01f77a77de14b/FLAG10fd66644 [2024-12-01 13:20:45,382 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data/3340647ec/8a4950f0ac8c4ee5b0a01f77a77de14b [2024-12-01 13:20:45,384 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-01 13:20:45,385 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-01 13:20:45,387 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-01 13:20:45,387 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-01 13:20:45,391 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-01 13:20:45,392 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:45,393 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2520f96b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45, skipping insertion in model container [2024-12-01 13:20:45,393 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:45,429 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-01 13:20:45,578 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c[1279,1292] [2024-12-01 13:20:45,795 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-01 13:20:45,805 INFO L200 MainTranslator]: Completed pre-run [2024-12-01 13:20:45,814 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c[1279,1292] [2024-12-01 13:20:45,927 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-01 13:20:45,941 INFO L204 MainTranslator]: Completed translation [2024-12-01 13:20:45,941 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45 WrapperNode [2024-12-01 13:20:45,941 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-01 13:20:45,942 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-01 13:20:45,943 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-01 13:20:45,943 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-01 13:20:45,949 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:45,985 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,269 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 3162 [2024-12-01 13:20:46,269 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-01 13:20:46,270 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-01 13:20:46,270 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-01 13:20:46,270 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-01 13:20:46,279 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,279 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,323 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,390 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-01 13:20:46,391 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,391 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,454 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,464 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,476 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,497 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,507 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,592 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-01 13:20:46,592 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-01 13:20:46,592 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-01 13:20:46,593 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-01 13:20:46,593 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (1/1) ... [2024-12-01 13:20:46,597 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-01 13:20:46,606 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:20:46,617 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-01 13:20:46,620 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-01 13:20:46,639 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-01 13:20:46,639 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-01 13:20:46,639 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-01 13:20:46,640 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-01 13:20:46,640 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-01 13:20:46,640 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-01 13:20:46,925 INFO L234 CfgBuilder]: Building ICFG [2024-12-01 13:20:46,927 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-01 13:20:50,132 INFO L? ?]: Removed 1764 outVars from TransFormulas that were not future-live. [2024-12-01 13:20:50,132 INFO L283 CfgBuilder]: Performing block encoding [2024-12-01 13:20:50,156 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-01 13:20:50,156 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-01 13:20:50,156 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 01:20:50 BoogieIcfgContainer [2024-12-01 13:20:50,156 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-01 13:20:50,159 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-01 13:20:50,159 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-01 13:20:50,163 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-01 13:20:50,163 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 01.12 01:20:45" (1/3) ... [2024-12-01 13:20:50,164 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@31fb1a2b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 01.12 01:20:50, skipping insertion in model container [2024-12-01 13:20:50,164 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:20:45" (2/3) ... [2024-12-01 13:20:50,164 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@31fb1a2b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 01.12 01:20:50, skipping insertion in model container [2024-12-01 13:20:50,164 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 01:20:50" (3/3) ... [2024-12-01 13:20:50,165 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c [2024-12-01 13:20:50,180 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-01 13:20:50,182 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c that has 2 procedures, 872 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-01 13:20:50,251 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-01 13:20:50,262 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@47c27f85, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-01 13:20:50,263 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-01 13:20:50,269 INFO L276 IsEmpty]: Start isEmpty. Operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:50,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-01 13:20:50,284 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:50,285 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:50,285 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:50,290 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:50,290 INFO L85 PathProgramCache]: Analyzing trace with hash -684669181, now seen corresponding path program 1 times [2024-12-01 13:20:50,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:50,298 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394296299] [2024-12-01 13:20:50,298 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:50,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:20:50,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:50,790 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-01 13:20:50,791 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:20:50,791 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394296299] [2024-12-01 13:20:50,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [394296299] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:20:50,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1936517158] [2024-12-01 13:20:50,792 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:50,792 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:20:50,792 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:20:50,795 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:20:50,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-01 13:20:51,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:51,440 INFO L256 TraceCheckSpWp]: Trace formula consists of 1413 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-12-01 13:20:51,452 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:20:51,477 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-01 13:20:51,477 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-01 13:20:51,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1936517158] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:20:51,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-01 13:20:51,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-12-01 13:20:51,479 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473573960] [2024-12-01 13:20:51,480 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:20:51,484 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-01 13:20:51,484 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:20:51,504 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-01 13:20:51,505 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-01 13:20:51,509 INFO L87 Difference]: Start difference. First operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-01 13:20:51,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:20:51,566 INFO L93 Difference]: Finished difference Result 1575 states and 2357 transitions. [2024-12-01 13:20:51,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-01 13:20:51,568 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 213 [2024-12-01 13:20:51,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:20:51,578 INFO L225 Difference]: With dead ends: 1575 [2024-12-01 13:20:51,578 INFO L226 Difference]: Without dead ends: 869 [2024-12-01 13:20:51,582 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 214 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-01 13:20:51,585 INFO L435 NwaCegarLoop]: 1297 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1297 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:20:51,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1297 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:20:51,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 869 states. [2024-12-01 13:20:51,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 869 to 869. [2024-12-01 13:20:51,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 869 states, 864 states have (on average 1.494212962962963) internal successors, (1291), 864 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:51,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 869 states to 869 states and 1297 transitions. [2024-12-01 13:20:51,649 INFO L78 Accepts]: Start accepts. Automaton has 869 states and 1297 transitions. Word has length 213 [2024-12-01 13:20:51,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:20:51,650 INFO L471 AbstractCegarLoop]: Abstraction has 869 states and 1297 transitions. [2024-12-01 13:20:51,650 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-01 13:20:51,650 INFO L276 IsEmpty]: Start isEmpty. Operand 869 states and 1297 transitions. [2024-12-01 13:20:51,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-01 13:20:51,654 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:51,654 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:51,664 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-01 13:20:51,854 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:20:51,855 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:51,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:51,856 INFO L85 PathProgramCache]: Analyzing trace with hash 275406397, now seen corresponding path program 1 times [2024-12-01 13:20:51,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:51,856 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402560462] [2024-12-01 13:20:51,856 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:51,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:20:52,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:53,157 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:20:53,157 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:20:53,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402560462] [2024-12-01 13:20:53,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [402560462] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:20:53,158 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:20:53,158 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:20:53,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810006837] [2024-12-01 13:20:53,158 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:20:53,159 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:20:53,159 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:20:53,160 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:20:53,160 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:20:53,160 INFO L87 Difference]: Start difference. First operand 869 states and 1297 transitions. Second operand has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:53,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:20:53,215 INFO L93 Difference]: Finished difference Result 873 states and 1301 transitions. [2024-12-01 13:20:53,215 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:20:53,215 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 213 [2024-12-01 13:20:53,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:20:53,219 INFO L225 Difference]: With dead ends: 873 [2024-12-01 13:20:53,219 INFO L226 Difference]: Without dead ends: 871 [2024-12-01 13:20:53,220 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:20:53,221 INFO L435 NwaCegarLoop]: 1295 mSDtfsCounter, 0 mSDsluCounter, 2584 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3879 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:20:53,221 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3879 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:20:53,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-01 13:20:53,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-01 13:20:53,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.4930715935334873) internal successors, (1293), 866 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:53,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1299 transitions. [2024-12-01 13:20:53,245 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1299 transitions. Word has length 213 [2024-12-01 13:20:53,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:20:53,247 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1299 transitions. [2024-12-01 13:20:53,247 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:53,247 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1299 transitions. [2024-12-01 13:20:53,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2024-12-01 13:20:53,250 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:53,250 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:53,250 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-01 13:20:53,250 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:53,251 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:53,251 INFO L85 PathProgramCache]: Analyzing trace with hash -50639891, now seen corresponding path program 1 times [2024-12-01 13:20:53,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:53,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744561505] [2024-12-01 13:20:53,251 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:53,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:20:53,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:53,969 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:20:53,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:20:53,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744561505] [2024-12-01 13:20:53,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744561505] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:20:53,969 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:20:53,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:20:53,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [821184444] [2024-12-01 13:20:53,969 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:20:53,970 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:20:53,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:20:53,971 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:20:53,972 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:20:53,972 INFO L87 Difference]: Start difference. First operand 871 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:54,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:20:54,613 INFO L93 Difference]: Finished difference Result 2171 states and 3241 transitions. [2024-12-01 13:20:54,613 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:20:54,613 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 214 [2024-12-01 13:20:54,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:20:54,617 INFO L225 Difference]: With dead ends: 2171 [2024-12-01 13:20:54,618 INFO L226 Difference]: Without dead ends: 871 [2024-12-01 13:20:54,619 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-12-01 13:20:54,620 INFO L435 NwaCegarLoop]: 1325 mSDtfsCounter, 2674 mSDsluCounter, 2354 mSDsCounter, 0 mSdLazyCounter, 414 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2674 SdHoareTripleChecker+Valid, 3679 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 414 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-01 13:20:54,620 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2674 Valid, 3679 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 414 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-01 13:20:54,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-01 13:20:54,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-01 13:20:54,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.491916859122402) internal successors, (1292), 866 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:54,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1298 transitions. [2024-12-01 13:20:54,643 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1298 transitions. Word has length 214 [2024-12-01 13:20:54,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:20:54,644 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1298 transitions. [2024-12-01 13:20:54,644 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:54,644 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1298 transitions. [2024-12-01 13:20:54,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-12-01 13:20:54,646 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:54,647 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:54,647 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-01 13:20:54,647 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:54,647 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:54,647 INFO L85 PathProgramCache]: Analyzing trace with hash -125930801, now seen corresponding path program 1 times [2024-12-01 13:20:54,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:54,648 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1235772682] [2024-12-01 13:20:54,648 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:54,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:20:54,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:55,298 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:20:55,298 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:20:55,298 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1235772682] [2024-12-01 13:20:55,298 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1235772682] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:20:55,298 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:20:55,298 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:20:55,298 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [475861104] [2024-12-01 13:20:55,298 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:20:55,299 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:20:55,299 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:20:55,300 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:20:55,300 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:20:55,300 INFO L87 Difference]: Start difference. First operand 871 states and 1298 transitions. Second operand has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:55,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:20:55,351 INFO L93 Difference]: Finished difference Result 1578 states and 2351 transitions. [2024-12-01 13:20:55,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:20:55,352 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 215 [2024-12-01 13:20:55,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:20:55,355 INFO L225 Difference]: With dead ends: 1578 [2024-12-01 13:20:55,356 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:20:55,357 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:20:55,357 INFO L435 NwaCegarLoop]: 1294 mSDtfsCounter, 0 mSDsluCounter, 2578 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3872 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:20:55,358 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3872 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:20:55,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:20:55,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:20:55,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4907834101382489) internal successors, (1294), 868 states have internal predecessors, (1294), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:55,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1300 transitions. [2024-12-01 13:20:55,379 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1300 transitions. Word has length 215 [2024-12-01 13:20:55,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:20:55,379 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1300 transitions. [2024-12-01 13:20:55,380 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:55,380 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1300 transitions. [2024-12-01 13:20:55,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2024-12-01 13:20:55,382 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:55,382 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:55,383 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-01 13:20:55,383 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:55,383 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:55,383 INFO L85 PathProgramCache]: Analyzing trace with hash -706852236, now seen corresponding path program 1 times [2024-12-01 13:20:55,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:55,383 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [285008932] [2024-12-01 13:20:55,383 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:55,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:20:55,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:56,296 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:20:56,296 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:20:56,296 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [285008932] [2024-12-01 13:20:56,297 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [285008932] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:20:56,297 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:20:56,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:20:56,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663808818] [2024-12-01 13:20:56,297 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:20:56,297 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:20:56,298 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:20:56,298 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:20:56,298 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:20:56,299 INFO L87 Difference]: Start difference. First operand 873 states and 1300 transitions. Second operand has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:56,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:20:56,657 INFO L93 Difference]: Finished difference Result 1580 states and 2352 transitions. [2024-12-01 13:20:56,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:20:56,658 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 216 [2024-12-01 13:20:56,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:20:56,662 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:20:56,662 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:20:56,663 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:20:56,664 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1130 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 324 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1130 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 324 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 324 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-01 13:20:56,664 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1130 Valid, 2270 Invalid, 324 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 324 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-01 13:20:56,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:20:56,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:20:56,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.48963133640553) internal successors, (1293), 868 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:56,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1299 transitions. [2024-12-01 13:20:56,693 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1299 transitions. Word has length 216 [2024-12-01 13:20:56,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:20:56,694 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1299 transitions. [2024-12-01 13:20:56,694 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:56,694 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1299 transitions. [2024-12-01 13:20:56,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-12-01 13:20:56,697 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:56,698 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:56,698 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-01 13:20:56,698 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:56,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:56,699 INFO L85 PathProgramCache]: Analyzing trace with hash 1177044582, now seen corresponding path program 1 times [2024-12-01 13:20:56,699 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:56,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006007708] [2024-12-01 13:20:56,699 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:56,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:20:56,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:57,230 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:20:57,231 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:20:57,231 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006007708] [2024-12-01 13:20:57,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2006007708] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:20:57,231 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:20:57,231 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:20:57,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1276373189] [2024-12-01 13:20:57,231 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:20:57,231 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:20:57,232 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:20:57,232 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:20:57,232 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:20:57,232 INFO L87 Difference]: Start difference. First operand 873 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:57,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:20:57,487 INFO L93 Difference]: Finished difference Result 1582 states and 2352 transitions. [2024-12-01 13:20:57,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-01 13:20:57,487 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 217 [2024-12-01 13:20:57,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:20:57,491 INFO L225 Difference]: With dead ends: 1582 [2024-12-01 13:20:57,491 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:20:57,492 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-01 13:20:57,493 INFO L435 NwaCegarLoop]: 1288 mSDtfsCounter, 1133 mSDsluCounter, 2426 mSDsCounter, 0 mSdLazyCounter, 174 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1133 SdHoareTripleChecker+Valid, 3714 SdHoareTripleChecker+Invalid, 174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 174 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:20:57,493 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1133 Valid, 3714 Invalid, 174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 174 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:20:57,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:20:57,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:20:57,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4884792626728112) internal successors, (1292), 868 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:57,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1298 transitions. [2024-12-01 13:20:57,515 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1298 transitions. Word has length 217 [2024-12-01 13:20:57,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:20:57,515 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1298 transitions. [2024-12-01 13:20:57,515 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:57,515 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1298 transitions. [2024-12-01 13:20:57,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2024-12-01 13:20:57,518 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:57,518 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:57,518 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-01 13:20:57,518 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:57,519 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:57,519 INFO L85 PathProgramCache]: Analyzing trace with hash 67362509, now seen corresponding path program 1 times [2024-12-01 13:20:57,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:57,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615056470] [2024-12-01 13:20:57,519 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:57,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:20:57,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:58,000 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:20:58,001 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:20:58,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [615056470] [2024-12-01 13:20:58,001 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [615056470] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:20:58,001 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:20:58,001 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:20:58,001 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2040120893] [2024-12-01 13:20:58,001 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:20:58,002 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:20:58,002 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:20:58,002 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:20:58,002 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:20:58,002 INFO L87 Difference]: Start difference. First operand 873 states and 1298 transitions. Second operand has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:58,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:20:58,309 INFO L93 Difference]: Finished difference Result 1580 states and 2348 transitions. [2024-12-01 13:20:58,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:20:58,310 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 218 [2024-12-01 13:20:58,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:20:58,313 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:20:58,313 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:20:58,314 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:20:58,315 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2401 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 320 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2404 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 321 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 320 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-01 13:20:58,315 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2404 Valid, 2270 Invalid, 321 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 320 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-01 13:20:58,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:20:58,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:20:58,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.487327188940092) internal successors, (1291), 868 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:58,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1297 transitions. [2024-12-01 13:20:58,336 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1297 transitions. Word has length 218 [2024-12-01 13:20:58,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:20:58,337 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1297 transitions. [2024-12-01 13:20:58,337 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:58,337 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1297 transitions. [2024-12-01 13:20:58,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2024-12-01 13:20:58,339 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:58,340 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:58,340 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-01 13:20:58,340 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:58,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:58,340 INFO L85 PathProgramCache]: Analyzing trace with hash -1444744026, now seen corresponding path program 1 times [2024-12-01 13:20:58,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:58,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724723301] [2024-12-01 13:20:58,341 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:58,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:20:58,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:58,803 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:20:58,803 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:20:58,803 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724723301] [2024-12-01 13:20:58,803 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1724723301] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:20:58,803 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:20:58,804 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:20:58,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [35329792] [2024-12-01 13:20:58,804 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:20:58,804 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:20:58,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:20:58,805 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:20:58,805 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:20:58,805 INFO L87 Difference]: Start difference. First operand 873 states and 1297 transitions. Second operand has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:59,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:20:59,125 INFO L93 Difference]: Finished difference Result 1580 states and 2346 transitions. [2024-12-01 13:20:59,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:20:59,126 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 219 [2024-12-01 13:20:59,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:20:59,130 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:20:59,130 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:20:59,131 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:20:59,131 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2393 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2396 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 319 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-01 13:20:59,131 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2396 Valid, 2270 Invalid, 319 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-01 13:20:59,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:20:59,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:20:59,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4861751152073732) internal successors, (1290), 868 states have internal predecessors, (1290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:59,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1296 transitions. [2024-12-01 13:20:59,151 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1296 transitions. Word has length 219 [2024-12-01 13:20:59,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:20:59,152 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1296 transitions. [2024-12-01 13:20:59,152 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:59,152 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1296 transitions. [2024-12-01 13:20:59,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2024-12-01 13:20:59,155 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:59,155 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:59,155 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-01 13:20:59,155 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:59,156 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:59,156 INFO L85 PathProgramCache]: Analyzing trace with hash 769514406, now seen corresponding path program 1 times [2024-12-01 13:20:59,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:59,156 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557917556] [2024-12-01 13:20:59,156 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:59,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:20:59,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:20:59,608 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:20:59,608 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:20:59,608 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [557917556] [2024-12-01 13:20:59,608 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [557917556] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:20:59,608 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:20:59,608 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:20:59,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148776164] [2024-12-01 13:20:59,609 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:20:59,609 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:20:59,609 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:20:59,610 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:20:59,610 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:20:59,610 INFO L87 Difference]: Start difference. First operand 873 states and 1296 transitions. Second operand has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:59,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:20:59,894 INFO L93 Difference]: Finished difference Result 1580 states and 2344 transitions. [2024-12-01 13:20:59,894 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:20:59,894 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 220 [2024-12-01 13:20:59,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:20:59,897 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:20:59,897 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:20:59,898 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:20:59,898 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2385 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 316 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2388 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 317 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 316 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-01 13:20:59,898 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2388 Valid, 2270 Invalid, 317 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 316 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-01 13:20:59,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:20:59,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:20:59,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4850230414746544) internal successors, (1289), 868 states have internal predecessors, (1289), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:20:59,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1295 transitions. [2024-12-01 13:20:59,913 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1295 transitions. Word has length 220 [2024-12-01 13:20:59,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:20:59,913 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1295 transitions. [2024-12-01 13:20:59,914 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:20:59,914 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1295 transitions. [2024-12-01 13:20:59,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2024-12-01 13:20:59,915 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:20:59,915 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:20:59,916 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-01 13:20:59,916 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:20:59,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:20:59,916 INFO L85 PathProgramCache]: Analyzing trace with hash 626929823, now seen corresponding path program 1 times [2024-12-01 13:20:59,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:20:59,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268257812] [2024-12-01 13:20:59,916 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:20:59,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:00,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:00,239 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:00,239 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:00,239 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268257812] [2024-12-01 13:21:00,239 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1268257812] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:00,239 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:00,239 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:00,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122844671] [2024-12-01 13:21:00,239 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:00,240 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:00,240 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:00,241 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:00,241 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:00,241 INFO L87 Difference]: Start difference. First operand 873 states and 1295 transitions. Second operand has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:00,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:00,532 INFO L93 Difference]: Finished difference Result 1580 states and 2342 transitions. [2024-12-01 13:21:00,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:00,532 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 221 [2024-12-01 13:21:00,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:00,534 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:00,534 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:00,535 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:00,536 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1267 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1270 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:00,536 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1270 Valid, 2277 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-01 13:21:00,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:00,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:00,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4838709677419355) internal successors, (1288), 868 states have internal predecessors, (1288), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:00,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1294 transitions. [2024-12-01 13:21:00,548 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1294 transitions. Word has length 221 [2024-12-01 13:21:00,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:00,548 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1294 transitions. [2024-12-01 13:21:00,548 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:00,548 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1294 transitions. [2024-12-01 13:21:00,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-01 13:21:00,549 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:00,549 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:00,549 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-01 13:21:00,549 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:00,550 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:00,550 INFO L85 PathProgramCache]: Analyzing trace with hash 1873772799, now seen corresponding path program 1 times [2024-12-01 13:21:00,550 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:00,550 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844551969] [2024-12-01 13:21:00,550 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:00,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:00,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:00,857 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:00,857 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:00,857 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844551969] [2024-12-01 13:21:00,857 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844551969] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:00,857 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:00,857 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:00,857 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178150087] [2024-12-01 13:21:00,857 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:00,858 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:00,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:00,858 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:00,858 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:00,859 INFO L87 Difference]: Start difference. First operand 873 states and 1294 transitions. Second operand has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:01,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:01,142 INFO L93 Difference]: Finished difference Result 1580 states and 2340 transitions. [2024-12-01 13:21:01,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:01,143 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 222 [2024-12-01 13:21:01,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:01,146 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:01,146 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:01,147 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:01,148 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1263 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1266 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:01,148 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1266 Valid, 2277 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-01 13:21:01,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:01,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:01,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4827188940092166) internal successors, (1287), 868 states have internal predecessors, (1287), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:01,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1293 transitions. [2024-12-01 13:21:01,165 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1293 transitions. Word has length 222 [2024-12-01 13:21:01,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:01,165 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1293 transitions. [2024-12-01 13:21:01,165 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:01,165 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1293 transitions. [2024-12-01 13:21:01,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2024-12-01 13:21:01,167 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:01,167 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:01,167 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-01 13:21:01,167 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:01,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:01,167 INFO L85 PathProgramCache]: Analyzing trace with hash -241337064, now seen corresponding path program 1 times [2024-12-01 13:21:01,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:01,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [801153915] [2024-12-01 13:21:01,168 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:01,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:01,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:01,723 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:01,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:01,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [801153915] [2024-12-01 13:21:01,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [801153915] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:01,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:01,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:01,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [550553729] [2024-12-01 13:21:01,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:01,724 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:01,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:01,724 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:01,724 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:01,724 INFO L87 Difference]: Start difference. First operand 873 states and 1293 transitions. Second operand has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:02,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:02,001 INFO L93 Difference]: Finished difference Result 1580 states and 2338 transitions. [2024-12-01 13:21:02,001 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:02,002 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 223 [2024-12-01 13:21:02,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:02,004 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:02,004 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:02,005 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:02,006 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2361 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 310 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2364 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 310 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:02,006 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2364 Valid, 2270 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 310 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:02,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:02,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:02,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4815668202764978) internal successors, (1286), 868 states have internal predecessors, (1286), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:02,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1292 transitions. [2024-12-01 13:21:02,016 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1292 transitions. Word has length 223 [2024-12-01 13:21:02,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:02,016 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1292 transitions. [2024-12-01 13:21:02,016 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:02,017 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1292 transitions. [2024-12-01 13:21:02,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-01 13:21:02,018 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:02,018 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:02,018 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-01 13:21:02,018 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:02,018 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:02,018 INFO L85 PathProgramCache]: Analyzing trace with hash -962851112, now seen corresponding path program 1 times [2024-12-01 13:21:02,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:02,018 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288838797] [2024-12-01 13:21:02,018 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:02,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:02,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:02,314 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:02,314 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:02,314 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [288838797] [2024-12-01 13:21:02,314 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [288838797] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:02,315 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:02,315 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:02,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1796050275] [2024-12-01 13:21:02,315 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:02,315 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:02,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:02,316 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:02,316 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:02,316 INFO L87 Difference]: Start difference. First operand 873 states and 1292 transitions. Second operand has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:02,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:02,623 INFO L93 Difference]: Finished difference Result 1580 states and 2336 transitions. [2024-12-01 13:21:02,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:02,624 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 224 [2024-12-01 13:21:02,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:02,626 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:02,626 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:02,626 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:02,627 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1255 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 308 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1258 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 308 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:02,627 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1258 Valid, 2277 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 308 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-01 13:21:02,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:02,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:02,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4804147465437787) internal successors, (1285), 868 states have internal predecessors, (1285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:02,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1291 transitions. [2024-12-01 13:21:02,638 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1291 transitions. Word has length 224 [2024-12-01 13:21:02,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:02,639 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1291 transitions. [2024-12-01 13:21:02,639 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:02,639 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1291 transitions. [2024-12-01 13:21:02,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2024-12-01 13:21:02,640 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:02,641 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:02,641 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-01 13:21:02,641 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:02,641 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:02,641 INFO L85 PathProgramCache]: Analyzing trace with hash -308143599, now seen corresponding path program 1 times [2024-12-01 13:21:02,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:02,642 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811291759] [2024-12-01 13:21:02,642 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:02,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:02,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:02,944 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:02,945 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:02,945 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811291759] [2024-12-01 13:21:02,945 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [811291759] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:02,945 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:02,945 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:02,945 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151881557] [2024-12-01 13:21:02,945 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:02,945 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:02,946 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:02,946 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:02,946 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:02,946 INFO L87 Difference]: Start difference. First operand 873 states and 1291 transitions. Second operand has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:03,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:03,190 INFO L93 Difference]: Finished difference Result 1580 states and 2334 transitions. [2024-12-01 13:21:03,191 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:03,191 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 225 [2024-12-01 13:21:03,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:03,194 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:03,194 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:03,195 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:03,195 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2345 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 306 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2348 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 307 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:03,195 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2348 Valid, 2270 Invalid, 307 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 306 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:03,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:03,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:03,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4792626728110598) internal successors, (1284), 868 states have internal predecessors, (1284), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:03,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1290 transitions. [2024-12-01 13:21:03,211 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1290 transitions. Word has length 225 [2024-12-01 13:21:03,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:03,211 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1290 transitions. [2024-12-01 13:21:03,211 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:03,211 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1290 transitions. [2024-12-01 13:21:03,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2024-12-01 13:21:03,213 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:03,213 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:03,213 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-01 13:21:03,213 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:03,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:03,214 INFO L85 PathProgramCache]: Analyzing trace with hash 816235825, now seen corresponding path program 1 times [2024-12-01 13:21:03,214 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:03,214 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011796091] [2024-12-01 13:21:03,214 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:03,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:03,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:03,655 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:03,655 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:03,655 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1011796091] [2024-12-01 13:21:03,655 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1011796091] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:03,655 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:03,655 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:03,655 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117104150] [2024-12-01 13:21:03,656 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:03,656 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:03,656 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:03,656 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:03,656 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:03,657 INFO L87 Difference]: Start difference. First operand 873 states and 1290 transitions. Second operand has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:03,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:03,899 INFO L93 Difference]: Finished difference Result 1580 states and 2332 transitions. [2024-12-01 13:21:03,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:03,900 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 226 [2024-12-01 13:21:03,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:03,901 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:03,901 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:03,902 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:03,902 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2337 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2340 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 305 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:03,902 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2340 Valid, 2270 Invalid, 305 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:03,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:03,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:03,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.478110599078341) internal successors, (1283), 868 states have internal predecessors, (1283), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:03,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1289 transitions. [2024-12-01 13:21:03,917 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1289 transitions. Word has length 226 [2024-12-01 13:21:03,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:03,917 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1289 transitions. [2024-12-01 13:21:03,918 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:03,918 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1289 transitions. [2024-12-01 13:21:03,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-12-01 13:21:03,919 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:03,919 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:03,919 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-01 13:21:03,920 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:03,920 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:03,920 INFO L85 PathProgramCache]: Analyzing trace with hash 1707952010, now seen corresponding path program 1 times [2024-12-01 13:21:03,920 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:03,920 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328541922] [2024-12-01 13:21:03,920 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:03,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:04,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:04,293 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:04,293 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:04,293 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1328541922] [2024-12-01 13:21:04,293 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1328541922] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:04,293 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:04,293 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:04,293 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [477797840] [2024-12-01 13:21:04,293 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:04,294 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:04,294 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:04,294 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:04,294 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:04,294 INFO L87 Difference]: Start difference. First operand 873 states and 1289 transitions. Second operand has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:04,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:04,501 INFO L93 Difference]: Finished difference Result 1580 states and 2330 transitions. [2024-12-01 13:21:04,502 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:04,502 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 227 [2024-12-01 13:21:04,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:04,504 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:04,504 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:04,504 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:04,505 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1243 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1246 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 303 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:04,505 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1246 Valid, 2277 Invalid, 303 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:04,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:04,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:04,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.476958525345622) internal successors, (1282), 868 states have internal predecessors, (1282), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:04,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1288 transitions. [2024-12-01 13:21:04,514 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1288 transitions. Word has length 227 [2024-12-01 13:21:04,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:04,514 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1288 transitions. [2024-12-01 13:21:04,514 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:04,514 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1288 transitions. [2024-12-01 13:21:04,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-12-01 13:21:04,515 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:04,515 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:04,515 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-12-01 13:21:04,515 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:04,516 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:04,516 INFO L85 PathProgramCache]: Analyzing trace with hash -860691446, now seen corresponding path program 1 times [2024-12-01 13:21:04,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:04,516 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034232388] [2024-12-01 13:21:04,516 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:04,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:04,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:04,829 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:04,829 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:04,829 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034232388] [2024-12-01 13:21:04,829 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034232388] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:04,829 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:04,830 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:04,830 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376854963] [2024-12-01 13:21:04,830 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:04,830 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:04,830 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:04,831 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:04,831 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:04,831 INFO L87 Difference]: Start difference. First operand 873 states and 1288 transitions. Second operand has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:05,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:05,064 INFO L93 Difference]: Finished difference Result 1580 states and 2328 transitions. [2024-12-01 13:21:05,065 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:05,065 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 228 [2024-12-01 13:21:05,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:05,067 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:05,067 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:05,067 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:05,068 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1239 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 300 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1242 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 301 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 300 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:05,068 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1242 Valid, 2277 Invalid, 301 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 300 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:05,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:05,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:05,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4758064516129032) internal successors, (1281), 868 states have internal predecessors, (1281), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:05,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1287 transitions. [2024-12-01 13:21:05,078 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1287 transitions. Word has length 228 [2024-12-01 13:21:05,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:05,079 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1287 transitions. [2024-12-01 13:21:05,079 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:05,079 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1287 transitions. [2024-12-01 13:21:05,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2024-12-01 13:21:05,080 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:05,080 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:05,080 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-01 13:21:05,080 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:05,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:05,081 INFO L85 PathProgramCache]: Analyzing trace with hash 333464963, now seen corresponding path program 1 times [2024-12-01 13:21:05,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:05,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1274798754] [2024-12-01 13:21:05,081 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:05,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:05,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:05,371 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:05,371 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:05,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1274798754] [2024-12-01 13:21:05,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1274798754] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:05,371 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:05,371 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:05,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1187157935] [2024-12-01 13:21:05,371 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:05,372 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:05,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:05,372 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:05,372 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:05,372 INFO L87 Difference]: Start difference. First operand 873 states and 1287 transitions. Second operand has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:05,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:05,575 INFO L93 Difference]: Finished difference Result 1580 states and 2326 transitions. [2024-12-01 13:21:05,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:05,576 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 229 [2024-12-01 13:21:05,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:05,578 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:05,578 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:05,579 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:05,580 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1235 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 298 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1238 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 299 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 298 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:05,580 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1238 Valid, 2277 Invalid, 299 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 298 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:05,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:05,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:05,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4746543778801844) internal successors, (1280), 868 states have internal predecessors, (1280), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:05,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1286 transitions. [2024-12-01 13:21:05,590 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1286 transitions. Word has length 229 [2024-12-01 13:21:05,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:05,590 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1286 transitions. [2024-12-01 13:21:05,590 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:05,590 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1286 transitions. [2024-12-01 13:21:05,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-12-01 13:21:05,592 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:05,592 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:05,592 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-01 13:21:05,592 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:05,592 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:05,593 INFO L85 PathProgramCache]: Analyzing trace with hash -92034205, now seen corresponding path program 1 times [2024-12-01 13:21:05,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:05,593 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608424139] [2024-12-01 13:21:05,593 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:05,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:05,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:06,063 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:06,063 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:06,064 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608424139] [2024-12-01 13:21:06,064 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1608424139] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:06,064 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:06,064 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:06,064 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985750622] [2024-12-01 13:21:06,064 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:06,064 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:06,064 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:06,065 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:06,065 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:06,065 INFO L87 Difference]: Start difference. First operand 873 states and 1286 transitions. Second operand has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:06,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:06,303 INFO L93 Difference]: Finished difference Result 1580 states and 2324 transitions. [2024-12-01 13:21:06,303 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:06,303 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 230 [2024-12-01 13:21:06,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:06,305 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:06,305 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:06,306 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:06,306 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2305 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 296 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2308 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 297 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 296 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:06,306 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2308 Valid, 2270 Invalid, 297 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 296 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:06,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:06,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:06,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4735023041474655) internal successors, (1279), 868 states have internal predecessors, (1279), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:06,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1285 transitions. [2024-12-01 13:21:06,318 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1285 transitions. Word has length 230 [2024-12-01 13:21:06,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:06,318 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1285 transitions. [2024-12-01 13:21:06,318 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:06,318 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1285 transitions. [2024-12-01 13:21:06,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2024-12-01 13:21:06,320 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:06,320 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:06,320 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-01 13:21:06,320 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:06,321 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:06,321 INFO L85 PathProgramCache]: Analyzing trace with hash 519853052, now seen corresponding path program 1 times [2024-12-01 13:21:06,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:06,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468092629] [2024-12-01 13:21:06,321 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:06,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:06,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:06,640 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:06,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:06,640 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1468092629] [2024-12-01 13:21:06,640 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1468092629] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:06,640 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:06,640 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:06,640 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [731413703] [2024-12-01 13:21:06,640 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:06,641 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:06,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:06,641 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:06,641 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:06,641 INFO L87 Difference]: Start difference. First operand 873 states and 1285 transitions. Second operand has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:06,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:06,837 INFO L93 Difference]: Finished difference Result 1580 states and 2322 transitions. [2024-12-01 13:21:06,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:06,838 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 231 [2024-12-01 13:21:06,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:06,839 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:06,839 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:06,840 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:06,840 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1227 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 294 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1230 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 295 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 294 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:06,840 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1230 Valid, 2277 Invalid, 295 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 294 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:06,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:06,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:06,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4723502304147464) internal successors, (1278), 868 states have internal predecessors, (1278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:06,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1284 transitions. [2024-12-01 13:21:06,852 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1284 transitions. Word has length 231 [2024-12-01 13:21:06,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:06,853 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1284 transitions. [2024-12-01 13:21:06,853 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:06,853 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1284 transitions. [2024-12-01 13:21:06,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-12-01 13:21:06,854 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:06,854 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:06,854 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-01 13:21:06,855 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:06,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:06,855 INFO L85 PathProgramCache]: Analyzing trace with hash 2059164476, now seen corresponding path program 1 times [2024-12-01 13:21:06,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:06,855 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833625705] [2024-12-01 13:21:06,855 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:06,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:06,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:07,259 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:07,259 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:07,259 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833625705] [2024-12-01 13:21:07,259 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1833625705] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:07,259 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:07,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:21:07,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [780564525] [2024-12-01 13:21:07,259 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:07,259 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:21:07,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:07,260 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:21:07,260 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:21:07,260 INFO L87 Difference]: Start difference. First operand 873 states and 1284 transitions. Second operand has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:07,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:07,394 INFO L93 Difference]: Finished difference Result 1580 states and 2320 transitions. [2024-12-01 13:21:07,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:07,395 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 232 [2024-12-01 13:21:07,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:07,397 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:07,398 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:07,398 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:07,399 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1120 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1120 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:07,399 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1120 Valid, 2398 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:07,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:07,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:07,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4711981566820276) internal successors, (1277), 868 states have internal predecessors, (1277), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:07,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1283 transitions. [2024-12-01 13:21:07,414 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1283 transitions. Word has length 232 [2024-12-01 13:21:07,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:07,414 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1283 transitions. [2024-12-01 13:21:07,415 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:07,415 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1283 transitions. [2024-12-01 13:21:07,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2024-12-01 13:21:07,416 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:07,416 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:07,416 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-01 13:21:07,417 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:07,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:07,417 INFO L85 PathProgramCache]: Analyzing trace with hash 84533315, now seen corresponding path program 1 times [2024-12-01 13:21:07,417 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:07,417 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47103935] [2024-12-01 13:21:07,417 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:07,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:07,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:07,846 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:07,846 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:07,846 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47103935] [2024-12-01 13:21:07,846 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [47103935] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:07,846 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:07,846 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:07,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [312562870] [2024-12-01 13:21:07,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:07,847 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:07,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:07,847 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:07,847 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:07,848 INFO L87 Difference]: Start difference. First operand 873 states and 1283 transitions. Second operand has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:07,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:07,982 INFO L93 Difference]: Finished difference Result 1592 states and 2335 transitions. [2024-12-01 13:21:07,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-01 13:21:07,982 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 233 [2024-12-01 13:21:07,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:07,985 INFO L225 Difference]: With dead ends: 1592 [2024-12-01 13:21:07,985 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:07,986 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-01 13:21:07,987 INFO L435 NwaCegarLoop]: 1267 mSDtfsCounter, 1143 mSDsluCounter, 2469 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1143 SdHoareTripleChecker+Valid, 3736 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:07,987 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1143 Valid, 3736 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:07,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:07,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:07,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4700460829493087) internal successors, (1276), 868 states have internal predecessors, (1276), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:07,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1282 transitions. [2024-12-01 13:21:07,996 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1282 transitions. Word has length 233 [2024-12-01 13:21:07,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:07,996 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1282 transitions. [2024-12-01 13:21:07,996 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:07,997 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1282 transitions. [2024-12-01 13:21:07,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-12-01 13:21:07,998 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:07,998 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:07,998 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-01 13:21:07,998 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:07,999 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:07,999 INFO L85 PathProgramCache]: Analyzing trace with hash -1868539278, now seen corresponding path program 1 times [2024-12-01 13:21:07,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:07,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783465346] [2024-12-01 13:21:07,999 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:07,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:08,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:08,339 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:08,339 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:08,339 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1783465346] [2024-12-01 13:21:08,339 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1783465346] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:08,339 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:08,339 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:08,339 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263841165] [2024-12-01 13:21:08,339 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:08,340 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:08,340 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:08,340 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:08,340 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:08,340 INFO L87 Difference]: Start difference. First operand 873 states and 1282 transitions. Second operand has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:08,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:08,483 INFO L93 Difference]: Finished difference Result 1580 states and 2316 transitions. [2024-12-01 13:21:08,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:08,484 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 234 [2024-12-01 13:21:08,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:08,486 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:08,486 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:08,487 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:08,487 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1266 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1269 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:08,488 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1269 Valid, 2405 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:08,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:08,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:08,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4688940092165899) internal successors, (1275), 868 states have internal predecessors, (1275), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:08,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1281 transitions. [2024-12-01 13:21:08,497 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1281 transitions. Word has length 234 [2024-12-01 13:21:08,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:08,498 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1281 transitions. [2024-12-01 13:21:08,498 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:08,498 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1281 transitions. [2024-12-01 13:21:08,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2024-12-01 13:21:08,499 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:08,499 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:08,499 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-01 13:21:08,499 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:08,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:08,500 INFO L85 PathProgramCache]: Analyzing trace with hash -1766214646, now seen corresponding path program 1 times [2024-12-01 13:21:08,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:08,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413803885] [2024-12-01 13:21:08,500 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:08,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:08,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:08,814 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:08,815 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:08,815 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413803885] [2024-12-01 13:21:08,815 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1413803885] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:08,815 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:08,815 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:08,815 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610587379] [2024-12-01 13:21:08,815 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:08,815 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:08,815 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:08,816 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:08,816 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:08,816 INFO L87 Difference]: Start difference. First operand 873 states and 1281 transitions. Second operand has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:08,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:08,945 INFO L93 Difference]: Finished difference Result 1580 states and 2314 transitions. [2024-12-01 13:21:08,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:08,945 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 235 [2024-12-01 13:21:08,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:08,947 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:08,947 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:08,947 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:08,948 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2383 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2386 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:08,948 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2386 Valid, 2398 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:08,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:08,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:08,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.467741935483871) internal successors, (1274), 868 states have internal predecessors, (1274), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:08,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1280 transitions. [2024-12-01 13:21:08,956 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1280 transitions. Word has length 235 [2024-12-01 13:21:08,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:08,956 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1280 transitions. [2024-12-01 13:21:08,956 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:08,956 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1280 transitions. [2024-12-01 13:21:08,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2024-12-01 13:21:08,957 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:08,957 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:08,957 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-01 13:21:08,957 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:08,957 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:08,957 INFO L85 PathProgramCache]: Analyzing trace with hash 963930393, now seen corresponding path program 1 times [2024-12-01 13:21:08,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:08,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1559200314] [2024-12-01 13:21:08,957 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:08,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:09,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:09,245 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:09,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:09,246 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1559200314] [2024-12-01 13:21:09,246 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1559200314] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:09,246 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:09,246 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:09,246 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667446611] [2024-12-01 13:21:09,246 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:09,246 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:09,246 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:09,246 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:09,246 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:09,247 INFO L87 Difference]: Start difference. First operand 873 states and 1280 transitions. Second operand has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:09,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:09,365 INFO L93 Difference]: Finished difference Result 1580 states and 2312 transitions. [2024-12-01 13:21:09,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:09,365 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 236 [2024-12-01 13:21:09,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:09,367 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:09,367 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:09,367 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:09,368 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1258 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1261 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:09,368 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1261 Valid, 2405 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:09,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:09,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:09,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4665898617511521) internal successors, (1273), 868 states have internal predecessors, (1273), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:09,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1279 transitions. [2024-12-01 13:21:09,379 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1279 transitions. Word has length 236 [2024-12-01 13:21:09,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:09,379 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1279 transitions. [2024-12-01 13:21:09,379 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:09,379 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1279 transitions. [2024-12-01 13:21:09,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 238 [2024-12-01 13:21:09,380 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:09,380 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:09,380 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-01 13:21:09,381 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:09,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:09,381 INFO L85 PathProgramCache]: Analyzing trace with hash -1749422255, now seen corresponding path program 1 times [2024-12-01 13:21:09,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:09,381 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [837935880] [2024-12-01 13:21:09,381 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:09,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:09,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:09,687 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:09,687 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:09,687 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [837935880] [2024-12-01 13:21:09,687 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [837935880] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:09,687 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:09,687 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:09,687 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [346347902] [2024-12-01 13:21:09,687 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:09,688 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:09,688 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:09,688 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:09,688 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:09,688 INFO L87 Difference]: Start difference. First operand 873 states and 1279 transitions. Second operand has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:09,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:09,839 INFO L93 Difference]: Finished difference Result 1580 states and 2310 transitions. [2024-12-01 13:21:09,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:09,840 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 237 [2024-12-01 13:21:09,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:09,842 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:09,843 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:09,844 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:09,844 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2367 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2370 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:09,844 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2370 Valid, 2398 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:09,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:09,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:09,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4654377880184333) internal successors, (1272), 868 states have internal predecessors, (1272), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:09,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1278 transitions. [2024-12-01 13:21:09,864 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1278 transitions. Word has length 237 [2024-12-01 13:21:09,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:09,865 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1278 transitions. [2024-12-01 13:21:09,865 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:09,865 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1278 transitions. [2024-12-01 13:21:09,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-01 13:21:09,867 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:09,867 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:09,867 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-01 13:21:09,867 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:09,868 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:09,868 INFO L85 PathProgramCache]: Analyzing trace with hash 1080293184, now seen corresponding path program 1 times [2024-12-01 13:21:09,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:09,868 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [792420031] [2024-12-01 13:21:09,868 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:09,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:09,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:10,355 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:10,356 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:10,356 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [792420031] [2024-12-01 13:21:10,356 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [792420031] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:10,356 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:10,356 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:10,356 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309336368] [2024-12-01 13:21:10,356 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:10,356 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:10,356 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:10,357 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:10,357 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:10,357 INFO L87 Difference]: Start difference. First operand 873 states and 1278 transitions. Second operand has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:10,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:10,507 INFO L93 Difference]: Finished difference Result 1580 states and 2308 transitions. [2024-12-01 13:21:10,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:10,507 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 238 [2024-12-01 13:21:10,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:10,509 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:10,509 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:10,510 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:10,510 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2359 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2362 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:10,510 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2362 Valid, 2398 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:10,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:10,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:10,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4642857142857142) internal successors, (1271), 868 states have internal predecessors, (1271), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:10,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1277 transitions. [2024-12-01 13:21:10,518 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1277 transitions. Word has length 238 [2024-12-01 13:21:10,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:10,518 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1277 transitions. [2024-12-01 13:21:10,519 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:10,519 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1277 transitions. [2024-12-01 13:21:10,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2024-12-01 13:21:10,519 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:10,519 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:10,520 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-01 13:21:10,520 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:10,520 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:10,520 INFO L85 PathProgramCache]: Analyzing trace with hash 1254052376, now seen corresponding path program 1 times [2024-12-01 13:21:10,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:10,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1336179501] [2024-12-01 13:21:10,520 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:10,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:10,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:10,866 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:10,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:10,866 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1336179501] [2024-12-01 13:21:10,867 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1336179501] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:10,867 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:10,867 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:10,867 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799173115] [2024-12-01 13:21:10,867 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:10,867 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:10,867 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:10,868 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:10,868 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:10,868 INFO L87 Difference]: Start difference. First operand 873 states and 1277 transitions. Second operand has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:10,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:10,986 INFO L93 Difference]: Finished difference Result 1580 states and 2306 transitions. [2024-12-01 13:21:10,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:10,986 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 239 [2024-12-01 13:21:10,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:10,988 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:10,988 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:10,989 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:10,989 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1243 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1246 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:10,989 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1246 Valid, 2405 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:10,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:10,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:10,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4631336405529953) internal successors, (1270), 868 states have internal predecessors, (1270), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:10,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1276 transitions. [2024-12-01 13:21:10,997 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1276 transitions. Word has length 239 [2024-12-01 13:21:10,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:10,997 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1276 transitions. [2024-12-01 13:21:10,997 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:10,997 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1276 transitions. [2024-12-01 13:21:10,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2024-12-01 13:21:10,998 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:10,998 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:10,998 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-12-01 13:21:10,998 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:10,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:10,998 INFO L85 PathProgramCache]: Analyzing trace with hash -1194218592, now seen corresponding path program 1 times [2024-12-01 13:21:10,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:10,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446594886] [2024-12-01 13:21:10,998 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:10,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:11,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:11,412 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:11,413 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:11,413 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446594886] [2024-12-01 13:21:11,413 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [446594886] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:11,413 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:11,413 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:21:11,413 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [221755862] [2024-12-01 13:21:11,413 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:11,413 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:21:11,413 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:11,414 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:21:11,414 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:21:11,414 INFO L87 Difference]: Start difference. First operand 873 states and 1276 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:11,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:11,473 INFO L93 Difference]: Finished difference Result 1580 states and 2304 transitions. [2024-12-01 13:21:11,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:11,474 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 240 [2024-12-01 13:21:11,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:11,477 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:11,477 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:11,478 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:11,478 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 1135 mSDsluCounter, 1252 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1135 SdHoareTripleChecker+Valid, 2502 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:11,479 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1135 Valid, 2502 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:21:11,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:11,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:11,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4608294930875576) internal successors, (1268), 868 states have internal predecessors, (1268), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:11,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1274 transitions. [2024-12-01 13:21:11,494 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1274 transitions. Word has length 240 [2024-12-01 13:21:11,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:11,495 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1274 transitions. [2024-12-01 13:21:11,495 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:11,495 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1274 transitions. [2024-12-01 13:21:11,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2024-12-01 13:21:11,496 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:11,496 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:11,496 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-12-01 13:21:11,496 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:11,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:11,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1191452317, now seen corresponding path program 1 times [2024-12-01 13:21:11,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:11,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [381522614] [2024-12-01 13:21:11,497 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:11,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:11,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:11,970 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:11,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:11,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [381522614] [2024-12-01 13:21:11,971 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [381522614] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:11,971 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:11,971 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:11,971 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941013924] [2024-12-01 13:21:11,971 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:11,972 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:11,972 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:11,972 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:11,972 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:11,972 INFO L87 Difference]: Start difference. First operand 873 states and 1274 transitions. Second operand has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:12,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:12,034 INFO L93 Difference]: Finished difference Result 1580 states and 2300 transitions. [2024-12-01 13:21:12,035 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:12,035 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 242 [2024-12-01 13:21:12,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:12,038 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:12,038 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:12,039 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:12,039 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 1257 mSDsluCounter, 1259 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1260 SdHoareTripleChecker+Valid, 2509 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:12,039 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1260 Valid, 2509 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:21:12,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:12,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:12,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4596774193548387) internal successors, (1267), 868 states have internal predecessors, (1267), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:12,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1273 transitions. [2024-12-01 13:21:12,052 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1273 transitions. Word has length 242 [2024-12-01 13:21:12,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:12,052 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1273 transitions. [2024-12-01 13:21:12,052 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:12,052 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1273 transitions. [2024-12-01 13:21:12,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2024-12-01 13:21:12,053 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:12,053 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:12,053 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-12-01 13:21:12,053 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:12,053 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:12,053 INFO L85 PathProgramCache]: Analyzing trace with hash 864928727, now seen corresponding path program 1 times [2024-12-01 13:21:12,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:12,054 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873218811] [2024-12-01 13:21:12,054 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:12,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:12,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:12,713 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:12,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:12,713 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1873218811] [2024-12-01 13:21:12,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1873218811] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:12,713 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:12,713 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:21:12,713 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1515142598] [2024-12-01 13:21:12,713 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:12,714 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:21:12,714 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:12,714 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:21:12,714 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:21:12,715 INFO L87 Difference]: Start difference. First operand 873 states and 1273 transitions. Second operand has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:12,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:12,805 INFO L93 Difference]: Finished difference Result 1580 states and 2298 transitions. [2024-12-01 13:21:12,806 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:12,806 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 243 [2024-12-01 13:21:12,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:12,809 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:12,809 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:12,810 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:12,811 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1126 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1126 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:12,811 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1126 Valid, 2456 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:12,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:12,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:12,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4585253456221199) internal successors, (1266), 868 states have internal predecessors, (1266), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:12,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1272 transitions. [2024-12-01 13:21:12,831 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1272 transitions. Word has length 243 [2024-12-01 13:21:12,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:12,831 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1272 transitions. [2024-12-01 13:21:12,832 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:12,832 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1272 transitions. [2024-12-01 13:21:12,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-01 13:21:12,834 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:12,834 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:12,834 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-01 13:21:12,834 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:12,834 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:12,834 INFO L85 PathProgramCache]: Analyzing trace with hash 243720918, now seen corresponding path program 1 times [2024-12-01 13:21:12,835 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:12,835 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395696556] [2024-12-01 13:21:12,835 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:12,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:12,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:13,198 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:13,199 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:13,199 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395696556] [2024-12-01 13:21:13,199 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1395696556] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:13,199 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:13,199 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:13,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [575847631] [2024-12-01 13:21:13,199 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:13,199 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:13,199 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:13,200 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:13,200 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:13,200 INFO L87 Difference]: Start difference. First operand 873 states and 1272 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:13,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:13,293 INFO L93 Difference]: Finished difference Result 1580 states and 2296 transitions. [2024-12-01 13:21:13,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:13,293 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 244 [2024-12-01 13:21:13,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:13,295 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:13,295 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:13,296 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:13,296 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 2376 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2379 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:13,296 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2379 Valid, 2456 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:13,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:13,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:13,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.457373271889401) internal successors, (1265), 868 states have internal predecessors, (1265), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:13,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1271 transitions. [2024-12-01 13:21:13,308 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1271 transitions. Word has length 244 [2024-12-01 13:21:13,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:13,308 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1271 transitions. [2024-12-01 13:21:13,308 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:13,309 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1271 transitions. [2024-12-01 13:21:13,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2024-12-01 13:21:13,309 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:13,309 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:13,310 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-12-01 13:21:13,310 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:13,310 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:13,310 INFO L85 PathProgramCache]: Analyzing trace with hash -1180390672, now seen corresponding path program 1 times [2024-12-01 13:21:13,310 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:13,310 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1426814750] [2024-12-01 13:21:13,310 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:13,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:13,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:13,590 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:13,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:13,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1426814750] [2024-12-01 13:21:13,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1426814750] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:13,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:13,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:13,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872204360] [2024-12-01 13:21:13,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:13,591 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:13,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:13,592 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:13,592 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:13,592 INFO L87 Difference]: Start difference. First operand 873 states and 1271 transitions. Second operand has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:13,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:13,687 INFO L93 Difference]: Finished difference Result 1580 states and 2294 transitions. [2024-12-01 13:21:13,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:13,688 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 245 [2024-12-01 13:21:13,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:13,689 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:13,689 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:13,690 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:13,690 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 2368 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2371 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:13,690 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2371 Valid, 2456 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:13,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:13,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:13,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.456221198156682) internal successors, (1264), 868 states have internal predecessors, (1264), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:13,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1270 transitions. [2024-12-01 13:21:13,698 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1270 transitions. Word has length 245 [2024-12-01 13:21:13,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:13,698 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1270 transitions. [2024-12-01 13:21:13,698 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:13,698 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1270 transitions. [2024-12-01 13:21:13,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2024-12-01 13:21:13,699 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:13,699 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:13,699 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-12-01 13:21:13,699 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:13,699 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:13,700 INFO L85 PathProgramCache]: Analyzing trace with hash 1988978575, now seen corresponding path program 1 times [2024-12-01 13:21:13,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:13,700 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [216410368] [2024-12-01 13:21:13,700 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:13,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:13,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:14,001 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:14,001 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:14,002 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [216410368] [2024-12-01 13:21:14,002 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [216410368] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:14,002 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:14,002 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:14,002 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [844131801] [2024-12-01 13:21:14,002 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:14,002 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:14,002 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:14,003 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:14,003 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:14,003 INFO L87 Difference]: Start difference. First operand 873 states and 1270 transitions. Second operand has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:14,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:14,082 INFO L93 Difference]: Finished difference Result 1580 states and 2292 transitions. [2024-12-01 13:21:14,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:14,082 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 246 [2024-12-01 13:21:14,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:14,084 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:14,084 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:14,084 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:14,085 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1248 mSDsluCounter, 1236 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1251 SdHoareTripleChecker+Valid, 2463 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:14,085 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1251 Valid, 2463 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:14,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:14,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:14,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.455069124423963) internal successors, (1263), 868 states have internal predecessors, (1263), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:14,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1269 transitions. [2024-12-01 13:21:14,094 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1269 transitions. Word has length 246 [2024-12-01 13:21:14,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:14,094 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1269 transitions. [2024-12-01 13:21:14,094 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:14,094 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1269 transitions. [2024-12-01 13:21:14,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2024-12-01 13:21:14,095 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:14,095 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:14,095 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-12-01 13:21:14,095 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:14,095 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:14,095 INFO L85 PathProgramCache]: Analyzing trace with hash -180499831, now seen corresponding path program 1 times [2024-12-01 13:21:14,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:14,095 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1644001016] [2024-12-01 13:21:14,095 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:14,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:14,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:14,546 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:14,546 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:14,546 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1644001016] [2024-12-01 13:21:14,546 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1644001016] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:14,546 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:14,546 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:21:14,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983436394] [2024-12-01 13:21:14,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:14,547 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:21:14,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:14,547 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:21:14,547 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:21:14,548 INFO L87 Difference]: Start difference. First operand 873 states and 1269 transitions. Second operand has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-01 13:21:14,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:14,601 INFO L93 Difference]: Finished difference Result 1580 states and 2290 transitions. [2024-12-01 13:21:14,601 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:14,601 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 247 [2024-12-01 13:21:14,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:14,603 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:14,603 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:14,603 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:14,604 INFO L435 NwaCegarLoop]: 1249 mSDtfsCounter, 1165 mSDsluCounter, 1251 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1167 SdHoareTripleChecker+Valid, 2500 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:14,604 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1167 Valid, 2500 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:21:14,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:14,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:14,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4527649769585254) internal successors, (1261), 868 states have internal predecessors, (1261), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:14,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1267 transitions. [2024-12-01 13:21:14,613 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1267 transitions. Word has length 247 [2024-12-01 13:21:14,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:14,613 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1267 transitions. [2024-12-01 13:21:14,613 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-01 13:21:14,613 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1267 transitions. [2024-12-01 13:21:14,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 250 [2024-12-01 13:21:14,614 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:14,614 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:14,615 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-12-01 13:21:14,615 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:14,615 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:14,615 INFO L85 PathProgramCache]: Analyzing trace with hash -594336282, now seen corresponding path program 1 times [2024-12-01 13:21:14,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:14,615 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1964159478] [2024-12-01 13:21:14,615 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:14,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:15,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:15,511 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:15,511 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:15,512 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1964159478] [2024-12-01 13:21:15,512 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1964159478] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:15,512 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:15,512 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:15,512 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [83938619] [2024-12-01 13:21:15,512 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:15,512 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:15,512 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:15,513 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:15,513 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:15,513 INFO L87 Difference]: Start difference. First operand 873 states and 1267 transitions. Second operand has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:15,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:15,631 INFO L93 Difference]: Finished difference Result 1580 states and 2286 transitions. [2024-12-01 13:21:15,632 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:15,632 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 249 [2024-12-01 13:21:15,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:15,633 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:15,633 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:15,634 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:15,634 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1118 mSDsluCounter, 2447 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1118 SdHoareTripleChecker+Valid, 3672 SdHoareTripleChecker+Invalid, 115 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:15,634 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1118 Valid, 3672 Invalid, 115 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 115 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:15,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:15,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:15,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4516129032258065) internal successors, (1260), 868 states have internal predecessors, (1260), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:15,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1266 transitions. [2024-12-01 13:21:15,643 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1266 transitions. Word has length 249 [2024-12-01 13:21:15,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:15,644 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1266 transitions. [2024-12-01 13:21:15,644 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:15,644 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1266 transitions. [2024-12-01 13:21:15,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 251 [2024-12-01 13:21:15,644 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:15,645 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:15,645 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-12-01 13:21:15,645 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:15,645 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:15,645 INFO L85 PathProgramCache]: Analyzing trace with hash -592829682, now seen corresponding path program 1 times [2024-12-01 13:21:15,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:15,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839040100] [2024-12-01 13:21:15,645 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:15,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:16,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:16,302 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:16,303 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:16,303 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1839040100] [2024-12-01 13:21:16,303 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1839040100] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:16,303 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:16,303 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:16,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1161462070] [2024-12-01 13:21:16,303 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:16,303 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:16,303 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:16,304 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:16,304 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:16,304 INFO L87 Difference]: Start difference. First operand 873 states and 1266 transitions. Second operand has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:16,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:16,422 INFO L93 Difference]: Finished difference Result 1580 states and 2284 transitions. [2024-12-01 13:21:16,422 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:16,422 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 250 [2024-12-01 13:21:16,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:16,424 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:16,424 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:16,425 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:16,426 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 2226 mSDsluCounter, 1227 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2226 SdHoareTripleChecker+Valid, 2452 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:16,426 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2226 Valid, 2452 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:16,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:16,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:16,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4504608294930876) internal successors, (1259), 868 states have internal predecessors, (1259), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:16,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1265 transitions. [2024-12-01 13:21:16,441 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1265 transitions. Word has length 250 [2024-12-01 13:21:16,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:16,441 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1265 transitions. [2024-12-01 13:21:16,441 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:16,441 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1265 transitions. [2024-12-01 13:21:16,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2024-12-01 13:21:16,442 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:16,443 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:16,443 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-12-01 13:21:16,443 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:16,443 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:16,443 INFO L85 PathProgramCache]: Analyzing trace with hash -142001561, now seen corresponding path program 1 times [2024-12-01 13:21:16,443 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:16,443 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1994163848] [2024-12-01 13:21:16,443 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:16,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:16,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:16,944 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:16,944 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:16,944 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1994163848] [2024-12-01 13:21:16,944 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1994163848] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:16,944 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:16,944 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:16,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1085514542] [2024-12-01 13:21:16,944 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:16,945 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:16,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:16,945 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:16,945 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:16,945 INFO L87 Difference]: Start difference. First operand 873 states and 1265 transitions. Second operand has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:17,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:17,062 INFO L93 Difference]: Finished difference Result 1580 states and 2282 transitions. [2024-12-01 13:21:17,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:17,062 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 251 [2024-12-01 13:21:17,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:17,063 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:17,064 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:17,064 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:17,065 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1114 mSDsluCounter, 1234 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1114 SdHoareTripleChecker+Valid, 2459 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:17,065 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1114 Valid, 2459 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:17,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:17,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:17,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4493087557603688) internal successors, (1258), 868 states have internal predecessors, (1258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:17,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1264 transitions. [2024-12-01 13:21:17,078 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1264 transitions. Word has length 251 [2024-12-01 13:21:17,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:17,078 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1264 transitions. [2024-12-01 13:21:17,079 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:17,079 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1264 transitions. [2024-12-01 13:21:17,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2024-12-01 13:21:17,080 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:17,080 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:17,080 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-12-01 13:21:17,080 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:17,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:17,081 INFO L85 PathProgramCache]: Analyzing trace with hash 488879693, now seen corresponding path program 1 times [2024-12-01 13:21:17,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:17,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103350299] [2024-12-01 13:21:17,081 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:17,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:17,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:17,588 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:17,588 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:17,588 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103350299] [2024-12-01 13:21:17,589 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1103350299] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:17,589 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:17,589 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:17,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [48930069] [2024-12-01 13:21:17,589 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:17,589 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:17,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:17,590 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:17,590 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:17,590 INFO L87 Difference]: Start difference. First operand 873 states and 1264 transitions. Second operand has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:17,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:17,797 INFO L93 Difference]: Finished difference Result 1580 states and 2280 transitions. [2024-12-01 13:21:17,798 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:17,798 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 252 [2024-12-01 13:21:17,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:17,800 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:17,800 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:17,801 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:17,802 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1100 mSDsluCounter, 2369 mSDsCounter, 0 mSdLazyCounter, 223 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1100 SdHoareTripleChecker+Valid, 3555 SdHoareTripleChecker+Invalid, 223 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 223 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:17,802 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1100 Valid, 3555 Invalid, 223 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 223 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:17,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:17,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:17,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4481566820276497) internal successors, (1257), 868 states have internal predecessors, (1257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:17,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1263 transitions. [2024-12-01 13:21:17,817 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1263 transitions. Word has length 252 [2024-12-01 13:21:17,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:17,818 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1263 transitions. [2024-12-01 13:21:17,818 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:17,818 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1263 transitions. [2024-12-01 13:21:17,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 254 [2024-12-01 13:21:17,819 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:17,819 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:17,819 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-12-01 13:21:17,819 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:17,820 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:17,820 INFO L85 PathProgramCache]: Analyzing trace with hash -1768421689, now seen corresponding path program 1 times [2024-12-01 13:21:17,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:17,820 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378014265] [2024-12-01 13:21:17,820 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:17,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:18,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:18,340 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:18,340 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:18,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378014265] [2024-12-01 13:21:18,340 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [378014265] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:18,340 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:18,340 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:18,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1810939018] [2024-12-01 13:21:18,340 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:18,341 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:18,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:18,341 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:18,341 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:18,341 INFO L87 Difference]: Start difference. First operand 873 states and 1263 transitions. Second operand has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:18,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:18,503 INFO L93 Difference]: Finished difference Result 1580 states and 2278 transitions. [2024-12-01 13:21:18,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:18,504 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 253 [2024-12-01 13:21:18,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:18,505 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:18,505 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:18,506 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:18,506 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1097 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1097 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:18,506 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1097 Valid, 2381 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:18,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:18,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:18,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4470046082949308) internal successors, (1256), 868 states have internal predecessors, (1256), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:18,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1262 transitions. [2024-12-01 13:21:18,519 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1262 transitions. Word has length 253 [2024-12-01 13:21:18,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:18,519 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1262 transitions. [2024-12-01 13:21:18,519 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:18,519 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1262 transitions. [2024-12-01 13:21:18,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2024-12-01 13:21:18,520 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:18,521 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:18,521 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-12-01 13:21:18,521 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:18,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:18,521 INFO L85 PathProgramCache]: Analyzing trace with hash -262754674, now seen corresponding path program 1 times [2024-12-01 13:21:18,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:18,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [520186669] [2024-12-01 13:21:18,521 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:18,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:18,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:19,183 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:19,183 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:19,183 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [520186669] [2024-12-01 13:21:19,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [520186669] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:19,184 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:19,184 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:19,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1588886961] [2024-12-01 13:21:19,184 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:19,184 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:19,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:19,185 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:19,185 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:19,185 INFO L87 Difference]: Start difference. First operand 873 states and 1262 transitions. Second operand has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:19,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:19,343 INFO L93 Difference]: Finished difference Result 1580 states and 2276 transitions. [2024-12-01 13:21:19,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:19,344 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 254 [2024-12-01 13:21:19,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:19,346 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:19,346 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:19,346 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:19,347 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1096 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1096 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:19,347 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1096 Valid, 2381 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:19,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:19,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:19,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.445852534562212) internal successors, (1255), 868 states have internal predecessors, (1255), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:19,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1261 transitions. [2024-12-01 13:21:19,361 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1261 transitions. Word has length 254 [2024-12-01 13:21:19,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:19,361 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1261 transitions. [2024-12-01 13:21:19,362 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:19,362 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1261 transitions. [2024-12-01 13:21:19,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 256 [2024-12-01 13:21:19,363 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:19,363 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:19,363 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-12-01 13:21:19,363 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:19,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:19,364 INFO L85 PathProgramCache]: Analyzing trace with hash 1822400070, now seen corresponding path program 1 times [2024-12-01 13:21:19,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:19,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835404385] [2024-12-01 13:21:19,364 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:19,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:19,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:19,870 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:19,870 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:19,870 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [835404385] [2024-12-01 13:21:19,870 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [835404385] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:19,870 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:19,870 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:19,870 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [809417869] [2024-12-01 13:21:19,870 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:19,870 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:19,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:19,871 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:19,871 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:19,871 INFO L87 Difference]: Start difference. First operand 873 states and 1261 transitions. Second operand has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:20,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:20,015 INFO L93 Difference]: Finished difference Result 1580 states and 2274 transitions. [2024-12-01 13:21:20,015 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:20,016 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 255 [2024-12-01 13:21:20,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:20,018 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:20,018 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:20,019 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:20,019 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2178 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2178 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:20,019 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2178 Valid, 2374 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:20,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:20,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:20,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.444700460829493) internal successors, (1254), 868 states have internal predecessors, (1254), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:20,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1260 transitions. [2024-12-01 13:21:20,032 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1260 transitions. Word has length 255 [2024-12-01 13:21:20,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:20,032 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1260 transitions. [2024-12-01 13:21:20,032 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:20,032 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1260 transitions. [2024-12-01 13:21:20,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 257 [2024-12-01 13:21:20,033 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:20,033 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:20,033 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-12-01 13:21:20,033 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:20,034 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:20,034 INFO L85 PathProgramCache]: Analyzing trace with hash -449010865, now seen corresponding path program 1 times [2024-12-01 13:21:20,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:20,034 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [692861784] [2024-12-01 13:21:20,034 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:20,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:20,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:20,543 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:20,543 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:20,543 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [692861784] [2024-12-01 13:21:20,543 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [692861784] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:20,543 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:20,543 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:21:20,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2093248989] [2024-12-01 13:21:20,543 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:20,544 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:21:20,544 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:20,544 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:21:20,544 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:21:20,544 INFO L87 Difference]: Start difference. First operand 873 states and 1260 transitions. Second operand has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:20,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:20,650 INFO L93 Difference]: Finished difference Result 1580 states and 2272 transitions. [2024-12-01 13:21:20,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:20,651 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 256 [2024-12-01 13:21:20,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:20,652 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:20,652 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:20,653 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:20,653 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1079 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1079 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:20,654 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1079 Valid, 2374 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:20,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:20,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:20,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4435483870967742) internal successors, (1253), 868 states have internal predecessors, (1253), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:20,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1259 transitions. [2024-12-01 13:21:20,663 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1259 transitions. Word has length 256 [2024-12-01 13:21:20,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:20,663 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1259 transitions. [2024-12-01 13:21:20,663 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:20,663 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1259 transitions. [2024-12-01 13:21:20,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 258 [2024-12-01 13:21:20,664 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:20,664 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:20,664 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-12-01 13:21:20,664 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:20,664 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:20,665 INFO L85 PathProgramCache]: Analyzing trace with hash 1710883141, now seen corresponding path program 1 times [2024-12-01 13:21:20,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:20,665 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966803138] [2024-12-01 13:21:20,665 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:20,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:20,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:21,177 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:21,177 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:21,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966803138] [2024-12-01 13:21:21,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1966803138] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:21,178 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:21,178 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:21,178 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870721035] [2024-12-01 13:21:21,178 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:21,178 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:21,178 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:21,179 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:21,179 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:21,179 INFO L87 Difference]: Start difference. First operand 873 states and 1259 transitions. Second operand has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:21,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:21,309 INFO L93 Difference]: Finished difference Result 1580 states and 2270 transitions. [2024-12-01 13:21:21,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:21,310 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 257 [2024-12-01 13:21:21,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:21,311 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:21,311 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:21,312 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:21,312 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1093 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1093 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:21,312 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1093 Valid, 2381 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:21,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:21,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:21,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4423963133640554) internal successors, (1252), 868 states have internal predecessors, (1252), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:21,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1258 transitions. [2024-12-01 13:21:21,325 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1258 transitions. Word has length 257 [2024-12-01 13:21:21,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:21,325 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1258 transitions. [2024-12-01 13:21:21,325 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:21,325 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1258 transitions. [2024-12-01 13:21:21,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 259 [2024-12-01 13:21:21,326 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:21,327 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:21,327 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-01 13:21:21,327 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:21,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:21,327 INFO L85 PathProgramCache]: Analyzing trace with hash 1726874768, now seen corresponding path program 1 times [2024-12-01 13:21:21,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:21,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [442513226] [2024-12-01 13:21:21,328 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:21,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:21,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:21,785 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:21,786 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:21,786 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [442513226] [2024-12-01 13:21:21,786 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [442513226] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:21,786 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:21,786 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:21,786 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431769341] [2024-12-01 13:21:21,786 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:21,786 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:21,786 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:21,787 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:21,787 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:21,787 INFO L87 Difference]: Start difference. First operand 873 states and 1258 transitions. Second operand has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:21,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:21,935 INFO L93 Difference]: Finished difference Result 1580 states and 2268 transitions. [2024-12-01 13:21:21,935 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:21,935 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 258 [2024-12-01 13:21:21,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:21,937 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:21,937 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:21,938 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:21,938 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1092 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1092 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:21,938 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1092 Valid, 2381 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:21,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:21,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:21,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4412442396313363) internal successors, (1251), 868 states have internal predecessors, (1251), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:21,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1257 transitions. [2024-12-01 13:21:21,947 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1257 transitions. Word has length 258 [2024-12-01 13:21:21,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:21,948 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1257 transitions. [2024-12-01 13:21:21,948 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:21,948 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1257 transitions. [2024-12-01 13:21:21,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2024-12-01 13:21:21,948 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:21,949 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:21,949 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-12-01 13:21:21,949 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:21,949 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:21,949 INFO L85 PathProgramCache]: Analyzing trace with hash 564576196, now seen corresponding path program 1 times [2024-12-01 13:21:21,949 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:21,949 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139591126] [2024-12-01 13:21:21,949 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:21,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:22,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:22,383 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:22,383 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:22,383 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1139591126] [2024-12-01 13:21:22,383 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1139591126] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:22,383 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:22,383 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:21:22,383 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781667726] [2024-12-01 13:21:22,383 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:22,384 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:21:22,384 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:22,384 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:21:22,384 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:21:22,385 INFO L87 Difference]: Start difference. First operand 873 states and 1257 transitions. Second operand has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:22,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:22,618 INFO L93 Difference]: Finished difference Result 1580 states and 2266 transitions. [2024-12-01 13:21:22,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:22,619 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 259 [2024-12-01 13:21:22,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:22,620 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:22,620 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:22,621 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:22,621 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1061 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1061 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 292 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:22,621 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1061 Valid, 2216 Invalid, 292 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:22,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:22,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:22,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4400921658986174) internal successors, (1250), 868 states have internal predecessors, (1250), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:22,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1256 transitions. [2024-12-01 13:21:22,630 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1256 transitions. Word has length 259 [2024-12-01 13:21:22,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:22,631 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1256 transitions. [2024-12-01 13:21:22,631 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:22,631 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1256 transitions. [2024-12-01 13:21:22,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2024-12-01 13:21:22,631 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:22,632 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:22,632 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-12-01 13:21:22,632 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:22,632 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:22,632 INFO L85 PathProgramCache]: Analyzing trace with hash -1317954896, now seen corresponding path program 1 times [2024-12-01 13:21:22,632 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:22,632 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [956288650] [2024-12-01 13:21:22,632 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:22,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:22,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:23,135 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:23,136 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:23,136 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [956288650] [2024-12-01 13:21:23,136 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [956288650] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:23,136 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:23,136 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:23,136 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352084297] [2024-12-01 13:21:23,136 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:23,136 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:23,136 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:23,136 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:23,136 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:23,136 INFO L87 Difference]: Start difference. First operand 873 states and 1256 transitions. Second operand has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:23,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:23,368 INFO L93 Difference]: Finished difference Result 1580 states and 2264 transitions. [2024-12-01 13:21:23,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:23,368 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 260 [2024-12-01 13:21:23,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:23,370 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:23,370 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:23,370 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:23,371 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2114 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2114 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 290 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:23,371 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2114 Valid, 2216 Invalid, 290 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:23,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:23,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:23,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4389400921658986) internal successors, (1249), 868 states have internal predecessors, (1249), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:23,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1255 transitions. [2024-12-01 13:21:23,392 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1255 transitions. Word has length 260 [2024-12-01 13:21:23,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:23,392 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1255 transitions. [2024-12-01 13:21:23,392 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:23,392 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1255 transitions. [2024-12-01 13:21:23,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2024-12-01 13:21:23,393 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:23,393 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:23,393 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-12-01 13:21:23,393 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:23,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:23,394 INFO L85 PathProgramCache]: Analyzing trace with hash -1332823739, now seen corresponding path program 1 times [2024-12-01 13:21:23,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:23,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1404339962] [2024-12-01 13:21:23,394 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:23,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:23,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:24,029 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:24,029 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:24,029 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1404339962] [2024-12-01 13:21:24,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1404339962] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:24,030 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:24,030 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:24,030 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [219556585] [2024-12-01 13:21:24,030 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:24,030 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:24,030 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:24,030 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:24,030 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:24,030 INFO L87 Difference]: Start difference. First operand 873 states and 1255 transitions. Second operand has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:24,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:24,298 INFO L93 Difference]: Finished difference Result 1580 states and 2262 transitions. [2024-12-01 13:21:24,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:24,298 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 261 [2024-12-01 13:21:24,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:24,300 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:24,301 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:24,301 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:24,302 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2108 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 288 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2108 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 288 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 288 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:24,302 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2108 Valid, 2216 Invalid, 288 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 288 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:24,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:24,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:24,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4377880184331797) internal successors, (1248), 868 states have internal predecessors, (1248), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:24,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1254 transitions. [2024-12-01 13:21:24,312 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1254 transitions. Word has length 261 [2024-12-01 13:21:24,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:24,313 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1254 transitions. [2024-12-01 13:21:24,313 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:24,313 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1254 transitions. [2024-12-01 13:21:24,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2024-12-01 13:21:24,314 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:24,314 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:24,314 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-12-01 13:21:24,314 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:24,314 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:24,314 INFO L85 PathProgramCache]: Analyzing trace with hash 1161378031, now seen corresponding path program 1 times [2024-12-01 13:21:24,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:24,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725097441] [2024-12-01 13:21:24,314 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:24,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:24,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:24,849 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:24,849 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:24,849 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725097441] [2024-12-01 13:21:24,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [725097441] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:24,850 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:24,850 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:24,850 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1650437999] [2024-12-01 13:21:24,850 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:24,850 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:24,850 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:24,851 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:24,851 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:24,851 INFO L87 Difference]: Start difference. First operand 873 states and 1254 transitions. Second operand has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:25,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:25,059 INFO L93 Difference]: Finished difference Result 1580 states and 2260 transitions. [2024-12-01 13:21:25,060 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:25,060 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 262 [2024-12-01 13:21:25,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:25,061 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:25,061 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:25,062 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:25,062 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1057 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 286 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1057 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 286 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:25,062 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1057 Valid, 2223 Invalid, 286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 286 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:25,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:25,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:25,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4366359447004609) internal successors, (1247), 868 states have internal predecessors, (1247), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:25,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1253 transitions. [2024-12-01 13:21:25,071 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1253 transitions. Word has length 262 [2024-12-01 13:21:25,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:25,071 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1253 transitions. [2024-12-01 13:21:25,071 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:25,071 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1253 transitions. [2024-12-01 13:21:25,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2024-12-01 13:21:25,072 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:25,072 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:25,072 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-12-01 13:21:25,072 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:25,072 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:25,073 INFO L85 PathProgramCache]: Analyzing trace with hash 940351302, now seen corresponding path program 1 times [2024-12-01 13:21:25,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:25,073 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [762331092] [2024-12-01 13:21:25,073 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:25,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:25,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:25,571 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:25,571 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:25,571 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [762331092] [2024-12-01 13:21:25,571 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [762331092] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:25,571 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:25,571 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:25,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [478648392] [2024-12-01 13:21:25,571 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:25,572 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:25,572 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:25,572 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:25,572 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:25,572 INFO L87 Difference]: Start difference. First operand 873 states and 1253 transitions. Second operand has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:25,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:25,804 INFO L93 Difference]: Finished difference Result 1580 states and 2258 transitions. [2024-12-01 13:21:25,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:25,805 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 263 [2024-12-01 13:21:25,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:25,806 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:25,806 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:25,807 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:25,807 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2096 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 284 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2096 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 284 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 284 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:25,807 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2096 Valid, 2216 Invalid, 284 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 284 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:25,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:25,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:25,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.435483870967742) internal successors, (1246), 868 states have internal predecessors, (1246), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:25,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1252 transitions. [2024-12-01 13:21:25,816 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1252 transitions. Word has length 263 [2024-12-01 13:21:25,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:25,816 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1252 transitions. [2024-12-01 13:21:25,816 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:25,816 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1252 transitions. [2024-12-01 13:21:25,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2024-12-01 13:21:25,817 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:25,817 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:25,817 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-12-01 13:21:25,817 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:25,817 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:25,817 INFO L85 PathProgramCache]: Analyzing trace with hash 2062987950, now seen corresponding path program 1 times [2024-12-01 13:21:25,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:25,817 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853566451] [2024-12-01 13:21:25,817 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:25,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:26,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:26,337 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:26,337 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:26,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1853566451] [2024-12-01 13:21:26,337 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1853566451] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:26,337 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:26,337 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:26,337 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1660090348] [2024-12-01 13:21:26,337 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:26,338 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:26,338 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:26,338 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:26,338 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:26,338 INFO L87 Difference]: Start difference. First operand 873 states and 1252 transitions. Second operand has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:26,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:26,591 INFO L93 Difference]: Finished difference Result 1580 states and 2256 transitions. [2024-12-01 13:21:26,592 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:26,592 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 264 [2024-12-01 13:21:26,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:26,594 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:26,594 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:26,594 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:26,595 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2090 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 282 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2090 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 282 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:26,595 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2090 Valid, 2216 Invalid, 282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 282 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:26,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:26,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:26,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4343317972350231) internal successors, (1245), 868 states have internal predecessors, (1245), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:26,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1251 transitions. [2024-12-01 13:21:26,610 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1251 transitions. Word has length 264 [2024-12-01 13:21:26,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:26,611 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1251 transitions. [2024-12-01 13:21:26,611 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:26,611 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1251 transitions. [2024-12-01 13:21:26,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2024-12-01 13:21:26,612 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:26,612 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:26,612 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-12-01 13:21:26,613 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:26,613 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:26,613 INFO L85 PathProgramCache]: Analyzing trace with hash -101916217, now seen corresponding path program 1 times [2024-12-01 13:21:26,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:26,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029608069] [2024-12-01 13:21:26,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:26,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:26,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:27,143 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:27,144 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:27,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2029608069] [2024-12-01 13:21:27,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2029608069] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:27,144 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:27,144 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:27,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [704720894] [2024-12-01 13:21:27,144 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:27,144 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:27,144 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:27,145 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:27,145 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:27,145 INFO L87 Difference]: Start difference. First operand 873 states and 1251 transitions. Second operand has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:27,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:27,359 INFO L93 Difference]: Finished difference Result 1580 states and 2254 transitions. [2024-12-01 13:21:27,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:27,360 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 265 [2024-12-01 13:21:27,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:27,361 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:27,361 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:27,362 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:27,362 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1054 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 280 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1054 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 280 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 280 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:27,362 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1054 Valid, 2223 Invalid, 280 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 280 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:27,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:27,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:27,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.433179723502304) internal successors, (1244), 868 states have internal predecessors, (1244), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:27,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1250 transitions. [2024-12-01 13:21:27,372 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1250 transitions. Word has length 265 [2024-12-01 13:21:27,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:27,373 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1250 transitions. [2024-12-01 13:21:27,373 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:27,373 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1250 transitions. [2024-12-01 13:21:27,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2024-12-01 13:21:27,374 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:27,374 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:27,374 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-12-01 13:21:27,374 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:27,374 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:27,374 INFO L85 PathProgramCache]: Analyzing trace with hash -277506067, now seen corresponding path program 1 times [2024-12-01 13:21:27,374 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:27,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479721292] [2024-12-01 13:21:27,375 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:27,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:27,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:27,886 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:27,886 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:27,886 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [479721292] [2024-12-01 13:21:27,886 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [479721292] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:27,886 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:27,886 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:27,886 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1882674814] [2024-12-01 13:21:27,886 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:27,886 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:27,887 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:27,887 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:27,887 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:27,887 INFO L87 Difference]: Start difference. First operand 873 states and 1250 transitions. Second operand has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:28,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:28,127 INFO L93 Difference]: Finished difference Result 1580 states and 2252 transitions. [2024-12-01 13:21:28,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:28,128 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 266 [2024-12-01 13:21:28,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:28,129 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:28,129 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:28,129 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:28,130 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1053 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 278 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1053 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 278 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 278 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:28,130 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1053 Valid, 2223 Invalid, 278 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 278 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:28,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:28,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:28,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4320276497695852) internal successors, (1243), 868 states have internal predecessors, (1243), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:28,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1249 transitions. [2024-12-01 13:21:28,139 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1249 transitions. Word has length 266 [2024-12-01 13:21:28,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:28,140 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1249 transitions. [2024-12-01 13:21:28,140 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:28,140 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1249 transitions. [2024-12-01 13:21:28,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2024-12-01 13:21:28,140 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:28,141 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:28,141 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-12-01 13:21:28,141 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:28,141 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:28,141 INFO L85 PathProgramCache]: Analyzing trace with hash 2047602888, now seen corresponding path program 1 times [2024-12-01 13:21:28,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:28,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [652795335] [2024-12-01 13:21:28,141 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:28,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:28,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:28,641 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:28,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:28,641 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [652795335] [2024-12-01 13:21:28,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [652795335] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:28,641 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:28,641 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:28,641 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [480921965] [2024-12-01 13:21:28,641 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:28,642 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:28,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:28,642 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:28,642 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:28,642 INFO L87 Difference]: Start difference. First operand 873 states and 1249 transitions. Second operand has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:28,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:28,860 INFO L93 Difference]: Finished difference Result 1580 states and 2250 transitions. [2024-12-01 13:21:28,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:28,861 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 267 [2024-12-01 13:21:28,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:28,862 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:28,862 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:28,862 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:28,862 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2072 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 276 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2072 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 276 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 276 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:28,863 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2072 Valid, 2216 Invalid, 276 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 276 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:28,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:28,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:28,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4308755760368663) internal successors, (1242), 868 states have internal predecessors, (1242), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:28,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1248 transitions. [2024-12-01 13:21:28,872 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1248 transitions. Word has length 267 [2024-12-01 13:21:28,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:28,872 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1248 transitions. [2024-12-01 13:21:28,872 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:28,872 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1248 transitions. [2024-12-01 13:21:28,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 269 [2024-12-01 13:21:28,873 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:28,873 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:28,873 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-12-01 13:21:28,873 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:28,874 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:28,874 INFO L85 PathProgramCache]: Analyzing trace with hash 1324447916, now seen corresponding path program 1 times [2024-12-01 13:21:28,874 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:28,874 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944181979] [2024-12-01 13:21:28,874 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:28,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:29,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:29,386 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:29,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:29,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944181979] [2024-12-01 13:21:29,387 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [944181979] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:29,387 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:29,387 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:29,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698111561] [2024-12-01 13:21:29,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:29,387 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:29,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:29,388 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:29,388 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:29,388 INFO L87 Difference]: Start difference. First operand 873 states and 1248 transitions. Second operand has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:29,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:29,626 INFO L93 Difference]: Finished difference Result 1580 states and 2248 transitions. [2024-12-01 13:21:29,626 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:29,627 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 268 [2024-12-01 13:21:29,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:29,628 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:29,628 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:29,629 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:29,629 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2066 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 274 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2066 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 274 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 274 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:29,629 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2066 Valid, 2216 Invalid, 274 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 274 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:29,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:29,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:29,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4297235023041475) internal successors, (1241), 868 states have internal predecessors, (1241), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:29,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1247 transitions. [2024-12-01 13:21:29,642 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1247 transitions. Word has length 268 [2024-12-01 13:21:29,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:29,642 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1247 transitions. [2024-12-01 13:21:29,642 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:29,642 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1247 transitions. [2024-12-01 13:21:29,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2024-12-01 13:21:29,643 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:29,643 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:29,643 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-12-01 13:21:29,643 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:29,643 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:29,643 INFO L85 PathProgramCache]: Analyzing trace with hash 995507273, now seen corresponding path program 1 times [2024-12-01 13:21:29,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:29,644 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232812394] [2024-12-01 13:21:29,644 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:29,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:29,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:30,143 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:30,144 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:30,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [232812394] [2024-12-01 13:21:30,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [232812394] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:30,144 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:30,144 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:30,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507319975] [2024-12-01 13:21:30,144 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:30,144 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:30,144 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:30,145 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:30,145 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:30,145 INFO L87 Difference]: Start difference. First operand 873 states and 1247 transitions. Second operand has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:30,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:30,406 INFO L93 Difference]: Finished difference Result 1580 states and 2246 transitions. [2024-12-01 13:21:30,407 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:30,407 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 269 [2024-12-01 13:21:30,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:30,408 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:30,408 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:30,408 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:30,409 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2060 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 272 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2060 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 272 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 272 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:30,409 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2060 Valid, 2216 Invalid, 272 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 272 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:30,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:30,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:30,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4285714285714286) internal successors, (1240), 868 states have internal predecessors, (1240), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:30,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1246 transitions. [2024-12-01 13:21:30,425 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1246 transitions. Word has length 269 [2024-12-01 13:21:30,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:30,425 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1246 transitions. [2024-12-01 13:21:30,425 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:30,425 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1246 transitions. [2024-12-01 13:21:30,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 271 [2024-12-01 13:21:30,427 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:30,427 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:30,427 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-12-01 13:21:30,427 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:30,428 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:30,428 INFO L85 PathProgramCache]: Analyzing trace with hash -669653781, now seen corresponding path program 1 times [2024-12-01 13:21:30,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:30,428 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [36147905] [2024-12-01 13:21:30,428 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:30,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:30,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:31,113 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:31,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:31,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [36147905] [2024-12-01 13:21:31,113 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [36147905] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:31,113 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:31,113 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:31,113 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [66584150] [2024-12-01 13:21:31,113 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:31,114 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:31,114 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:31,114 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:31,114 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:31,114 INFO L87 Difference]: Start difference. First operand 873 states and 1246 transitions. Second operand has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:31,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:31,344 INFO L93 Difference]: Finished difference Result 1580 states and 2244 transitions. [2024-12-01 13:21:31,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:31,344 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 270 [2024-12-01 13:21:31,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:31,345 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:31,345 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:31,346 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:31,346 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2054 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 270 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2054 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 270 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 270 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:31,346 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2054 Valid, 2216 Invalid, 270 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 270 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:31,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:31,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:31,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4274193548387097) internal successors, (1239), 868 states have internal predecessors, (1239), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:31,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1245 transitions. [2024-12-01 13:21:31,356 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1245 transitions. Word has length 270 [2024-12-01 13:21:31,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:31,356 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1245 transitions. [2024-12-01 13:21:31,356 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:31,356 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1245 transitions. [2024-12-01 13:21:31,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 272 [2024-12-01 13:21:31,357 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:31,357 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:31,357 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-12-01 13:21:31,357 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:31,357 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:31,357 INFO L85 PathProgramCache]: Analyzing trace with hash -53988278, now seen corresponding path program 1 times [2024-12-01 13:21:31,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:31,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523188383] [2024-12-01 13:21:31,357 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:31,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:31,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:31,866 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:31,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:31,867 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [523188383] [2024-12-01 13:21:31,867 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [523188383] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:31,867 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:31,867 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:31,867 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [521465062] [2024-12-01 13:21:31,867 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:31,867 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:31,867 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:31,867 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:31,867 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:31,867 INFO L87 Difference]: Start difference. First operand 873 states and 1245 transitions. Second operand has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:32,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:32,085 INFO L93 Difference]: Finished difference Result 1580 states and 2242 transitions. [2024-12-01 13:21:32,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:32,086 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 271 [2024-12-01 13:21:32,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:32,087 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:32,087 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:32,087 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:32,087 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1048 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 268 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1048 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 268 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 268 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:32,087 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1048 Valid, 2223 Invalid, 268 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 268 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:32,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:32,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:32,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4262672811059909) internal successors, (1238), 868 states have internal predecessors, (1238), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:32,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1244 transitions. [2024-12-01 13:21:32,097 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1244 transitions. Word has length 271 [2024-12-01 13:21:32,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:32,098 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1244 transitions. [2024-12-01 13:21:32,098 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:32,098 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1244 transitions. [2024-12-01 13:21:32,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2024-12-01 13:21:32,099 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:32,099 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:32,099 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-12-01 13:21:32,099 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:32,099 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:32,099 INFO L85 PathProgramCache]: Analyzing trace with hash 1593732266, now seen corresponding path program 1 times [2024-12-01 13:21:32,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:32,099 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661986632] [2024-12-01 13:21:32,099 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:32,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:32,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:32,632 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:32,633 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:32,633 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661986632] [2024-12-01 13:21:32,633 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [661986632] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:32,633 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:32,633 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:32,633 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [270587978] [2024-12-01 13:21:32,633 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:32,633 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:32,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:32,633 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:32,633 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:32,634 INFO L87 Difference]: Start difference. First operand 873 states and 1244 transitions. Second operand has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:32,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:32,875 INFO L93 Difference]: Finished difference Result 1580 states and 2240 transitions. [2024-12-01 13:21:32,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:32,875 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 272 [2024-12-01 13:21:32,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:32,876 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:32,876 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:32,877 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:32,877 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1047 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1047 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 266 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:32,877 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1047 Valid, 2223 Invalid, 266 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:32,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:32,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:32,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4251152073732718) internal successors, (1237), 868 states have internal predecessors, (1237), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:32,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1243 transitions. [2024-12-01 13:21:32,888 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1243 transitions. Word has length 272 [2024-12-01 13:21:32,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:32,888 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1243 transitions. [2024-12-01 13:21:32,888 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:32,888 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1243 transitions. [2024-12-01 13:21:32,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2024-12-01 13:21:32,889 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:32,889 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:32,889 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-12-01 13:21:32,889 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:32,889 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:32,889 INFO L85 PathProgramCache]: Analyzing trace with hash 1986939083, now seen corresponding path program 1 times [2024-12-01 13:21:32,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:32,890 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020046726] [2024-12-01 13:21:32,890 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:32,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:33,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:33,383 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:33,383 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:33,383 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1020046726] [2024-12-01 13:21:33,383 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1020046726] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:33,383 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:33,383 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:33,383 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212223434] [2024-12-01 13:21:33,383 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:33,383 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:33,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:33,384 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:33,384 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:33,384 INFO L87 Difference]: Start difference. First operand 873 states and 1243 transitions. Second operand has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:33,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:33,619 INFO L93 Difference]: Finished difference Result 1580 states and 2238 transitions. [2024-12-01 13:21:33,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:33,619 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 273 [2024-12-01 13:21:33,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:33,621 INFO L225 Difference]: With dead ends: 1580 [2024-12-01 13:21:33,621 INFO L226 Difference]: Without dead ends: 873 [2024-12-01 13:21:33,621 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:33,621 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1046 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 264 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1046 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 264 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 264 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:33,622 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1046 Valid, 2223 Invalid, 264 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 264 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:33,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-01 13:21:33,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-01 13:21:33,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.423963133640553) internal successors, (1236), 868 states have internal predecessors, (1236), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:33,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1242 transitions. [2024-12-01 13:21:33,632 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1242 transitions. Word has length 273 [2024-12-01 13:21:33,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:33,632 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1242 transitions. [2024-12-01 13:21:33,632 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:33,632 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1242 transitions. [2024-12-01 13:21:33,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2024-12-01 13:21:33,633 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:33,633 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:33,634 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-12-01 13:21:33,634 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:33,634 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:33,634 INFO L85 PathProgramCache]: Analyzing trace with hash -801726487, now seen corresponding path program 1 times [2024-12-01 13:21:33,634 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:33,634 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457547650] [2024-12-01 13:21:33,634 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:33,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:33,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:34,689 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:34,690 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:34,690 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457547650] [2024-12-01 13:21:34,690 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [457547650] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:34,690 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:34,690 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:34,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1090756790] [2024-12-01 13:21:34,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:34,690 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:34,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:34,691 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:34,691 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:34,691 INFO L87 Difference]: Start difference. First operand 873 states and 1242 transitions. Second operand has 5 states, 5 states have (on average 52.4) internal successors, (262), 5 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:34,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:34,740 INFO L93 Difference]: Finished difference Result 1720 states and 2389 transitions. [2024-12-01 13:21:34,741 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-01 13:21:34,741 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.4) internal successors, (262), 5 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 274 [2024-12-01 13:21:34,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:34,744 INFO L225 Difference]: With dead ends: 1720 [2024-12-01 13:21:34,744 INFO L226 Difference]: Without dead ends: 1013 [2024-12-01 13:21:34,745 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:34,745 INFO L435 NwaCegarLoop]: 1232 mSDtfsCounter, 24 mSDsluCounter, 3687 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 4919 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:34,745 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 4919 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:21:34,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1013 states. [2024-12-01 13:21:34,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1013 to 1011. [2024-12-01 13:21:34,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1011 states, 1006 states have (on average 1.3767395626242545) internal successors, (1385), 1006 states have internal predecessors, (1385), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:21:34,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1011 states to 1011 states and 1391 transitions. [2024-12-01 13:21:34,769 INFO L78 Accepts]: Start accepts. Automaton has 1011 states and 1391 transitions. Word has length 274 [2024-12-01 13:21:34,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:34,769 INFO L471 AbstractCegarLoop]: Abstraction has 1011 states and 1391 transitions. [2024-12-01 13:21:34,769 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.4) internal successors, (262), 5 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:34,769 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1391 transitions. [2024-12-01 13:21:34,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2024-12-01 13:21:34,770 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:34,771 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:34,771 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-12-01 13:21:34,771 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:34,771 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:34,771 INFO L85 PathProgramCache]: Analyzing trace with hash 1825170721, now seen corresponding path program 1 times [2024-12-01 13:21:34,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:34,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1832686539] [2024-12-01 13:21:34,771 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:34,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:35,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:36,167 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:21:36,167 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:36,167 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1832686539] [2024-12-01 13:21:36,167 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1832686539] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:36,167 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:36,167 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-01 13:21:36,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806388878] [2024-12-01 13:21:36,167 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:36,168 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-01 13:21:36,168 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:36,168 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-01 13:21:36,168 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-01 13:21:36,168 INFO L87 Difference]: Start difference. First operand 1011 states and 1391 transitions. Second operand has 7 states, 7 states have (on average 37.57142857142857) internal successors, (263), 7 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:36,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:36,332 INFO L93 Difference]: Finished difference Result 2210 states and 2948 transitions. [2024-12-01 13:21:36,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:21:36,333 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 37.57142857142857) internal successors, (263), 7 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 275 [2024-12-01 13:21:36,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:36,335 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:36,335 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:36,336 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2024-12-01 13:21:36,336 INFO L435 NwaCegarLoop]: 1226 mSDtfsCounter, 1688 mSDsluCounter, 4892 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1691 SdHoareTripleChecker+Valid, 6118 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:36,336 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1691 Valid, 6118 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:36,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:36,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:36,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.320560058953574) internal successors, (1792), 1357 states have internal predecessors, (1792), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:36,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1804 transitions. [2024-12-01 13:21:36,371 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1804 transitions. Word has length 275 [2024-12-01 13:21:36,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:36,371 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1804 transitions. [2024-12-01 13:21:36,372 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 37.57142857142857) internal successors, (263), 7 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:21:36,372 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1804 transitions. [2024-12-01 13:21:36,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 701 [2024-12-01 13:21:36,377 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:36,377 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:36,377 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-12-01 13:21:36,377 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:36,378 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:36,378 INFO L85 PathProgramCache]: Analyzing trace with hash -452215846, now seen corresponding path program 1 times [2024-12-01 13:21:36,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:36,378 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [203356699] [2024-12-01 13:21:36,378 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:36,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:36,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:37,536 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:37,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:37,536 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [203356699] [2024-12-01 13:21:37,537 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [203356699] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:37,537 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:37,537 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:37,537 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1830069823] [2024-12-01 13:21:37,537 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:37,537 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:37,537 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:37,538 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:37,538 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:37,538 INFO L87 Difference]: Start difference. First operand 1365 states and 1804 transitions. Second operand has 5 states, 5 states have (on average 134.6) internal successors, (673), 5 states have internal predecessors, (673), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:37,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:37,749 INFO L93 Difference]: Finished difference Result 2210 states and 2947 transitions. [2024-12-01 13:21:37,749 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:37,750 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 134.6) internal successors, (673), 5 states have internal predecessors, (673), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 700 [2024-12-01 13:21:37,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:37,751 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:37,751 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:37,751 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:37,752 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2098 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 262 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2101 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 263 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 262 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:37,752 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2101 Valid, 2216 Invalid, 263 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 262 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:37,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:37,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:37,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3198231392778188) internal successors, (1791), 1357 states have internal predecessors, (1791), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:37,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1803 transitions. [2024-12-01 13:21:37,772 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1803 transitions. Word has length 700 [2024-12-01 13:21:37,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:37,772 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1803 transitions. [2024-12-01 13:21:37,772 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 134.6) internal successors, (673), 5 states have internal predecessors, (673), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:37,773 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1803 transitions. [2024-12-01 13:21:37,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 702 [2024-12-01 13:21:37,775 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:37,776 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:37,776 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-12-01 13:21:37,776 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:37,776 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:37,776 INFO L85 PathProgramCache]: Analyzing trace with hash -1163082094, now seen corresponding path program 1 times [2024-12-01 13:21:37,776 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:37,776 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012097508] [2024-12-01 13:21:37,777 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:37,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:38,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:38,818 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:38,818 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:38,818 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1012097508] [2024-12-01 13:21:38,818 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1012097508] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:38,819 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:38,819 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:38,819 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2064706880] [2024-12-01 13:21:38,819 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:38,819 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:38,819 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:38,820 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:38,820 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:38,820 INFO L87 Difference]: Start difference. First operand 1365 states and 1803 transitions. Second operand has 5 states, 5 states have (on average 134.8) internal successors, (674), 5 states have internal predecessors, (674), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:39,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:39,021 INFO L93 Difference]: Finished difference Result 2210 states and 2945 transitions. [2024-12-01 13:21:39,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:39,022 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 134.8) internal successors, (674), 5 states have internal predecessors, (674), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 701 [2024-12-01 13:21:39,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:39,024 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:39,024 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:39,025 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:39,025 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2082 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 260 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2085 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 261 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 260 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:39,025 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2085 Valid, 2216 Invalid, 261 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 260 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:39,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:39,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:39,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3190862196020634) internal successors, (1790), 1357 states have internal predecessors, (1790), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:39,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1802 transitions. [2024-12-01 13:21:39,044 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1802 transitions. Word has length 701 [2024-12-01 13:21:39,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:39,044 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1802 transitions. [2024-12-01 13:21:39,044 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 134.8) internal successors, (674), 5 states have internal predecessors, (674), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:39,044 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1802 transitions. [2024-12-01 13:21:39,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 703 [2024-12-01 13:21:39,047 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:39,047 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:39,047 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-12-01 13:21:39,047 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:39,048 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:39,048 INFO L85 PathProgramCache]: Analyzing trace with hash 1185072079, now seen corresponding path program 1 times [2024-12-01 13:21:39,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:39,048 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204436803] [2024-12-01 13:21:39,048 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:39,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:39,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:40,089 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:40,089 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:40,089 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1204436803] [2024-12-01 13:21:40,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1204436803] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:40,089 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:40,090 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:40,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [748946875] [2024-12-01 13:21:40,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:40,090 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:40,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:40,091 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:40,091 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:40,091 INFO L87 Difference]: Start difference. First operand 1365 states and 1802 transitions. Second operand has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:40,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:40,277 INFO L93 Difference]: Finished difference Result 2210 states and 2943 transitions. [2024-12-01 13:21:40,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:40,278 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 702 [2024-12-01 13:21:40,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:40,279 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:40,279 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:40,280 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:40,280 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2066 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 258 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2069 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 259 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 258 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:40,280 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2069 Valid, 2216 Invalid, 259 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 258 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:40,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:40,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:40,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.318349299926308) internal successors, (1789), 1357 states have internal predecessors, (1789), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:40,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1801 transitions. [2024-12-01 13:21:40,298 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1801 transitions. Word has length 702 [2024-12-01 13:21:40,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:40,298 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1801 transitions. [2024-12-01 13:21:40,299 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:40,299 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1801 transitions. [2024-12-01 13:21:40,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 704 [2024-12-01 13:21:40,302 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:40,302 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:40,302 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-12-01 13:21:40,302 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:40,302 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:40,302 INFO L85 PathProgramCache]: Analyzing trace with hash 1499675367, now seen corresponding path program 1 times [2024-12-01 13:21:40,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:40,303 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509148095] [2024-12-01 13:21:40,303 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:40,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:40,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:41,373 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:41,373 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:41,373 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1509148095] [2024-12-01 13:21:41,373 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1509148095] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:41,373 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:41,373 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:41,374 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263874249] [2024-12-01 13:21:41,374 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:41,374 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:41,374 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:41,375 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:41,375 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:41,375 INFO L87 Difference]: Start difference. First operand 1365 states and 1801 transitions. Second operand has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:41,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:41,590 INFO L93 Difference]: Finished difference Result 2210 states and 2941 transitions. [2024-12-01 13:21:41,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:41,591 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 703 [2024-12-01 13:21:41,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:41,592 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:41,592 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:41,592 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:41,593 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2050 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2053 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 257 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:41,593 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2053 Valid, 2216 Invalid, 257 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:41,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:41,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:41,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3176123802505526) internal successors, (1788), 1357 states have internal predecessors, (1788), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:41,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1800 transitions. [2024-12-01 13:21:41,610 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1800 transitions. Word has length 703 [2024-12-01 13:21:41,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:41,611 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1800 transitions. [2024-12-01 13:21:41,611 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:41,611 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1800 transitions. [2024-12-01 13:21:41,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 705 [2024-12-01 13:21:41,614 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:41,614 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:41,614 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65 [2024-12-01 13:21:41,614 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:41,614 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:41,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1662788, now seen corresponding path program 1 times [2024-12-01 13:21:41,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:41,615 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630562520] [2024-12-01 13:21:41,615 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:41,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:41,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:42,780 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:42,780 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:42,780 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630562520] [2024-12-01 13:21:42,781 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [630562520] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:42,781 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:42,781 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:42,781 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444953373] [2024-12-01 13:21:42,781 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:42,782 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:42,782 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:42,783 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:42,783 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:42,783 INFO L87 Difference]: Start difference. First operand 1365 states and 1800 transitions. Second operand has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:42,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:42,994 INFO L93 Difference]: Finished difference Result 2210 states and 2939 transitions. [2024-12-01 13:21:42,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:42,995 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 704 [2024-12-01 13:21:42,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:42,996 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:42,996 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:42,997 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:42,997 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2034 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 254 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2037 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 255 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:42,997 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2037 Valid, 2216 Invalid, 255 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 254 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:42,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:43,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:43,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3168754605747974) internal successors, (1787), 1357 states have internal predecessors, (1787), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:43,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1799 transitions. [2024-12-01 13:21:43,025 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1799 transitions. Word has length 704 [2024-12-01 13:21:43,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:43,026 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1799 transitions. [2024-12-01 13:21:43,026 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:43,026 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1799 transitions. [2024-12-01 13:21:43,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 706 [2024-12-01 13:21:43,033 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:43,033 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:43,033 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-12-01 13:21:43,033 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:43,034 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:43,034 INFO L85 PathProgramCache]: Analyzing trace with hash 1175206588, now seen corresponding path program 1 times [2024-12-01 13:21:43,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:43,034 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260491742] [2024-12-01 13:21:43,034 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:43,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:43,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:44,087 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:44,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:44,087 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1260491742] [2024-12-01 13:21:44,087 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1260491742] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:44,087 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:44,087 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:44,087 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869155037] [2024-12-01 13:21:44,087 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:44,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:44,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:44,088 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:44,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:44,089 INFO L87 Difference]: Start difference. First operand 1365 states and 1799 transitions. Second operand has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:44,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:44,285 INFO L93 Difference]: Finished difference Result 2210 states and 2937 transitions. [2024-12-01 13:21:44,286 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:44,286 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 705 [2024-12-01 13:21:44,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:44,287 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:44,287 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:44,288 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:44,288 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2018 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 252 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2021 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 253 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 252 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:44,288 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2021 Valid, 2216 Invalid, 253 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 252 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:44,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:44,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:44,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.316138540899042) internal successors, (1786), 1357 states have internal predecessors, (1786), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:44,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1798 transitions. [2024-12-01 13:21:44,305 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1798 transitions. Word has length 705 [2024-12-01 13:21:44,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:44,305 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1798 transitions. [2024-12-01 13:21:44,305 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:44,305 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1798 transitions. [2024-12-01 13:21:44,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 707 [2024-12-01 13:21:44,308 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:44,308 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:44,308 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67 [2024-12-01 13:21:44,308 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:44,308 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:44,309 INFO L85 PathProgramCache]: Analyzing trace with hash -453128647, now seen corresponding path program 1 times [2024-12-01 13:21:44,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:44,309 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [463659182] [2024-12-01 13:21:44,309 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:44,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:44,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:45,306 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:45,306 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:45,306 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [463659182] [2024-12-01 13:21:45,306 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [463659182] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:45,306 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:45,306 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:45,306 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115778843] [2024-12-01 13:21:45,306 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:45,307 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:45,307 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:45,307 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:45,307 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:45,307 INFO L87 Difference]: Start difference. First operand 1365 states and 1798 transitions. Second operand has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:45,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:45,489 INFO L93 Difference]: Finished difference Result 2210 states and 2935 transitions. [2024-12-01 13:21:45,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:45,489 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 706 [2024-12-01 13:21:45,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:45,491 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:45,491 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:45,491 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:45,491 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2002 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 250 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2005 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 250 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:45,492 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2005 Valid, 2216 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 250 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:45,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:45,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:45,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3154016212232866) internal successors, (1785), 1357 states have internal predecessors, (1785), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:45,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1797 transitions. [2024-12-01 13:21:45,508 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1797 transitions. Word has length 706 [2024-12-01 13:21:45,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:45,508 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1797 transitions. [2024-12-01 13:21:45,508 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:45,508 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1797 transitions. [2024-12-01 13:21:45,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 708 [2024-12-01 13:21:45,511 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:45,512 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:45,512 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-12-01 13:21:45,512 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:45,512 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:45,512 INFO L85 PathProgramCache]: Analyzing trace with hash -1515190767, now seen corresponding path program 1 times [2024-12-01 13:21:45,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:45,512 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [687229732] [2024-12-01 13:21:45,512 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:45,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:45,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:46,581 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:46,581 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:46,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [687229732] [2024-12-01 13:21:46,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [687229732] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:46,581 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:46,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:46,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [729926912] [2024-12-01 13:21:46,581 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:46,582 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:46,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:46,582 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:46,582 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:46,582 INFO L87 Difference]: Start difference. First operand 1365 states and 1797 transitions. Second operand has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:46,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:46,773 INFO L93 Difference]: Finished difference Result 2210 states and 2933 transitions. [2024-12-01 13:21:46,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:46,773 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 707 [2024-12-01 13:21:46,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:46,775 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:46,775 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:46,775 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:46,775 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1986 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 248 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1989 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 249 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 248 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:46,776 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1989 Valid, 2216 Invalid, 249 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 248 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:46,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:46,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:46,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3146647015475312) internal successors, (1784), 1357 states have internal predecessors, (1784), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:46,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1796 transitions. [2024-12-01 13:21:46,795 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1796 transitions. Word has length 707 [2024-12-01 13:21:46,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:46,796 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1796 transitions. [2024-12-01 13:21:46,796 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:46,796 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1796 transitions. [2024-12-01 13:21:46,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 709 [2024-12-01 13:21:46,799 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:46,800 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:46,800 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-12-01 13:21:46,800 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:46,800 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:46,800 INFO L85 PathProgramCache]: Analyzing trace with hash -721530706, now seen corresponding path program 1 times [2024-12-01 13:21:46,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:46,800 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291302973] [2024-12-01 13:21:46,800 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:46,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:47,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:47,856 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:47,856 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:47,856 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [291302973] [2024-12-01 13:21:47,856 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [291302973] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:47,856 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:47,856 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:47,856 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1728370289] [2024-12-01 13:21:47,856 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:47,857 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:47,857 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:47,858 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:47,858 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:47,858 INFO L87 Difference]: Start difference. First operand 1365 states and 1796 transitions. Second operand has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:48,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:48,050 INFO L93 Difference]: Finished difference Result 2210 states and 2931 transitions. [2024-12-01 13:21:48,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:48,050 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 708 [2024-12-01 13:21:48,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:48,051 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:48,051 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:48,052 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:48,052 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1077 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1080 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 247 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:48,052 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1080 Valid, 2223 Invalid, 247 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:48,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:48,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:48,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.313927781871776) internal successors, (1783), 1357 states have internal predecessors, (1783), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:48,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1795 transitions. [2024-12-01 13:21:48,069 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1795 transitions. Word has length 708 [2024-12-01 13:21:48,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:48,069 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1795 transitions. [2024-12-01 13:21:48,069 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:48,069 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1795 transitions. [2024-12-01 13:21:48,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 710 [2024-12-01 13:21:48,072 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:48,073 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:48,073 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2024-12-01 13:21:48,073 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:48,073 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:48,073 INFO L85 PathProgramCache]: Analyzing trace with hash -151593754, now seen corresponding path program 1 times [2024-12-01 13:21:48,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:48,073 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154950450] [2024-12-01 13:21:48,073 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:48,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:48,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:49,107 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:49,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:49,107 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154950450] [2024-12-01 13:21:49,107 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1154950450] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:49,107 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:49,107 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:49,107 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [844578045] [2024-12-01 13:21:49,107 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:49,108 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:49,108 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:49,109 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:49,109 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:49,109 INFO L87 Difference]: Start difference. First operand 1365 states and 1795 transitions. Second operand has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:49,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:49,285 INFO L93 Difference]: Finished difference Result 2210 states and 2929 transitions. [2024-12-01 13:21:49,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:49,286 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 709 [2024-12-01 13:21:49,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:49,287 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:49,287 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:49,287 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:49,288 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1069 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 244 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1072 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 245 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 244 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:49,288 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1072 Valid, 2223 Invalid, 245 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 244 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:49,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:49,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:49,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3131908621960207) internal successors, (1782), 1357 states have internal predecessors, (1782), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:49,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1794 transitions. [2024-12-01 13:21:49,315 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1794 transitions. Word has length 709 [2024-12-01 13:21:49,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:49,315 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1794 transitions. [2024-12-01 13:21:49,315 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:49,315 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1794 transitions. [2024-12-01 13:21:49,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 711 [2024-12-01 13:21:49,320 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:49,321 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:49,321 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-12-01 13:21:49,321 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:49,321 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:49,321 INFO L85 PathProgramCache]: Analyzing trace with hash -1142348125, now seen corresponding path program 1 times [2024-12-01 13:21:49,322 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:49,322 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034100153] [2024-12-01 13:21:49,322 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:49,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:49,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:50,416 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:50,416 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:50,416 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034100153] [2024-12-01 13:21:50,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034100153] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:50,416 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:50,416 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:50,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807626845] [2024-12-01 13:21:50,416 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:50,417 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:50,417 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:50,418 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:50,418 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:50,418 INFO L87 Difference]: Start difference. First operand 1365 states and 1794 transitions. Second operand has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:50,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:50,630 INFO L93 Difference]: Finished difference Result 2210 states and 2927 transitions. [2024-12-01 13:21:50,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:50,630 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 710 [2024-12-01 13:21:50,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:50,632 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:50,632 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:50,633 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:50,633 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1938 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 242 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1941 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 243 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 242 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:50,633 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1941 Valid, 2216 Invalid, 243 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 242 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:50,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:50,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:50,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3124539425202653) internal successors, (1781), 1357 states have internal predecessors, (1781), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:50,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1793 transitions. [2024-12-01 13:21:50,661 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1793 transitions. Word has length 710 [2024-12-01 13:21:50,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:50,661 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1793 transitions. [2024-12-01 13:21:50,661 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:50,661 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1793 transitions. [2024-12-01 13:21:50,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 712 [2024-12-01 13:21:50,668 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:50,669 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:50,669 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2024-12-01 13:21:50,669 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:50,669 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:50,670 INFO L85 PathProgramCache]: Analyzing trace with hash -1305936069, now seen corresponding path program 1 times [2024-12-01 13:21:50,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:50,670 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213883157] [2024-12-01 13:21:50,670 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:50,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:51,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:51,798 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:51,798 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:51,798 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1213883157] [2024-12-01 13:21:51,799 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1213883157] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:51,799 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:51,799 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:51,799 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677317752] [2024-12-01 13:21:51,799 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:51,799 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:51,799 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:51,800 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:51,800 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:51,800 INFO L87 Difference]: Start difference. First operand 1365 states and 1793 transitions. Second operand has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:51,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:51,984 INFO L93 Difference]: Finished difference Result 2210 states and 2925 transitions. [2024-12-01 13:21:51,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:51,984 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 711 [2024-12-01 13:21:51,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:51,985 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:51,985 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:51,986 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:51,986 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1922 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 240 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1925 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 240 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:51,986 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1925 Valid, 2216 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 240 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:51,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:52,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:52,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3117170228445099) internal successors, (1780), 1357 states have internal predecessors, (1780), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:52,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1792 transitions. [2024-12-01 13:21:52,002 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1792 transitions. Word has length 711 [2024-12-01 13:21:52,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:52,002 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1792 transitions. [2024-12-01 13:21:52,002 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:52,002 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1792 transitions. [2024-12-01 13:21:52,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 713 [2024-12-01 13:21:52,005 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:52,005 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:52,005 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73 [2024-12-01 13:21:52,005 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:52,006 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:52,006 INFO L85 PathProgramCache]: Analyzing trace with hash -1850961896, now seen corresponding path program 1 times [2024-12-01 13:21:52,006 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:52,006 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890026687] [2024-12-01 13:21:52,006 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:52,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:52,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:52,996 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:52,996 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:52,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [890026687] [2024-12-01 13:21:52,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [890026687] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:52,996 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:52,996 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:52,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561086326] [2024-12-01 13:21:52,996 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:52,997 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:52,997 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:52,998 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:52,998 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:52,998 INFO L87 Difference]: Start difference. First operand 1365 states and 1792 transitions. Second operand has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:53,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:53,173 INFO L93 Difference]: Finished difference Result 2210 states and 2923 transitions. [2024-12-01 13:21:53,173 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:53,173 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 712 [2024-12-01 13:21:53,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:53,174 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:53,174 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:53,175 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:53,175 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1906 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 238 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1909 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 239 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 238 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:53,175 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1909 Valid, 2216 Invalid, 239 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 238 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:53,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:53,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:53,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3109801031687547) internal successors, (1779), 1357 states have internal predecessors, (1779), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:53,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1791 transitions. [2024-12-01 13:21:53,190 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1791 transitions. Word has length 712 [2024-12-01 13:21:53,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:53,190 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1791 transitions. [2024-12-01 13:21:53,190 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:53,190 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1791 transitions. [2024-12-01 13:21:53,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 714 [2024-12-01 13:21:53,193 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:53,193 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:53,193 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74 [2024-12-01 13:21:53,193 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:53,193 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:53,194 INFO L85 PathProgramCache]: Analyzing trace with hash -382817008, now seen corresponding path program 1 times [2024-12-01 13:21:53,194 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:53,194 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70995790] [2024-12-01 13:21:53,194 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:53,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:53,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:54,235 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:54,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:54,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70995790] [2024-12-01 13:21:54,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [70995790] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:54,235 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:54,236 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:54,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739764694] [2024-12-01 13:21:54,236 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:54,236 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:54,236 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:54,237 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:54,237 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:54,237 INFO L87 Difference]: Start difference. First operand 1365 states and 1791 transitions. Second operand has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:54,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:54,425 INFO L93 Difference]: Finished difference Result 2210 states and 2921 transitions. [2024-12-01 13:21:54,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:54,425 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 713 [2024-12-01 13:21:54,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:54,427 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:54,427 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:54,428 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:54,428 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1890 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 236 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1893 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 237 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 236 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:54,428 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1893 Valid, 2216 Invalid, 237 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 236 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:54,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:54,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:54,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3102431834929993) internal successors, (1778), 1357 states have internal predecessors, (1778), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:54,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1790 transitions. [2024-12-01 13:21:54,443 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1790 transitions. Word has length 713 [2024-12-01 13:21:54,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:54,443 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1790 transitions. [2024-12-01 13:21:54,443 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:54,444 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1790 transitions. [2024-12-01 13:21:54,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 715 [2024-12-01 13:21:54,446 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:54,447 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:54,447 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2024-12-01 13:21:54,447 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:54,447 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:54,447 INFO L85 PathProgramCache]: Analyzing trace with hash 1515638029, now seen corresponding path program 1 times [2024-12-01 13:21:54,447 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:54,447 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [833465287] [2024-12-01 13:21:54,448 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:54,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:54,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:55,442 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:55,443 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:55,443 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [833465287] [2024-12-01 13:21:55,443 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [833465287] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:55,443 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:55,443 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:55,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291213447] [2024-12-01 13:21:55,443 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:55,444 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:55,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:55,445 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:55,445 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:55,445 INFO L87 Difference]: Start difference. First operand 1365 states and 1790 transitions. Second operand has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:55,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:55,632 INFO L93 Difference]: Finished difference Result 2210 states and 2919 transitions. [2024-12-01 13:21:55,632 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:55,633 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 714 [2024-12-01 13:21:55,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:55,634 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:55,634 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:55,634 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:55,635 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1874 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 234 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1877 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 235 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 234 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:55,635 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1877 Valid, 2216 Invalid, 235 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 234 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:55,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:55,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:55,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3095062638172439) internal successors, (1777), 1357 states have internal predecessors, (1777), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:55,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1789 transitions. [2024-12-01 13:21:55,650 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1789 transitions. Word has length 714 [2024-12-01 13:21:55,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:55,650 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1789 transitions. [2024-12-01 13:21:55,650 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:55,650 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1789 transitions. [2024-12-01 13:21:55,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 716 [2024-12-01 13:21:55,653 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:55,653 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:55,653 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76 [2024-12-01 13:21:55,653 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:55,654 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:55,654 INFO L85 PathProgramCache]: Analyzing trace with hash -409983387, now seen corresponding path program 1 times [2024-12-01 13:21:55,654 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:55,654 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224868093] [2024-12-01 13:21:55,654 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:55,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:56,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:56,689 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:56,689 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:56,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224868093] [2024-12-01 13:21:56,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1224868093] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:56,689 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:56,689 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:56,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043511767] [2024-12-01 13:21:56,689 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:56,690 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:56,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:56,690 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:56,690 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:56,690 INFO L87 Difference]: Start difference. First operand 1365 states and 1789 transitions. Second operand has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:56,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:56,873 INFO L93 Difference]: Finished difference Result 2210 states and 2917 transitions. [2024-12-01 13:21:56,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:56,873 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 715 [2024-12-01 13:21:56,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:56,875 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:56,875 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:56,875 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:56,875 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1021 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 232 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1024 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 233 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 232 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:56,876 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1024 Valid, 2223 Invalid, 233 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 232 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:21:56,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:56,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:56,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3087693441414885) internal successors, (1776), 1357 states have internal predecessors, (1776), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:56,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1788 transitions. [2024-12-01 13:21:56,891 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1788 transitions. Word has length 715 [2024-12-01 13:21:56,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:56,892 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1788 transitions. [2024-12-01 13:21:56,892 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:56,892 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1788 transitions. [2024-12-01 13:21:56,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 717 [2024-12-01 13:21:56,895 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:56,895 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:56,895 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77 [2024-12-01 13:21:56,895 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:56,895 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:56,895 INFO L85 PathProgramCache]: Analyzing trace with hash 638983554, now seen corresponding path program 1 times [2024-12-01 13:21:56,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:56,895 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [965852825] [2024-12-01 13:21:56,896 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:56,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:57,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:57,944 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:57,944 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:57,944 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [965852825] [2024-12-01 13:21:57,944 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [965852825] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:57,944 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:57,944 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:57,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [396368367] [2024-12-01 13:21:57,944 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:57,944 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:57,944 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:57,945 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:57,945 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:57,945 INFO L87 Difference]: Start difference. First operand 1365 states and 1788 transitions. Second operand has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:58,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:58,065 INFO L93 Difference]: Finished difference Result 2210 states and 2915 transitions. [2024-12-01 13:21:58,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:58,066 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 716 [2024-12-01 13:21:58,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:58,067 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:58,067 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:58,067 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:58,068 INFO L435 NwaCegarLoop]: 1155 mSDtfsCounter, 982 mSDsluCounter, 1164 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 985 SdHoareTripleChecker+Valid, 2319 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:58,068 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [985 Valid, 2319 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:58,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:58,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:58,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3080324244657333) internal successors, (1775), 1357 states have internal predecessors, (1775), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:58,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1787 transitions. [2024-12-01 13:21:58,082 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1787 transitions. Word has length 716 [2024-12-01 13:21:58,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:58,082 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1787 transitions. [2024-12-01 13:21:58,082 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:58,082 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1787 transitions. [2024-12-01 13:21:58,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 718 [2024-12-01 13:21:58,085 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:58,086 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:58,086 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable78 [2024-12-01 13:21:58,086 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:58,086 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:58,086 INFO L85 PathProgramCache]: Analyzing trace with hash -764040390, now seen corresponding path program 1 times [2024-12-01 13:21:58,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:58,086 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555021056] [2024-12-01 13:21:58,086 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:58,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:58,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:21:59,197 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:21:59,197 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:21:59,197 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555021056] [2024-12-01 13:21:59,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1555021056] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:21:59,197 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:21:59,197 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:21:59,197 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625188373] [2024-12-01 13:21:59,197 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:21:59,198 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:21:59,198 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:21:59,198 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:21:59,198 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:21:59,198 INFO L87 Difference]: Start difference. First operand 1365 states and 1787 transitions. Second operand has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:59,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:21:59,322 INFO L93 Difference]: Finished difference Result 2210 states and 2913 transitions. [2024-12-01 13:21:59,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:21:59,322 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 717 [2024-12-01 13:21:59,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:21:59,323 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:21:59,323 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:21:59,324 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:21:59,324 INFO L435 NwaCegarLoop]: 1155 mSDtfsCounter, 974 mSDsluCounter, 1164 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 977 SdHoareTripleChecker+Valid, 2319 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:21:59,324 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [977 Valid, 2319 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:21:59,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:21:59,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:21:59,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.307295504789978) internal successors, (1774), 1357 states have internal predecessors, (1774), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:21:59,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1786 transitions. [2024-12-01 13:21:59,338 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1786 transitions. Word has length 717 [2024-12-01 13:21:59,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:21:59,339 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1786 transitions. [2024-12-01 13:21:59,339 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:21:59,339 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1786 transitions. [2024-12-01 13:21:59,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 719 [2024-12-01 13:21:59,341 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:21:59,342 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:21:59,342 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable79 [2024-12-01 13:21:59,342 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:21:59,342 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:21:59,342 INFO L85 PathProgramCache]: Analyzing trace with hash 288932215, now seen corresponding path program 1 times [2024-12-01 13:21:59,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:21:59,342 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989562302] [2024-12-01 13:21:59,342 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:21:59,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:21:59,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:00,335 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:00,335 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:00,335 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989562302] [2024-12-01 13:22:00,335 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1989562302] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:00,335 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:00,335 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:00,335 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447241515] [2024-12-01 13:22:00,335 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:00,335 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:00,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:00,336 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:00,336 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:00,336 INFO L87 Difference]: Start difference. First operand 1365 states and 1786 transitions. Second operand has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:00,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:00,465 INFO L93 Difference]: Finished difference Result 2210 states and 2911 transitions. [2024-12-01 13:22:00,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:00,466 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 718 [2024-12-01 13:22:00,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:00,467 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:00,467 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:00,467 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:00,468 INFO L435 NwaCegarLoop]: 1155 mSDtfsCounter, 1779 mSDsluCounter, 1157 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1782 SdHoareTripleChecker+Valid, 2312 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:00,468 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1782 Valid, 2312 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:00,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:00,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:00,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3065585851142225) internal successors, (1773), 1357 states have internal predecessors, (1773), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:00,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1785 transitions. [2024-12-01 13:22:00,482 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1785 transitions. Word has length 718 [2024-12-01 13:22:00,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:00,482 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1785 transitions. [2024-12-01 13:22:00,483 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:00,483 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1785 transitions. [2024-12-01 13:22:00,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 720 [2024-12-01 13:22:00,485 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:00,486 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:00,486 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80 [2024-12-01 13:22:00,486 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:00,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:00,486 INFO L85 PathProgramCache]: Analyzing trace with hash 1218935695, now seen corresponding path program 1 times [2024-12-01 13:22:00,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:00,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [76478814] [2024-12-01 13:22:00,486 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:00,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:00,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:01,906 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:01,906 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:01,906 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [76478814] [2024-12-01 13:22:01,906 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [76478814] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:01,906 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:01,907 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:01,907 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629226146] [2024-12-01 13:22:01,907 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:01,907 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:01,907 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:01,907 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:01,907 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:01,908 INFO L87 Difference]: Start difference. First operand 1365 states and 1785 transitions. Second operand has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:02,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:02,006 INFO L93 Difference]: Finished difference Result 2210 states and 2909 transitions. [2024-12-01 13:22:02,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:02,006 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 719 [2024-12-01 13:22:02,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:02,007 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:02,007 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:02,008 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:02,008 INFO L435 NwaCegarLoop]: 1155 mSDtfsCounter, 1763 mSDsluCounter, 1157 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1766 SdHoareTripleChecker+Valid, 2312 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:02,008 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1766 Valid, 2312 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:02,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:02,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:02,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3058216654384671) internal successors, (1772), 1357 states have internal predecessors, (1772), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:02,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1784 transitions. [2024-12-01 13:22:02,022 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1784 transitions. Word has length 719 [2024-12-01 13:22:02,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:02,022 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1784 transitions. [2024-12-01 13:22:02,023 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:02,023 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1784 transitions. [2024-12-01 13:22:02,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 721 [2024-12-01 13:22:02,025 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:02,026 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:02,026 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81 [2024-12-01 13:22:02,026 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:02,026 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:02,026 INFO L85 PathProgramCache]: Analyzing trace with hash 1143797996, now seen corresponding path program 1 times [2024-12-01 13:22:02,026 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:02,026 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957428995] [2024-12-01 13:22:02,026 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:02,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:02,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:03,121 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:03,121 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:03,121 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957428995] [2024-12-01 13:22:03,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [957428995] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:03,121 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:03,121 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:03,121 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822213940] [2024-12-01 13:22:03,121 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:03,122 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:03,122 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:03,123 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:03,123 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:03,123 INFO L87 Difference]: Start difference. First operand 1365 states and 1784 transitions. Second operand has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:03,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:03,218 INFO L93 Difference]: Finished difference Result 2210 states and 2907 transitions. [2024-12-01 13:22:03,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:03,219 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 720 [2024-12-01 13:22:03,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:03,220 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:03,220 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:03,221 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:03,221 INFO L435 NwaCegarLoop]: 1155 mSDtfsCounter, 1747 mSDsluCounter, 1157 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1750 SdHoareTripleChecker+Valid, 2312 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:03,221 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1750 Valid, 2312 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:03,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:03,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:03,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.305084745762712) internal successors, (1771), 1357 states have internal predecessors, (1771), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:03,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1783 transitions. [2024-12-01 13:22:03,236 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1783 transitions. Word has length 720 [2024-12-01 13:22:03,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:03,236 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1783 transitions. [2024-12-01 13:22:03,236 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:03,236 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1783 transitions. [2024-12-01 13:22:03,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 722 [2024-12-01 13:22:03,239 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:03,239 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:03,239 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82 [2024-12-01 13:22:03,239 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:03,240 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:03,240 INFO L85 PathProgramCache]: Analyzing trace with hash 42850148, now seen corresponding path program 1 times [2024-12-01 13:22:03,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:03,240 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846878655] [2024-12-01 13:22:03,240 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:03,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:03,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:04,265 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:04,265 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:04,265 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846878655] [2024-12-01 13:22:04,265 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1846878655] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:04,265 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:04,265 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:04,265 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490319104] [2024-12-01 13:22:04,265 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:04,266 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:04,266 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:04,267 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:04,267 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:04,267 INFO L87 Difference]: Start difference. First operand 1365 states and 1783 transitions. Second operand has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:04,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:04,389 INFO L93 Difference]: Finished difference Result 2210 states and 2905 transitions. [2024-12-01 13:22:04,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:04,390 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 721 [2024-12-01 13:22:04,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:04,391 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:04,391 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:04,392 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:04,392 INFO L435 NwaCegarLoop]: 1155 mSDtfsCounter, 942 mSDsluCounter, 1164 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 945 SdHoareTripleChecker+Valid, 2319 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:04,392 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [945 Valid, 2319 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:04,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:04,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:04,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3043478260869565) internal successors, (1770), 1357 states have internal predecessors, (1770), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:04,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1782 transitions. [2024-12-01 13:22:04,406 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1782 transitions. Word has length 721 [2024-12-01 13:22:04,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:04,407 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1782 transitions. [2024-12-01 13:22:04,407 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:04,407 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1782 transitions. [2024-12-01 13:22:04,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 723 [2024-12-01 13:22:04,410 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:04,410 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:04,410 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83 [2024-12-01 13:22:04,410 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:04,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:04,410 INFO L85 PathProgramCache]: Analyzing trace with hash -209648671, now seen corresponding path program 1 times [2024-12-01 13:22:04,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:04,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2062975733] [2024-12-01 13:22:04,411 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:04,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:04,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:05,444 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:05,444 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:05,444 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2062975733] [2024-12-01 13:22:05,445 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2062975733] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:05,445 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:05,445 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:05,445 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [723408536] [2024-12-01 13:22:05,445 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:05,446 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:05,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:05,446 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:05,446 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:05,447 INFO L87 Difference]: Start difference. First operand 1365 states and 1782 transitions. Second operand has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:05,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:05,558 INFO L93 Difference]: Finished difference Result 2210 states and 2903 transitions. [2024-12-01 13:22:05,558 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:05,559 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 722 [2024-12-01 13:22:05,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:05,560 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:05,560 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:05,561 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:05,561 INFO L435 NwaCegarLoop]: 1155 mSDtfsCounter, 934 mSDsluCounter, 1164 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 937 SdHoareTripleChecker+Valid, 2319 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:05,561 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [937 Valid, 2319 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:05,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:05,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:05,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3036109064112011) internal successors, (1769), 1357 states have internal predecessors, (1769), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:05,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1781 transitions. [2024-12-01 13:22:05,575 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1781 transitions. Word has length 722 [2024-12-01 13:22:05,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:05,576 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1781 transitions. [2024-12-01 13:22:05,576 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:05,576 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1781 transitions. [2024-12-01 13:22:05,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 724 [2024-12-01 13:22:05,579 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:05,579 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:05,579 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84 [2024-12-01 13:22:05,579 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:05,579 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:05,580 INFO L85 PathProgramCache]: Analyzing trace with hash 1915813561, now seen corresponding path program 1 times [2024-12-01 13:22:05,580 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:05,580 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1630636847] [2024-12-01 13:22:05,580 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:05,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:05,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:06,616 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:06,616 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:06,616 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1630636847] [2024-12-01 13:22:06,616 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1630636847] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:06,616 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:06,616 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:06,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463910165] [2024-12-01 13:22:06,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:06,617 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:06,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:06,618 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:06,618 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:06,618 INFO L87 Difference]: Start difference. First operand 1365 states and 1781 transitions. Second operand has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:06,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:06,725 INFO L93 Difference]: Finished difference Result 2210 states and 2901 transitions. [2024-12-01 13:22:06,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:06,725 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 723 [2024-12-01 13:22:06,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:06,727 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:06,727 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:06,728 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:06,728 INFO L435 NwaCegarLoop]: 1155 mSDtfsCounter, 1699 mSDsluCounter, 1157 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1702 SdHoareTripleChecker+Valid, 2312 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:06,728 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1702 Valid, 2312 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:06,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:06,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:06,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3028739867354457) internal successors, (1768), 1357 states have internal predecessors, (1768), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:06,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1780 transitions. [2024-12-01 13:22:06,743 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1780 transitions. Word has length 723 [2024-12-01 13:22:06,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:06,743 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1780 transitions. [2024-12-01 13:22:06,743 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:06,743 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1780 transitions. [2024-12-01 13:22:06,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 725 [2024-12-01 13:22:06,746 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:06,746 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:06,746 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85 [2024-12-01 13:22:06,747 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:06,747 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:06,747 INFO L85 PathProgramCache]: Analyzing trace with hash 1608720982, now seen corresponding path program 1 times [2024-12-01 13:22:06,747 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:06,747 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144715356] [2024-12-01 13:22:06,747 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:06,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:07,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:07,797 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:07,797 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:07,797 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144715356] [2024-12-01 13:22:07,797 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [144715356] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:07,797 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:07,798 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:07,798 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [280180759] [2024-12-01 13:22:07,798 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:07,798 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:07,798 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:07,799 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:07,799 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:07,799 INFO L87 Difference]: Start difference. First operand 1365 states and 1780 transitions. Second operand has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:07,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:07,869 INFO L93 Difference]: Finished difference Result 2210 states and 2899 transitions. [2024-12-01 13:22:07,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:07,870 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 724 [2024-12-01 13:22:07,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:07,871 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:07,871 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:07,871 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:07,872 INFO L435 NwaCegarLoop]: 1179 mSDtfsCounter, 903 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 906 SdHoareTripleChecker+Valid, 2367 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:07,872 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [906 Valid, 2367 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:22:07,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:07,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:07,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3021370670596906) internal successors, (1767), 1357 states have internal predecessors, (1767), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:07,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1779 transitions. [2024-12-01 13:22:07,886 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1779 transitions. Word has length 724 [2024-12-01 13:22:07,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:07,886 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1779 transitions. [2024-12-01 13:22:07,887 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:07,887 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1779 transitions. [2024-12-01 13:22:07,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 726 [2024-12-01 13:22:07,890 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:07,890 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:07,890 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86 [2024-12-01 13:22:07,890 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:07,890 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:07,890 INFO L85 PathProgramCache]: Analyzing trace with hash 1664692622, now seen corresponding path program 1 times [2024-12-01 13:22:07,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:07,890 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661918411] [2024-12-01 13:22:07,891 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:07,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:08,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:08,946 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:08,946 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:08,946 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661918411] [2024-12-01 13:22:08,946 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [661918411] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:08,946 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:08,946 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:08,946 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896292864] [2024-12-01 13:22:08,946 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:08,947 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:08,947 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:08,948 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:08,948 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:08,948 INFO L87 Difference]: Start difference. First operand 1365 states and 1779 transitions. Second operand has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:09,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:09,017 INFO L93 Difference]: Finished difference Result 2210 states and 2897 transitions. [2024-12-01 13:22:09,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:09,017 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 725 [2024-12-01 13:22:09,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:09,018 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:09,018 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:09,019 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:09,019 INFO L435 NwaCegarLoop]: 1179 mSDtfsCounter, 1652 mSDsluCounter, 1181 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1655 SdHoareTripleChecker+Valid, 2360 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:09,019 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1655 Valid, 2360 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:22:09,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:09,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:09,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3014001473839352) internal successors, (1766), 1357 states have internal predecessors, (1766), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:09,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1778 transitions. [2024-12-01 13:22:09,034 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1778 transitions. Word has length 725 [2024-12-01 13:22:09,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:09,034 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1778 transitions. [2024-12-01 13:22:09,034 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:09,034 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1778 transitions. [2024-12-01 13:22:09,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 727 [2024-12-01 13:22:09,037 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:09,037 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:09,037 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87 [2024-12-01 13:22:09,037 INFO L396 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:09,037 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:09,037 INFO L85 PathProgramCache]: Analyzing trace with hash -702442421, now seen corresponding path program 1 times [2024-12-01 13:22:09,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:09,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873618977] [2024-12-01 13:22:09,038 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:09,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:09,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:10,067 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:10,067 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:10,067 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873618977] [2024-12-01 13:22:10,067 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [873618977] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:10,067 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:10,067 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:10,067 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [535369333] [2024-12-01 13:22:10,067 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:10,068 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:10,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:10,069 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:10,069 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:10,069 INFO L87 Difference]: Start difference. First operand 1365 states and 1778 transitions. Second operand has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:10,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:10,150 INFO L93 Difference]: Finished difference Result 2210 states and 2895 transitions. [2024-12-01 13:22:10,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:10,151 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 726 [2024-12-01 13:22:10,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:10,152 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:10,152 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:10,153 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:10,153 INFO L435 NwaCegarLoop]: 1179 mSDtfsCounter, 887 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 890 SdHoareTripleChecker+Valid, 2367 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:10,153 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [890 Valid, 2367 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:10,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:10,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:10,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3006632277081798) internal successors, (1765), 1357 states have internal predecessors, (1765), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:10,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1777 transitions. [2024-12-01 13:22:10,167 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1777 transitions. Word has length 726 [2024-12-01 13:22:10,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:10,168 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1777 transitions. [2024-12-01 13:22:10,168 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:10,168 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1777 transitions. [2024-12-01 13:22:10,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 728 [2024-12-01 13:22:10,170 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:10,171 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:10,171 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable88 [2024-12-01 13:22:10,171 INFO L396 AbstractCegarLoop]: === Iteration 90 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:10,171 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:10,171 INFO L85 PathProgramCache]: Analyzing trace with hash -1695633437, now seen corresponding path program 1 times [2024-12-01 13:22:10,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:10,171 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079525982] [2024-12-01 13:22:10,171 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:10,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:10,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:11,262 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:11,263 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:11,263 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2079525982] [2024-12-01 13:22:11,263 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2079525982] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:11,263 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:11,263 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:11,263 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1081063278] [2024-12-01 13:22:11,263 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:11,264 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:11,264 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:11,265 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:11,265 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:11,265 INFO L87 Difference]: Start difference. First operand 1365 states and 1777 transitions. Second operand has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:11,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:11,342 INFO L93 Difference]: Finished difference Result 2210 states and 2893 transitions. [2024-12-01 13:22:11,343 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:11,343 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 727 [2024-12-01 13:22:11,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:11,344 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:11,344 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:11,345 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:11,345 INFO L435 NwaCegarLoop]: 1179 mSDtfsCounter, 1620 mSDsluCounter, 1181 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1623 SdHoareTripleChecker+Valid, 2360 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:11,345 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1623 Valid, 2360 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:11,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:11,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:11,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2999263080324244) internal successors, (1764), 1357 states have internal predecessors, (1764), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:11,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1776 transitions. [2024-12-01 13:22:11,360 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1776 transitions. Word has length 727 [2024-12-01 13:22:11,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:11,360 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1776 transitions. [2024-12-01 13:22:11,360 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:11,360 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1776 transitions. [2024-12-01 13:22:11,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 729 [2024-12-01 13:22:11,363 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:11,363 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:11,363 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable89 [2024-12-01 13:22:11,363 INFO L396 AbstractCegarLoop]: === Iteration 91 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:11,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:11,364 INFO L85 PathProgramCache]: Analyzing trace with hash -1356162624, now seen corresponding path program 1 times [2024-12-01 13:22:11,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:11,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976055004] [2024-12-01 13:22:11,364 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:11,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:11,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:12,557 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:12,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:12,558 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976055004] [2024-12-01 13:22:12,558 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1976055004] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:12,558 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:12,558 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:12,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [651074425] [2024-12-01 13:22:12,558 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:12,558 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:12,558 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:12,559 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:12,559 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:12,559 INFO L87 Difference]: Start difference. First operand 1365 states and 1776 transitions. Second operand has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:12,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:12,609 INFO L93 Difference]: Finished difference Result 2210 states and 2891 transitions. [2024-12-01 13:22:12,609 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:12,609 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 728 [2024-12-01 13:22:12,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:12,610 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:12,611 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:12,611 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:12,611 INFO L435 NwaCegarLoop]: 1191 mSDtfsCounter, 864 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 867 SdHoareTripleChecker+Valid, 2391 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:12,611 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [867 Valid, 2391 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:22:12,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:12,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:12,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2991893883566692) internal successors, (1763), 1357 states have internal predecessors, (1763), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:12,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1775 transitions. [2024-12-01 13:22:12,625 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1775 transitions. Word has length 728 [2024-12-01 13:22:12,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:12,626 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1775 transitions. [2024-12-01 13:22:12,626 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:12,626 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1775 transitions. [2024-12-01 13:22:12,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 730 [2024-12-01 13:22:12,628 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:12,629 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:12,629 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable90 [2024-12-01 13:22:12,629 INFO L396 AbstractCegarLoop]: === Iteration 92 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:12,629 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:12,629 INFO L85 PathProgramCache]: Analyzing trace with hash 2017049016, now seen corresponding path program 1 times [2024-12-01 13:22:12,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:12,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025239671] [2024-12-01 13:22:12,629 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:12,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:13,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:13,773 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:13,773 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:13,773 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025239671] [2024-12-01 13:22:13,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1025239671] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:13,773 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:13,774 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:13,774 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994824167] [2024-12-01 13:22:13,774 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:13,774 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:13,774 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:13,775 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:13,775 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:13,775 INFO L87 Difference]: Start difference. First operand 1365 states and 1775 transitions. Second operand has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:13,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:13,834 INFO L93 Difference]: Finished difference Result 2210 states and 2889 transitions. [2024-12-01 13:22:13,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:13,835 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 729 [2024-12-01 13:22:13,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:13,836 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:13,836 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:13,836 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:13,837 INFO L435 NwaCegarLoop]: 1191 mSDtfsCounter, 1581 mSDsluCounter, 1193 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1584 SdHoareTripleChecker+Valid, 2384 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:13,837 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1584 Valid, 2384 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:22:13,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:13,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:13,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2984524686809138) internal successors, (1762), 1357 states have internal predecessors, (1762), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:13,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1774 transitions. [2024-12-01 13:22:13,851 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1774 transitions. Word has length 729 [2024-12-01 13:22:13,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:13,851 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1774 transitions. [2024-12-01 13:22:13,851 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:13,852 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1774 transitions. [2024-12-01 13:22:13,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 731 [2024-12-01 13:22:13,854 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:13,854 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:13,855 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable91 [2024-12-01 13:22:13,855 INFO L396 AbstractCegarLoop]: === Iteration 93 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:13,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:13,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1342993077, now seen corresponding path program 1 times [2024-12-01 13:22:13,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:13,855 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461187632] [2024-12-01 13:22:13,855 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:13,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:14,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:15,033 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:15,034 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:15,034 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1461187632] [2024-12-01 13:22:15,034 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1461187632] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:15,034 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:15,034 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:15,034 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1408101338] [2024-12-01 13:22:15,034 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:15,034 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:15,034 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:15,035 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:15,035 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:15,035 INFO L87 Difference]: Start difference. First operand 1365 states and 1774 transitions. Second operand has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:15,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:15,388 INFO L93 Difference]: Finished difference Result 2210 states and 2887 transitions. [2024-12-01 13:22:15,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:15,388 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 730 [2024-12-01 13:22:15,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:15,390 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:15,390 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:15,390 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:15,391 INFO L435 NwaCegarLoop]: 931 mSDtfsCounter, 845 mSDsluCounter, 940 mSDsCounter, 0 mSdLazyCounter, 554 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 848 SdHoareTripleChecker+Valid, 1871 SdHoareTripleChecker+Invalid, 555 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 554 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:15,391 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [848 Valid, 1871 Invalid, 555 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 554 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-01 13:22:15,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:15,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:15,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2977155490051584) internal successors, (1761), 1357 states have internal predecessors, (1761), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:15,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1773 transitions. [2024-12-01 13:22:15,405 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1773 transitions. Word has length 730 [2024-12-01 13:22:15,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:15,405 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1773 transitions. [2024-12-01 13:22:15,405 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:15,405 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1773 transitions. [2024-12-01 13:22:15,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 732 [2024-12-01 13:22:15,408 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:15,408 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:15,408 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable92 [2024-12-01 13:22:15,408 INFO L396 AbstractCegarLoop]: === Iteration 94 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:15,409 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:15,409 INFO L85 PathProgramCache]: Analyzing trace with hash -1818063091, now seen corresponding path program 1 times [2024-12-01 13:22:15,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:15,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598469637] [2024-12-01 13:22:15,409 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:15,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:16,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:17,948 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:17,948 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:17,948 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598469637] [2024-12-01 13:22:17,948 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [598469637] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:17,948 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:17,949 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:22:17,949 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427166198] [2024-12-01 13:22:17,949 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:17,949 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:22:17,950 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:17,950 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:22:17,950 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:22:17,950 INFO L87 Difference]: Start difference. First operand 1365 states and 1773 transitions. Second operand has 4 states, 4 states have (on average 176.0) internal successors, (704), 4 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:18,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:18,006 INFO L93 Difference]: Finished difference Result 2210 states and 2885 transitions. [2024-12-01 13:22:18,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:18,006 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 176.0) internal successors, (704), 4 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 731 [2024-12-01 13:22:18,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:18,007 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:18,007 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:18,008 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:18,008 INFO L435 NwaCegarLoop]: 1190 mSDtfsCounter, 724 mSDsluCounter, 1192 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 724 SdHoareTripleChecker+Valid, 2382 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:18,008 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [724 Valid, 2382 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:22:18,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:18,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:18,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.296978629329403) internal successors, (1760), 1357 states have internal predecessors, (1760), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:18,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1772 transitions. [2024-12-01 13:22:18,023 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1772 transitions. Word has length 731 [2024-12-01 13:22:18,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:18,023 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1772 transitions. [2024-12-01 13:22:18,023 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 176.0) internal successors, (704), 4 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:18,023 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1772 transitions. [2024-12-01 13:22:18,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 733 [2024-12-01 13:22:18,026 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:18,026 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:18,026 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable93 [2024-12-01 13:22:18,026 INFO L396 AbstractCegarLoop]: === Iteration 95 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:18,026 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:18,027 INFO L85 PathProgramCache]: Analyzing trace with hash -1827100057, now seen corresponding path program 1 times [2024-12-01 13:22:18,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:18,027 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2057923851] [2024-12-01 13:22:18,027 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:18,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:19,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:20,255 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:20,256 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:20,256 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2057923851] [2024-12-01 13:22:20,256 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2057923851] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:20,256 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:20,256 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:20,256 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924444543] [2024-12-01 13:22:20,256 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:20,256 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:20,256 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:20,257 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:20,257 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:20,257 INFO L87 Difference]: Start difference. First operand 1365 states and 1772 transitions. Second operand has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:20,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:20,344 INFO L93 Difference]: Finished difference Result 2210 states and 2883 transitions. [2024-12-01 13:22:20,345 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:20,345 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 732 [2024-12-01 13:22:20,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:20,346 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:20,346 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:20,347 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:20,347 INFO L435 NwaCegarLoop]: 1175 mSDtfsCounter, 1059 mSDsluCounter, 1184 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1059 SdHoareTripleChecker+Valid, 2359 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:20,347 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1059 Valid, 2359 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:20,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:20,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:20,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2962417096536478) internal successors, (1759), 1357 states have internal predecessors, (1759), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:20,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1771 transitions. [2024-12-01 13:22:20,363 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1771 transitions. Word has length 732 [2024-12-01 13:22:20,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:20,364 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1771 transitions. [2024-12-01 13:22:20,364 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:20,364 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1771 transitions. [2024-12-01 13:22:20,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 734 [2024-12-01 13:22:20,367 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:20,367 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:20,367 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable94 [2024-12-01 13:22:20,367 INFO L396 AbstractCegarLoop]: === Iteration 96 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:20,367 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:20,367 INFO L85 PathProgramCache]: Analyzing trace with hash 1798233229, now seen corresponding path program 1 times [2024-12-01 13:22:20,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:20,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [174655257] [2024-12-01 13:22:20,368 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:20,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:21,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:22,639 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:22,639 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:22,640 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [174655257] [2024-12-01 13:22:22,640 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [174655257] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:22,640 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:22,640 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:22,640 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1311063087] [2024-12-01 13:22:22,640 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:22,640 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:22,640 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:22,641 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:22,641 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:22,641 INFO L87 Difference]: Start difference. First operand 1365 states and 1771 transitions. Second operand has 5 states, 5 states have (on average 141.2) internal successors, (706), 5 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:22,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:22,718 INFO L93 Difference]: Finished difference Result 2210 states and 2881 transitions. [2024-12-01 13:22:22,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:22,718 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.2) internal successors, (706), 5 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 733 [2024-12-01 13:22:22,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:22,719 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:22,719 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:22,720 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:22,720 INFO L435 NwaCegarLoop]: 1175 mSDtfsCounter, 1799 mSDsluCounter, 1177 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1799 SdHoareTripleChecker+Valid, 2352 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:22,720 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1799 Valid, 2352 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:22:22,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:22,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:22,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2955047899778924) internal successors, (1758), 1357 states have internal predecessors, (1758), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:22,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1770 transitions. [2024-12-01 13:22:22,736 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1770 transitions. Word has length 733 [2024-12-01 13:22:22,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:22,736 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1770 transitions. [2024-12-01 13:22:22,736 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.2) internal successors, (706), 5 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:22,736 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1770 transitions. [2024-12-01 13:22:22,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 735 [2024-12-01 13:22:22,739 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:22,739 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:22,739 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable95 [2024-12-01 13:22:22,739 INFO L396 AbstractCegarLoop]: === Iteration 97 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:22,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:22,740 INFO L85 PathProgramCache]: Analyzing trace with hash -59658122, now seen corresponding path program 1 times [2024-12-01 13:22:22,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:22,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034316766] [2024-12-01 13:22:22,740 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:22,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:24,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:25,010 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:25,010 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:25,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034316766] [2024-12-01 13:22:25,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034316766] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:25,010 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:25,010 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:22:25,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1489987817] [2024-12-01 13:22:25,010 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:25,010 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:22:25,010 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:25,011 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:22:25,011 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:22:25,011 INFO L87 Difference]: Start difference. First operand 1365 states and 1770 transitions. Second operand has 4 states, 4 states have (on average 176.75) internal successors, (707), 4 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:25,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:25,079 INFO L93 Difference]: Finished difference Result 2210 states and 2879 transitions. [2024-12-01 13:22:25,080 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:25,080 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 176.75) internal successors, (707), 4 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 734 [2024-12-01 13:22:25,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:25,081 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:25,081 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:25,081 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:25,082 INFO L435 NwaCegarLoop]: 1175 mSDtfsCounter, 733 mSDsluCounter, 1177 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 733 SdHoareTripleChecker+Valid, 2352 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:25,082 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [733 Valid, 2352 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:22:25,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:25,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:25,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.294767870302137) internal successors, (1757), 1357 states have internal predecessors, (1757), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:25,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1769 transitions. [2024-12-01 13:22:25,097 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1769 transitions. Word has length 734 [2024-12-01 13:22:25,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:25,098 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1769 transitions. [2024-12-01 13:22:25,098 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 176.75) internal successors, (707), 4 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:25,098 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1769 transitions. [2024-12-01 13:22:25,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 736 [2024-12-01 13:22:25,101 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:25,101 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:25,101 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable96 [2024-12-01 13:22:25,101 INFO L396 AbstractCegarLoop]: === Iteration 98 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:25,101 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:25,101 INFO L85 PathProgramCache]: Analyzing trace with hash 807723838, now seen corresponding path program 1 times [2024-12-01 13:22:25,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:25,101 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316089157] [2024-12-01 13:22:25,102 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:25,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:26,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:27,281 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:27,281 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:27,281 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316089157] [2024-12-01 13:22:27,281 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1316089157] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:27,281 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:27,281 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:27,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [340157864] [2024-12-01 13:22:27,281 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:27,281 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:27,282 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:27,282 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:27,282 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:27,282 INFO L87 Difference]: Start difference. First operand 1365 states and 1769 transitions. Second operand has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:27,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:27,415 INFO L93 Difference]: Finished difference Result 2210 states and 2877 transitions. [2024-12-01 13:22:27,416 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:27,416 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 735 [2024-12-01 13:22:27,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:27,417 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:27,417 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:27,417 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:27,418 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 1041 mSDsluCounter, 1153 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1041 SdHoareTripleChecker+Valid, 2297 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:27,418 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1041 Valid, 2297 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:27,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:27,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:27,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2940309506263816) internal successors, (1756), 1357 states have internal predecessors, (1756), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:27,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1768 transitions. [2024-12-01 13:22:27,432 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1768 transitions. Word has length 735 [2024-12-01 13:22:27,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:27,432 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1768 transitions. [2024-12-01 13:22:27,432 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:27,432 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1768 transitions. [2024-12-01 13:22:27,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 737 [2024-12-01 13:22:27,435 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:27,435 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:27,436 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable97 [2024-12-01 13:22:27,436 INFO L396 AbstractCegarLoop]: === Iteration 99 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:27,436 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:27,436 INFO L85 PathProgramCache]: Analyzing trace with hash -428195112, now seen corresponding path program 1 times [2024-12-01 13:22:27,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:27,436 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1586830725] [2024-12-01 13:22:27,436 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:27,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:28,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:29,721 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:29,721 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:29,721 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1586830725] [2024-12-01 13:22:29,721 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1586830725] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:29,721 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:29,722 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:29,722 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1995265103] [2024-12-01 13:22:29,722 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:29,722 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:29,722 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:29,723 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:29,723 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:29,723 INFO L87 Difference]: Start difference. First operand 1365 states and 1768 transitions. Second operand has 5 states, 5 states have (on average 141.8) internal successors, (709), 5 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:29,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:29,852 INFO L93 Difference]: Finished difference Result 2210 states and 2875 transitions. [2024-12-01 13:22:29,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:29,853 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.8) internal successors, (709), 5 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 736 [2024-12-01 13:22:29,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:29,854 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:29,854 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:29,854 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:29,855 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 1040 mSDsluCounter, 1153 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1040 SdHoareTripleChecker+Valid, 2297 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:29,855 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1040 Valid, 2297 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:29,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:29,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:29,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2932940309506264) internal successors, (1755), 1357 states have internal predecessors, (1755), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:29,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1767 transitions. [2024-12-01 13:22:29,869 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1767 transitions. Word has length 736 [2024-12-01 13:22:29,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:29,869 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1767 transitions. [2024-12-01 13:22:29,869 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.8) internal successors, (709), 5 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:29,869 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1767 transitions. [2024-12-01 13:22:29,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 738 [2024-12-01 13:22:29,872 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:29,872 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:29,872 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable98 [2024-12-01 13:22:29,872 INFO L396 AbstractCegarLoop]: === Iteration 100 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:29,873 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:29,873 INFO L85 PathProgramCache]: Analyzing trace with hash -2005059633, now seen corresponding path program 1 times [2024-12-01 13:22:29,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:29,873 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1254370953] [2024-12-01 13:22:29,873 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:29,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:31,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:32,312 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:32,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:32,312 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1254370953] [2024-12-01 13:22:32,312 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1254370953] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:32,312 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:32,312 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:22:32,312 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [542551379] [2024-12-01 13:22:32,312 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:32,312 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:22:32,312 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:32,313 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:22:32,313 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:22:32,313 INFO L87 Difference]: Start difference. First operand 1365 states and 1767 transitions. Second operand has 4 states, 4 states have (on average 177.5) internal successors, (710), 4 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:32,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:32,409 INFO L93 Difference]: Finished difference Result 2210 states and 2873 transitions. [2024-12-01 13:22:32,409 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:32,409 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 177.5) internal successors, (710), 4 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 737 [2024-12-01 13:22:32,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:32,410 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:32,410 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:32,411 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:32,411 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 786 mSDsluCounter, 1146 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 786 SdHoareTripleChecker+Valid, 2290 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:32,411 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [786 Valid, 2290 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:32,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:32,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:32,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.292557111274871) internal successors, (1754), 1357 states have internal predecessors, (1754), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:32,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1766 transitions. [2024-12-01 13:22:32,434 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1766 transitions. Word has length 737 [2024-12-01 13:22:32,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:32,434 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1766 transitions. [2024-12-01 13:22:32,434 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 177.5) internal successors, (710), 4 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:32,434 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1766 transitions. [2024-12-01 13:22:32,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 739 [2024-12-01 13:22:32,437 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:32,438 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:32,438 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable99 [2024-12-01 13:22:32,438 INFO L396 AbstractCegarLoop]: === Iteration 101 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:32,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:32,438 INFO L85 PathProgramCache]: Analyzing trace with hash -1655051897, now seen corresponding path program 1 times [2024-12-01 13:22:32,438 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:32,438 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [883769948] [2024-12-01 13:22:32,438 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:32,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:34,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:35,056 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:35,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:35,056 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [883769948] [2024-12-01 13:22:35,056 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [883769948] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:35,056 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:35,056 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:35,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1220458358] [2024-12-01 13:22:35,056 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:35,057 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:35,057 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:35,057 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:35,057 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:35,058 INFO L87 Difference]: Start difference. First operand 1365 states and 1766 transitions. Second operand has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:35,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:35,218 INFO L93 Difference]: Finished difference Result 2210 states and 2871 transitions. [2024-12-01 13:22:35,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:35,219 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 738 [2024-12-01 13:22:35,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:35,220 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:35,220 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:35,221 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:35,221 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 1038 mSDsluCounter, 1153 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1038 SdHoareTripleChecker+Valid, 2297 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:35,221 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1038 Valid, 2297 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:35,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:35,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:35,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2918201915991157) internal successors, (1753), 1357 states have internal predecessors, (1753), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:35,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1765 transitions. [2024-12-01 13:22:35,235 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1765 transitions. Word has length 738 [2024-12-01 13:22:35,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:35,235 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1765 transitions. [2024-12-01 13:22:35,236 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:35,236 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1765 transitions. [2024-12-01 13:22:35,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 740 [2024-12-01 13:22:35,238 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:35,238 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:35,239 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable100 [2024-12-01 13:22:35,239 INFO L396 AbstractCegarLoop]: === Iteration 102 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:35,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:35,239 INFO L85 PathProgramCache]: Analyzing trace with hash -1603599904, now seen corresponding path program 1 times [2024-12-01 13:22:35,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:35,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908025110] [2024-12-01 13:22:35,239 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:35,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:36,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:37,793 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:37,794 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:37,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1908025110] [2024-12-01 13:22:37,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1908025110] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:37,794 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:37,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:37,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518943822] [2024-12-01 13:22:37,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:37,794 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:37,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:37,795 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:37,795 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:37,795 INFO L87 Difference]: Start difference. First operand 1365 states and 1765 transitions. Second operand has 5 states, 5 states have (on average 142.4) internal successors, (712), 5 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:37,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:37,918 INFO L93 Difference]: Finished difference Result 2210 states and 2869 transitions. [2024-12-01 13:22:37,919 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:37,919 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.4) internal successors, (712), 5 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 739 [2024-12-01 13:22:37,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:37,920 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:37,920 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:37,920 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:37,921 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 1037 mSDsluCounter, 1153 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1037 SdHoareTripleChecker+Valid, 2297 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:37,921 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1037 Valid, 2297 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:37,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:37,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:37,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2910832719233603) internal successors, (1752), 1357 states have internal predecessors, (1752), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:37,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1764 transitions. [2024-12-01 13:22:37,935 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1764 transitions. Word has length 739 [2024-12-01 13:22:37,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:37,935 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1764 transitions. [2024-12-01 13:22:37,935 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.4) internal successors, (712), 5 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:37,935 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1764 transitions. [2024-12-01 13:22:37,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 741 [2024-12-01 13:22:37,938 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:37,938 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:37,938 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable101 [2024-12-01 13:22:37,938 INFO L396 AbstractCegarLoop]: === Iteration 103 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:37,938 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:37,938 INFO L85 PathProgramCache]: Analyzing trace with hash -1438432586, now seen corresponding path program 1 times [2024-12-01 13:22:37,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:37,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931428526] [2024-12-01 13:22:37,938 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:37,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:39,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:40,460 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:40,460 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:40,460 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [931428526] [2024-12-01 13:22:40,460 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [931428526] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:40,460 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:40,460 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:40,460 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648285534] [2024-12-01 13:22:40,460 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:40,460 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:40,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:40,461 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:40,461 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:40,461 INFO L87 Difference]: Start difference. First operand 1365 states and 1764 transitions. Second operand has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:40,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:40,583 INFO L93 Difference]: Finished difference Result 2210 states and 2867 transitions. [2024-12-01 13:22:40,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:40,583 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 740 [2024-12-01 13:22:40,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:40,585 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:40,585 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:40,585 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:40,585 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 1794 mSDsluCounter, 1146 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1794 SdHoareTripleChecker+Valid, 2290 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:40,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1794 Valid, 2290 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:40,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:40,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:40,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.290346352247605) internal successors, (1751), 1357 states have internal predecessors, (1751), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:40,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1763 transitions. [2024-12-01 13:22:40,601 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1763 transitions. Word has length 740 [2024-12-01 13:22:40,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:40,601 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1763 transitions. [2024-12-01 13:22:40,601 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:40,601 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1763 transitions. [2024-12-01 13:22:40,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 742 [2024-12-01 13:22:40,604 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:40,604 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:40,604 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable102 [2024-12-01 13:22:40,604 INFO L396 AbstractCegarLoop]: === Iteration 104 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:40,604 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:40,605 INFO L85 PathProgramCache]: Analyzing trace with hash -1985220239, now seen corresponding path program 1 times [2024-12-01 13:22:40,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:40,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825867555] [2024-12-01 13:22:40,605 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:40,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:42,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:43,186 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:43,187 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:43,187 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825867555] [2024-12-01 13:22:43,187 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [825867555] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:43,187 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:43,187 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-01 13:22:43,187 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1426116313] [2024-12-01 13:22:43,187 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:43,187 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:22:43,187 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:43,187 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:22:43,188 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-01 13:22:43,188 INFO L87 Difference]: Start difference. First operand 1365 states and 1763 transitions. Second operand has 4 states, 4 states have (on average 178.5) internal successors, (714), 4 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:43,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:43,296 INFO L93 Difference]: Finished difference Result 2210 states and 2865 transitions. [2024-12-01 13:22:43,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:43,297 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 178.5) internal successors, (714), 4 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 741 [2024-12-01 13:22:43,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:43,298 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:43,298 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:43,298 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:43,298 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 750 mSDsluCounter, 1146 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 750 SdHoareTripleChecker+Valid, 2290 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:43,299 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [750 Valid, 2290 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:22:43,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:43,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:43,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2896094325718497) internal successors, (1750), 1357 states have internal predecessors, (1750), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:43,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1762 transitions. [2024-12-01 13:22:43,313 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1762 transitions. Word has length 741 [2024-12-01 13:22:43,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:43,313 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1762 transitions. [2024-12-01 13:22:43,313 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 178.5) internal successors, (714), 4 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:43,313 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1762 transitions. [2024-12-01 13:22:43,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 743 [2024-12-01 13:22:43,316 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:43,316 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:43,316 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable103 [2024-12-01 13:22:43,316 INFO L396 AbstractCegarLoop]: === Iteration 105 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:43,316 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:43,316 INFO L85 PathProgramCache]: Analyzing trace with hash 484482661, now seen corresponding path program 1 times [2024-12-01 13:22:43,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:43,316 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025379816] [2024-12-01 13:22:43,316 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:43,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:44,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:45,847 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:45,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:45,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025379816] [2024-12-01 13:22:45,847 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1025379816] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:45,847 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:45,847 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:45,847 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [410103288] [2024-12-01 13:22:45,847 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:45,848 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:45,848 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:45,848 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:45,848 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:45,848 INFO L87 Difference]: Start difference. First operand 1365 states and 1762 transitions. Second operand has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:46,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:46,036 INFO L93 Difference]: Finished difference Result 2210 states and 2863 transitions. [2024-12-01 13:22:46,036 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:46,036 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 742 [2024-12-01 13:22:46,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:46,037 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:46,037 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:46,038 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:46,038 INFO L435 NwaCegarLoop]: 1081 mSDtfsCounter, 1003 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 230 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1003 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:46,038 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1003 Valid, 2171 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 230 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:22:46,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:46,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:46,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2888725128960943) internal successors, (1749), 1357 states have internal predecessors, (1749), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:46,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1761 transitions. [2024-12-01 13:22:46,052 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1761 transitions. Word has length 742 [2024-12-01 13:22:46,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:46,053 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1761 transitions. [2024-12-01 13:22:46,053 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:46,053 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1761 transitions. [2024-12-01 13:22:46,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 744 [2024-12-01 13:22:46,058 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:46,058 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:46,058 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable104 [2024-12-01 13:22:46,058 INFO L396 AbstractCegarLoop]: === Iteration 106 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:46,058 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:46,058 INFO L85 PathProgramCache]: Analyzing trace with hash -437655925, now seen corresponding path program 1 times [2024-12-01 13:22:46,059 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:46,059 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543393214] [2024-12-01 13:22:46,059 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:46,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:47,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:48,782 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:48,783 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:48,783 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1543393214] [2024-12-01 13:22:48,783 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1543393214] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:48,783 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:48,783 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:48,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1553889789] [2024-12-01 13:22:48,783 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:48,784 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:48,784 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:48,784 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:48,784 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:48,784 INFO L87 Difference]: Start difference. First operand 1365 states and 1761 transitions. Second operand has 5 states, 5 states have (on average 143.2) internal successors, (716), 5 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:48,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:48,981 INFO L93 Difference]: Finished difference Result 2210 states and 2861 transitions. [2024-12-01 13:22:48,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:48,982 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.2) internal successors, (716), 5 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 743 [2024-12-01 13:22:48,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:48,983 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:48,983 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:48,983 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:48,984 INFO L435 NwaCegarLoop]: 1081 mSDtfsCounter, 1002 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 228 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1002 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 228 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:48,984 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1002 Valid, 2171 Invalid, 228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 228 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:22:48,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:48,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:48,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2881355932203389) internal successors, (1748), 1357 states have internal predecessors, (1748), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:48,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1760 transitions. [2024-12-01 13:22:49,000 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1760 transitions. Word has length 743 [2024-12-01 13:22:49,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:49,000 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1760 transitions. [2024-12-01 13:22:49,000 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.2) internal successors, (716), 5 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:49,000 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1760 transitions. [2024-12-01 13:22:49,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 745 [2024-12-01 13:22:49,003 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:49,003 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:49,003 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable105 [2024-12-01 13:22:49,003 INFO L396 AbstractCegarLoop]: === Iteration 107 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:49,003 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:49,003 INFO L85 PathProgramCache]: Analyzing trace with hash -1288674636, now seen corresponding path program 1 times [2024-12-01 13:22:49,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:49,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191834469] [2024-12-01 13:22:49,003 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:49,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:50,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:51,600 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:51,600 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:51,600 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191834469] [2024-12-01 13:22:51,600 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [191834469] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:51,600 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:51,600 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:51,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [550709769] [2024-12-01 13:22:51,601 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:51,601 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:51,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:51,601 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:51,601 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:51,602 INFO L87 Difference]: Start difference. First operand 1365 states and 1760 transitions. Second operand has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:51,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:51,796 INFO L93 Difference]: Finished difference Result 2210 states and 2859 transitions. [2024-12-01 13:22:51,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:51,796 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 744 [2024-12-01 13:22:51,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:51,797 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:51,797 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:51,798 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:51,798 INFO L435 NwaCegarLoop]: 1081 mSDtfsCounter, 1001 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 226 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1001 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 226 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 226 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:51,798 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1001 Valid, 2171 Invalid, 226 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 226 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:22:51,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:51,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:51,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2873986735445837) internal successors, (1747), 1357 states have internal predecessors, (1747), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:51,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1759 transitions. [2024-12-01 13:22:51,815 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1759 transitions. Word has length 744 [2024-12-01 13:22:51,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:51,816 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1759 transitions. [2024-12-01 13:22:51,816 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:51,816 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1759 transitions. [2024-12-01 13:22:51,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 746 [2024-12-01 13:22:51,818 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:51,819 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:51,819 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable106 [2024-12-01 13:22:51,819 INFO L396 AbstractCegarLoop]: === Iteration 108 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:51,819 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:51,819 INFO L85 PathProgramCache]: Analyzing trace with hash -578388228, now seen corresponding path program 1 times [2024-12-01 13:22:51,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:51,819 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1051852164] [2024-12-01 13:22:51,819 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:51,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:53,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:54,559 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:54,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:54,559 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1051852164] [2024-12-01 13:22:54,559 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1051852164] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:54,559 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:54,559 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:54,559 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460531263] [2024-12-01 13:22:54,559 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:54,559 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:54,559 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:54,560 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:54,560 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:54,560 INFO L87 Difference]: Start difference. First operand 1365 states and 1759 transitions. Second operand has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:54,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:54,759 INFO L93 Difference]: Finished difference Result 2210 states and 2857 transitions. [2024-12-01 13:22:54,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:54,759 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 745 [2024-12-01 13:22:54,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:54,760 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:54,760 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:54,761 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:54,761 INFO L435 NwaCegarLoop]: 1081 mSDtfsCounter, 1000 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 224 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1000 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 224 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:54,761 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1000 Valid, 2171 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 224 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:22:54,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:54,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:54,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2866617538688283) internal successors, (1746), 1357 states have internal predecessors, (1746), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:54,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1758 transitions. [2024-12-01 13:22:54,775 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1758 transitions. Word has length 745 [2024-12-01 13:22:54,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:54,776 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1758 transitions. [2024-12-01 13:22:54,776 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:54,776 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1758 transitions. [2024-12-01 13:22:54,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 747 [2024-12-01 13:22:54,778 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:54,779 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:54,779 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable107 [2024-12-01 13:22:54,779 INFO L396 AbstractCegarLoop]: === Iteration 109 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:54,779 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:54,779 INFO L85 PathProgramCache]: Analyzing trace with hash -187137661, now seen corresponding path program 1 times [2024-12-01 13:22:54,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:54,779 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1394376462] [2024-12-01 13:22:54,779 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:54,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:56,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:22:57,369 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:22:57,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:22:57,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1394376462] [2024-12-01 13:22:57,369 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1394376462] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:22:57,369 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:22:57,369 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:22:57,369 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728706311] [2024-12-01 13:22:57,369 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:22:57,370 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:22:57,370 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:22:57,370 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:22:57,370 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:22:57,370 INFO L87 Difference]: Start difference. First operand 1365 states and 1758 transitions. Second operand has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:57,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:22:57,583 INFO L93 Difference]: Finished difference Result 2210 states and 2855 transitions. [2024-12-01 13:22:57,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:22:57,583 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 746 [2024-12-01 13:22:57,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:22:57,585 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:22:57,585 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:22:57,585 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:22:57,585 INFO L435 NwaCegarLoop]: 1081 mSDtfsCounter, 1871 mSDsluCounter, 1083 mSDsCounter, 0 mSdLazyCounter, 222 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1871 SdHoareTripleChecker+Valid, 2164 SdHoareTripleChecker+Invalid, 222 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 222 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:22:57,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1871 Valid, 2164 Invalid, 222 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 222 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:22:57,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:22:57,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:22:57,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.285924834193073) internal successors, (1745), 1357 states have internal predecessors, (1745), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:22:57,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1757 transitions. [2024-12-01 13:22:57,600 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1757 transitions. Word has length 746 [2024-12-01 13:22:57,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:22:57,600 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1757 transitions. [2024-12-01 13:22:57,600 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:22:57,600 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1757 transitions. [2024-12-01 13:22:57,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 748 [2024-12-01 13:22:57,603 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:22:57,603 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:22:57,603 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable108 [2024-12-01 13:22:57,603 INFO L396 AbstractCegarLoop]: === Iteration 110 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:22:57,604 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:22:57,604 INFO L85 PathProgramCache]: Analyzing trace with hash -763456275, now seen corresponding path program 1 times [2024-12-01 13:22:57,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:22:57,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [364098181] [2024-12-01 13:22:57,604 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:22:57,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:22:59,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:23:00,173 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:23:00,173 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:23:00,173 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [364098181] [2024-12-01 13:23:00,174 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [364098181] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:23:00,174 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:23:00,174 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:23:00,174 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1327771344] [2024-12-01 13:23:00,174 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:23:00,174 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:23:00,174 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:23:00,175 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:23:00,175 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:23:00,175 INFO L87 Difference]: Start difference. First operand 1365 states and 1757 transitions. Second operand has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:23:00,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:23:00,362 INFO L93 Difference]: Finished difference Result 2210 states and 2853 transitions. [2024-12-01 13:23:00,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:23:00,362 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 747 [2024-12-01 13:23:00,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:23:00,364 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:23:00,364 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:23:00,364 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:23:00,364 INFO L435 NwaCegarLoop]: 1081 mSDtfsCounter, 1861 mSDsluCounter, 1083 mSDsCounter, 0 mSdLazyCounter, 220 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1861 SdHoareTripleChecker+Valid, 2164 SdHoareTripleChecker+Invalid, 220 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 220 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:23:00,364 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1861 Valid, 2164 Invalid, 220 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 220 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:23:00,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:23:00,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:23:00,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2851879145173175) internal successors, (1744), 1357 states have internal predecessors, (1744), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:23:00,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1756 transitions. [2024-12-01 13:23:00,378 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1756 transitions. Word has length 747 [2024-12-01 13:23:00,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:23:00,379 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1756 transitions. [2024-12-01 13:23:00,379 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:23:00,379 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1756 transitions. [2024-12-01 13:23:00,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 749 [2024-12-01 13:23:00,381 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:23:00,382 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:23:00,382 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable109 [2024-12-01 13:23:00,382 INFO L396 AbstractCegarLoop]: === Iteration 111 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:23:00,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:23:00,382 INFO L85 PathProgramCache]: Analyzing trace with hash -1477096750, now seen corresponding path program 1 times [2024-12-01 13:23:00,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:23:00,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801113735] [2024-12-01 13:23:00,382 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:23:00,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:23:02,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:23:02,895 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:23:02,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:23:02,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801113735] [2024-12-01 13:23:02,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1801113735] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:23:02,896 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:23:02,896 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:23:02,896 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1898040476] [2024-12-01 13:23:02,896 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:23:02,896 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:23:02,896 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:23:02,896 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:23:02,896 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:23:02,896 INFO L87 Difference]: Start difference. First operand 1365 states and 1756 transitions. Second operand has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:23:03,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:23:03,073 INFO L93 Difference]: Finished difference Result 2210 states and 2851 transitions. [2024-12-01 13:23:03,074 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:23:03,074 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 748 [2024-12-01 13:23:03,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:23:03,075 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:23:03,075 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:23:03,075 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:23:03,076 INFO L435 NwaCegarLoop]: 1081 mSDtfsCounter, 997 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 218 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 997 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 218 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:23:03,076 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [997 Valid, 2171 Invalid, 218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 218 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:23:03,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:23:03,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:23:03,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2844509948415623) internal successors, (1743), 1357 states have internal predecessors, (1743), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:23:03,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1755 transitions. [2024-12-01 13:23:03,090 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1755 transitions. Word has length 748 [2024-12-01 13:23:03,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:23:03,090 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1755 transitions. [2024-12-01 13:23:03,090 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:23:03,090 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1755 transitions. [2024-12-01 13:23:03,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 750 [2024-12-01 13:23:03,093 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:23:03,093 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:23:03,093 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable110 [2024-12-01 13:23:03,093 INFO L396 AbstractCegarLoop]: === Iteration 112 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:23:03,093 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:23:03,093 INFO L85 PathProgramCache]: Analyzing trace with hash -397551522, now seen corresponding path program 1 times [2024-12-01 13:23:03,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:23:03,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62290931] [2024-12-01 13:23:03,094 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:23:03,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:23:04,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:23:05,435 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:23:05,435 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:23:05,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [62290931] [2024-12-01 13:23:05,435 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [62290931] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:23:05,435 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:23:05,436 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:23:05,436 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568248536] [2024-12-01 13:23:05,436 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:23:05,436 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:23:05,436 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:23:05,436 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:23:05,436 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:23:05,436 INFO L87 Difference]: Start difference. First operand 1365 states and 1755 transitions. Second operand has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:23:05,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:23:05,605 INFO L93 Difference]: Finished difference Result 2210 states and 2849 transitions. [2024-12-01 13:23:05,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:23:05,606 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 749 [2024-12-01 13:23:05,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:23:05,607 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:23:05,607 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:23:05,608 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:23:05,608 INFO L435 NwaCegarLoop]: 1081 mSDtfsCounter, 996 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 216 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 996 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 216 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:23:05,608 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [996 Valid, 2171 Invalid, 216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 216 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:23:05,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:23:05,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:23:05,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.283714075165807) internal successors, (1742), 1357 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:23:05,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1754 transitions. [2024-12-01 13:23:05,622 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1754 transitions. Word has length 749 [2024-12-01 13:23:05,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:23:05,622 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1754 transitions. [2024-12-01 13:23:05,622 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:23:05,622 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1754 transitions. [2024-12-01 13:23:05,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 751 [2024-12-01 13:23:05,625 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:23:05,625 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:23:05,625 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable111 [2024-12-01 13:23:05,625 INFO L396 AbstractCegarLoop]: === Iteration 113 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:23:05,625 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:23:05,625 INFO L85 PathProgramCache]: Analyzing trace with hash -2043474271, now seen corresponding path program 1 times [2024-12-01 13:23:05,625 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:23:05,625 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686110759] [2024-12-01 13:23:05,625 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:23:05,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:23:07,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:23:08,051 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:23:08,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:23:08,051 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686110759] [2024-12-01 13:23:08,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1686110759] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:23:08,052 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:23:08,052 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:23:08,052 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1633408694] [2024-12-01 13:23:08,052 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:23:08,052 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:23:08,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:23:08,053 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:23:08,053 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:23:08,053 INFO L87 Difference]: Start difference. First operand 1365 states and 1754 transitions. Second operand has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:23:08,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:23:08,267 INFO L93 Difference]: Finished difference Result 2210 states and 2847 transitions. [2024-12-01 13:23:08,267 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:23:08,267 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 750 [2024-12-01 13:23:08,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:23:08,268 INFO L225 Difference]: With dead ends: 2210 [2024-12-01 13:23:08,268 INFO L226 Difference]: Without dead ends: 1365 [2024-12-01 13:23:08,269 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:23:08,269 INFO L435 NwaCegarLoop]: 1081 mSDtfsCounter, 995 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 214 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 995 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 214 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 214 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-01 13:23:08,269 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [995 Valid, 2171 Invalid, 214 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 214 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-01 13:23:08,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-01 13:23:08,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-01 13:23:08,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2829771554900515) internal successors, (1741), 1357 states have internal predecessors, (1741), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:23:08,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1753 transitions. [2024-12-01 13:23:08,283 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1753 transitions. Word has length 750 [2024-12-01 13:23:08,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:23:08,283 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1753 transitions. [2024-12-01 13:23:08,283 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:23:08,284 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1753 transitions. [2024-12-01 13:23:08,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 752 [2024-12-01 13:23:08,286 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:23:08,287 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:23:08,287 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable112 [2024-12-01 13:23:08,287 INFO L396 AbstractCegarLoop]: === Iteration 114 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:23:08,287 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:23:08,287 INFO L85 PathProgramCache]: Analyzing trace with hash 1365244239, now seen corresponding path program 1 times [2024-12-01 13:23:08,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:23:08,287 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1894523600] [2024-12-01 13:23:08,287 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:23:08,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:23:09,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:23:10,670 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 176 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:23:10,671 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:23:10,671 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1894523600] [2024-12-01 13:23:10,671 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1894523600] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:23:10,671 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:23:10,671 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:23:10,671 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1293057962] [2024-12-01 13:23:10,671 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:23:10,671 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:23:10,671 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:23:10,672 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [2024-12-01 13:23:50,503 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:23:50,504 INFO L85 PathProgramCache]: Analyzing trace with hash -1545166119, now seen corresponding path program 1 times [2024-12-01 13:23:50,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:23:50,504 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788973014] [2024-12-01 13:23:50,504 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:23:50,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:23:53,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:23:54,975 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 219 trivial. 0 not checked. [2024-12-01 13:23:54,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:23:54,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788973014] [2024-12-01 13:23:54,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1788973014] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:23:54,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:23:54,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-01 13:23:54,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1031353046] [2024-12-01 13:23:54,976 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:23:54,976 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-01 13:23:54,976 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:23:54,977 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-01 13:23:54,977 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-01 13:23:54,977 INFO L87 Difference]: Start difference. First operand 2254 states and 2888 transitions. Second operand has 7 states, 7 states have (on average 83.14285714285714) internal successors, (582), 7 states have internal predecessors, (582), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-01 13:23:55,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:23:55,565 INFO L93 Difference]: Finished difference Result 4234 states and 5376 transitions. [2024-12-01 13:23:55,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:23:55,566 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 83.14285714285714) internal successors, (582), 7 states have internal predecessors, (582), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 763 [2024-12-01 13:23:55,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:23:55,568 INFO L225 Difference]: With dead ends: 4234 [2024-12-01 13:23:55,568 INFO L226 Difference]: Without dead ends: 2270 [2024-12-01 13:23:55,569 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-12-01 13:23:55,569 INFO L435 NwaCegarLoop]: 899 mSDtfsCounter, 1169 mSDsluCounter, 2697 mSDsCounter, 0 mSdLazyCounter, 1134 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1171 SdHoareTripleChecker+Valid, 3596 SdHoareTripleChecker+Invalid, 1136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-01 13:23:55,569 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1171 Valid, 3596 Invalid, 1136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1134 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-01 13:23:55,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2270 states. [2024-12-01 13:23:55,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2270 to 2262. [2024-12-01 13:23:55,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2262 states, 2248 states have (on average 1.2758007117437722) internal successors, (2868), 2248 states have internal predecessors, (2868), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-01 13:23:55,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2262 states to 2262 states and 2892 transitions. [2024-12-01 13:23:55,605 INFO L78 Accepts]: Start accepts. Automaton has 2262 states and 2892 transitions. Word has length 763 [2024-12-01 13:23:55,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:23:55,605 INFO L471 AbstractCegarLoop]: Abstraction has 2262 states and 2892 transitions. [2024-12-01 13:23:55,606 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 83.14285714285714) internal successors, (582), 7 states have internal predecessors, (582), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-01 13:23:55,606 INFO L276 IsEmpty]: Start isEmpty. Operand 2262 states and 2892 transitions. [2024-12-01 13:23:55,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 766 [2024-12-01 13:23:55,609 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:23:55,609 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:23:55,609 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable124 [2024-12-01 13:23:55,609 INFO L396 AbstractCegarLoop]: === Iteration 126 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:23:55,609 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:23:55,610 INFO L85 PathProgramCache]: Analyzing trace with hash -383730179, now seen corresponding path program 1 times [2024-12-01 13:23:55,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:23:55,610 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933456175] [2024-12-01 13:23:55,610 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:23:55,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:23:58,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:23:59,972 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 211 trivial. 0 not checked. [2024-12-01 13:23:59,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:23:59,972 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933456175] [2024-12-01 13:23:59,972 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [933456175] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:23:59,972 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:23:59,972 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-01 13:23:59,972 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1577837736] [2024-12-01 13:23:59,972 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:23:59,972 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-01 13:23:59,973 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:23:59,973 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-01 13:23:59,973 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-01 13:23:59,973 INFO L87 Difference]: Start difference. First operand 2262 states and 2892 transitions. Second operand has 7 states, 7 states have (on average 84.42857142857143) internal successors, (591), 7 states have internal predecessors, (591), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-01 13:24:00,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:24:00,516 INFO L93 Difference]: Finished difference Result 4202 states and 5318 transitions. [2024-12-01 13:24:00,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:24:00,517 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 84.42857142857143) internal successors, (591), 7 states have internal predecessors, (591), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 765 [2024-12-01 13:24:00,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:24:00,518 INFO L225 Difference]: With dead ends: 4202 [2024-12-01 13:24:00,518 INFO L226 Difference]: Without dead ends: 2278 [2024-12-01 13:24:00,519 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-12-01 13:24:00,519 INFO L435 NwaCegarLoop]: 898 mSDtfsCounter, 1160 mSDsluCounter, 2694 mSDsCounter, 0 mSdLazyCounter, 1134 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1161 SdHoareTripleChecker+Valid, 3592 SdHoareTripleChecker+Invalid, 1136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-01 13:24:00,519 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1161 Valid, 3592 Invalid, 1136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1134 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-01 13:24:00,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2278 states. [2024-12-01 13:24:00,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2278 to 2270. [2024-12-01 13:24:00,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2270 states, 2256 states have (on average 1.2730496453900708) internal successors, (2872), 2256 states have internal predecessors, (2872), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-01 13:24:00,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2270 states to 2270 states and 2896 transitions. [2024-12-01 13:24:00,547 INFO L78 Accepts]: Start accepts. Automaton has 2270 states and 2896 transitions. Word has length 765 [2024-12-01 13:24:00,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:24:00,547 INFO L471 AbstractCegarLoop]: Abstraction has 2270 states and 2896 transitions. [2024-12-01 13:24:00,547 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 84.42857142857143) internal successors, (591), 7 states have internal predecessors, (591), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-01 13:24:00,547 INFO L276 IsEmpty]: Start isEmpty. Operand 2270 states and 2896 transitions. [2024-12-01 13:24:00,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 768 [2024-12-01 13:24:00,550 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:24:00,550 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:24:00,550 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable125 [2024-12-01 13:24:00,550 INFO L396 AbstractCegarLoop]: === Iteration 127 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:24:00,550 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:24:00,551 INFO L85 PathProgramCache]: Analyzing trace with hash 2126013287, now seen corresponding path program 1 times [2024-12-01 13:24:00,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:24:00,551 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1235694199] [2024-12-01 13:24:00,551 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:00,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:24:04,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:24:06,152 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2024-12-01 13:24:06,152 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:24:06,152 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1235694199] [2024-12-01 13:24:06,152 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1235694199] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:24:06,152 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:24:06,153 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:24:06,153 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979793790] [2024-12-01 13:24:06,153 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:24:06,153 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:24:06,153 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:24:06,153 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:24:06,153 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:24:06,154 INFO L87 Difference]: Start difference. First operand 2270 states and 2896 transitions. Second operand has 5 states, 5 states have (on average 122.6) internal successors, (613), 5 states have internal predecessors, (613), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:24:06,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:24:06,610 INFO L93 Difference]: Finished difference Result 4092 states and 5148 transitions. [2024-12-01 13:24:06,610 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-01 13:24:06,610 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 122.6) internal successors, (613), 5 states have internal predecessors, (613), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 767 [2024-12-01 13:24:06,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:24:06,612 INFO L225 Difference]: With dead ends: 4092 [2024-12-01 13:24:06,612 INFO L226 Difference]: Without dead ends: 2282 [2024-12-01 13:24:06,613 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:24:06,613 INFO L435 NwaCegarLoop]: 910 mSDtfsCounter, 1044 mSDsluCounter, 1806 mSDsCounter, 0 mSdLazyCounter, 820 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1044 SdHoareTripleChecker+Valid, 2716 SdHoareTripleChecker+Invalid, 820 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 820 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-01 13:24:06,613 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1044 Valid, 2716 Invalid, 820 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 820 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-01 13:24:06,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2282 states. [2024-12-01 13:24:06,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2282 to 2276. [2024-12-01 13:24:06,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2276 states, 2262 states have (on average 1.2723253757736517) internal successors, (2878), 2262 states have internal predecessors, (2878), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-01 13:24:06,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2276 states to 2276 states and 2902 transitions. [2024-12-01 13:24:06,660 INFO L78 Accepts]: Start accepts. Automaton has 2276 states and 2902 transitions. Word has length 767 [2024-12-01 13:24:06,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:24:06,660 INFO L471 AbstractCegarLoop]: Abstraction has 2276 states and 2902 transitions. [2024-12-01 13:24:06,660 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 122.6) internal successors, (613), 5 states have internal predecessors, (613), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:24:06,660 INFO L276 IsEmpty]: Start isEmpty. Operand 2276 states and 2902 transitions. [2024-12-01 13:24:06,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 768 [2024-12-01 13:24:06,663 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:24:06,664 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:24:06,664 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable126 [2024-12-01 13:24:06,664 INFO L396 AbstractCegarLoop]: === Iteration 128 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:24:06,664 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:24:06,664 INFO L85 PathProgramCache]: Analyzing trace with hash 453156085, now seen corresponding path program 1 times [2024-12-01 13:24:06,664 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:24:06,665 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1887408878] [2024-12-01 13:24:06,665 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:06,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:24:09,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:24:11,295 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2024-12-01 13:24:11,295 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:24:11,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1887408878] [2024-12-01 13:24:11,295 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1887408878] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:24:11,295 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:24:11,295 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-01 13:24:11,295 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [92143167] [2024-12-01 13:24:11,295 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:24:11,296 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-01 13:24:11,296 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:24:11,296 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-01 13:24:11,296 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:24:11,297 INFO L87 Difference]: Start difference. First operand 2276 states and 2902 transitions. Second operand has 6 states, 6 states have (on average 102.16666666666667) internal successors, (613), 6 states have internal predecessors, (613), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:24:11,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:24:11,811 INFO L93 Difference]: Finished difference Result 4094 states and 5144 transitions. [2024-12-01 13:24:11,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-01 13:24:11,811 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 102.16666666666667) internal successors, (613), 6 states have internal predecessors, (613), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 767 [2024-12-01 13:24:11,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:24:11,813 INFO L225 Difference]: With dead ends: 4094 [2024-12-01 13:24:11,813 INFO L226 Difference]: Without dead ends: 2282 [2024-12-01 13:24:11,814 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2024-12-01 13:24:11,814 INFO L435 NwaCegarLoop]: 898 mSDtfsCounter, 2260 mSDsluCounter, 1776 mSDsCounter, 0 mSdLazyCounter, 851 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2261 SdHoareTripleChecker+Valid, 2674 SdHoareTripleChecker+Invalid, 854 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 851 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-01 13:24:11,814 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2261 Valid, 2674 Invalid, 854 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 851 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-01 13:24:11,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2282 states. [2024-12-01 13:24:11,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2282 to 2276. [2024-12-01 13:24:11,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2276 states, 2262 states have (on average 1.2696728558797525) internal successors, (2872), 2262 states have internal predecessors, (2872), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-01 13:24:11,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2276 states to 2276 states and 2896 transitions. [2024-12-01 13:24:11,842 INFO L78 Accepts]: Start accepts. Automaton has 2276 states and 2896 transitions. Word has length 767 [2024-12-01 13:24:11,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:24:11,843 INFO L471 AbstractCegarLoop]: Abstraction has 2276 states and 2896 transitions. [2024-12-01 13:24:11,843 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 102.16666666666667) internal successors, (613), 6 states have internal predecessors, (613), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:24:11,843 INFO L276 IsEmpty]: Start isEmpty. Operand 2276 states and 2896 transitions. [2024-12-01 13:24:11,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 770 [2024-12-01 13:24:11,846 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:24:11,846 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:24:11,846 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable127 [2024-12-01 13:24:11,846 INFO L396 AbstractCegarLoop]: === Iteration 129 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:24:11,846 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:24:11,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1935522237, now seen corresponding path program 1 times [2024-12-01 13:24:11,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:24:11,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011452995] [2024-12-01 13:24:11,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:11,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:24:15,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:24:16,567 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 174 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-12-01 13:24:16,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:24:16,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1011452995] [2024-12-01 13:24:16,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1011452995] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:24:16,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1906616017] [2024-12-01 13:24:16,568 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:16,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:24:16,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:24:16,570 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:24:16,601 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-01 13:24:23,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:24:23,262 INFO L256 TraceCheckSpWp]: Trace formula consists of 4795 conjuncts, 175 conjuncts are in the unsatisfiable core [2024-12-01 13:24:23,286 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:24:23,788 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2024-12-01 13:24:23,788 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-01 13:24:23,788 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1906616017] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:24:23,788 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-01 13:24:23,789 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [6] total 11 [2024-12-01 13:24:23,789 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [147179962] [2024-12-01 13:24:23,789 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:24:23,789 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-01 13:24:23,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:24:23,790 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-01 13:24:23,790 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=76, Unknown=0, NotChecked=0, Total=110 [2024-12-01 13:24:23,790 INFO L87 Difference]: Start difference. First operand 2276 states and 2896 transitions. Second operand has 7 states, 7 states have (on average 82.0) internal successors, (574), 7 states have internal predecessors, (574), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:24:24,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:24:24,474 INFO L93 Difference]: Finished difference Result 4322 states and 5449 transitions. [2024-12-01 13:24:24,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-01 13:24:24,474 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 82.0) internal successors, (574), 7 states have internal predecessors, (574), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 769 [2024-12-01 13:24:24,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:24:24,476 INFO L225 Difference]: With dead ends: 4322 [2024-12-01 13:24:24,476 INFO L226 Difference]: Without dead ends: 2282 [2024-12-01 13:24:24,477 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 777 GetRequests, 768 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=76, Unknown=0, NotChecked=0, Total=110 [2024-12-01 13:24:24,477 INFO L435 NwaCegarLoop]: 895 mSDtfsCounter, 1583 mSDsluCounter, 2877 mSDsCounter, 0 mSdLazyCounter, 1194 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1589 SdHoareTripleChecker+Valid, 3772 SdHoareTripleChecker+Invalid, 1198 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 1194 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-12-01 13:24:24,478 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1589 Valid, 3772 Invalid, 1198 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 1194 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-12-01 13:24:24,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2282 states. [2024-12-01 13:24:24,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2282 to 2279. [2024-12-01 13:24:24,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2279 states, 2265 states have (on average 1.267991169977925) internal successors, (2872), 2265 states have internal predecessors, (2872), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-01 13:24:24,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2279 states to 2279 states and 2896 transitions. [2024-12-01 13:24:24,508 INFO L78 Accepts]: Start accepts. Automaton has 2279 states and 2896 transitions. Word has length 769 [2024-12-01 13:24:24,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:24:24,508 INFO L471 AbstractCegarLoop]: Abstraction has 2279 states and 2896 transitions. [2024-12-01 13:24:24,508 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 82.0) internal successors, (574), 7 states have internal predecessors, (574), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:24:24,508 INFO L276 IsEmpty]: Start isEmpty. Operand 2279 states and 2896 transitions. [2024-12-01 13:24:24,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 771 [2024-12-01 13:24:24,511 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:24:24,511 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:24:24,547 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-12-01 13:24:24,712 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable128,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:24:24,712 INFO L396 AbstractCegarLoop]: === Iteration 130 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:24:24,712 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:24:24,712 INFO L85 PathProgramCache]: Analyzing trace with hash -511252239, now seen corresponding path program 1 times [2024-12-01 13:24:24,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:24:24,712 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604291503] [2024-12-01 13:24:24,712 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:24,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:24:28,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:24:29,986 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 174 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-12-01 13:24:29,986 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:24:29,986 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [604291503] [2024-12-01 13:24:29,986 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [604291503] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:24:29,986 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [796055844] [2024-12-01 13:24:29,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:29,986 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:24:29,987 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:24:29,988 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:24:29,989 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-01 13:24:34,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:24:34,800 INFO L256 TraceCheckSpWp]: Trace formula consists of 4796 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-12-01 13:24:34,811 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:24:36,180 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 193 proven. 8 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-12-01 13:24:36,180 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:24:37,731 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 177 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:24:37,731 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [796055844] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-01 13:24:37,731 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-01 13:24:37,731 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 10, 12] total 23 [2024-12-01 13:24:37,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387720891] [2024-12-01 13:24:37,732 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-01 13:24:37,734 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-12-01 13:24:37,734 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:24:37,735 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-12-01 13:24:37,735 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=407, Unknown=0, NotChecked=0, Total=506 [2024-12-01 13:24:37,735 INFO L87 Difference]: Start difference. First operand 2279 states and 2896 transitions. Second operand has 23 states, 23 states have (on average 58.0) internal successors, (1334), 23 states have internal predecessors, (1334), 4 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-12-01 13:24:39,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:24:39,289 INFO L93 Difference]: Finished difference Result 4260 states and 5365 transitions. [2024-12-01 13:24:39,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-01 13:24:39,289 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 58.0) internal successors, (1334), 23 states have internal predecessors, (1334), 4 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) Word has length 770 [2024-12-01 13:24:39,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:24:39,291 INFO L225 Difference]: With dead ends: 4260 [2024-12-01 13:24:39,291 INFO L226 Difference]: Without dead ends: 2292 [2024-12-01 13:24:39,293 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1551 GetRequests, 1526 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 130 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=147, Invalid=555, Unknown=0, NotChecked=0, Total=702 [2024-12-01 13:24:39,293 INFO L435 NwaCegarLoop]: 892 mSDtfsCounter, 1839 mSDsluCounter, 9767 mSDsCounter, 0 mSdLazyCounter, 3457 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1839 SdHoareTripleChecker+Valid, 10659 SdHoareTripleChecker+Invalid, 3460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 3457 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-12-01 13:24:39,293 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1839 Valid, 10659 Invalid, 3460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 3457 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-12-01 13:24:39,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2292 states. [2024-12-01 13:24:39,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2292 to 2284. [2024-12-01 13:24:39,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2284 states, 2270 states have (on average 1.2669603524229074) internal successors, (2876), 2270 states have internal predecessors, (2876), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-01 13:24:39,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2284 states to 2284 states and 2900 transitions. [2024-12-01 13:24:39,323 INFO L78 Accepts]: Start accepts. Automaton has 2284 states and 2900 transitions. Word has length 770 [2024-12-01 13:24:39,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:24:39,323 INFO L471 AbstractCegarLoop]: Abstraction has 2284 states and 2900 transitions. [2024-12-01 13:24:39,324 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 58.0) internal successors, (1334), 23 states have internal predecessors, (1334), 4 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-12-01 13:24:39,324 INFO L276 IsEmpty]: Start isEmpty. Operand 2284 states and 2900 transitions. [2024-12-01 13:24:39,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 774 [2024-12-01 13:24:39,327 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:24:39,327 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:24:39,360 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-01 13:24:39,527 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable129,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:24:39,527 INFO L396 AbstractCegarLoop]: === Iteration 131 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:24:39,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:24:39,528 INFO L85 PathProgramCache]: Analyzing trace with hash -197642435, now seen corresponding path program 1 times [2024-12-01 13:24:39,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:24:39,528 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1774602580] [2024-12-01 13:24:39,528 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:39,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:24:43,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:24:44,701 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 179 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:24:44,701 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:24:44,701 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1774602580] [2024-12-01 13:24:44,701 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1774602580] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:24:44,701 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [595439720] [2024-12-01 13:24:44,701 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:44,701 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:24:44,701 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:24:44,703 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:24:44,704 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-01 13:24:49,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:24:49,595 INFO L256 TraceCheckSpWp]: Trace formula consists of 4799 conjuncts, 44 conjuncts are in the unsatisfiable core [2024-12-01 13:24:49,605 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:24:51,044 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 174 proven. 4 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-12-01 13:24:51,044 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:24:51,202 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 166 proven. 0 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-12-01 13:24:51,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [595439720] provided 1 perfect and 1 imperfect interpolant sequences [2024-12-01 13:24:51,202 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-12-01 13:24:51,203 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [8, 9] total 22 [2024-12-01 13:24:51,203 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [486526407] [2024-12-01 13:24:51,203 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:24:51,204 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-01 13:24:51,204 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:24:51,204 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-01 13:24:51,204 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2024-12-01 13:24:51,205 INFO L87 Difference]: Start difference. First operand 2284 states and 2900 transitions. Second operand has 9 states, 9 states have (on average 81.22222222222223) internal successors, (731), 9 states have internal predecessors, (731), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-01 13:24:51,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:24:51,878 INFO L93 Difference]: Finished difference Result 4210 states and 5294 transitions. [2024-12-01 13:24:51,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:24:51,878 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 81.22222222222223) internal successors, (731), 9 states have internal predecessors, (731), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) Word has length 773 [2024-12-01 13:24:51,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:24:51,880 INFO L225 Difference]: With dead ends: 4210 [2024-12-01 13:24:51,880 INFO L226 Difference]: Without dead ends: 2288 [2024-12-01 13:24:51,881 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1559 GetRequests, 1536 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=107, Invalid=493, Unknown=0, NotChecked=0, Total=600 [2024-12-01 13:24:51,881 INFO L435 NwaCegarLoop]: 897 mSDtfsCounter, 4655 mSDsluCounter, 2698 mSDsCounter, 0 mSdLazyCounter, 1129 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4657 SdHoareTripleChecker+Valid, 3595 SdHoareTripleChecker+Invalid, 1140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 1129 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-12-01 13:24:51,881 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4657 Valid, 3595 Invalid, 1140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 1129 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-12-01 13:24:51,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2288 states. [2024-12-01 13:24:51,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2288 to 2288. [2024-12-01 13:24:51,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2288 states, 2274 states have (on average 1.266490765171504) internal successors, (2880), 2274 states have internal predecessors, (2880), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-01 13:24:51,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2288 states to 2288 states and 2904 transitions. [2024-12-01 13:24:51,910 INFO L78 Accepts]: Start accepts. Automaton has 2288 states and 2904 transitions. Word has length 773 [2024-12-01 13:24:51,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:24:51,910 INFO L471 AbstractCegarLoop]: Abstraction has 2288 states and 2904 transitions. [2024-12-01 13:24:51,910 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 81.22222222222223) internal successors, (731), 9 states have internal predecessors, (731), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-01 13:24:51,910 INFO L276 IsEmpty]: Start isEmpty. Operand 2288 states and 2904 transitions. [2024-12-01 13:24:51,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-01 13:24:51,913 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:24:51,913 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:24:51,946 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-01 13:24:52,114 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable130,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:24:52,114 INFO L396 AbstractCegarLoop]: === Iteration 132 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:24:52,114 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:24:52,114 INFO L85 PathProgramCache]: Analyzing trace with hash -1784286067, now seen corresponding path program 1 times [2024-12-01 13:24:52,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:24:52,114 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1203271985] [2024-12-01 13:24:52,114 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:52,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:24:56,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:24:59,030 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 4 proven. 180 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:24:59,030 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:24:59,030 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1203271985] [2024-12-01 13:24:59,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1203271985] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:24:59,030 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1364364555] [2024-12-01 13:24:59,030 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:24:59,031 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:24:59,031 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:24:59,032 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:24:59,033 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-01 13:25:06,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:25:06,197 INFO L256 TraceCheckSpWp]: Trace formula consists of 4801 conjuncts, 84 conjuncts are in the unsatisfiable core [2024-12-01 13:25:06,208 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:25:09,189 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 220 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-01 13:25:09,189 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-01 13:25:09,189 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1364364555] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:25:09,189 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-01 13:25:09,189 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [10] total 18 [2024-12-01 13:25:09,189 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463000051] [2024-12-01 13:25:09,189 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:25:09,190 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-01 13:25:09,190 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:25:09,190 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-01 13:25:09,191 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2024-12-01 13:25:09,191 INFO L87 Difference]: Start difference. First operand 2288 states and 2904 transitions. Second operand has 10 states, 10 states have (on average 75.1) internal successors, (751), 10 states have internal predecessors, (751), 3 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:25:10,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:25:10,714 INFO L93 Difference]: Finished difference Result 5112 states and 6440 transitions. [2024-12-01 13:25:10,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-01 13:25:10,714 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 75.1) internal successors, (751), 10 states have internal predecessors, (751), 3 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 775 [2024-12-01 13:25:10,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:25:10,717 INFO L225 Difference]: With dead ends: 5112 [2024-12-01 13:25:10,717 INFO L226 Difference]: Without dead ends: 4252 [2024-12-01 13:25:10,718 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 785 GetRequests, 769 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2024-12-01 13:25:10,718 INFO L435 NwaCegarLoop]: 853 mSDtfsCounter, 1920 mSDsluCounter, 5659 mSDsCounter, 0 mSdLazyCounter, 2582 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1922 SdHoareTripleChecker+Valid, 6512 SdHoareTripleChecker+Invalid, 2583 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2582 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-12-01 13:25:10,718 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1922 Valid, 6512 Invalid, 2583 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2582 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-12-01 13:25:10,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4252 states. [2024-12-01 13:25:10,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4252 to 4242. [2024-12-01 13:25:10,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4242 states, 4220 states have (on average 1.254265402843602) internal successors, (5293), 4220 states have internal predecessors, (5293), 20 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 20 states have call predecessors, (20), 20 states have call successors, (20) [2024-12-01 13:25:10,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4242 states to 4242 states and 5333 transitions. [2024-12-01 13:25:10,767 INFO L78 Accepts]: Start accepts. Automaton has 4242 states and 5333 transitions. Word has length 775 [2024-12-01 13:25:10,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:25:10,767 INFO L471 AbstractCegarLoop]: Abstraction has 4242 states and 5333 transitions. [2024-12-01 13:25:10,767 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 75.1) internal successors, (751), 10 states have internal predecessors, (751), 3 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:25:10,767 INFO L276 IsEmpty]: Start isEmpty. Operand 4242 states and 5333 transitions. [2024-12-01 13:25:10,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-01 13:25:10,772 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:25:10,772 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:25:10,810 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-01 13:25:10,972 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable131,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:25:10,972 INFO L396 AbstractCegarLoop]: === Iteration 133 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:25:10,973 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:25:10,973 INFO L85 PathProgramCache]: Analyzing trace with hash -998168019, now seen corresponding path program 1 times [2024-12-01 13:25:10,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:25:10,973 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227077413] [2024-12-01 13:25:10,973 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:25:10,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:25:15,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:25:18,065 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2024-12-01 13:25:18,065 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:25:18,065 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1227077413] [2024-12-01 13:25:18,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1227077413] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:25:18,065 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:25:18,065 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-01 13:25:18,065 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304350872] [2024-12-01 13:25:18,065 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:25:18,066 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-01 13:25:18,066 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:25:18,066 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-01 13:25:18,066 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-01 13:25:18,066 INFO L87 Difference]: Start difference. First operand 4242 states and 5333 transitions. Second operand has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:25:19,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:25:19,832 INFO L93 Difference]: Finished difference Result 11732 states and 14588 transitions. [2024-12-01 13:25:19,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-01 13:25:19,832 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 775 [2024-12-01 13:25:19,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:25:19,837 INFO L225 Difference]: With dead ends: 11732 [2024-12-01 13:25:19,837 INFO L226 Difference]: Without dead ends: 8020 [2024-12-01 13:25:19,840 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-12-01 13:25:19,840 INFO L435 NwaCegarLoop]: 1457 mSDtfsCounter, 3096 mSDsluCounter, 6671 mSDsCounter, 0 mSdLazyCounter, 2842 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3097 SdHoareTripleChecker+Valid, 8128 SdHoareTripleChecker+Invalid, 2849 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 2842 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-01 13:25:19,841 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3097 Valid, 8128 Invalid, 2849 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 2842 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-01 13:25:19,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8020 states. [2024-12-01 13:25:19,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8020 to 4474. [2024-12-01 13:25:19,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4474 states, 4444 states have (on average 1.2594509450945095) internal successors, (5597), 4444 states have internal predecessors, (5597), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-01 13:25:19,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4474 states to 4474 states and 5653 transitions. [2024-12-01 13:25:19,908 INFO L78 Accepts]: Start accepts. Automaton has 4474 states and 5653 transitions. Word has length 775 [2024-12-01 13:25:19,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:25:19,908 INFO L471 AbstractCegarLoop]: Abstraction has 4474 states and 5653 transitions. [2024-12-01 13:25:19,908 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:25:19,908 INFO L276 IsEmpty]: Start isEmpty. Operand 4474 states and 5653 transitions. [2024-12-01 13:25:19,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-01 13:25:19,912 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:25:19,913 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:25:19,913 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable132 [2024-12-01 13:25:19,913 INFO L396 AbstractCegarLoop]: === Iteration 134 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:25:19,913 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:25:19,913 INFO L85 PathProgramCache]: Analyzing trace with hash 77673837, now seen corresponding path program 1 times [2024-12-01 13:25:19,913 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:25:19,913 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123854443] [2024-12-01 13:25:19,913 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:25:19,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:25:28,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:25:31,789 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 4 proven. 178 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:25:31,789 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:25:31,789 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [123854443] [2024-12-01 13:25:31,789 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [123854443] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:25:31,789 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1240710287] [2024-12-01 13:25:31,789 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:25:31,789 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:25:31,789 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:25:31,790 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:25:31,791 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-01 13:25:37,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:25:37,382 INFO L256 TraceCheckSpWp]: Trace formula consists of 4801 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-01 13:25:37,389 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:25:37,433 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-12-01 13:25:37,433 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-01 13:25:37,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1240710287] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:25:37,433 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-01 13:25:37,434 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 14 [2024-12-01 13:25:37,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1042676896] [2024-12-01 13:25:37,434 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:25:37,434 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-01 13:25:37,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:25:37,434 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-01 13:25:37,434 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2024-12-01 13:25:37,434 INFO L87 Difference]: Start difference. First operand 4474 states and 5653 transitions. Second operand has 6 states, 5 states have (on average 119.6) internal successors, (598), 6 states have internal predecessors, (598), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-01 13:25:37,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:25:37,528 INFO L93 Difference]: Finished difference Result 7421 states and 9366 transitions. [2024-12-01 13:25:37,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:25:37,528 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 119.6) internal successors, (598), 6 states have internal predecessors, (598), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 775 [2024-12-01 13:25:37,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:25:37,531 INFO L225 Difference]: With dead ends: 7421 [2024-12-01 13:25:37,531 INFO L226 Difference]: Without dead ends: 4474 [2024-12-01 13:25:37,533 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 785 GetRequests, 773 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2024-12-01 13:25:37,533 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 0 mSDsluCounter, 4677 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5851 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:25:37,533 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5851 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:25:37,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4474 states. [2024-12-01 13:25:37,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4474 to 4474. [2024-12-01 13:25:37,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4474 states, 4444 states have (on average 1.2585508550855085) internal successors, (5593), 4444 states have internal predecessors, (5593), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-01 13:25:37,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4474 states to 4474 states and 5649 transitions. [2024-12-01 13:25:37,592 INFO L78 Accepts]: Start accepts. Automaton has 4474 states and 5649 transitions. Word has length 775 [2024-12-01 13:25:37,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:25:37,592 INFO L471 AbstractCegarLoop]: Abstraction has 4474 states and 5649 transitions. [2024-12-01 13:25:37,592 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 119.6) internal successors, (598), 6 states have internal predecessors, (598), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-01 13:25:37,592 INFO L276 IsEmpty]: Start isEmpty. Operand 4474 states and 5649 transitions. [2024-12-01 13:25:37,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-01 13:25:37,597 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:25:37,597 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:25:37,634 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-01 13:25:37,797 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable133,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:25:37,797 INFO L396 AbstractCegarLoop]: === Iteration 135 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:25:37,798 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:25:37,798 INFO L85 PathProgramCache]: Analyzing trace with hash -1186564631, now seen corresponding path program 1 times [2024-12-01 13:25:37,798 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:25:37,798 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054474920] [2024-12-01 13:25:37,798 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:25:37,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:25:44,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:25:48,042 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 184 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:25:48,043 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:25:48,043 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054474920] [2024-12-01 13:25:48,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054474920] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:25:48,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:25:48,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-12-01 13:25:48,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1241442266] [2024-12-01 13:25:48,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:25:48,043 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-01 13:25:48,043 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:25:48,044 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-01 13:25:48,044 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-12-01 13:25:48,044 INFO L87 Difference]: Start difference. First operand 4474 states and 5649 transitions. Second operand has 10 states, 10 states have (on average 74.9) internal successors, (749), 10 states have internal predecessors, (749), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:25:49,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:25:49,684 INFO L93 Difference]: Finished difference Result 7830 states and 9927 transitions. [2024-12-01 13:25:49,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-01 13:25:49,684 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 74.9) internal successors, (749), 10 states have internal predecessors, (749), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 776 [2024-12-01 13:25:49,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:25:49,689 INFO L225 Difference]: With dead ends: 7830 [2024-12-01 13:25:49,689 INFO L226 Difference]: Without dead ends: 5300 [2024-12-01 13:25:49,691 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2024-12-01 13:25:49,691 INFO L435 NwaCegarLoop]: 856 mSDtfsCounter, 4797 mSDsluCounter, 4283 mSDsCounter, 0 mSdLazyCounter, 1955 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4802 SdHoareTripleChecker+Valid, 5139 SdHoareTripleChecker+Invalid, 1956 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1955 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-12-01 13:25:49,691 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4802 Valid, 5139 Invalid, 1956 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1955 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-12-01 13:25:49,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5300 states. [2024-12-01 13:25:49,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5300 to 5256. [2024-12-01 13:25:49,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5256 states, 5226 states have (on average 1.2590891695369308) internal successors, (6580), 5226 states have internal predecessors, (6580), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-01 13:25:49,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5256 states to 5256 states and 6636 transitions. [2024-12-01 13:25:49,807 INFO L78 Accepts]: Start accepts. Automaton has 5256 states and 6636 transitions. Word has length 776 [2024-12-01 13:25:49,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:25:49,807 INFO L471 AbstractCegarLoop]: Abstraction has 5256 states and 6636 transitions. [2024-12-01 13:25:49,808 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 74.9) internal successors, (749), 10 states have internal predecessors, (749), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:25:49,808 INFO L276 IsEmpty]: Start isEmpty. Operand 5256 states and 6636 transitions. [2024-12-01 13:25:49,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-01 13:25:49,823 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:25:49,824 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:25:49,824 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable134 [2024-12-01 13:25:49,824 INFO L396 AbstractCegarLoop]: === Iteration 136 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:25:49,824 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:25:49,824 INFO L85 PathProgramCache]: Analyzing trace with hash -1137712090, now seen corresponding path program 1 times [2024-12-01 13:25:49,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:25:49,824 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [85254047] [2024-12-01 13:25:49,825 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:25:49,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:25:54,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:25:57,606 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 4 proven. 179 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:25:57,606 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:25:57,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [85254047] [2024-12-01 13:25:57,606 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [85254047] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:25:57,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [975774811] [2024-12-01 13:25:57,606 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:25:57,607 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:25:57,607 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:25:57,608 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:25:57,609 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-01 13:26:03,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:26:03,876 INFO L256 TraceCheckSpWp]: Trace formula consists of 4804 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-01 13:26:03,882 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:26:03,928 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 75 proven. 0 refuted. 0 times theorem prover too weak. 168 trivial. 0 not checked. [2024-12-01 13:26:03,928 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-01 13:26:03,928 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [975774811] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:26:03,928 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-01 13:26:03,928 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 14 [2024-12-01 13:26:03,929 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1272838725] [2024-12-01 13:26:03,929 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:26:03,929 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-01 13:26:03,929 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:26:03,929 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-01 13:26:03,930 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2024-12-01 13:26:03,930 INFO L87 Difference]: Start difference. First operand 5256 states and 6636 transitions. Second operand has 6 states, 5 states have (on average 121.6) internal successors, (608), 6 states have internal predecessors, (608), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:26:04,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:26:04,048 INFO L93 Difference]: Finished difference Result 10008 states and 12578 transitions. [2024-12-01 13:26:04,049 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:26:04,049 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 121.6) internal successors, (608), 6 states have internal predecessors, (608), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 776 [2024-12-01 13:26:04,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:26:04,052 INFO L225 Difference]: With dead ends: 10008 [2024-12-01 13:26:04,053 INFO L226 Difference]: Without dead ends: 5256 [2024-12-01 13:26:04,055 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 786 GetRequests, 774 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2024-12-01 13:26:04,055 INFO L435 NwaCegarLoop]: 1173 mSDtfsCounter, 0 mSDsluCounter, 4673 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5846 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:26:04,055 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5846 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:26:04,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5256 states. [2024-12-01 13:26:04,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5256 to 5256. [2024-12-01 13:26:04,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5256 states, 5226 states have (on average 1.2560275545350172) internal successors, (6564), 5226 states have internal predecessors, (6564), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-01 13:26:04,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5256 states to 5256 states and 6620 transitions. [2024-12-01 13:26:04,120 INFO L78 Accepts]: Start accepts. Automaton has 5256 states and 6620 transitions. Word has length 776 [2024-12-01 13:26:04,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:26:04,121 INFO L471 AbstractCegarLoop]: Abstraction has 5256 states and 6620 transitions. [2024-12-01 13:26:04,121 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 121.6) internal successors, (608), 6 states have internal predecessors, (608), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:26:04,121 INFO L276 IsEmpty]: Start isEmpty. Operand 5256 states and 6620 transitions. [2024-12-01 13:26:04,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-12-01 13:26:04,126 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:26:04,126 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:26:04,163 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-12-01 13:26:04,326 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable135,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:26:04,326 INFO L396 AbstractCegarLoop]: === Iteration 137 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:26:04,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:26:04,327 INFO L85 PathProgramCache]: Analyzing trace with hash 1282567958, now seen corresponding path program 1 times [2024-12-01 13:26:04,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:26:04,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148615158] [2024-12-01 13:26:04,327 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:26:04,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:26:09,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:26:12,317 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 184 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:26:12,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:26:12,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [148615158] [2024-12-01 13:26:12,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [148615158] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:26:12,317 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:26:12,317 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-01 13:26:12,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759543158] [2024-12-01 13:26:12,318 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:26:12,318 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-01 13:26:12,318 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:26:12,319 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-01 13:26:12,319 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-01 13:26:12,319 INFO L87 Difference]: Start difference. First operand 5256 states and 6620 transitions. Second operand has 9 states, 9 states have (on average 83.44444444444444) internal successors, (751), 9 states have internal predecessors, (751), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:26:13,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:26:13,978 INFO L93 Difference]: Finished difference Result 12519 states and 15790 transitions. [2024-12-01 13:26:13,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-01 13:26:13,979 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 83.44444444444444) internal successors, (751), 9 states have internal predecessors, (751), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 778 [2024-12-01 13:26:13,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:26:13,984 INFO L225 Difference]: With dead ends: 12519 [2024-12-01 13:26:13,984 INFO L226 Difference]: Without dead ends: 9539 [2024-12-01 13:26:13,987 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-12-01 13:26:13,987 INFO L435 NwaCegarLoop]: 1461 mSDtfsCounter, 2942 mSDsluCounter, 6682 mSDsCounter, 0 mSdLazyCounter, 2803 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2943 SdHoareTripleChecker+Valid, 8143 SdHoareTripleChecker+Invalid, 2809 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 2803 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2024-12-01 13:26:13,987 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2943 Valid, 8143 Invalid, 2809 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 2803 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2024-12-01 13:26:13,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9539 states. [2024-12-01 13:26:14,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9539 to 7494. [2024-12-01 13:26:14,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7494 states, 7464 states have (on average 1.2139603429796355) internal successors, (9061), 7464 states have internal predecessors, (9061), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-01 13:26:14,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7494 states to 7494 states and 9117 transitions. [2024-12-01 13:26:14,066 INFO L78 Accepts]: Start accepts. Automaton has 7494 states and 9117 transitions. Word has length 778 [2024-12-01 13:26:14,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:26:14,066 INFO L471 AbstractCegarLoop]: Abstraction has 7494 states and 9117 transitions. [2024-12-01 13:26:14,066 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 83.44444444444444) internal successors, (751), 9 states have internal predecessors, (751), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:26:14,067 INFO L276 IsEmpty]: Start isEmpty. Operand 7494 states and 9117 transitions. [2024-12-01 13:26:14,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-12-01 13:26:14,072 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:26:14,072 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:26:14,072 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable136 [2024-12-01 13:26:14,073 INFO L396 AbstractCegarLoop]: === Iteration 138 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:26:14,073 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:26:14,073 INFO L85 PathProgramCache]: Analyzing trace with hash 1127914327, now seen corresponding path program 1 times [2024-12-01 13:26:14,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:26:14,073 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625724923] [2024-12-01 13:26:14,073 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:26:14,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:26:22,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:26:25,163 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 4 proven. 178 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:26:25,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:26:25,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625724923] [2024-12-01 13:26:25,163 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [625724923] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:26:25,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [988914410] [2024-12-01 13:26:25,163 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:26:25,163 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:26:25,163 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:26:25,165 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:26:25,165 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-01 13:26:34,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:26:34,870 INFO L256 TraceCheckSpWp]: Trace formula consists of 4810 conjuncts, 50 conjuncts are in the unsatisfiable core [2024-12-01 13:26:34,879 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:26:36,239 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 214 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-01 13:26:36,239 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:26:39,020 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 176 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:26:39,020 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [988914410] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-01 13:26:39,020 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-01 13:26:39,020 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 11] total 26 [2024-12-01 13:26:39,020 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1491880019] [2024-12-01 13:26:39,020 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-01 13:26:39,021 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-12-01 13:26:39,021 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:26:39,022 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-12-01 13:26:39,022 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=567, Unknown=0, NotChecked=0, Total=650 [2024-12-01 13:26:39,022 INFO L87 Difference]: Start difference. First operand 7494 states and 9117 transitions. Second operand has 26 states, 26 states have (on average 79.34615384615384) internal successors, (2063), 26 states have internal predecessors, (2063), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-01 13:26:41,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:26:41,412 INFO L93 Difference]: Finished difference Result 9930 states and 12133 transitions. [2024-12-01 13:26:41,412 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-12-01 13:26:41,413 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 79.34615384615384) internal successors, (2063), 26 states have internal predecessors, (2063), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 778 [2024-12-01 13:26:41,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:26:41,418 INFO L225 Difference]: With dead ends: 9930 [2024-12-01 13:26:41,418 INFO L226 Difference]: Without dead ends: 7514 [2024-12-01 13:26:41,420 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1581 GetRequests, 1541 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 316 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=298, Invalid=1424, Unknown=0, NotChecked=0, Total=1722 [2024-12-01 13:26:41,420 INFO L435 NwaCegarLoop]: 1095 mSDtfsCounter, 3330 mSDsluCounter, 14865 mSDsCounter, 0 mSdLazyCounter, 5034 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3333 SdHoareTripleChecker+Valid, 15960 SdHoareTripleChecker+Invalid, 5039 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 5034 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:26:41,420 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3333 Valid, 15960 Invalid, 5039 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 5034 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time] [2024-12-01 13:26:41,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7514 states. [2024-12-01 13:26:41,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7514 to 7500. [2024-12-01 13:26:41,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7500 states, 7470 states have (on average 1.2143239625167337) internal successors, (9071), 7470 states have internal predecessors, (9071), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-01 13:26:41,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7500 states to 7500 states and 9127 transitions. [2024-12-01 13:26:41,504 INFO L78 Accepts]: Start accepts. Automaton has 7500 states and 9127 transitions. Word has length 778 [2024-12-01 13:26:41,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:26:41,505 INFO L471 AbstractCegarLoop]: Abstraction has 7500 states and 9127 transitions. [2024-12-01 13:26:41,505 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 79.34615384615384) internal successors, (2063), 26 states have internal predecessors, (2063), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-01 13:26:41,505 INFO L276 IsEmpty]: Start isEmpty. Operand 7500 states and 9127 transitions. [2024-12-01 13:26:41,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-12-01 13:26:41,511 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:26:41,511 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:26:41,547 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-12-01 13:26:41,711 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable137 [2024-12-01 13:26:41,711 INFO L396 AbstractCegarLoop]: === Iteration 139 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:26:41,711 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:26:41,711 INFO L85 PathProgramCache]: Analyzing trace with hash 1837144428, now seen corresponding path program 1 times [2024-12-01 13:26:41,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:26:41,712 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897828710] [2024-12-01 13:26:41,712 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:26:41,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:26:42,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:26:43,042 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 145 proven. 0 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2024-12-01 13:26:43,043 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:26:43,043 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1897828710] [2024-12-01 13:26:43,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1897828710] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:26:43,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:26:43,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-01 13:26:43,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494336190] [2024-12-01 13:26:43,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:26:43,044 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-01 13:26:43,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:26:43,044 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-01 13:26:43,044 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:26:43,044 INFO L87 Difference]: Start difference. First operand 7500 states and 9127 transitions. Second operand has 5 states, 5 states have (on average 145.4) internal successors, (727), 5 states have internal predecessors, (727), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:26:43,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:26:43,139 INFO L93 Difference]: Finished difference Result 13054 states and 16016 transitions. [2024-12-01 13:26:43,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-01 13:26:43,140 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 145.4) internal successors, (727), 5 states have internal predecessors, (727), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 778 [2024-12-01 13:26:43,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:26:43,147 INFO L225 Difference]: With dead ends: 13054 [2024-12-01 13:26:43,147 INFO L226 Difference]: Without dead ends: 7744 [2024-12-01 13:26:43,151 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-01 13:26:43,151 INFO L435 NwaCegarLoop]: 1172 mSDtfsCounter, 15 mSDsluCounter, 3504 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 4676 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:26:43,151 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 4676 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:26:43,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7744 states. [2024-12-01 13:26:43,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7744 to 7744. [2024-12-01 13:26:43,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7744 states, 7714 states have (on average 1.2203785325382421) internal successors, (9414), 7714 states have internal predecessors, (9414), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-01 13:26:43,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7744 states to 7744 states and 9470 transitions. [2024-12-01 13:26:43,242 INFO L78 Accepts]: Start accepts. Automaton has 7744 states and 9470 transitions. Word has length 778 [2024-12-01 13:26:43,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:26:43,243 INFO L471 AbstractCegarLoop]: Abstraction has 7744 states and 9470 transitions. [2024-12-01 13:26:43,243 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 145.4) internal successors, (727), 5 states have internal predecessors, (727), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:26:43,243 INFO L276 IsEmpty]: Start isEmpty. Operand 7744 states and 9470 transitions. [2024-12-01 13:26:43,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-01 13:26:43,249 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:26:43,249 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:26:43,249 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable138 [2024-12-01 13:26:43,249 INFO L396 AbstractCegarLoop]: === Iteration 140 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:26:43,249 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:26:43,249 INFO L85 PathProgramCache]: Analyzing trace with hash -1209614224, now seen corresponding path program 1 times [2024-12-01 13:26:43,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:26:43,249 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [752880676] [2024-12-01 13:26:43,249 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:26:43,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:26:51,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:26:58,545 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 144 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:26:58,546 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:26:58,546 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [752880676] [2024-12-01 13:26:58,546 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [752880676] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:26:58,546 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1554365873] [2024-12-01 13:26:58,546 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:26:58,546 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:26:58,546 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:26:58,548 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:26:58,548 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-01 13:27:04,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:27:04,920 INFO L256 TraceCheckSpWp]: Trace formula consists of 4811 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-01 13:27:04,928 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:27:04,993 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 215 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-01 13:27:04,993 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-01 13:27:04,993 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1554365873] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:27:04,993 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-01 13:27:04,993 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22 [2024-12-01 13:27:04,993 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956783327] [2024-12-01 13:27:04,993 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:27:04,994 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-01 13:27:04,994 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:27:04,994 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-01 13:27:04,994 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=393, Unknown=0, NotChecked=0, Total=462 [2024-12-01 13:27:04,994 INFO L87 Difference]: Start difference. First operand 7744 states and 9470 transitions. Second operand has 6 states, 5 states have (on average 150.8) internal successors, (754), 6 states have internal predecessors, (754), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:27:05,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:27:05,109 INFO L93 Difference]: Finished difference Result 15239 states and 18576 transitions. [2024-12-01 13:27:05,109 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:27:05,109 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 150.8) internal successors, (754), 6 states have internal predecessors, (754), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 779 [2024-12-01 13:27:05,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:27:05,114 INFO L225 Difference]: With dead ends: 15239 [2024-12-01 13:27:05,114 INFO L226 Difference]: Without dead ends: 7744 [2024-12-01 13:27:05,118 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 796 GetRequests, 776 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=393, Unknown=0, NotChecked=0, Total=462 [2024-12-01 13:27:05,118 INFO L435 NwaCegarLoop]: 1172 mSDtfsCounter, 0 mSDsluCounter, 4669 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5841 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:27:05,119 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5841 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:27:05,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7744 states. [2024-12-01 13:27:05,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7744 to 7744. [2024-12-01 13:27:05,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7744 states, 7714 states have (on average 1.2198599948146227) internal successors, (9410), 7714 states have internal predecessors, (9410), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-01 13:27:05,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7744 states to 7744 states and 9466 transitions. [2024-12-01 13:27:05,199 INFO L78 Accepts]: Start accepts. Automaton has 7744 states and 9466 transitions. Word has length 779 [2024-12-01 13:27:05,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:27:05,199 INFO L471 AbstractCegarLoop]: Abstraction has 7744 states and 9466 transitions. [2024-12-01 13:27:05,200 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 150.8) internal successors, (754), 6 states have internal predecessors, (754), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:27:05,200 INFO L276 IsEmpty]: Start isEmpty. Operand 7744 states and 9466 transitions. [2024-12-01 13:27:05,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 781 [2024-12-01 13:27:05,206 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:27:05,206 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:27:05,249 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-12-01 13:27:05,406 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable139 [2024-12-01 13:27:05,406 INFO L396 AbstractCegarLoop]: === Iteration 141 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:27:05,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:27:05,407 INFO L85 PathProgramCache]: Analyzing trace with hash 42027201, now seen corresponding path program 1 times [2024-12-01 13:27:05,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:27:05,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661990110] [2024-12-01 13:27:05,407 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:27:05,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:27:14,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:27:19,115 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 2 proven. 180 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:27:19,115 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:27:19,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661990110] [2024-12-01 13:27:19,115 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [661990110] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:27:19,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1999455785] [2024-12-01 13:27:19,115 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:27:19,115 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:27:19,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:27:19,117 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:27:19,117 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-12-01 13:27:26,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:27:26,805 INFO L256 TraceCheckSpWp]: Trace formula consists of 4814 conjuncts, 171 conjuncts are in the unsatisfiable core [2024-12-01 13:27:26,819 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:27:35,770 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 144 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:27:35,770 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:27:54,274 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 144 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:27:54,274 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1999455785] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-01 13:27:54,274 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-01 13:27:54,275 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 30, 29] total 68 [2024-12-01 13:27:54,275 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [126424605] [2024-12-01 13:27:54,275 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-01 13:27:54,275 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 68 states [2024-12-01 13:27:54,275 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:27:54,276 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2024-12-01 13:27:54,277 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=535, Invalid=4021, Unknown=0, NotChecked=0, Total=4556 [2024-12-01 13:27:54,277 INFO L87 Difference]: Start difference. First operand 7744 states and 9466 transitions. Second operand has 68 states, 68 states have (on average 30.86764705882353) internal successors, (2099), 68 states have internal predecessors, (2099), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-12-01 13:29:25,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:29:25,895 INFO L93 Difference]: Finished difference Result 69389 states and 86048 transitions. [2024-12-01 13:29:25,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 397 states. [2024-12-01 13:29:25,895 INFO L78 Accepts]: Start accepts. Automaton has has 68 states, 68 states have (on average 30.86764705882353) internal successors, (2099), 68 states have internal predecessors, (2099), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) Word has length 780 [2024-12-01 13:29:25,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:29:25,924 INFO L225 Difference]: With dead ends: 69389 [2024-12-01 13:29:25,924 INFO L226 Difference]: Without dead ends: 64482 [2024-12-01 13:29:25,938 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1954 GetRequests, 1508 SyntacticMatches, 0 SemanticMatches, 446 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78949 ImplicationChecksByTransitivity, 24.2s TimeCoverageRelationStatistics Valid=22056, Invalid=178200, Unknown=0, NotChecked=0, Total=200256 [2024-12-01 13:29:25,939 INFO L435 NwaCegarLoop]: 5297 mSDtfsCounter, 65792 mSDsluCounter, 177766 mSDsCounter, 0 mSdLazyCounter, 105926 mSolverCounterSat, 227 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 51.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65797 SdHoareTripleChecker+Valid, 183063 SdHoareTripleChecker+Invalid, 106153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.7s SdHoareTripleChecker+Time, 227 IncrementalHoareTripleChecker+Valid, 105926 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 59.5s IncrementalHoareTripleChecker+Time [2024-12-01 13:29:25,939 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [65797 Valid, 183063 Invalid, 106153 Unknown, 0 Unchecked, 0.7s Time], IncrementalHoareTripleChecker [227 Valid, 105926 Invalid, 0 Unknown, 0 Unchecked, 59.5s Time] [2024-12-01 13:29:25,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64482 states. [2024-12-01 13:29:26,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64482 to 18104. [2024-12-01 13:29:26,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18104 states, 18029 states have (on average 1.2370070442065562) internal successors, (22302), 18029 states have internal predecessors, (22302), 73 states have call successors, (73), 1 states have call predecessors, (73), 1 states have return successors, (73), 73 states have call predecessors, (73), 73 states have call successors, (73) [2024-12-01 13:29:26,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18104 states to 18104 states and 22448 transitions. [2024-12-01 13:29:26,267 INFO L78 Accepts]: Start accepts. Automaton has 18104 states and 22448 transitions. Word has length 780 [2024-12-01 13:29:26,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:29:26,267 INFO L471 AbstractCegarLoop]: Abstraction has 18104 states and 22448 transitions. [2024-12-01 13:29:26,267 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 68 states, 68 states have (on average 30.86764705882353) internal successors, (2099), 68 states have internal predecessors, (2099), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-12-01 13:29:26,268 INFO L276 IsEmpty]: Start isEmpty. Operand 18104 states and 22448 transitions. [2024-12-01 13:29:26,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-01 13:29:26,279 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:29:26,279 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:29:26,323 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-12-01 13:29:26,479 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable140,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:29:26,480 INFO L396 AbstractCegarLoop]: === Iteration 142 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:29:26,480 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:29:26,480 INFO L85 PathProgramCache]: Analyzing trace with hash 115285442, now seen corresponding path program 1 times [2024-12-01 13:29:26,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:29:26,480 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [454730757] [2024-12-01 13:29:26,480 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:29:26,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:29:27,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:29:29,056 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 181 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:29:29,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:29:29,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [454730757] [2024-12-01 13:29:29,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [454730757] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:29:29,057 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:29:29,057 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-01 13:29:29,057 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1571771212] [2024-12-01 13:29:29,057 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:29:29,057 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-01 13:29:29,057 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:29:29,058 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-01 13:29:29,058 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:29:29,058 INFO L87 Difference]: Start difference. First operand 18104 states and 22448 transitions. Second operand has 6 states, 6 states have (on average 125.66666666666667) internal successors, (754), 6 states have internal predecessors, (754), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:29:29,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:29:29,303 INFO L93 Difference]: Finished difference Result 36740 states and 45920 transitions. [2024-12-01 13:29:29,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:29:29,304 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 125.66666666666667) internal successors, (754), 6 states have internal predecessors, (754), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 781 [2024-12-01 13:29:29,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:29:29,322 INFO L225 Difference]: With dead ends: 36740 [2024-12-01 13:29:29,322 INFO L226 Difference]: Without dead ends: 26338 [2024-12-01 13:29:29,331 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-12-01 13:29:29,331 INFO L435 NwaCegarLoop]: 2045 mSDtfsCounter, 858 mSDsluCounter, 7293 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 858 SdHoareTripleChecker+Valid, 9338 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:29:29,332 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [858 Valid, 9338 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:29:29,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26338 states. [2024-12-01 13:29:29,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26338 to 18894. [2024-12-01 13:29:29,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18894 states, 18785 states have (on average 1.2381687516635613) internal successors, (23259), 18785 states have internal predecessors, (23259), 107 states have call successors, (107), 1 states have call predecessors, (107), 1 states have return successors, (107), 107 states have call predecessors, (107), 107 states have call successors, (107) [2024-12-01 13:29:29,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18894 states to 18894 states and 23473 transitions. [2024-12-01 13:29:29,656 INFO L78 Accepts]: Start accepts. Automaton has 18894 states and 23473 transitions. Word has length 781 [2024-12-01 13:29:29,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:29:29,657 INFO L471 AbstractCegarLoop]: Abstraction has 18894 states and 23473 transitions. [2024-12-01 13:29:29,657 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 125.66666666666667) internal successors, (754), 6 states have internal predecessors, (754), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:29:29,657 INFO L276 IsEmpty]: Start isEmpty. Operand 18894 states and 23473 transitions. [2024-12-01 13:29:29,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-01 13:29:29,669 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:29:29,669 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:29:29,669 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable141 [2024-12-01 13:29:29,669 INFO L396 AbstractCegarLoop]: === Iteration 143 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:29:29,670 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:29:29,670 INFO L85 PathProgramCache]: Analyzing trace with hash 114344321, now seen corresponding path program 1 times [2024-12-01 13:29:29,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:29:29,670 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2015926669] [2024-12-01 13:29:29,670 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:29:29,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:29:39,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:29:44,510 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-01 13:29:44,510 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:29:44,510 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2015926669] [2024-12-01 13:29:44,510 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2015926669] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:29:44,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1761949632] [2024-12-01 13:29:44,511 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:29:44,511 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:29:44,511 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:29:44,512 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:29:44,513 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-12-01 13:29:54,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:29:54,296 INFO L256 TraceCheckSpWp]: Trace formula consists of 4818 conjuncts, 50 conjuncts are in the unsatisfiable core [2024-12-01 13:29:54,305 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:29:58,009 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 2 proven. 148 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2024-12-01 13:29:58,009 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:30:07,175 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 23 proven. 147 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-12-01 13:30:07,175 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1761949632] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-01 13:30:07,175 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-01 13:30:07,175 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 11] total 33 [2024-12-01 13:30:07,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [868473169] [2024-12-01 13:30:07,175 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-01 13:30:07,176 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-12-01 13:30:07,176 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:30:07,177 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-12-01 13:30:07,177 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=939, Unknown=0, NotChecked=0, Total=1056 [2024-12-01 13:30:07,177 INFO L87 Difference]: Start difference. First operand 18894 states and 23473 transitions. Second operand has 33 states, 33 states have (on average 67.24242424242425) internal successors, (2219), 33 states have internal predecessors, (2219), 5 states have call successors, (13), 1 states have call predecessors, (13), 1 states have return successors, (13), 5 states have call predecessors, (13), 5 states have call successors, (13) [2024-12-01 13:30:12,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:30:12,664 INFO L93 Difference]: Finished difference Result 50158 states and 63059 transitions. [2024-12-01 13:30:12,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2024-12-01 13:30:12,665 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 67.24242424242425) internal successors, (2219), 33 states have internal predecessors, (2219), 5 states have call successors, (13), 1 states have call predecessors, (13), 1 states have return successors, (13), 5 states have call predecessors, (13), 5 states have call successors, (13) Word has length 782 [2024-12-01 13:30:12,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:30:12,763 INFO L225 Difference]: With dead ends: 50158 [2024-12-01 13:30:12,764 INFO L226 Difference]: Without dead ends: 32217 [2024-12-01 13:30:12,770 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1642 GetRequests, 1545 SyntacticMatches, 0 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2645 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1105, Invalid=8597, Unknown=0, NotChecked=0, Total=9702 [2024-12-01 13:30:12,770 INFO L435 NwaCegarLoop]: 865 mSDtfsCounter, 8164 mSDsluCounter, 17385 mSDsCounter, 0 mSdLazyCounter, 7530 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8164 SdHoareTripleChecker+Valid, 18250 SdHoareTripleChecker+Invalid, 7548 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 7530 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.6s IncrementalHoareTripleChecker+Time [2024-12-01 13:30:12,770 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [8164 Valid, 18250 Invalid, 7548 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [18 Valid, 7530 Invalid, 0 Unknown, 0 Unchecked, 3.6s Time] [2024-12-01 13:30:12,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32217 states. [2024-12-01 13:30:13,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32217 to 21073. [2024-12-01 13:30:13,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21073 states, 20923 states have (on average 1.244324427663337) internal successors, (26035), 20923 states have internal predecessors, (26035), 148 states have call successors, (148), 1 states have call predecessors, (148), 1 states have return successors, (148), 148 states have call predecessors, (148), 148 states have call successors, (148) [2024-12-01 13:30:13,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21073 states to 21073 states and 26331 transitions. [2024-12-01 13:30:13,157 INFO L78 Accepts]: Start accepts. Automaton has 21073 states and 26331 transitions. Word has length 782 [2024-12-01 13:30:13,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:30:13,157 INFO L471 AbstractCegarLoop]: Abstraction has 21073 states and 26331 transitions. [2024-12-01 13:30:13,157 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 67.24242424242425) internal successors, (2219), 33 states have internal predecessors, (2219), 5 states have call successors, (13), 1 states have call predecessors, (13), 1 states have return successors, (13), 5 states have call predecessors, (13), 5 states have call successors, (13) [2024-12-01 13:30:13,158 INFO L276 IsEmpty]: Start isEmpty. Operand 21073 states and 26331 transitions. [2024-12-01 13:30:13,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-01 13:30:13,170 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:30:13,171 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:30:13,218 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-12-01 13:30:13,371 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable142,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:30:13,371 INFO L396 AbstractCegarLoop]: === Iteration 144 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:30:13,371 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:30:13,371 INFO L85 PathProgramCache]: Analyzing trace with hash -1628149220, now seen corresponding path program 1 times [2024-12-01 13:30:13,371 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:30:13,371 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281276796] [2024-12-01 13:30:13,372 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:30:13,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:30:25,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:30:28,214 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 178 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-12-01 13:30:28,214 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-01 13:30:28,214 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [281276796] [2024-12-01 13:30:28,214 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [281276796] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:30:28,214 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-01 13:30:28,215 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-01 13:30:28,215 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [198762858] [2024-12-01 13:30:28,215 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:30:28,215 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-01 13:30:28,215 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-01 13:30:28,216 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-01 13:30:28,216 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-01 13:30:28,216 INFO L87 Difference]: Start difference. First operand 21073 states and 26331 transitions. Second operand has 6 states, 6 states have (on average 125.33333333333333) internal successors, (752), 6 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:30:28,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:30:28,593 INFO L93 Difference]: Finished difference Result 47752 states and 60309 transitions. [2024-12-01 13:30:28,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-01 13:30:28,593 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 125.33333333333333) internal successors, (752), 6 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 782 [2024-12-01 13:30:28,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:30:28,613 INFO L225 Difference]: With dead ends: 47752 [2024-12-01 13:30:28,614 INFO L226 Difference]: Without dead ends: 31976 [2024-12-01 13:30:28,627 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-12-01 13:30:28,627 INFO L435 NwaCegarLoop]: 1167 mSDtfsCounter, 734 mSDsluCounter, 4392 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 734 SdHoareTripleChecker+Valid, 5559 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-01 13:30:28,627 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [734 Valid, 5559 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-01 13:30:28,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31976 states. [2024-12-01 13:30:29,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31976 to 26101. [2024-12-01 13:30:29,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26101 states, 25905 states have (on average 1.2217332561281606) internal successors, (31649), 25905 states have internal predecessors, (31649), 194 states have call successors, (194), 1 states have call predecessors, (194), 1 states have return successors, (194), 194 states have call predecessors, (194), 194 states have call successors, (194) [2024-12-01 13:30:29,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26101 states to 26101 states and 32037 transitions. [2024-12-01 13:30:29,123 INFO L78 Accepts]: Start accepts. Automaton has 26101 states and 32037 transitions. Word has length 782 [2024-12-01 13:30:29,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:30:29,123 INFO L471 AbstractCegarLoop]: Abstraction has 26101 states and 32037 transitions. [2024-12-01 13:30:29,124 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 125.33333333333333) internal successors, (752), 6 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-01 13:30:29,124 INFO L276 IsEmpty]: Start isEmpty. Operand 26101 states and 32037 transitions. [2024-12-01 13:30:29,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-12-01 13:30:29,141 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:30:29,141 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:30:29,141 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable143 [2024-12-01 13:30:29,141 INFO L396 AbstractCegarLoop]: === Iteration 145 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:30:29,141 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:30:29,141 INFO L85 PathProgramCache]: Analyzing trace with hash 1442248545, now seen corresponding path program 1 times [2024-12-01 13:30:29,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-01 13:30:29,142 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1877130321] [2024-12-01 13:30:29,142 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:30:29,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-01 13:30:57,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-01 13:30:57,327 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-01 13:31:21,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-01 13:31:22,179 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-01 13:31:22,179 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-01 13:31:22,180 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-01 13:31:22,181 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable144 [2024-12-01 13:31:22,183 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:31:22,535 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-01 13:31:22,537 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 01.12 01:31:22 BoogieIcfgContainer [2024-12-01 13:31:22,537 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-01 13:31:22,538 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-01 13:31:22,538 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-01 13:31:22,538 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-01 13:31:22,539 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 01:20:50" (3/4) ... [2024-12-01 13:31:22,541 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-12-01 13:31:22,541 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-01 13:31:22,542 INFO L158 Benchmark]: Toolchain (without parser) took 637156.85ms. Allocated memory was 142.6MB in the beginning and 3.1GB in the end (delta: 3.0GB). Free memory was 114.7MB in the beginning and 1.1GB in the end (delta: -999.0MB). Peak memory consumption was 2.0GB. Max. memory is 16.1GB. [2024-12-01 13:31:22,542 INFO L158 Benchmark]: CDTParser took 0.24ms. Allocated memory is still 142.6MB. Free memory is still 84.2MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-01 13:31:22,542 INFO L158 Benchmark]: CACSL2BoogieTranslator took 555.39ms. Allocated memory is still 142.6MB. Free memory was 114.7MB in the beginning and 58.7MB in the end (delta: 56.0MB). Peak memory consumption was 58.7MB. Max. memory is 16.1GB. [2024-12-01 13:31:22,542 INFO L158 Benchmark]: Boogie Procedure Inliner took 326.95ms. Allocated memory was 142.6MB in the beginning and 159.4MB in the end (delta: 16.8MB). Free memory was 58.7MB in the beginning and 87.8MB in the end (delta: -29.1MB). Peak memory consumption was 51.1MB. Max. memory is 16.1GB. [2024-12-01 13:31:22,542 INFO L158 Benchmark]: Boogie Preprocessor took 321.91ms. Allocated memory was 159.4MB in the beginning and 369.1MB in the end (delta: 209.7MB). Free memory was 87.8MB in the beginning and 280.3MB in the end (delta: -192.6MB). Peak memory consumption was 61.0MB. Max. memory is 16.1GB. [2024-12-01 13:31:22,542 INFO L158 Benchmark]: RCFGBuilder took 3564.20ms. Allocated memory is still 369.1MB. Free memory was 280.3MB in the beginning and 238.6MB in the end (delta: 41.7MB). Peak memory consumption was 211.1MB. Max. memory is 16.1GB. [2024-12-01 13:31:22,542 INFO L158 Benchmark]: TraceAbstraction took 632378.62ms. Allocated memory was 369.1MB in the beginning and 3.1GB in the end (delta: 2.8GB). Free memory was 235.0MB in the beginning and 1.1GB in the end (delta: -880.8MB). Peak memory consumption was 2.1GB. Max. memory is 16.1GB. [2024-12-01 13:31:22,542 INFO L158 Benchmark]: Witness Printer took 3.55ms. Allocated memory is still 3.1GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 175.1kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-01 13:31:22,543 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24ms. Allocated memory is still 142.6MB. Free memory is still 84.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 555.39ms. Allocated memory is still 142.6MB. Free memory was 114.7MB in the beginning and 58.7MB in the end (delta: 56.0MB). Peak memory consumption was 58.7MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 326.95ms. Allocated memory was 142.6MB in the beginning and 159.4MB in the end (delta: 16.8MB). Free memory was 58.7MB in the beginning and 87.8MB in the end (delta: -29.1MB). Peak memory consumption was 51.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 321.91ms. Allocated memory was 159.4MB in the beginning and 369.1MB in the end (delta: 209.7MB). Free memory was 87.8MB in the beginning and 280.3MB in the end (delta: -192.6MB). Peak memory consumption was 61.0MB. Max. memory is 16.1GB. * RCFGBuilder took 3564.20ms. Allocated memory is still 369.1MB. Free memory was 280.3MB in the beginning and 238.6MB in the end (delta: 41.7MB). Peak memory consumption was 211.1MB. Max. memory is 16.1GB. * TraceAbstraction took 632378.62ms. Allocated memory was 369.1MB in the beginning and 3.1GB in the end (delta: 2.8GB). Free memory was 235.0MB in the beginning and 1.1GB in the end (delta: -880.8MB). Peak memory consumption was 2.1GB. Max. memory is 16.1GB. * Witness Printer took 3.55ms. Allocated memory is still 3.1GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 175.1kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 180, overapproximation of bitwiseOr at line 584, overapproximation of bitwiseOr at line 199, overapproximation of bitwiseAnd at line 754, overapproximation of bitwiseAnd at line 849, overapproximation of bitwiseAnd at line 1039, overapproximation of bitwiseAnd at line 1191, overapproximation of bitwiseAnd at line 659, overapproximation of bitwiseAnd at line 408, overapproximation of bitwiseAnd at line 264, overapproximation of bitwiseAnd at line 830, overapproximation of bitwiseAnd at line 792, overapproximation of bitwiseAnd at line 593, overapproximation of bitwiseAnd at line 868, overapproximation of bitwiseAnd at line 318, overapproximation of bitwiseAnd at line 1058, overapproximation of bitwiseAnd at line 396, overapproximation of bitwiseAnd at line 678, overapproximation of bitwiseAnd at line 402, overapproximation of bitwiseAnd at line 716, overapproximation of bitwiseAnd at line 925, overapproximation of bitwiseAnd at line 420, overapproximation of bitwiseAnd at line 1020, overapproximation of bitwiseAnd at line 1134, overapproximation of bitwiseAnd at line 164, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 160, overapproximation of bitwiseAnd at line 773, overapproximation of bitwiseAnd at line 282, overapproximation of bitwiseAnd at line 1077, overapproximation of bitwiseAnd at line 1115, overapproximation of bitwiseAnd at line 300, overapproximation of bitwiseAnd at line 432, overapproximation of bitwiseAnd at line 366, overapproximation of bitwiseAnd at line 306, overapproximation of bitwiseAnd at line 256, overapproximation of bitwiseAnd at line 372, overapproximation of bitwiseAnd at line 963, overapproximation of bitwiseAnd at line 288, overapproximation of bitwiseAnd at line 354, overapproximation of bitwiseAnd at line 697, overapproximation of bitwiseAnd at line 906, overapproximation of bitwiseAnd at line 312, overapproximation of bitwiseAnd at line 330, overapproximation of bitwiseAnd at line 414, overapproximation of bitwiseAnd at line 378, overapproximation of bitwiseAnd at line 1153, overapproximation of bitwiseAnd at line 982, overapproximation of bitwiseAnd at line 276, overapproximation of bitwiseAnd at line 324, overapproximation of bitwiseAnd at line 336, overapproximation of bitwiseAnd at line 360, overapproximation of bitwiseAnd at line 200, overapproximation of bitwiseAnd at line 390, overapproximation of bitwiseAnd at line 811, overapproximation of bitwiseAnd at line 348, overapproximation of bitwiseAnd at line 887, overapproximation of bitwiseAnd at line 1265, overapproximation of bitwiseAnd at line 735, overapproximation of bitwiseAnd at line 1001, overapproximation of bitwiseAnd at line 426. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 8); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (8 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 7); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (7 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 6); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (6 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 5); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (5 - 1); [L41] const SORT_100 mask_SORT_100 = (SORT_100)-1 >> (sizeof(SORT_100) * 8 - 4); [L42] const SORT_100 msb_SORT_100 = (SORT_100)1 << (4 - 1); [L44] const SORT_141 mask_SORT_141 = (SORT_141)-1 >> (sizeof(SORT_141) * 8 - 3); [L45] const SORT_141 msb_SORT_141 = (SORT_141)1 << (3 - 1); [L47] const SORT_162 mask_SORT_162 = (SORT_162)-1 >> (sizeof(SORT_162) * 8 - 2); [L48] const SORT_162 msb_SORT_162 = (SORT_162)1 << (2 - 1); [L50] const SORT_13 var_15 = 32; [L51] const SORT_19 var_20 = 31; [L52] const SORT_19 var_25 = 30; [L53] const SORT_19 var_30 = 29; [L54] const SORT_19 var_35 = 28; [L55] const SORT_19 var_40 = 27; [L56] const SORT_19 var_45 = 26; [L57] const SORT_19 var_50 = 25; [L58] const SORT_19 var_55 = 24; [L59] const SORT_19 var_60 = 23; [L60] const SORT_19 var_65 = 22; [L61] const SORT_19 var_70 = 21; [L62] const SORT_19 var_75 = 20; [L63] const SORT_19 var_80 = 19; [L64] const SORT_19 var_85 = 18; [L65] const SORT_19 var_90 = 17; [L66] const SORT_19 var_95 = 16; [L67] const SORT_100 var_101 = 15; [L68] const SORT_100 var_106 = 14; [L69] const SORT_100 var_111 = 13; [L70] const SORT_100 var_116 = 12; [L71] const SORT_100 var_121 = 11; [L72] const SORT_100 var_126 = 10; [L73] const SORT_100 var_131 = 9; [L74] const SORT_100 var_136 = 8; [L75] const SORT_141 var_142 = 7; [L76] const SORT_141 var_147 = 6; [L77] const SORT_141 var_152 = 5; [L78] const SORT_141 var_157 = 4; [L79] const SORT_162 var_163 = 3; [L80] const SORT_162 var_168 = 2; [L81] const SORT_1 var_173 = 1; [L82] const SORT_13 var_186 = 33; [L83] const SORT_11 var_203 = 0; [L84] const SORT_1 var_233 = 0; [L85] const SORT_3 var_582 = 0; [L87] SORT_1 input_2; [L88] SORT_3 input_4; [L89] SORT_1 input_5; [L90] SORT_1 input_6; [L91] SORT_1 input_7; [L92] SORT_1 input_8; [L93] SORT_3 input_9; [L94] SORT_1 input_231; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L96] SORT_3 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L97] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L98] SORT_3 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L99] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L99] SORT_3 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L100] SORT_3 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L101] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L101] SORT_3 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L102] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L102] SORT_3 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L103] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L103] SORT_3 state_44 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L104] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L104] SORT_3 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L105] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L105] SORT_3 state_54 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L106] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L106] SORT_3 state_59 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L107] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L107] SORT_3 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L108] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L108] SORT_3 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L109] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L109] SORT_3 state_74 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L110] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L110] SORT_3 state_79 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L111] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L111] SORT_3 state_84 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L112] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L112] SORT_3 state_89 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L113] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L113] SORT_3 state_94 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L114] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L114] SORT_3 state_99 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L115] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L115] SORT_3 state_105 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L116] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L116] SORT_3 state_110 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L117] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L117] SORT_3 state_115 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L118] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L118] SORT_3 state_120 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L119] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L119] SORT_3 state_125 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L120] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L120] SORT_3 state_130 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L121] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L121] SORT_3 state_135 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L122] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L122] SORT_3 state_140 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L123] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L123] SORT_3 state_146 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L124] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L124] SORT_3 state_151 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L125] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L125] SORT_3 state_156 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L126] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L126] SORT_3 state_161 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L127] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L127] SORT_3 state_167 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L128] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L128] SORT_3 state_172 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L129] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L129] SORT_3 state_177 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L130] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L130] SORT_11 state_182 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L131] SORT_1 state_190 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L132] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L132] SORT_1 state_191 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L133] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L133] SORT_11 state_194 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L134] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L134] SORT_3 state_209 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L135] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L135] SORT_1 state_213 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L136] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L136] SORT_11 state_282 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L138] SORT_1 init_214_arg_1 = var_173; [L139] state_213 = init_214_arg_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L142] input_2 = __VERIFIER_nondet_uchar() [L143] input_4 = __VERIFIER_nondet_uchar() [L144] input_5 = __VERIFIER_nondet_uchar() [L145] input_6 = __VERIFIER_nondet_uchar() [L146] input_7 = __VERIFIER_nondet_uchar() [L147] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L147] input_7 = input_7 & mask_SORT_1 [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_uchar() [L150] input_231 = __VERIFIER_nondet_uchar() [L152] SORT_1 var_215_arg_0 = input_7; [L153] SORT_1 var_215_arg_1 = state_213; [L154] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L155] SORT_1 var_216_arg_0 = var_173; [L156] SORT_1 var_216 = ~var_216_arg_0; [L157] SORT_1 var_217_arg_0 = var_215; [L158] SORT_1 var_217_arg_1 = var_216; VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L160] EXPR var_217 & mask_SORT_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] var_217 = var_217 & mask_SORT_1 [L161] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L162] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L162] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L165] SORT_11 var_187 = var_187_arg_0; [L166] SORT_11 var_188_arg_0 = state_182; [L167] SORT_11 var_188_arg_1 = var_187; [L168] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L169] SORT_1 var_219_arg_0 = var_188; [L170] SORT_1 var_219 = ~var_219_arg_0; [L171] SORT_1 var_220_arg_0 = input_6; [L172] SORT_1 var_220 = ~var_220_arg_0; [L173] SORT_1 var_221_arg_0 = var_219; [L174] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L176] SORT_1 var_222_arg_0 = var_173; [L177] SORT_1 var_222 = ~var_222_arg_0; [L178] SORT_1 var_223_arg_0 = var_221; [L179] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L181] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] var_223 = var_223 & mask_SORT_1 [L182] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L183] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L183] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] SORT_11 var_183_arg_0 = state_182; [L185] SORT_1 var_183 = var_183_arg_0 != 0; [L186] SORT_1 var_184_arg_0 = var_183; [L187] SORT_1 var_184 = ~var_184_arg_0; [L188] SORT_1 var_225_arg_0 = var_184; [L189] SORT_1 var_225 = ~var_225_arg_0; [L190] SORT_1 var_226_arg_0 = input_5; [L191] SORT_1 var_226 = ~var_226_arg_0; [L192] SORT_1 var_227_arg_0 = var_225; [L193] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L195] SORT_1 var_228_arg_0 = var_173; [L196] SORT_1 var_228 = ~var_228_arg_0; [L197] SORT_1 var_229_arg_0 = var_227; [L198] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=255, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L200] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] var_229 = var_229 & mask_SORT_1 [L201] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L202] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L202] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L204] SORT_1 var_234_arg_0 = state_213; [L205] SORT_1 var_234_arg_1 = var_233; [L206] SORT_1 var_234_arg_2 = var_173; [L207] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L208] SORT_1 var_192_arg_0 = state_191; [L209] SORT_1 var_192 = ~var_192_arg_0; [L210] SORT_1 var_193_arg_0 = state_190; [L211] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L213] SORT_11 var_195_arg_0 = state_194; [L214] SORT_1 var_195 = var_195_arg_0 != 0; [L215] SORT_1 var_196_arg_0 = var_193; [L216] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L218] SORT_1 var_197_arg_0 = state_190; [L219] SORT_1 var_197 = ~var_197_arg_0; [L220] SORT_1 var_198_arg_0 = input_6; [L221] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L223] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L225] SORT_11 var_199 = var_199_arg_0; [L226] SORT_11 var_200_arg_0 = state_194; [L227] SORT_11 var_200_arg_1 = var_199; [L228] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L229] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=256, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L231] SORT_11 var_201 = var_201_arg_0; [L232] SORT_11 var_202_arg_0 = var_200; [L233] SORT_11 var_202_arg_1 = var_201; [L234] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L235] SORT_1 var_204_arg_0 = input_7; [L236] SORT_11 var_204_arg_1 = var_203; [L237] SORT_11 var_204_arg_2 = var_202; [L238] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] var_204 = var_204 & mask_SORT_11 [L240] SORT_11 var_205_arg_0 = var_204; [L241] SORT_1 var_205 = var_205_arg_0 != 0; [L242] SORT_1 var_206_arg_0 = var_205; [L243] SORT_1 var_206 = ~var_206_arg_0; [L244] SORT_1 var_207_arg_0 = var_196; [L245] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L247] SORT_1 var_208_arg_0 = var_207; [L248] SORT_1 var_208 = ~var_208_arg_0; [L249] SORT_11 var_14_arg_0 = state_12; [L250] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] var_14 = var_14 & mask_SORT_13 [L252] SORT_13 var_178_arg_0 = var_14; [L253] SORT_1 var_178 = var_178_arg_0 != 0; [L254] SORT_1 var_179_arg_0 = var_178; [L255] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] var_179 = var_179 & mask_SORT_1 [L257] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L259] SORT_13 var_174 = var_174_arg_0; [L260] SORT_13 var_175_arg_0 = var_14; [L261] SORT_13 var_175_arg_1 = var_174; [L262] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L263] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L265] SORT_13 var_169 = var_169_arg_0; [L266] SORT_13 var_170_arg_0 = var_14; [L267] SORT_13 var_170_arg_1 = var_169; [L268] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L269] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L271] SORT_13 var_164 = var_164_arg_0; [L272] SORT_13 var_165_arg_0 = var_14; [L273] SORT_13 var_165_arg_1 = var_164; [L274] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L275] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L277] SORT_13 var_158 = var_158_arg_0; [L278] SORT_13 var_159_arg_0 = var_14; [L279] SORT_13 var_159_arg_1 = var_158; [L280] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L281] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L283] SORT_13 var_153 = var_153_arg_0; [L284] SORT_13 var_154_arg_0 = var_14; [L285] SORT_13 var_154_arg_1 = var_153; [L286] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L287] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L289] SORT_13 var_148 = var_148_arg_0; [L290] SORT_13 var_149_arg_0 = var_14; [L291] SORT_13 var_149_arg_1 = var_148; [L292] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L293] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L295] SORT_13 var_143 = var_143_arg_0; [L296] SORT_13 var_144_arg_0 = var_14; [L297] SORT_13 var_144_arg_1 = var_143; [L298] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L299] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L301] SORT_13 var_137 = var_137_arg_0; [L302] SORT_13 var_138_arg_0 = var_14; [L303] SORT_13 var_138_arg_1 = var_137; [L304] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L305] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L307] SORT_13 var_132 = var_132_arg_0; [L308] SORT_13 var_133_arg_0 = var_14; [L309] SORT_13 var_133_arg_1 = var_132; [L310] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L311] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L313] SORT_13 var_127 = var_127_arg_0; [L314] SORT_13 var_128_arg_0 = var_14; [L315] SORT_13 var_128_arg_1 = var_127; [L316] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L317] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L319] SORT_13 var_122 = var_122_arg_0; [L320] SORT_13 var_123_arg_0 = var_14; [L321] SORT_13 var_123_arg_1 = var_122; [L322] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L323] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L325] SORT_13 var_117 = var_117_arg_0; [L326] SORT_13 var_118_arg_0 = var_14; [L327] SORT_13 var_118_arg_1 = var_117; [L328] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L329] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L331] SORT_13 var_112 = var_112_arg_0; [L332] SORT_13 var_113_arg_0 = var_14; [L333] SORT_13 var_113_arg_1 = var_112; [L334] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L335] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L337] SORT_13 var_107 = var_107_arg_0; [L338] SORT_13 var_108_arg_0 = var_14; [L339] SORT_13 var_108_arg_1 = var_107; [L340] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L341] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L343] SORT_13 var_102 = var_102_arg_0; [L344] SORT_13 var_103_arg_0 = var_14; [L345] SORT_13 var_103_arg_1 = var_102; [L346] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L347] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L348] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L348] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L349] SORT_13 var_96 = var_96_arg_0; [L350] SORT_13 var_97_arg_0 = var_14; [L351] SORT_13 var_97_arg_1 = var_96; [L352] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L353] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=0] [L354] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=0] [L354] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L355] SORT_13 var_91 = var_91_arg_0; [L356] SORT_13 var_92_arg_0 = var_14; [L357] SORT_13 var_92_arg_1 = var_91; [L358] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L359] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=0, var_95=16, var_97=0] [L360] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=0, var_95=16, var_97=0] [L360] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L361] SORT_13 var_86 = var_86_arg_0; [L362] SORT_13 var_87_arg_0 = var_14; [L363] SORT_13 var_87_arg_1 = var_86; [L364] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L365] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L366] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L366] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L367] SORT_13 var_81 = var_81_arg_0; [L368] SORT_13 var_82_arg_0 = var_14; [L369] SORT_13 var_82_arg_1 = var_81; [L370] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L371] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L372] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L372] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L373] SORT_13 var_76 = var_76_arg_0; [L374] SORT_13 var_77_arg_0 = var_14; [L375] SORT_13 var_77_arg_1 = var_76; [L376] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L377] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L378] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L378] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L379] SORT_13 var_71 = var_71_arg_0; [L380] SORT_13 var_72_arg_0 = var_14; [L381] SORT_13 var_72_arg_1 = var_71; [L382] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L383] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L384] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L384] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L385] SORT_13 var_66 = var_66_arg_0; [L386] SORT_13 var_67_arg_0 = var_14; [L387] SORT_13 var_67_arg_1 = var_66; [L388] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L389] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L390] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L390] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L391] SORT_13 var_61 = var_61_arg_0; [L392] SORT_13 var_62_arg_0 = var_14; [L393] SORT_13 var_62_arg_1 = var_61; [L394] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L395] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L396] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L396] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L397] SORT_13 var_56 = var_56_arg_0; [L398] SORT_13 var_57_arg_0 = var_14; [L399] SORT_13 var_57_arg_1 = var_56; [L400] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L401] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L402] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L402] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L403] SORT_13 var_51 = var_51_arg_0; [L404] SORT_13 var_52_arg_0 = var_14; [L405] SORT_13 var_52_arg_1 = var_51; [L406] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L407] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L408] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L408] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L409] SORT_13 var_46 = var_46_arg_0; [L410] SORT_13 var_47_arg_0 = var_14; [L411] SORT_13 var_47_arg_1 = var_46; [L412] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L413] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L414] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L414] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L415] SORT_13 var_41 = var_41_arg_0; [L416] SORT_13 var_42_arg_0 = var_14; [L417] SORT_13 var_42_arg_1 = var_41; [L418] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L419] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L420] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L420] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L421] SORT_13 var_36 = var_36_arg_0; [L422] SORT_13 var_37_arg_0 = var_14; [L423] SORT_13 var_37_arg_1 = var_36; [L424] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L425] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L426] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L426] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L427] SORT_13 var_31 = var_31_arg_0; [L428] SORT_13 var_32_arg_0 = var_14; [L429] SORT_13 var_32_arg_1 = var_31; [L430] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L431] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_26_arg_0=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L432] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L432] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L433] SORT_13 var_26 = var_26_arg_0; [L434] SORT_13 var_27_arg_0 = var_14; [L435] SORT_13 var_27_arg_1 = var_26; [L436] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L437] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L438] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L438] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L439] SORT_13 var_21 = var_21_arg_0; [L440] SORT_13 var_22_arg_0 = var_14; [L441] SORT_13 var_22_arg_1 = var_21; [L442] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L443] SORT_13 var_16_arg_0 = var_14; [L444] SORT_13 var_16_arg_1 = var_15; [L445] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L446] SORT_1 var_17_arg_0 = var_16; [L447] SORT_3 var_17_arg_1 = state_10; [L448] SORT_3 var_17_arg_2 = input_9; [L449] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L450] SORT_1 var_23_arg_0 = var_22; [L451] SORT_3 var_23_arg_1 = state_18; [L452] SORT_3 var_23_arg_2 = var_17; [L453] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L454] SORT_1 var_28_arg_0 = var_27; [L455] SORT_3 var_28_arg_1 = state_24; [L456] SORT_3 var_28_arg_2 = var_23; [L457] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L458] SORT_1 var_33_arg_0 = var_32; [L459] SORT_3 var_33_arg_1 = state_29; [L460] SORT_3 var_33_arg_2 = var_28; [L461] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L462] SORT_1 var_38_arg_0 = var_37; [L463] SORT_3 var_38_arg_1 = state_34; [L464] SORT_3 var_38_arg_2 = var_33; [L465] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L466] SORT_1 var_43_arg_0 = var_42; [L467] SORT_3 var_43_arg_1 = state_39; [L468] SORT_3 var_43_arg_2 = var_38; [L469] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L470] SORT_1 var_48_arg_0 = var_47; [L471] SORT_3 var_48_arg_1 = state_44; [L472] SORT_3 var_48_arg_2 = var_43; [L473] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L474] SORT_1 var_53_arg_0 = var_52; [L475] SORT_3 var_53_arg_1 = state_49; [L476] SORT_3 var_53_arg_2 = var_48; [L477] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L478] SORT_1 var_58_arg_0 = var_57; [L479] SORT_3 var_58_arg_1 = state_54; [L480] SORT_3 var_58_arg_2 = var_53; [L481] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L482] SORT_1 var_63_arg_0 = var_62; [L483] SORT_3 var_63_arg_1 = state_59; [L484] SORT_3 var_63_arg_2 = var_58; [L485] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L486] SORT_1 var_68_arg_0 = var_67; [L487] SORT_3 var_68_arg_1 = state_64; [L488] SORT_3 var_68_arg_2 = var_63; [L489] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L490] SORT_1 var_73_arg_0 = var_72; [L491] SORT_3 var_73_arg_1 = state_69; [L492] SORT_3 var_73_arg_2 = var_68; [L493] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L494] SORT_1 var_78_arg_0 = var_77; [L495] SORT_3 var_78_arg_1 = state_74; [L496] SORT_3 var_78_arg_2 = var_73; [L497] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L498] SORT_1 var_83_arg_0 = var_82; [L499] SORT_3 var_83_arg_1 = state_79; [L500] SORT_3 var_83_arg_2 = var_78; [L501] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L502] SORT_1 var_88_arg_0 = var_87; [L503] SORT_3 var_88_arg_1 = state_84; [L504] SORT_3 var_88_arg_2 = var_83; [L505] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L506] SORT_1 var_93_arg_0 = var_92; [L507] SORT_3 var_93_arg_1 = state_89; [L508] SORT_3 var_93_arg_2 = var_88; [L509] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L510] SORT_1 var_98_arg_0 = var_97; [L511] SORT_3 var_98_arg_1 = state_94; [L512] SORT_3 var_98_arg_2 = var_93; [L513] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L514] SORT_1 var_104_arg_0 = var_103; [L515] SORT_3 var_104_arg_1 = state_99; [L516] SORT_3 var_104_arg_2 = var_98; [L517] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L518] SORT_1 var_109_arg_0 = var_108; [L519] SORT_3 var_109_arg_1 = state_105; [L520] SORT_3 var_109_arg_2 = var_104; [L521] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L522] SORT_1 var_114_arg_0 = var_113; [L523] SORT_3 var_114_arg_1 = state_110; [L524] SORT_3 var_114_arg_2 = var_109; [L525] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L526] SORT_1 var_119_arg_0 = var_118; [L527] SORT_3 var_119_arg_1 = state_115; [L528] SORT_3 var_119_arg_2 = var_114; [L529] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L530] SORT_1 var_124_arg_0 = var_123; [L531] SORT_3 var_124_arg_1 = state_120; [L532] SORT_3 var_124_arg_2 = var_119; [L533] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L534] SORT_1 var_129_arg_0 = var_128; [L535] SORT_3 var_129_arg_1 = state_125; [L536] SORT_3 var_129_arg_2 = var_124; [L537] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L538] SORT_1 var_134_arg_0 = var_133; [L539] SORT_3 var_134_arg_1 = state_130; [L540] SORT_3 var_134_arg_2 = var_129; [L541] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L542] SORT_1 var_139_arg_0 = var_138; [L543] SORT_3 var_139_arg_1 = state_135; [L544] SORT_3 var_139_arg_2 = var_134; [L545] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L546] SORT_1 var_145_arg_0 = var_144; [L547] SORT_3 var_145_arg_1 = state_140; [L548] SORT_3 var_145_arg_2 = var_139; [L549] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L550] SORT_1 var_150_arg_0 = var_149; [L551] SORT_3 var_150_arg_1 = state_146; [L552] SORT_3 var_150_arg_2 = var_145; [L553] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L554] SORT_1 var_155_arg_0 = var_154; [L555] SORT_3 var_155_arg_1 = state_151; [L556] SORT_3 var_155_arg_2 = var_150; [L557] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L558] SORT_1 var_160_arg_0 = var_159; [L559] SORT_3 var_160_arg_1 = state_156; [L560] SORT_3 var_160_arg_2 = var_155; [L561] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L562] SORT_1 var_166_arg_0 = var_165; [L563] SORT_3 var_166_arg_1 = state_161; [L564] SORT_3 var_166_arg_2 = var_160; [L565] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L566] SORT_1 var_171_arg_0 = var_170; [L567] SORT_3 var_171_arg_1 = state_167; [L568] SORT_3 var_171_arg_2 = var_166; [L569] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L570] SORT_1 var_176_arg_0 = var_175; [L571] SORT_3 var_176_arg_1 = state_172; [L572] SORT_3 var_176_arg_2 = var_171; [L573] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L574] SORT_1 var_180_arg_0 = var_179; [L575] SORT_3 var_180_arg_1 = state_177; [L576] SORT_3 var_180_arg_2 = var_176; [L577] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=255, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] var_180 = var_180 & mask_SORT_3 [L579] SORT_3 var_210_arg_0 = state_209; [L580] SORT_3 var_210_arg_1 = var_180; [L581] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L582] SORT_1 var_211_arg_0 = var_208; [L583] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=0, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L585] SORT_1 var_232_arg_0 = state_213; [L586] SORT_1 var_232_arg_1 = input_231; [L587] SORT_1 var_232_arg_2 = var_211; [L588] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L589] SORT_1 var_235_arg_0 = var_232; [L590] SORT_1 var_235 = ~var_235_arg_0; [L591] SORT_1 var_236_arg_0 = var_234; [L592] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=0, var_236_arg_1=-256, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L594] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] var_236 = var_236 & mask_SORT_1 [L595] SORT_1 bad_237_arg_0 = var_236; [L596] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L21] COND FALSE !(!(cond)) [L596] RET __VERIFIER_assert(!(bad_237_arg_0)) [L598] SORT_11 var_283_arg_0 = state_282; [L599] SORT_13 var_283 = var_283_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L600] EXPR var_283 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L600] var_283 = var_283 & mask_SORT_13 [L601] SORT_13 var_459_arg_0 = var_283; [L602] SORT_13 var_459_arg_1 = var_15; [L603] SORT_1 var_459 = var_459_arg_0 == var_459_arg_1; [L604] SORT_1 var_460_arg_0 = input_6; [L605] SORT_1 var_460_arg_1 = var_459; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_460_arg_0=0, var_460_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L606] EXPR var_460_arg_0 & var_460_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L606] SORT_1 var_460 = var_460_arg_0 & var_460_arg_1; [L607] EXPR var_460 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L607] var_460 = var_460 & mask_SORT_1 [L608] SORT_1 var_581_arg_0 = var_460; [L609] SORT_3 var_581_arg_1 = input_4; [L610] SORT_3 var_581_arg_2 = state_10; [L611] SORT_3 var_581 = var_581_arg_0 ? var_581_arg_1 : var_581_arg_2; [L612] SORT_1 var_583_arg_0 = input_7; [L613] SORT_3 var_583_arg_1 = var_582; [L614] SORT_3 var_583_arg_2 = var_581; [L615] SORT_3 var_583 = var_583_arg_0 ? var_583_arg_1 : var_583_arg_2; [L616] SORT_3 next_584_arg_1 = var_583; [L617] SORT_1 var_241_arg_0 = input_6; [L618] SORT_1 var_241_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_241_arg_0=0, var_241_arg_1=256, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L619] EXPR var_241_arg_0 | var_241_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L619] SORT_1 var_241 = var_241_arg_0 | var_241_arg_1; [L620] SORT_1 var_242_arg_0 = var_241; [L621] SORT_1 var_242_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242_arg_0=0, var_242_arg_1=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L622] EXPR var_242_arg_0 | var_242_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L622] SORT_1 var_242 = var_242_arg_0 | var_242_arg_1; [L623] EXPR var_242 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L623] var_242 = var_242 & mask_SORT_1 [L624] SORT_1 var_512_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_512_arg_0=256, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L625] EXPR var_512_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L625] var_512_arg_0 = var_512_arg_0 & mask_SORT_1 [L626] SORT_11 var_512 = var_512_arg_0; [L627] SORT_11 var_513_arg_0 = state_12; [L628] SORT_11 var_513_arg_1 = var_512; [L629] SORT_11 var_513 = var_513_arg_0 + var_513_arg_1; [L630] SORT_1 var_585_arg_0 = var_242; [L631] SORT_11 var_585_arg_1 = var_513; [L632] SORT_11 var_585_arg_2 = state_12; [L633] SORT_11 var_585 = var_585_arg_0 ? var_585_arg_1 : var_585_arg_2; [L634] SORT_1 var_586_arg_0 = input_7; [L635] SORT_11 var_586_arg_1 = var_203; [L636] SORT_11 var_586_arg_2 = var_585; [L637] SORT_11 var_586 = var_586_arg_0 ? var_586_arg_1 : var_586_arg_2; [L638] SORT_11 next_587_arg_1 = var_586; [L639] SORT_19 var_452_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_452_arg_0=31, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L640] EXPR var_452_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L640] var_452_arg_0 = var_452_arg_0 & mask_SORT_19 [L641] SORT_13 var_452 = var_452_arg_0; [L642] SORT_13 var_453_arg_0 = var_283; [L643] SORT_13 var_453_arg_1 = var_452; [L644] SORT_1 var_453 = var_453_arg_0 == var_453_arg_1; [L645] SORT_1 var_454_arg_0 = input_6; [L646] SORT_1 var_454_arg_1 = var_453; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_454_arg_0=0, var_454_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L647] EXPR var_454_arg_0 & var_454_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L647] SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; [L648] EXPR var_454 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L648] var_454 = var_454 & mask_SORT_1 [L649] SORT_1 var_588_arg_0 = var_454; [L650] SORT_3 var_588_arg_1 = input_4; [L651] SORT_3 var_588_arg_2 = state_18; [L652] SORT_3 var_588 = var_588_arg_0 ? var_588_arg_1 : var_588_arg_2; [L653] SORT_1 var_589_arg_0 = input_7; [L654] SORT_3 var_589_arg_1 = var_582; [L655] SORT_3 var_589_arg_2 = var_588; [L656] SORT_3 var_589 = var_589_arg_0 ? var_589_arg_1 : var_589_arg_2; [L657] SORT_3 next_590_arg_1 = var_589; [L658] SORT_19 var_445_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_445_arg_0=30, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L659] EXPR var_445_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L659] var_445_arg_0 = var_445_arg_0 & mask_SORT_19 [L660] SORT_13 var_445 = var_445_arg_0; [L661] SORT_13 var_446_arg_0 = var_283; [L662] SORT_13 var_446_arg_1 = var_445; [L663] SORT_1 var_446 = var_446_arg_0 == var_446_arg_1; [L664] SORT_1 var_447_arg_0 = input_6; [L665] SORT_1 var_447_arg_1 = var_446; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_447_arg_0=0, var_447_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L666] EXPR var_447_arg_0 & var_447_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L666] SORT_1 var_447 = var_447_arg_0 & var_447_arg_1; [L667] EXPR var_447 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L667] var_447 = var_447 & mask_SORT_1 [L668] SORT_1 var_591_arg_0 = var_447; [L669] SORT_3 var_591_arg_1 = input_4; [L670] SORT_3 var_591_arg_2 = state_24; [L671] SORT_3 var_591 = var_591_arg_0 ? var_591_arg_1 : var_591_arg_2; [L672] SORT_1 var_592_arg_0 = input_7; [L673] SORT_3 var_592_arg_1 = var_582; [L674] SORT_3 var_592_arg_2 = var_591; [L675] SORT_3 var_592 = var_592_arg_0 ? var_592_arg_1 : var_592_arg_2; [L676] SORT_3 next_593_arg_1 = var_592; [L677] SORT_19 var_431_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_431_arg_0=29, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L678] EXPR var_431_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L678] var_431_arg_0 = var_431_arg_0 & mask_SORT_19 [L679] SORT_13 var_431 = var_431_arg_0; [L680] SORT_13 var_432_arg_0 = var_283; [L681] SORT_13 var_432_arg_1 = var_431; [L682] SORT_1 var_432 = var_432_arg_0 == var_432_arg_1; [L683] SORT_1 var_433_arg_0 = input_6; [L684] SORT_1 var_433_arg_1 = var_432; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_433_arg_0=0, var_433_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L685] EXPR var_433_arg_0 & var_433_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L685] SORT_1 var_433 = var_433_arg_0 & var_433_arg_1; [L686] EXPR var_433 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L686] var_433 = var_433 & mask_SORT_1 [L687] SORT_1 var_594_arg_0 = var_433; [L688] SORT_3 var_594_arg_1 = input_4; [L689] SORT_3 var_594_arg_2 = state_29; [L690] SORT_3 var_594 = var_594_arg_0 ? var_594_arg_1 : var_594_arg_2; [L691] SORT_1 var_595_arg_0 = input_7; [L692] SORT_3 var_595_arg_1 = var_582; [L693] SORT_3 var_595_arg_2 = var_594; [L694] SORT_3 var_595 = var_595_arg_0 ? var_595_arg_1 : var_595_arg_2; [L695] SORT_3 next_596_arg_1 = var_595; [L696] SORT_19 var_424_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_424_arg_0=28, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L697] EXPR var_424_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L697] var_424_arg_0 = var_424_arg_0 & mask_SORT_19 [L698] SORT_13 var_424 = var_424_arg_0; [L699] SORT_13 var_425_arg_0 = var_283; [L700] SORT_13 var_425_arg_1 = var_424; [L701] SORT_1 var_425 = var_425_arg_0 == var_425_arg_1; [L702] SORT_1 var_426_arg_0 = input_6; [L703] SORT_1 var_426_arg_1 = var_425; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_426_arg_0=0, var_426_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L704] EXPR var_426_arg_0 & var_426_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L704] SORT_1 var_426 = var_426_arg_0 & var_426_arg_1; [L705] EXPR var_426 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L705] var_426 = var_426 & mask_SORT_1 [L706] SORT_1 var_597_arg_0 = var_426; [L707] SORT_3 var_597_arg_1 = input_4; [L708] SORT_3 var_597_arg_2 = state_34; [L709] SORT_3 var_597 = var_597_arg_0 ? var_597_arg_1 : var_597_arg_2; [L710] SORT_1 var_598_arg_0 = input_7; [L711] SORT_3 var_598_arg_1 = var_582; [L712] SORT_3 var_598_arg_2 = var_597; [L713] SORT_3 var_598 = var_598_arg_0 ? var_598_arg_1 : var_598_arg_2; [L714] SORT_3 next_599_arg_1 = var_598; [L715] SORT_19 var_417_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_417_arg_0=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L716] EXPR var_417_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L716] var_417_arg_0 = var_417_arg_0 & mask_SORT_19 [L717] SORT_13 var_417 = var_417_arg_0; [L718] SORT_13 var_418_arg_0 = var_283; [L719] SORT_13 var_418_arg_1 = var_417; [L720] SORT_1 var_418 = var_418_arg_0 == var_418_arg_1; [L721] SORT_1 var_419_arg_0 = input_6; [L722] SORT_1 var_419_arg_1 = var_418; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_419_arg_0=0, var_419_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L723] EXPR var_419_arg_0 & var_419_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L723] SORT_1 var_419 = var_419_arg_0 & var_419_arg_1; [L724] EXPR var_419 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L724] var_419 = var_419 & mask_SORT_1 [L725] SORT_1 var_600_arg_0 = var_419; [L726] SORT_3 var_600_arg_1 = input_4; [L727] SORT_3 var_600_arg_2 = state_39; [L728] SORT_3 var_600 = var_600_arg_0 ? var_600_arg_1 : var_600_arg_2; [L729] SORT_1 var_601_arg_0 = input_7; [L730] SORT_3 var_601_arg_1 = var_582; [L731] SORT_3 var_601_arg_2 = var_600; [L732] SORT_3 var_601 = var_601_arg_0 ? var_601_arg_1 : var_601_arg_2; [L733] SORT_3 next_602_arg_1 = var_601; [L734] SORT_19 var_410_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_410_arg_0=26, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L735] EXPR var_410_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L735] var_410_arg_0 = var_410_arg_0 & mask_SORT_19 [L736] SORT_13 var_410 = var_410_arg_0; [L737] SORT_13 var_411_arg_0 = var_283; [L738] SORT_13 var_411_arg_1 = var_410; [L739] SORT_1 var_411 = var_411_arg_0 == var_411_arg_1; [L740] SORT_1 var_412_arg_0 = input_6; [L741] SORT_1 var_412_arg_1 = var_411; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_412_arg_0=0, var_412_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L742] EXPR var_412_arg_0 & var_412_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L742] SORT_1 var_412 = var_412_arg_0 & var_412_arg_1; [L743] EXPR var_412 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L743] var_412 = var_412 & mask_SORT_1 [L744] SORT_1 var_603_arg_0 = var_412; [L745] SORT_3 var_603_arg_1 = input_4; [L746] SORT_3 var_603_arg_2 = state_44; [L747] SORT_3 var_603 = var_603_arg_0 ? var_603_arg_1 : var_603_arg_2; [L748] SORT_1 var_604_arg_0 = input_7; [L749] SORT_3 var_604_arg_1 = var_582; [L750] SORT_3 var_604_arg_2 = var_603; [L751] SORT_3 var_604 = var_604_arg_0 ? var_604_arg_1 : var_604_arg_2; [L752] SORT_3 next_605_arg_1 = var_604; [L753] SORT_19 var_403_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_403_arg_0=25, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L754] EXPR var_403_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L754] var_403_arg_0 = var_403_arg_0 & mask_SORT_19 [L755] SORT_13 var_403 = var_403_arg_0; [L756] SORT_13 var_404_arg_0 = var_283; [L757] SORT_13 var_404_arg_1 = var_403; [L758] SORT_1 var_404 = var_404_arg_0 == var_404_arg_1; [L759] SORT_1 var_405_arg_0 = input_6; [L760] SORT_1 var_405_arg_1 = var_404; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_405_arg_0=0, var_405_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L761] EXPR var_405_arg_0 & var_405_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L761] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L762] EXPR var_405 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L762] var_405 = var_405 & mask_SORT_1 [L763] SORT_1 var_606_arg_0 = var_405; [L764] SORT_3 var_606_arg_1 = input_4; [L765] SORT_3 var_606_arg_2 = state_49; [L766] SORT_3 var_606 = var_606_arg_0 ? var_606_arg_1 : var_606_arg_2; [L767] SORT_1 var_607_arg_0 = input_7; [L768] SORT_3 var_607_arg_1 = var_582; [L769] SORT_3 var_607_arg_2 = var_606; [L770] SORT_3 var_607 = var_607_arg_0 ? var_607_arg_1 : var_607_arg_2; [L771] SORT_3 next_608_arg_1 = var_607; [L772] SORT_19 var_396_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_396_arg_0=24, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L773] EXPR var_396_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L773] var_396_arg_0 = var_396_arg_0 & mask_SORT_19 [L774] SORT_13 var_396 = var_396_arg_0; [L775] SORT_13 var_397_arg_0 = var_283; [L776] SORT_13 var_397_arg_1 = var_396; [L777] SORT_1 var_397 = var_397_arg_0 == var_397_arg_1; [L778] SORT_1 var_398_arg_0 = input_6; [L779] SORT_1 var_398_arg_1 = var_397; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_398_arg_0=0, var_398_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L780] EXPR var_398_arg_0 & var_398_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L780] SORT_1 var_398 = var_398_arg_0 & var_398_arg_1; [L781] EXPR var_398 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L781] var_398 = var_398 & mask_SORT_1 [L782] SORT_1 var_609_arg_0 = var_398; [L783] SORT_3 var_609_arg_1 = input_4; [L784] SORT_3 var_609_arg_2 = state_54; [L785] SORT_3 var_609 = var_609_arg_0 ? var_609_arg_1 : var_609_arg_2; [L786] SORT_1 var_610_arg_0 = input_7; [L787] SORT_3 var_610_arg_1 = var_582; [L788] SORT_3 var_610_arg_2 = var_609; [L789] SORT_3 var_610 = var_610_arg_0 ? var_610_arg_1 : var_610_arg_2; [L790] SORT_3 next_611_arg_1 = var_610; [L791] SORT_19 var_389_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_389_arg_0=23, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L792] EXPR var_389_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L792] var_389_arg_0 = var_389_arg_0 & mask_SORT_19 [L793] SORT_13 var_389 = var_389_arg_0; [L794] SORT_13 var_390_arg_0 = var_283; [L795] SORT_13 var_390_arg_1 = var_389; [L796] SORT_1 var_390 = var_390_arg_0 == var_390_arg_1; [L797] SORT_1 var_391_arg_0 = input_6; [L798] SORT_1 var_391_arg_1 = var_390; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_391_arg_0=0, var_391_arg_1=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L799] EXPR var_391_arg_0 & var_391_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L799] SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; [L800] EXPR var_391 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L800] var_391 = var_391 & mask_SORT_1 [L801] SORT_1 var_612_arg_0 = var_391; [L802] SORT_3 var_612_arg_1 = input_4; [L803] SORT_3 var_612_arg_2 = state_59; [L804] SORT_3 var_612 = var_612_arg_0 ? var_612_arg_1 : var_612_arg_2; [L805] SORT_1 var_613_arg_0 = input_7; [L806] SORT_3 var_613_arg_1 = var_582; [L807] SORT_3 var_613_arg_2 = var_612; [L808] SORT_3 var_613 = var_613_arg_0 ? var_613_arg_1 : var_613_arg_2; [L809] SORT_3 next_614_arg_1 = var_613; [L810] SORT_19 var_382_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_382_arg_0=22, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L811] EXPR var_382_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L811] var_382_arg_0 = var_382_arg_0 & mask_SORT_19 [L812] SORT_13 var_382 = var_382_arg_0; [L813] SORT_13 var_383_arg_0 = var_283; [L814] SORT_13 var_383_arg_1 = var_382; [L815] SORT_1 var_383 = var_383_arg_0 == var_383_arg_1; [L816] SORT_1 var_384_arg_0 = input_6; [L817] SORT_1 var_384_arg_1 = var_383; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_384_arg_0=0, var_384_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L818] EXPR var_384_arg_0 & var_384_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L818] SORT_1 var_384 = var_384_arg_0 & var_384_arg_1; [L819] EXPR var_384 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L819] var_384 = var_384 & mask_SORT_1 [L820] SORT_1 var_615_arg_0 = var_384; [L821] SORT_3 var_615_arg_1 = input_4; [L822] SORT_3 var_615_arg_2 = state_64; [L823] SORT_3 var_615 = var_615_arg_0 ? var_615_arg_1 : var_615_arg_2; [L824] SORT_1 var_616_arg_0 = input_7; [L825] SORT_3 var_616_arg_1 = var_582; [L826] SORT_3 var_616_arg_2 = var_615; [L827] SORT_3 var_616 = var_616_arg_0 ? var_616_arg_1 : var_616_arg_2; [L828] SORT_3 next_617_arg_1 = var_616; [L829] SORT_19 var_375_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_375_arg_0=21, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L830] EXPR var_375_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L830] var_375_arg_0 = var_375_arg_0 & mask_SORT_19 [L831] SORT_13 var_375 = var_375_arg_0; [L832] SORT_13 var_376_arg_0 = var_283; [L833] SORT_13 var_376_arg_1 = var_375; [L834] SORT_1 var_376 = var_376_arg_0 == var_376_arg_1; [L835] SORT_1 var_377_arg_0 = input_6; [L836] SORT_1 var_377_arg_1 = var_376; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_377_arg_0=0, var_377_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L837] EXPR var_377_arg_0 & var_377_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L837] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L838] EXPR var_377 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L838] var_377 = var_377 & mask_SORT_1 [L839] SORT_1 var_618_arg_0 = var_377; [L840] SORT_3 var_618_arg_1 = input_4; [L841] SORT_3 var_618_arg_2 = state_69; [L842] SORT_3 var_618 = var_618_arg_0 ? var_618_arg_1 : var_618_arg_2; [L843] SORT_1 var_619_arg_0 = input_7; [L844] SORT_3 var_619_arg_1 = var_582; [L845] SORT_3 var_619_arg_2 = var_618; [L846] SORT_3 var_619 = var_619_arg_0 ? var_619_arg_1 : var_619_arg_2; [L847] SORT_3 next_620_arg_1 = var_619; [L848] SORT_19 var_368_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_368_arg_0=20, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L849] EXPR var_368_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L849] var_368_arg_0 = var_368_arg_0 & mask_SORT_19 [L850] SORT_13 var_368 = var_368_arg_0; [L851] SORT_13 var_369_arg_0 = var_283; [L852] SORT_13 var_369_arg_1 = var_368; [L853] SORT_1 var_369 = var_369_arg_0 == var_369_arg_1; [L854] SORT_1 var_370_arg_0 = input_6; [L855] SORT_1 var_370_arg_1 = var_369; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_370_arg_0=0, var_370_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L856] EXPR var_370_arg_0 & var_370_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L856] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L857] EXPR var_370 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L857] var_370 = var_370 & mask_SORT_1 [L858] SORT_1 var_621_arg_0 = var_370; [L859] SORT_3 var_621_arg_1 = input_4; [L860] SORT_3 var_621_arg_2 = state_74; [L861] SORT_3 var_621 = var_621_arg_0 ? var_621_arg_1 : var_621_arg_2; [L862] SORT_1 var_622_arg_0 = input_7; [L863] SORT_3 var_622_arg_1 = var_582; [L864] SORT_3 var_622_arg_2 = var_621; [L865] SORT_3 var_622 = var_622_arg_0 ? var_622_arg_1 : var_622_arg_2; [L866] SORT_3 next_623_arg_1 = var_622; [L867] SORT_19 var_354_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_354_arg_0=19, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L868] EXPR var_354_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L868] var_354_arg_0 = var_354_arg_0 & mask_SORT_19 [L869] SORT_13 var_354 = var_354_arg_0; [L870] SORT_13 var_355_arg_0 = var_283; [L871] SORT_13 var_355_arg_1 = var_354; [L872] SORT_1 var_355 = var_355_arg_0 == var_355_arg_1; [L873] SORT_1 var_356_arg_0 = input_6; [L874] SORT_1 var_356_arg_1 = var_355; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_356_arg_0=0, var_356_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L875] EXPR var_356_arg_0 & var_356_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L875] SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; [L876] EXPR var_356 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L876] var_356 = var_356 & mask_SORT_1 [L877] SORT_1 var_624_arg_0 = var_356; [L878] SORT_3 var_624_arg_1 = input_4; [L879] SORT_3 var_624_arg_2 = state_79; [L880] SORT_3 var_624 = var_624_arg_0 ? var_624_arg_1 : var_624_arg_2; [L881] SORT_1 var_625_arg_0 = input_7; [L882] SORT_3 var_625_arg_1 = var_582; [L883] SORT_3 var_625_arg_2 = var_624; [L884] SORT_3 var_625 = var_625_arg_0 ? var_625_arg_1 : var_625_arg_2; [L885] SORT_3 next_626_arg_1 = var_625; [L886] SORT_19 var_347_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_347_arg_0=18, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L887] EXPR var_347_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L887] var_347_arg_0 = var_347_arg_0 & mask_SORT_19 [L888] SORT_13 var_347 = var_347_arg_0; [L889] SORT_13 var_348_arg_0 = var_283; [L890] SORT_13 var_348_arg_1 = var_347; [L891] SORT_1 var_348 = var_348_arg_0 == var_348_arg_1; [L892] SORT_1 var_349_arg_0 = input_6; [L893] SORT_1 var_349_arg_1 = var_348; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_349_arg_0=0, var_349_arg_1=1, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L894] EXPR var_349_arg_0 & var_349_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L894] SORT_1 var_349 = var_349_arg_0 & var_349_arg_1; [L895] EXPR var_349 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L895] var_349 = var_349 & mask_SORT_1 [L896] SORT_1 var_627_arg_0 = var_349; [L897] SORT_3 var_627_arg_1 = input_4; [L898] SORT_3 var_627_arg_2 = state_84; [L899] SORT_3 var_627 = var_627_arg_0 ? var_627_arg_1 : var_627_arg_2; [L900] SORT_1 var_628_arg_0 = input_7; [L901] SORT_3 var_628_arg_1 = var_582; [L902] SORT_3 var_628_arg_2 = var_627; [L903] SORT_3 var_628 = var_628_arg_0 ? var_628_arg_1 : var_628_arg_2; [L904] SORT_3 next_629_arg_1 = var_628; [L905] SORT_19 var_340_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_340_arg_0=17, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L906] EXPR var_340_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L906] var_340_arg_0 = var_340_arg_0 & mask_SORT_19 [L907] SORT_13 var_340 = var_340_arg_0; [L908] SORT_13 var_341_arg_0 = var_283; [L909] SORT_13 var_341_arg_1 = var_340; [L910] SORT_1 var_341 = var_341_arg_0 == var_341_arg_1; [L911] SORT_1 var_342_arg_0 = input_6; [L912] SORT_1 var_342_arg_1 = var_341; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_342_arg_0=0, var_342_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L913] EXPR var_342_arg_0 & var_342_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L913] SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; [L914] EXPR var_342 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L914] var_342 = var_342 & mask_SORT_1 [L915] SORT_1 var_630_arg_0 = var_342; [L916] SORT_3 var_630_arg_1 = input_4; [L917] SORT_3 var_630_arg_2 = state_89; [L918] SORT_3 var_630 = var_630_arg_0 ? var_630_arg_1 : var_630_arg_2; [L919] SORT_1 var_631_arg_0 = input_7; [L920] SORT_3 var_631_arg_1 = var_582; [L921] SORT_3 var_631_arg_2 = var_630; [L922] SORT_3 var_631 = var_631_arg_0 ? var_631_arg_1 : var_631_arg_2; [L923] SORT_3 next_632_arg_1 = var_631; [L924] SORT_19 var_333_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_333_arg_0=16, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L925] EXPR var_333_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L925] var_333_arg_0 = var_333_arg_0 & mask_SORT_19 [L926] SORT_13 var_333 = var_333_arg_0; [L927] SORT_13 var_334_arg_0 = var_283; [L928] SORT_13 var_334_arg_1 = var_333; [L929] SORT_1 var_334 = var_334_arg_0 == var_334_arg_1; [L930] SORT_1 var_335_arg_0 = input_6; [L931] SORT_1 var_335_arg_1 = var_334; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_335_arg_0=0, var_335_arg_1=1, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L932] EXPR var_335_arg_0 & var_335_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L932] SORT_1 var_335 = var_335_arg_0 & var_335_arg_1; [L933] EXPR var_335 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L933] var_335 = var_335 & mask_SORT_1 [L934] SORT_1 var_633_arg_0 = var_335; [L935] SORT_3 var_633_arg_1 = input_4; [L936] SORT_3 var_633_arg_2 = state_94; [L937] SORT_3 var_633 = var_633_arg_0 ? var_633_arg_1 : var_633_arg_2; [L938] SORT_1 var_634_arg_0 = input_7; [L939] SORT_3 var_634_arg_1 = var_582; [L940] SORT_3 var_634_arg_2 = var_633; [L941] SORT_3 var_634 = var_634_arg_0 ? var_634_arg_1 : var_634_arg_2; [L942] SORT_3 next_635_arg_1 = var_634; [L943] SORT_100 var_326_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_326_arg_0=15, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L944] EXPR var_326_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L944] var_326_arg_0 = var_326_arg_0 & mask_SORT_100 [L945] SORT_13 var_326 = var_326_arg_0; [L946] SORT_13 var_327_arg_0 = var_283; [L947] SORT_13 var_327_arg_1 = var_326; [L948] SORT_1 var_327 = var_327_arg_0 == var_327_arg_1; [L949] SORT_1 var_328_arg_0 = input_6; [L950] SORT_1 var_328_arg_1 = var_327; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_328_arg_0=0, var_328_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L951] EXPR var_328_arg_0 & var_328_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L951] SORT_1 var_328 = var_328_arg_0 & var_328_arg_1; [L952] EXPR var_328 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L952] var_328 = var_328 & mask_SORT_1 [L953] SORT_1 var_636_arg_0 = var_328; [L954] SORT_3 var_636_arg_1 = input_4; [L955] SORT_3 var_636_arg_2 = state_99; [L956] SORT_3 var_636 = var_636_arg_0 ? var_636_arg_1 : var_636_arg_2; [L957] SORT_1 var_637_arg_0 = input_7; [L958] SORT_3 var_637_arg_1 = var_582; [L959] SORT_3 var_637_arg_2 = var_636; [L960] SORT_3 var_637 = var_637_arg_0 ? var_637_arg_1 : var_637_arg_2; [L961] SORT_3 next_638_arg_1 = var_637; [L962] SORT_100 var_319_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_319_arg_0=14, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L963] EXPR var_319_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L963] var_319_arg_0 = var_319_arg_0 & mask_SORT_100 [L964] SORT_13 var_319 = var_319_arg_0; [L965] SORT_13 var_320_arg_0 = var_283; [L966] SORT_13 var_320_arg_1 = var_319; [L967] SORT_1 var_320 = var_320_arg_0 == var_320_arg_1; [L968] SORT_1 var_321_arg_0 = input_6; [L969] SORT_1 var_321_arg_1 = var_320; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_321_arg_0=0, var_321_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L970] EXPR var_321_arg_0 & var_321_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L970] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L971] EXPR var_321 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L971] var_321 = var_321 & mask_SORT_1 [L972] SORT_1 var_639_arg_0 = var_321; [L973] SORT_3 var_639_arg_1 = input_4; [L974] SORT_3 var_639_arg_2 = state_105; [L975] SORT_3 var_639 = var_639_arg_0 ? var_639_arg_1 : var_639_arg_2; [L976] SORT_1 var_640_arg_0 = input_7; [L977] SORT_3 var_640_arg_1 = var_582; [L978] SORT_3 var_640_arg_2 = var_639; [L979] SORT_3 var_640 = var_640_arg_0 ? var_640_arg_1 : var_640_arg_2; [L980] SORT_3 next_641_arg_1 = var_640; [L981] SORT_100 var_312_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_312_arg_0=13, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L982] EXPR var_312_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L982] var_312_arg_0 = var_312_arg_0 & mask_SORT_100 [L983] SORT_13 var_312 = var_312_arg_0; [L984] SORT_13 var_313_arg_0 = var_283; [L985] SORT_13 var_313_arg_1 = var_312; [L986] SORT_1 var_313 = var_313_arg_0 == var_313_arg_1; [L987] SORT_1 var_314_arg_0 = input_6; [L988] SORT_1 var_314_arg_1 = var_313; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_314_arg_0=0, var_314_arg_1=1, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L989] EXPR var_314_arg_0 & var_314_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L989] SORT_1 var_314 = var_314_arg_0 & var_314_arg_1; [L990] EXPR var_314 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L990] var_314 = var_314 & mask_SORT_1 [L991] SORT_1 var_642_arg_0 = var_314; [L992] SORT_3 var_642_arg_1 = input_4; [L993] SORT_3 var_642_arg_2 = state_110; [L994] SORT_3 var_642 = var_642_arg_0 ? var_642_arg_1 : var_642_arg_2; [L995] SORT_1 var_643_arg_0 = input_7; [L996] SORT_3 var_643_arg_1 = var_582; [L997] SORT_3 var_643_arg_2 = var_642; [L998] SORT_3 var_643 = var_643_arg_0 ? var_643_arg_1 : var_643_arg_2; [L999] SORT_3 next_644_arg_1 = var_643; [L1000] SORT_100 var_305_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_305_arg_0=12, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1001] EXPR var_305_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1001] var_305_arg_0 = var_305_arg_0 & mask_SORT_100 [L1002] SORT_13 var_305 = var_305_arg_0; [L1003] SORT_13 var_306_arg_0 = var_283; [L1004] SORT_13 var_306_arg_1 = var_305; [L1005] SORT_1 var_306 = var_306_arg_0 == var_306_arg_1; [L1006] SORT_1 var_307_arg_0 = input_6; [L1007] SORT_1 var_307_arg_1 = var_306; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_307_arg_0=0, var_307_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1008] EXPR var_307_arg_0 & var_307_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1008] SORT_1 var_307 = var_307_arg_0 & var_307_arg_1; [L1009] EXPR var_307 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1009] var_307 = var_307 & mask_SORT_1 [L1010] SORT_1 var_645_arg_0 = var_307; [L1011] SORT_3 var_645_arg_1 = input_4; [L1012] SORT_3 var_645_arg_2 = state_115; [L1013] SORT_3 var_645 = var_645_arg_0 ? var_645_arg_1 : var_645_arg_2; [L1014] SORT_1 var_646_arg_0 = input_7; [L1015] SORT_3 var_646_arg_1 = var_582; [L1016] SORT_3 var_646_arg_2 = var_645; [L1017] SORT_3 var_646 = var_646_arg_0 ? var_646_arg_1 : var_646_arg_2; [L1018] SORT_3 next_647_arg_1 = var_646; [L1019] SORT_100 var_298_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_298_arg_0=11, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1020] EXPR var_298_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1020] var_298_arg_0 = var_298_arg_0 & mask_SORT_100 [L1021] SORT_13 var_298 = var_298_arg_0; [L1022] SORT_13 var_299_arg_0 = var_283; [L1023] SORT_13 var_299_arg_1 = var_298; [L1024] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L1025] SORT_1 var_300_arg_0 = input_6; [L1026] SORT_1 var_300_arg_1 = var_299; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_300_arg_0=0, var_300_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1027] EXPR var_300_arg_0 & var_300_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1027] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L1028] EXPR var_300 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1028] var_300 = var_300 & mask_SORT_1 [L1029] SORT_1 var_648_arg_0 = var_300; [L1030] SORT_3 var_648_arg_1 = input_4; [L1031] SORT_3 var_648_arg_2 = state_120; [L1032] SORT_3 var_648 = var_648_arg_0 ? var_648_arg_1 : var_648_arg_2; [L1033] SORT_1 var_649_arg_0 = input_7; [L1034] SORT_3 var_649_arg_1 = var_582; [L1035] SORT_3 var_649_arg_2 = var_648; [L1036] SORT_3 var_649 = var_649_arg_0 ? var_649_arg_1 : var_649_arg_2; [L1037] SORT_3 next_650_arg_1 = var_649; [L1038] SORT_100 var_291_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_291_arg_0=10, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1039] EXPR var_291_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1039] var_291_arg_0 = var_291_arg_0 & mask_SORT_100 [L1040] SORT_13 var_291 = var_291_arg_0; [L1041] SORT_13 var_292_arg_0 = var_283; [L1042] SORT_13 var_292_arg_1 = var_291; [L1043] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L1044] SORT_1 var_293_arg_0 = input_6; [L1045] SORT_1 var_293_arg_1 = var_292; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_293_arg_0=0, var_293_arg_1=1, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1046] EXPR var_293_arg_0 & var_293_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1046] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L1047] EXPR var_293 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1047] var_293 = var_293 & mask_SORT_1 [L1048] SORT_1 var_651_arg_0 = var_293; [L1049] SORT_3 var_651_arg_1 = input_4; [L1050] SORT_3 var_651_arg_2 = state_125; [L1051] SORT_3 var_651 = var_651_arg_0 ? var_651_arg_1 : var_651_arg_2; [L1052] SORT_1 var_652_arg_0 = input_7; [L1053] SORT_3 var_652_arg_1 = var_582; [L1054] SORT_3 var_652_arg_2 = var_651; [L1055] SORT_3 var_652 = var_652_arg_0 ? var_652_arg_1 : var_652_arg_2; [L1056] SORT_3 next_653_arg_1 = var_652; [L1057] SORT_100 var_507_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_507_arg_0=9, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1058] EXPR var_507_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1058] var_507_arg_0 = var_507_arg_0 & mask_SORT_100 [L1059] SORT_13 var_507 = var_507_arg_0; [L1060] SORT_13 var_508_arg_0 = var_283; [L1061] SORT_13 var_508_arg_1 = var_507; [L1062] SORT_1 var_508 = var_508_arg_0 == var_508_arg_1; [L1063] SORT_1 var_509_arg_0 = input_6; [L1064] SORT_1 var_509_arg_1 = var_508; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_509_arg_0=0, var_509_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1065] EXPR var_509_arg_0 & var_509_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1065] SORT_1 var_509 = var_509_arg_0 & var_509_arg_1; [L1066] EXPR var_509 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1066] var_509 = var_509 & mask_SORT_1 [L1067] SORT_1 var_654_arg_0 = var_509; [L1068] SORT_3 var_654_arg_1 = input_4; [L1069] SORT_3 var_654_arg_2 = state_130; [L1070] SORT_3 var_654 = var_654_arg_0 ? var_654_arg_1 : var_654_arg_2; [L1071] SORT_1 var_655_arg_0 = input_7; [L1072] SORT_3 var_655_arg_1 = var_582; [L1073] SORT_3 var_655_arg_2 = var_654; [L1074] SORT_3 var_655 = var_655_arg_0 ? var_655_arg_1 : var_655_arg_2; [L1075] SORT_3 next_656_arg_1 = var_655; [L1076] SORT_100 var_500_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_500_arg_0=8, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1077] EXPR var_500_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1077] var_500_arg_0 = var_500_arg_0 & mask_SORT_100 [L1078] SORT_13 var_500 = var_500_arg_0; [L1079] SORT_13 var_501_arg_0 = var_283; [L1080] SORT_13 var_501_arg_1 = var_500; [L1081] SORT_1 var_501 = var_501_arg_0 == var_501_arg_1; [L1082] SORT_1 var_502_arg_0 = input_6; [L1083] SORT_1 var_502_arg_1 = var_501; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_502_arg_0=0, var_502_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1084] EXPR var_502_arg_0 & var_502_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1084] SORT_1 var_502 = var_502_arg_0 & var_502_arg_1; [L1085] EXPR var_502 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1085] var_502 = var_502 & mask_SORT_1 [L1086] SORT_1 var_657_arg_0 = var_502; [L1087] SORT_3 var_657_arg_1 = input_4; [L1088] SORT_3 var_657_arg_2 = state_135; [L1089] SORT_3 var_657 = var_657_arg_0 ? var_657_arg_1 : var_657_arg_2; [L1090] SORT_1 var_658_arg_0 = input_7; [L1091] SORT_3 var_658_arg_1 = var_582; [L1092] SORT_3 var_658_arg_2 = var_657; [L1093] SORT_3 var_658 = var_658_arg_0 ? var_658_arg_1 : var_658_arg_2; [L1094] SORT_3 next_659_arg_1 = var_658; [L1095] SORT_141 var_493_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_493_arg_0=7, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1096] EXPR var_493_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1096] var_493_arg_0 = var_493_arg_0 & mask_SORT_141 [L1097] SORT_13 var_493 = var_493_arg_0; [L1098] SORT_13 var_494_arg_0 = var_283; [L1099] SORT_13 var_494_arg_1 = var_493; [L1100] SORT_1 var_494 = var_494_arg_0 == var_494_arg_1; [L1101] SORT_1 var_495_arg_0 = input_6; [L1102] SORT_1 var_495_arg_1 = var_494; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_495_arg_0=0, var_495_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1103] EXPR var_495_arg_0 & var_495_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1103] SORT_1 var_495 = var_495_arg_0 & var_495_arg_1; [L1104] EXPR var_495 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1104] var_495 = var_495 & mask_SORT_1 [L1105] SORT_1 var_660_arg_0 = var_495; [L1106] SORT_3 var_660_arg_1 = input_4; [L1107] SORT_3 var_660_arg_2 = state_140; [L1108] SORT_3 var_660 = var_660_arg_0 ? var_660_arg_1 : var_660_arg_2; [L1109] SORT_1 var_661_arg_0 = input_7; [L1110] SORT_3 var_661_arg_1 = var_582; [L1111] SORT_3 var_661_arg_2 = var_660; [L1112] SORT_3 var_661 = var_661_arg_0 ? var_661_arg_1 : var_661_arg_2; [L1113] SORT_3 next_662_arg_1 = var_661; [L1114] SORT_141 var_486_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_486_arg_0=6, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1115] EXPR var_486_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1115] var_486_arg_0 = var_486_arg_0 & mask_SORT_141 [L1116] SORT_13 var_486 = var_486_arg_0; [L1117] SORT_13 var_487_arg_0 = var_283; [L1118] SORT_13 var_487_arg_1 = var_486; [L1119] SORT_1 var_487 = var_487_arg_0 == var_487_arg_1; [L1120] SORT_1 var_488_arg_0 = input_6; [L1121] SORT_1 var_488_arg_1 = var_487; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_488_arg_0=0, var_488_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1122] EXPR var_488_arg_0 & var_488_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1122] SORT_1 var_488 = var_488_arg_0 & var_488_arg_1; [L1123] EXPR var_488 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1123] var_488 = var_488 & mask_SORT_1 [L1124] SORT_1 var_663_arg_0 = var_488; [L1125] SORT_3 var_663_arg_1 = input_4; [L1126] SORT_3 var_663_arg_2 = state_146; [L1127] SORT_3 var_663 = var_663_arg_0 ? var_663_arg_1 : var_663_arg_2; [L1128] SORT_1 var_664_arg_0 = input_7; [L1129] SORT_3 var_664_arg_1 = var_582; [L1130] SORT_3 var_664_arg_2 = var_663; [L1131] SORT_3 var_664 = var_664_arg_0 ? var_664_arg_1 : var_664_arg_2; [L1132] SORT_3 next_665_arg_1 = var_664; [L1133] SORT_141 var_479_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_479_arg_0=5, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1134] EXPR var_479_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1134] var_479_arg_0 = var_479_arg_0 & mask_SORT_141 [L1135] SORT_13 var_479 = var_479_arg_0; [L1136] SORT_13 var_480_arg_0 = var_283; [L1137] SORT_13 var_480_arg_1 = var_479; [L1138] SORT_1 var_480 = var_480_arg_0 == var_480_arg_1; [L1139] SORT_1 var_481_arg_0 = input_6; [L1140] SORT_1 var_481_arg_1 = var_480; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_481_arg_0=0, var_481_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1141] EXPR var_481_arg_0 & var_481_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1141] SORT_1 var_481 = var_481_arg_0 & var_481_arg_1; [L1142] EXPR var_481 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1142] var_481 = var_481 & mask_SORT_1 [L1143] SORT_1 var_666_arg_0 = var_481; [L1144] SORT_3 var_666_arg_1 = input_4; [L1145] SORT_3 var_666_arg_2 = state_151; [L1146] SORT_3 var_666 = var_666_arg_0 ? var_666_arg_1 : var_666_arg_2; [L1147] SORT_1 var_667_arg_0 = input_7; [L1148] SORT_3 var_667_arg_1 = var_582; [L1149] SORT_3 var_667_arg_2 = var_666; [L1150] SORT_3 var_667 = var_667_arg_0 ? var_667_arg_1 : var_667_arg_2; [L1151] SORT_3 next_668_arg_1 = var_667; [L1152] SORT_141 var_472_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_472_arg_0=4, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1153] EXPR var_472_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1153] var_472_arg_0 = var_472_arg_0 & mask_SORT_141 [L1154] SORT_13 var_472 = var_472_arg_0; [L1155] SORT_13 var_473_arg_0 = var_283; [L1156] SORT_13 var_473_arg_1 = var_472; [L1157] SORT_1 var_473 = var_473_arg_0 == var_473_arg_1; [L1158] SORT_1 var_474_arg_0 = input_6; [L1159] SORT_1 var_474_arg_1 = var_473; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_474_arg_0=0, var_474_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1160] EXPR var_474_arg_0 & var_474_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1160] SORT_1 var_474 = var_474_arg_0 & var_474_arg_1; [L1161] EXPR var_474 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1161] var_474 = var_474 & mask_SORT_1 [L1162] SORT_1 var_669_arg_0 = var_474; [L1163] SORT_3 var_669_arg_1 = input_4; [L1164] SORT_3 var_669_arg_2 = state_156; [L1165] SORT_3 var_669 = var_669_arg_0 ? var_669_arg_1 : var_669_arg_2; [L1166] SORT_1 var_670_arg_0 = input_7; [L1167] SORT_3 var_670_arg_1 = var_582; [L1168] SORT_3 var_670_arg_2 = var_669; [L1169] SORT_3 var_670 = var_670_arg_0 ? var_670_arg_1 : var_670_arg_2; [L1170] SORT_3 next_671_arg_1 = var_670; [L1171] SORT_162 var_465_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_465_arg_0=3, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1172] EXPR var_465_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1172] var_465_arg_0 = var_465_arg_0 & mask_SORT_162 [L1173] SORT_13 var_465 = var_465_arg_0; [L1174] SORT_13 var_466_arg_0 = var_283; [L1175] SORT_13 var_466_arg_1 = var_465; [L1176] SORT_1 var_466 = var_466_arg_0 == var_466_arg_1; [L1177] SORT_1 var_467_arg_0 = input_6; [L1178] SORT_1 var_467_arg_1 = var_466; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_467_arg_0=0, var_467_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1179] EXPR var_467_arg_0 & var_467_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1179] SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; [L1180] EXPR var_467 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1180] var_467 = var_467 & mask_SORT_1 [L1181] SORT_1 var_672_arg_0 = var_467; [L1182] SORT_3 var_672_arg_1 = input_4; [L1183] SORT_3 var_672_arg_2 = state_161; [L1184] SORT_3 var_672 = var_672_arg_0 ? var_672_arg_1 : var_672_arg_2; [L1185] SORT_1 var_673_arg_0 = input_7; [L1186] SORT_3 var_673_arg_1 = var_582; [L1187] SORT_3 var_673_arg_2 = var_672; [L1188] SORT_3 var_673 = var_673_arg_0 ? var_673_arg_1 : var_673_arg_2; [L1189] SORT_3 next_674_arg_1 = var_673; [L1190] SORT_162 var_438_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_438_arg_0=2, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1191] EXPR var_438_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1191] var_438_arg_0 = var_438_arg_0 & mask_SORT_162 [L1192] SORT_13 var_438 = var_438_arg_0; [L1193] SORT_13 var_439_arg_0 = var_283; [L1194] SORT_13 var_439_arg_1 = var_438; [L1195] SORT_1 var_439 = var_439_arg_0 == var_439_arg_1; [L1196] SORT_1 var_440_arg_0 = input_6; [L1197] SORT_1 var_440_arg_1 = var_439; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_440_arg_0=0, var_440_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1198] EXPR var_440_arg_0 & var_440_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1198] SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; [L1199] EXPR var_440 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1199] var_440 = var_440 & mask_SORT_1 [L1200] SORT_1 var_675_arg_0 = var_440; [L1201] SORT_3 var_675_arg_1 = input_4; [L1202] SORT_3 var_675_arg_2 = state_167; [L1203] SORT_3 var_675 = var_675_arg_0 ? var_675_arg_1 : var_675_arg_2; [L1204] SORT_1 var_676_arg_0 = input_7; [L1205] SORT_3 var_676_arg_1 = var_582; [L1206] SORT_3 var_676_arg_2 = var_675; [L1207] SORT_3 var_676 = var_676_arg_0 ? var_676_arg_1 : var_676_arg_2; [L1208] SORT_3 next_677_arg_1 = var_676; [L1209] SORT_1 var_361_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_361_arg_0=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1210] EXPR var_361_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1210] var_361_arg_0 = var_361_arg_0 & mask_SORT_1 [L1211] SORT_13 var_361 = var_361_arg_0; [L1212] SORT_13 var_362_arg_0 = var_283; [L1213] SORT_13 var_362_arg_1 = var_361; [L1214] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L1215] SORT_1 var_363_arg_0 = input_6; [L1216] SORT_1 var_363_arg_1 = var_362; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_363_arg_0=0, var_363_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1217] EXPR var_363_arg_0 & var_363_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1217] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L1218] EXPR var_363 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1218] var_363 = var_363 & mask_SORT_1 [L1219] SORT_1 var_678_arg_0 = var_363; [L1220] SORT_3 var_678_arg_1 = input_4; [L1221] SORT_3 var_678_arg_2 = state_172; [L1222] SORT_3 var_678 = var_678_arg_0 ? var_678_arg_1 : var_678_arg_2; [L1223] SORT_1 var_679_arg_0 = input_7; [L1224] SORT_3 var_679_arg_1 = var_582; [L1225] SORT_3 var_679_arg_2 = var_678; [L1226] SORT_3 var_679 = var_679_arg_0 ? var_679_arg_1 : var_679_arg_2; [L1227] SORT_3 next_680_arg_1 = var_679; [L1228] SORT_13 var_284_arg_0 = var_283; [L1229] SORT_1 var_284 = var_284_arg_0 != 0; [L1230] SORT_1 var_285_arg_0 = var_284; [L1231] SORT_1 var_285 = ~var_285_arg_0; [L1232] SORT_1 var_286_arg_0 = input_6; [L1233] SORT_1 var_286_arg_1 = var_285; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_286_arg_0=0, var_286_arg_1=-1, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1234] EXPR var_286_arg_0 & var_286_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1234] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L1235] EXPR var_286 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1235] var_286 = var_286 & mask_SORT_1 [L1236] SORT_1 var_681_arg_0 = var_286; [L1237] SORT_3 var_681_arg_1 = input_4; [L1238] SORT_3 var_681_arg_2 = state_177; [L1239] SORT_3 var_681 = var_681_arg_0 ? var_681_arg_1 : var_681_arg_2; [L1240] SORT_1 var_682_arg_0 = input_7; [L1241] SORT_3 var_682_arg_1 = var_582; [L1242] SORT_3 var_682_arg_2 = var_681; [L1243] SORT_3 var_682 = var_682_arg_0 ? var_682_arg_1 : var_682_arg_2; [L1244] SORT_3 next_683_arg_1 = var_682; [L1245] SORT_1 var_684_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_684_arg_0=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1246] EXPR var_684_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1246] var_684_arg_0 = var_684_arg_0 & mask_SORT_1 [L1247] SORT_11 var_684 = var_684_arg_0; [L1248] SORT_11 var_685_arg_0 = state_182; [L1249] SORT_11 var_685_arg_1 = var_684; [L1250] SORT_11 var_685 = var_685_arg_0 + var_685_arg_1; [L1251] SORT_1 var_686_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_686_arg_0=256, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1252] EXPR var_686_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1252] var_686_arg_0 = var_686_arg_0 & mask_SORT_1 [L1253] SORT_11 var_686 = var_686_arg_0; [L1254] SORT_11 var_687_arg_0 = var_685; [L1255] SORT_11 var_687_arg_1 = var_686; [L1256] SORT_11 var_687 = var_687_arg_0 - var_687_arg_1; [L1257] SORT_1 var_688_arg_0 = input_7; [L1258] SORT_11 var_688_arg_1 = var_203; [L1259] SORT_11 var_688_arg_2 = var_687; [L1260] SORT_11 var_688 = var_688_arg_0 ? var_688_arg_1 : var_688_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_688=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1261] EXPR var_688 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1261] var_688 = var_688 & mask_SORT_11 [L1262] SORT_11 next_689_arg_1 = var_688; [L1263] SORT_1 var_542_arg_0 = state_190; [L1264] SORT_1 var_542 = ~var_542_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=-1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1265] EXPR var_542 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1265] var_542 = var_542 & mask_SORT_1 [L1266] SORT_1 var_538_arg_0 = input_8; [L1267] SORT_1 var_538_arg_1 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538_arg_0=0, var_538_arg_1=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1268] EXPR var_538_arg_0 & var_538_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1268] SORT_1 var_538 = var_538_arg_0 & var_538_arg_1; [L1269] SORT_1 var_539_arg_0 = state_190; [L1270] SORT_1 var_539_arg_1 = var_538; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_539_arg_0=0, var_539_arg_1=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1271] EXPR var_539_arg_0 | var_539_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1271] SORT_1 var_539 = var_539_arg_0 | var_539_arg_1; [L1272] SORT_1 var_690_arg_0 = var_542; [L1273] SORT_1 var_690_arg_1 = var_539; [L1274] SORT_1 var_690_arg_2 = state_190; [L1275] SORT_1 var_690 = var_690_arg_0 ? var_690_arg_1 : var_690_arg_2; [L1276] SORT_1 var_691_arg_0 = input_7; [L1277] SORT_1 var_691_arg_1 = var_233; [L1278] SORT_1 var_691_arg_2 = var_690; [L1279] SORT_1 var_691 = var_691_arg_0 ? var_691_arg_1 : var_691_arg_2; [L1280] SORT_1 next_692_arg_1 = var_691; [L1281] SORT_1 var_550_arg_0 = var_207; [L1282] SORT_1 var_550_arg_1 = state_191; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_550_arg_0=0, var_550_arg_1=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1283] EXPR var_550_arg_0 | var_550_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1283] SORT_1 var_550 = var_550_arg_0 | var_550_arg_1; [L1284] SORT_1 var_693_arg_0 = var_173; [L1285] SORT_1 var_693_arg_1 = var_550; [L1286] SORT_1 var_693_arg_2 = state_191; [L1287] SORT_1 var_693 = var_693_arg_0 ? var_693_arg_1 : var_693_arg_2; [L1288] SORT_1 var_694_arg_0 = input_7; [L1289] SORT_1 var_694_arg_1 = var_233; [L1290] SORT_1 var_694_arg_2 = var_693; [L1291] SORT_1 var_694 = var_694_arg_0 ? var_694_arg_1 : var_694_arg_2; [L1292] SORT_1 next_695_arg_1 = var_694; [L1293] SORT_1 var_562_arg_0 = input_6; [L1294] SORT_1 var_562_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_562_arg_0=0, var_562_arg_1=256, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1295] EXPR var_562_arg_0 | var_562_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1295] SORT_1 var_562 = var_562_arg_0 | var_562_arg_1; [L1296] SORT_1 var_563_arg_0 = var_562; [L1297] SORT_1 var_563_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_563_arg_0=0, var_563_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1298] EXPR var_563_arg_0 | var_563_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1298] SORT_1 var_563 = var_563_arg_0 | var_563_arg_1; [L1299] SORT_1 var_564_arg_0 = var_563; [L1300] SORT_1 var_564_arg_1 = state_190; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_564_arg_0=0, var_564_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1301] EXPR var_564_arg_0 | var_564_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1301] SORT_1 var_564 = var_564_arg_0 | var_564_arg_1; [L1302] EXPR var_564 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1302] var_564 = var_564 & mask_SORT_1 [L1303] SORT_1 var_696_arg_0 = var_564; [L1304] SORT_11 var_696_arg_1 = var_204; [L1305] SORT_11 var_696_arg_2 = state_194; [L1306] SORT_11 var_696 = var_696_arg_0 ? var_696_arg_1 : var_696_arg_2; [L1307] SORT_1 var_697_arg_0 = input_7; [L1308] SORT_11 var_697_arg_1 = var_203; [L1309] SORT_11 var_697_arg_2 = var_696; [L1310] SORT_11 var_697 = var_697_arg_0 ? var_697_arg_1 : var_697_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_697=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1311] EXPR var_697 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1311] var_697 = var_697 & mask_SORT_11 [L1312] SORT_11 next_698_arg_1 = var_697; [L1313] SORT_1 var_547_arg_0 = var_538; [L1314] SORT_1 var_547_arg_1 = var_542; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_547_arg_0=0, var_547_arg_1=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1315] EXPR var_547_arg_0 & var_547_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1315] SORT_1 var_547 = var_547_arg_0 & var_547_arg_1; [L1316] EXPR var_547 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1316] var_547 = var_547 & mask_SORT_1 [L1317] SORT_1 var_699_arg_0 = var_547; [L1318] SORT_3 var_699_arg_1 = input_4; [L1319] SORT_3 var_699_arg_2 = state_209; [L1320] SORT_3 var_699 = var_699_arg_0 ? var_699_arg_1 : var_699_arg_2; [L1321] SORT_1 var_700_arg_0 = input_7; [L1322] SORT_3 var_700_arg_1 = var_582; [L1323] SORT_3 var_700_arg_2 = var_699; [L1324] SORT_3 var_700 = var_700_arg_0 ? var_700_arg_1 : var_700_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_700=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1325] EXPR var_700 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1325] var_700 = var_700 & mask_SORT_3 [L1326] SORT_3 next_701_arg_1 = var_700; [L1327] SORT_1 next_702_arg_1 = var_233; [L1328] SORT_1 var_518_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_518_arg_0=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1329] EXPR var_518_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1329] var_518_arg_0 = var_518_arg_0 & mask_SORT_1 [L1330] SORT_11 var_518 = var_518_arg_0; [L1331] SORT_11 var_519_arg_0 = state_282; [L1332] SORT_11 var_519_arg_1 = var_518; [L1333] SORT_11 var_519 = var_519_arg_0 + var_519_arg_1; [L1334] SORT_1 var_703_arg_0 = var_242; [L1335] SORT_11 var_703_arg_1 = var_519; [L1336] SORT_11 var_703_arg_2 = state_282; [L1337] SORT_11 var_703 = var_703_arg_0 ? var_703_arg_1 : var_703_arg_2; [L1338] SORT_1 var_704_arg_0 = input_7; [L1339] SORT_11 var_704_arg_1 = var_203; [L1340] SORT_11 var_704_arg_2 = var_703; [L1341] SORT_11 var_704 = var_704_arg_0 ? var_704_arg_1 : var_704_arg_2; [L1342] SORT_11 next_705_arg_1 = var_704; [L1344] state_10 = next_584_arg_1 [L1345] state_12 = next_587_arg_1 [L1346] state_18 = next_590_arg_1 [L1347] state_24 = next_593_arg_1 [L1348] state_29 = next_596_arg_1 [L1349] state_34 = next_599_arg_1 [L1350] state_39 = next_602_arg_1 [L1351] state_44 = next_605_arg_1 [L1352] state_49 = next_608_arg_1 [L1353] state_54 = next_611_arg_1 [L1354] state_59 = next_614_arg_1 [L1355] state_64 = next_617_arg_1 [L1356] state_69 = next_620_arg_1 [L1357] state_74 = next_623_arg_1 [L1358] state_79 = next_626_arg_1 [L1359] state_84 = next_629_arg_1 [L1360] state_89 = next_632_arg_1 [L1361] state_94 = next_635_arg_1 [L1362] state_99 = next_638_arg_1 [L1363] state_105 = next_641_arg_1 [L1364] state_110 = next_644_arg_1 [L1365] state_115 = next_647_arg_1 [L1366] state_120 = next_650_arg_1 [L1367] state_125 = next_653_arg_1 [L1368] state_130 = next_656_arg_1 [L1369] state_135 = next_659_arg_1 [L1370] state_140 = next_662_arg_1 [L1371] state_146 = next_665_arg_1 [L1372] state_151 = next_668_arg_1 [L1373] state_156 = next_671_arg_1 [L1374] state_161 = next_674_arg_1 [L1375] state_167 = next_677_arg_1 [L1376] state_172 = next_680_arg_1 [L1377] state_177 = next_683_arg_1 [L1378] state_182 = next_689_arg_1 [L1379] state_190 = next_692_arg_1 [L1380] state_191 = next_695_arg_1 [L1381] state_194 = next_698_arg_1 [L1382] state_209 = next_701_arg_1 [L1383] state_213 = next_702_arg_1 [L1384] state_282 = next_705_arg_1 [L142] input_2 = __VERIFIER_nondet_uchar() [L143] input_4 = __VERIFIER_nondet_uchar() [L144] input_5 = __VERIFIER_nondet_uchar() [L145] input_6 = __VERIFIER_nondet_uchar() [L146] input_7 = __VERIFIER_nondet_uchar() [L147] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L147] input_7 = input_7 & mask_SORT_1 [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_uchar() [L150] input_231 = __VERIFIER_nondet_uchar() [L152] SORT_1 var_215_arg_0 = input_7; [L153] SORT_1 var_215_arg_1 = state_213; [L154] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L155] SORT_1 var_216_arg_0 = var_173; [L156] SORT_1 var_216 = ~var_216_arg_0; [L157] SORT_1 var_217_arg_0 = var_215; [L158] SORT_1 var_217_arg_1 = var_216; VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L160] EXPR var_217 & mask_SORT_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] var_217 = var_217 & mask_SORT_1 [L161] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L162] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L162] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L165] SORT_11 var_187 = var_187_arg_0; [L166] SORT_11 var_188_arg_0 = state_182; [L167] SORT_11 var_188_arg_1 = var_187; [L168] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L169] SORT_1 var_219_arg_0 = var_188; [L170] SORT_1 var_219 = ~var_219_arg_0; [L171] SORT_1 var_220_arg_0 = input_6; [L172] SORT_1 var_220 = ~var_220_arg_0; [L173] SORT_1 var_221_arg_0 = var_219; [L174] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L176] SORT_1 var_222_arg_0 = var_173; [L177] SORT_1 var_222 = ~var_222_arg_0; [L178] SORT_1 var_223_arg_0 = var_221; [L179] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L181] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] var_223 = var_223 & mask_SORT_1 [L182] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L183] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L183] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] SORT_11 var_183_arg_0 = state_182; [L185] SORT_1 var_183 = var_183_arg_0 != 0; [L186] SORT_1 var_184_arg_0 = var_183; [L187] SORT_1 var_184 = ~var_184_arg_0; [L188] SORT_1 var_225_arg_0 = var_184; [L189] SORT_1 var_225 = ~var_225_arg_0; [L190] SORT_1 var_226_arg_0 = input_5; [L191] SORT_1 var_226 = ~var_226_arg_0; [L192] SORT_1 var_227_arg_0 = var_225; [L193] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L195] SORT_1 var_228_arg_0 = var_173; [L196] SORT_1 var_228 = ~var_228_arg_0; [L197] SORT_1 var_229_arg_0 = var_227; [L198] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=254, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L200] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] var_229 = var_229 & mask_SORT_1 [L201] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L202] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L202] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L204] SORT_1 var_234_arg_0 = state_213; [L205] SORT_1 var_234_arg_1 = var_233; [L206] SORT_1 var_234_arg_2 = var_173; [L207] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L208] SORT_1 var_192_arg_0 = state_191; [L209] SORT_1 var_192 = ~var_192_arg_0; [L210] SORT_1 var_193_arg_0 = state_190; [L211] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L213] SORT_11 var_195_arg_0 = state_194; [L214] SORT_1 var_195 = var_195_arg_0 != 0; [L215] SORT_1 var_196_arg_0 = var_193; [L216] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L218] SORT_1 var_197_arg_0 = state_190; [L219] SORT_1 var_197 = ~var_197_arg_0; [L220] SORT_1 var_198_arg_0 = input_6; [L221] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L223] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L225] SORT_11 var_199 = var_199_arg_0; [L226] SORT_11 var_200_arg_0 = state_194; [L227] SORT_11 var_200_arg_1 = var_199; [L228] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L229] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=257, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L231] SORT_11 var_201 = var_201_arg_0; [L232] SORT_11 var_202_arg_0 = var_200; [L233] SORT_11 var_202_arg_1 = var_201; [L234] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L235] SORT_1 var_204_arg_0 = input_7; [L236] SORT_11 var_204_arg_1 = var_203; [L237] SORT_11 var_204_arg_2 = var_202; [L238] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] var_204 = var_204 & mask_SORT_11 [L240] SORT_11 var_205_arg_0 = var_204; [L241] SORT_1 var_205 = var_205_arg_0 != 0; [L242] SORT_1 var_206_arg_0 = var_205; [L243] SORT_1 var_206 = ~var_206_arg_0; [L244] SORT_1 var_207_arg_0 = var_196; [L245] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L247] SORT_1 var_208_arg_0 = var_207; [L248] SORT_1 var_208 = ~var_208_arg_0; [L249] SORT_11 var_14_arg_0 = state_12; [L250] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] var_14 = var_14 & mask_SORT_13 [L252] SORT_13 var_178_arg_0 = var_14; [L253] SORT_1 var_178 = var_178_arg_0 != 0; [L254] SORT_1 var_179_arg_0 = var_178; [L255] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] var_179 = var_179 & mask_SORT_1 [L257] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L259] SORT_13 var_174 = var_174_arg_0; [L260] SORT_13 var_175_arg_0 = var_14; [L261] SORT_13 var_175_arg_1 = var_174; [L262] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L263] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L265] SORT_13 var_169 = var_169_arg_0; [L266] SORT_13 var_170_arg_0 = var_14; [L267] SORT_13 var_170_arg_1 = var_169; [L268] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L269] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L271] SORT_13 var_164 = var_164_arg_0; [L272] SORT_13 var_165_arg_0 = var_14; [L273] SORT_13 var_165_arg_1 = var_164; [L274] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L275] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L277] SORT_13 var_158 = var_158_arg_0; [L278] SORT_13 var_159_arg_0 = var_14; [L279] SORT_13 var_159_arg_1 = var_158; [L280] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L281] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L283] SORT_13 var_153 = var_153_arg_0; [L284] SORT_13 var_154_arg_0 = var_14; [L285] SORT_13 var_154_arg_1 = var_153; [L286] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L287] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L289] SORT_13 var_148 = var_148_arg_0; [L290] SORT_13 var_149_arg_0 = var_14; [L291] SORT_13 var_149_arg_1 = var_148; [L292] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L293] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L295] SORT_13 var_143 = var_143_arg_0; [L296] SORT_13 var_144_arg_0 = var_14; [L297] SORT_13 var_144_arg_1 = var_143; [L298] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L299] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L301] SORT_13 var_137 = var_137_arg_0; [L302] SORT_13 var_138_arg_0 = var_14; [L303] SORT_13 var_138_arg_1 = var_137; [L304] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L305] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L307] SORT_13 var_132 = var_132_arg_0; [L308] SORT_13 var_133_arg_0 = var_14; [L309] SORT_13 var_133_arg_1 = var_132; [L310] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L311] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L313] SORT_13 var_127 = var_127_arg_0; [L314] SORT_13 var_128_arg_0 = var_14; [L315] SORT_13 var_128_arg_1 = var_127; [L316] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L317] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L319] SORT_13 var_122 = var_122_arg_0; [L320] SORT_13 var_123_arg_0 = var_14; [L321] SORT_13 var_123_arg_1 = var_122; [L322] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L323] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L325] SORT_13 var_117 = var_117_arg_0; [L326] SORT_13 var_118_arg_0 = var_14; [L327] SORT_13 var_118_arg_1 = var_117; [L328] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L329] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L331] SORT_13 var_112 = var_112_arg_0; [L332] SORT_13 var_113_arg_0 = var_14; [L333] SORT_13 var_113_arg_1 = var_112; [L334] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L335] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L337] SORT_13 var_107 = var_107_arg_0; [L338] SORT_13 var_108_arg_0 = var_14; [L339] SORT_13 var_108_arg_1 = var_107; [L340] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L341] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L343] SORT_13 var_102 = var_102_arg_0; [L344] SORT_13 var_103_arg_0 = var_14; [L345] SORT_13 var_103_arg_1 = var_102; [L346] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L347] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L348] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L348] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L349] SORT_13 var_96 = var_96_arg_0; [L350] SORT_13 var_97_arg_0 = var_14; [L351] SORT_13 var_97_arg_1 = var_96; [L352] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L353] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=1] [L354] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=1] [L354] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L355] SORT_13 var_91 = var_91_arg_0; [L356] SORT_13 var_92_arg_0 = var_14; [L357] SORT_13 var_92_arg_1 = var_91; [L358] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L359] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=1, var_95=16, var_97=1] [L360] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=1, var_95=16, var_97=1] [L360] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L361] SORT_13 var_86 = var_86_arg_0; [L362] SORT_13 var_87_arg_0 = var_14; [L363] SORT_13 var_87_arg_1 = var_86; [L364] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L365] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L366] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L366] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L367] SORT_13 var_81 = var_81_arg_0; [L368] SORT_13 var_82_arg_0 = var_14; [L369] SORT_13 var_82_arg_1 = var_81; [L370] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L371] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L372] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L372] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L373] SORT_13 var_76 = var_76_arg_0; [L374] SORT_13 var_77_arg_0 = var_14; [L375] SORT_13 var_77_arg_1 = var_76; [L376] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L377] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L378] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L378] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L379] SORT_13 var_71 = var_71_arg_0; [L380] SORT_13 var_72_arg_0 = var_14; [L381] SORT_13 var_72_arg_1 = var_71; [L382] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L383] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L384] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L384] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L385] SORT_13 var_66 = var_66_arg_0; [L386] SORT_13 var_67_arg_0 = var_14; [L387] SORT_13 var_67_arg_1 = var_66; [L388] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L389] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L390] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L390] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L391] SORT_13 var_61 = var_61_arg_0; [L392] SORT_13 var_62_arg_0 = var_14; [L393] SORT_13 var_62_arg_1 = var_61; [L394] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L395] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L396] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L396] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L397] SORT_13 var_56 = var_56_arg_0; [L398] SORT_13 var_57_arg_0 = var_14; [L399] SORT_13 var_57_arg_1 = var_56; [L400] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L401] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L402] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L402] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L403] SORT_13 var_51 = var_51_arg_0; [L404] SORT_13 var_52_arg_0 = var_14; [L405] SORT_13 var_52_arg_1 = var_51; [L406] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L407] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L408] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L408] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L409] SORT_13 var_46 = var_46_arg_0; [L410] SORT_13 var_47_arg_0 = var_14; [L411] SORT_13 var_47_arg_1 = var_46; [L412] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L413] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L414] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L414] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L415] SORT_13 var_41 = var_41_arg_0; [L416] SORT_13 var_42_arg_0 = var_14; [L417] SORT_13 var_42_arg_1 = var_41; [L418] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L419] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L420] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L420] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L421] SORT_13 var_36 = var_36_arg_0; [L422] SORT_13 var_37_arg_0 = var_14; [L423] SORT_13 var_37_arg_1 = var_36; [L424] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L425] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L426] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L426] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L427] SORT_13 var_31 = var_31_arg_0; [L428] SORT_13 var_32_arg_0 = var_14; [L429] SORT_13 var_32_arg_1 = var_31; [L430] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L431] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_26_arg_0=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L432] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L432] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L433] SORT_13 var_26 = var_26_arg_0; [L434] SORT_13 var_27_arg_0 = var_14; [L435] SORT_13 var_27_arg_1 = var_26; [L436] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L437] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=1, var_25=30, var_27=1, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L438] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=1, var_142=7, var_144=0, var_147=6, var_149=1, var_14=0, var_152=5, var_154=1, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_27=1, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=1, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L438] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L439] SORT_13 var_21 = var_21_arg_0; [L440] SORT_13 var_22_arg_0 = var_14; [L441] SORT_13 var_22_arg_1 = var_21; [L442] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L443] SORT_13 var_16_arg_0 = var_14; [L444] SORT_13 var_16_arg_1 = var_15; [L445] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L446] SORT_1 var_17_arg_0 = var_16; [L447] SORT_3 var_17_arg_1 = state_10; [L448] SORT_3 var_17_arg_2 = input_9; [L449] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L450] SORT_1 var_23_arg_0 = var_22; [L451] SORT_3 var_23_arg_1 = state_18; [L452] SORT_3 var_23_arg_2 = var_17; [L453] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L454] SORT_1 var_28_arg_0 = var_27; [L455] SORT_3 var_28_arg_1 = state_24; [L456] SORT_3 var_28_arg_2 = var_23; [L457] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L458] SORT_1 var_33_arg_0 = var_32; [L459] SORT_3 var_33_arg_1 = state_29; [L460] SORT_3 var_33_arg_2 = var_28; [L461] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L462] SORT_1 var_38_arg_0 = var_37; [L463] SORT_3 var_38_arg_1 = state_34; [L464] SORT_3 var_38_arg_2 = var_33; [L465] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L466] SORT_1 var_43_arg_0 = var_42; [L467] SORT_3 var_43_arg_1 = state_39; [L468] SORT_3 var_43_arg_2 = var_38; [L469] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L470] SORT_1 var_48_arg_0 = var_47; [L471] SORT_3 var_48_arg_1 = state_44; [L472] SORT_3 var_48_arg_2 = var_43; [L473] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L474] SORT_1 var_53_arg_0 = var_52; [L475] SORT_3 var_53_arg_1 = state_49; [L476] SORT_3 var_53_arg_2 = var_48; [L477] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L478] SORT_1 var_58_arg_0 = var_57; [L479] SORT_3 var_58_arg_1 = state_54; [L480] SORT_3 var_58_arg_2 = var_53; [L481] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L482] SORT_1 var_63_arg_0 = var_62; [L483] SORT_3 var_63_arg_1 = state_59; [L484] SORT_3 var_63_arg_2 = var_58; [L485] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L486] SORT_1 var_68_arg_0 = var_67; [L487] SORT_3 var_68_arg_1 = state_64; [L488] SORT_3 var_68_arg_2 = var_63; [L489] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L490] SORT_1 var_73_arg_0 = var_72; [L491] SORT_3 var_73_arg_1 = state_69; [L492] SORT_3 var_73_arg_2 = var_68; [L493] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L494] SORT_1 var_78_arg_0 = var_77; [L495] SORT_3 var_78_arg_1 = state_74; [L496] SORT_3 var_78_arg_2 = var_73; [L497] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L498] SORT_1 var_83_arg_0 = var_82; [L499] SORT_3 var_83_arg_1 = state_79; [L500] SORT_3 var_83_arg_2 = var_78; [L501] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L502] SORT_1 var_88_arg_0 = var_87; [L503] SORT_3 var_88_arg_1 = state_84; [L504] SORT_3 var_88_arg_2 = var_83; [L505] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L506] SORT_1 var_93_arg_0 = var_92; [L507] SORT_3 var_93_arg_1 = state_89; [L508] SORT_3 var_93_arg_2 = var_88; [L509] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L510] SORT_1 var_98_arg_0 = var_97; [L511] SORT_3 var_98_arg_1 = state_94; [L512] SORT_3 var_98_arg_2 = var_93; [L513] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L514] SORT_1 var_104_arg_0 = var_103; [L515] SORT_3 var_104_arg_1 = state_99; [L516] SORT_3 var_104_arg_2 = var_98; [L517] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L518] SORT_1 var_109_arg_0 = var_108; [L519] SORT_3 var_109_arg_1 = state_105; [L520] SORT_3 var_109_arg_2 = var_104; [L521] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L522] SORT_1 var_114_arg_0 = var_113; [L523] SORT_3 var_114_arg_1 = state_110; [L524] SORT_3 var_114_arg_2 = var_109; [L525] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L526] SORT_1 var_119_arg_0 = var_118; [L527] SORT_3 var_119_arg_1 = state_115; [L528] SORT_3 var_119_arg_2 = var_114; [L529] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L530] SORT_1 var_124_arg_0 = var_123; [L531] SORT_3 var_124_arg_1 = state_120; [L532] SORT_3 var_124_arg_2 = var_119; [L533] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L534] SORT_1 var_129_arg_0 = var_128; [L535] SORT_3 var_129_arg_1 = state_125; [L536] SORT_3 var_129_arg_2 = var_124; [L537] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L538] SORT_1 var_134_arg_0 = var_133; [L539] SORT_3 var_134_arg_1 = state_130; [L540] SORT_3 var_134_arg_2 = var_129; [L541] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L542] SORT_1 var_139_arg_0 = var_138; [L543] SORT_3 var_139_arg_1 = state_135; [L544] SORT_3 var_139_arg_2 = var_134; [L545] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L546] SORT_1 var_145_arg_0 = var_144; [L547] SORT_3 var_145_arg_1 = state_140; [L548] SORT_3 var_145_arg_2 = var_139; [L549] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L550] SORT_1 var_150_arg_0 = var_149; [L551] SORT_3 var_150_arg_1 = state_146; [L552] SORT_3 var_150_arg_2 = var_145; [L553] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L554] SORT_1 var_155_arg_0 = var_154; [L555] SORT_3 var_155_arg_1 = state_151; [L556] SORT_3 var_155_arg_2 = var_150; [L557] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L558] SORT_1 var_160_arg_0 = var_159; [L559] SORT_3 var_160_arg_1 = state_156; [L560] SORT_3 var_160_arg_2 = var_155; [L561] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L562] SORT_1 var_166_arg_0 = var_165; [L563] SORT_3 var_166_arg_1 = state_161; [L564] SORT_3 var_166_arg_2 = var_160; [L565] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L566] SORT_1 var_171_arg_0 = var_170; [L567] SORT_3 var_171_arg_1 = state_167; [L568] SORT_3 var_171_arg_2 = var_166; [L569] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L570] SORT_1 var_176_arg_0 = var_175; [L571] SORT_3 var_176_arg_1 = state_172; [L572] SORT_3 var_176_arg_2 = var_171; [L573] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L574] SORT_1 var_180_arg_0 = var_179; [L575] SORT_3 var_180_arg_1 = state_177; [L576] SORT_3 var_180_arg_2 = var_176; [L577] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] var_180 = var_180 & mask_SORT_3 [L579] SORT_3 var_210_arg_0 = state_209; [L580] SORT_3 var_210_arg_1 = var_180; [L581] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L582] SORT_1 var_211_arg_0 = var_208; [L583] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=1, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L585] SORT_1 var_232_arg_0 = state_213; [L586] SORT_1 var_232_arg_1 = input_231; [L587] SORT_1 var_232_arg_2 = var_211; [L588] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L589] SORT_1 var_235_arg_0 = var_232; [L590] SORT_1 var_235 = ~var_235_arg_0; [L591] SORT_1 var_236_arg_0 = var_234; [L592] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=1, var_236_arg_1=-1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L594] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=255, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] var_236 = var_236 & mask_SORT_1 [L595] SORT_1 bad_237_arg_0 = var_236; [L596] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 872 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 632.0s, OverallIterations: 145, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.4s, AutomataDifference: 136.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 284871 SdHoareTripleChecker+Valid, 94.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 284660 mSDsluCounter, 632576 SdHoareTripleChecker+Invalid, 81.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 463168 mSDsCounter, 424 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 165525 IncrementalHoareTripleChecker+Invalid, 165949 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 424 mSolverCounterUnsat, 169408 mSDtfsCounter, 165525 mSolverCounterSat, 1.6s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 13333 GetRequests, 12069 SyntacticMatches, 0 SemanticMatches, 1264 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82578 ImplicationChecksByTransitivity, 31.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=26101occurred in iteration=144, InterpolantAutomatonStates: 1120, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.3s AutomataMinimizationTime, 144 MinimizatonAttempts, 78268 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 5.1s SsaConstructionTime, 221.4s SatisfiabilityAnalysisTime, 178.6s InterpolantComputationTime, 84628 NumberOfCodeBlocks, 84628 NumberOfCodeBlocksAsserted, 156 NumberOfCheckSat, 87568 ConstructedInterpolants, 0 QuantifiedInterpolants, 557869 SizeOfPredicates, 49 NumberOfNonLiveVariables, 49462 ConjunctsInSsa, 638 ConjunctsInUnsatCore, 160 InterpolantComputations, 140 PerfectInterpolantSequences, 22473/23851 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-12-01 13:31:22,612 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 9bf56183f8b38642b96cd33ef82d3f4742c0dee70cc75a016d02fb74b1d4c964 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-01 13:31:24,650 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-01 13:31:24,733 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-12-01 13:31:24,739 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-01 13:31:24,739 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-01 13:31:24,762 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-01 13:31:24,763 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-01 13:31:24,763 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-01 13:31:24,764 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-01 13:31:24,764 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-01 13:31:24,764 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-01 13:31:24,764 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-01 13:31:24,764 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-01 13:31:24,764 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-01 13:31:24,765 INFO L153 SettingsManager]: * Use SBE=true [2024-12-01 13:31:24,765 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-01 13:31:24,765 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-01 13:31:24,765 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-01 13:31:24,765 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-01 13:31:24,765 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-01 13:31:24,765 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-01 13:31:24,765 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-12-01 13:31:24,765 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-12-01 13:31:24,766 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-12-01 13:31:24,766 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-01 13:31:24,766 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-01 13:31:24,766 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-01 13:31:24,766 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-01 13:31:24,766 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-01 13:31:24,766 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-01 13:31:24,766 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-01 13:31:24,766 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-01 13:31:24,766 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-01 13:31:24,767 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-01 13:31:24,767 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-01 13:31:24,767 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-01 13:31:24,767 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-01 13:31:24,767 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-01 13:31:24,767 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-01 13:31:24,767 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-01 13:31:24,767 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-01 13:31:24,768 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-12-01 13:31:24,768 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-12-01 13:31:24,768 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-01 13:31:24,768 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-01 13:31:24,768 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-01 13:31:24,768 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-01 13:31:24,768 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9bf56183f8b38642b96cd33ef82d3f4742c0dee70cc75a016d02fb74b1d4c964 [2024-12-01 13:31:24,996 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-01 13:31:25,003 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-01 13:31:25,006 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-01 13:31:25,007 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-01 13:31:25,007 INFO L274 PluginConnector]: CDTParser initialized [2024-12-01 13:31:25,008 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c [2024-12-01 13:31:27,697 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data/71c2866fe/df3bb4b13df743c5b6057a47263c685e/FLAG4666610d1 [2024-12-01 13:31:27,946 INFO L384 CDTParser]: Found 1 translation units. [2024-12-01 13:31:27,947 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c [2024-12-01 13:31:27,959 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data/71c2866fe/df3bb4b13df743c5b6057a47263c685e/FLAG4666610d1 [2024-12-01 13:31:28,248 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/data/71c2866fe/df3bb4b13df743c5b6057a47263c685e [2024-12-01 13:31:28,250 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-01 13:31:28,251 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-01 13:31:28,252 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-01 13:31:28,252 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-01 13:31:28,256 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-01 13:31:28,257 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,257 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27e7d749 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28, skipping insertion in model container [2024-12-01 13:31:28,258 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,290 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-01 13:31:28,446 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c[1279,1292] [2024-12-01 13:31:28,641 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-01 13:31:28,652 INFO L200 MainTranslator]: Completed pre-run [2024-12-01 13:31:28,663 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c[1279,1292] [2024-12-01 13:31:28,762 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-01 13:31:28,776 INFO L204 MainTranslator]: Completed translation [2024-12-01 13:31:28,776 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28 WrapperNode [2024-12-01 13:31:28,777 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-01 13:31:28,778 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-01 13:31:28,778 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-01 13:31:28,778 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-01 13:31:28,784 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,806 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,864 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1458 [2024-12-01 13:31:28,865 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-01 13:31:28,865 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-01 13:31:28,866 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-01 13:31:28,866 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-01 13:31:28,874 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,875 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,884 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,909 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-01 13:31:28,909 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,909 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,954 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,957 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,961 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,966 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,971 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,983 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-01 13:31:28,984 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-01 13:31:28,984 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-01 13:31:28,984 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-01 13:31:28,986 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (1/1) ... [2024-12-01 13:31:28,992 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-01 13:31:29,005 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:31:29,017 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-01 13:31:29,023 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-01 13:31:29,044 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-01 13:31:29,044 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-12-01 13:31:29,044 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-01 13:31:29,045 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-01 13:31:29,045 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-01 13:31:29,045 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-01 13:31:29,297 INFO L234 CfgBuilder]: Building ICFG [2024-12-01 13:31:29,298 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-01 13:31:30,310 INFO L? ?]: Removed 416 outVars from TransFormulas that were not future-live. [2024-12-01 13:31:30,310 INFO L283 CfgBuilder]: Performing block encoding [2024-12-01 13:31:30,319 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-01 13:31:30,319 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-01 13:31:30,319 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 01:31:30 BoogieIcfgContainer [2024-12-01 13:31:30,320 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-01 13:31:30,322 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-01 13:31:30,322 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-01 13:31:30,333 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-01 13:31:30,333 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 01.12 01:31:28" (1/3) ... [2024-12-01 13:31:30,334 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@317b70d8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 01.12 01:31:30, skipping insertion in model container [2024-12-01 13:31:30,334 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 01.12 01:31:28" (2/3) ... [2024-12-01 13:31:30,334 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@317b70d8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 01.12 01:31:30, skipping insertion in model container [2024-12-01 13:31:30,334 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.12 01:31:30" (3/3) ... [2024-12-01 13:31:30,336 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c [2024-12-01 13:31:30,351 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-01 13:31:30,352 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w8_d32_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-01 13:31:30,400 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-01 13:31:30,411 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@40753748, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-01 13:31:30,411 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-01 13:31:30,415 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-01 13:31:30,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-12-01 13:31:30,421 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:31:30,422 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-01 13:31:30,422 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:31:30,426 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:31:30,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-12-01 13:31:30,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-01 13:31:30,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [375185819] [2024-12-01 13:31:30,439 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:31:30,440 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:31:30,440 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:31:30,442 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:31:30,444 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-01 13:31:30,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:31:30,974 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-12-01 13:31:30,985 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:31:31,259 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-01 13:31:31,259 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:31:31,415 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-01 13:31:31,415 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [375185819] [2024-12-01 13:31:31,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [375185819] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:31:31,416 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [325057910] [2024-12-01 13:31:31,416 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:31:31,416 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-01 13:31:31,416 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-01 13:31:31,419 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-01 13:31:31,421 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-12-01 13:31:32,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:31:32,252 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-12-01 13:31:32,259 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:31:32,358 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-01 13:31:32,358 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-01 13:31:32,358 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [325057910] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-01 13:31:32,359 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-01 13:31:32,359 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-12-01 13:31:32,361 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018959451] [2024-12-01 13:31:32,362 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-01 13:31:32,364 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-01 13:31:32,364 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-01 13:31:32,378 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-01 13:31:32,379 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-01 13:31:32,380 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:31:32,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:31:32,533 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-12-01 13:31:32,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-01 13:31:32,535 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-12-01 13:31:32,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:31:32,540 INFO L225 Difference]: With dead ends: 43 [2024-12-01 13:31:32,540 INFO L226 Difference]: Without dead ends: 25 [2024-12-01 13:31:32,542 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-01 13:31:32,545 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-01 13:31:32,546 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-01 13:31:32,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-12-01 13:31:32,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-12-01 13:31:32,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-01 13:31:32,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-12-01 13:31:32,574 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-12-01 13:31:32,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:31:32,575 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-12-01 13:31:32,575 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-01 13:31:32,575 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-12-01 13:31:32,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-12-01 13:31:32,577 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:31:32,577 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-12-01 13:31:32,582 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-12-01 13:31:32,783 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-01 13:31:32,977 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:31:32,978 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:31:32,978 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:31:32,978 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-12-01 13:31:32,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-01 13:31:32,980 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [114357535] [2024-12-01 13:31:32,980 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:31:32,980 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:31:32,980 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:31:32,982 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:31:32,983 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-01 13:31:33,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:31:33,690 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-12-01 13:31:33,701 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:31:34,186 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-01 13:31:34,186 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:31:34,340 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-01 13:31:34,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [114357535] [2024-12-01 13:31:34,340 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [114357535] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:31:34,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [50225090] [2024-12-01 13:31:34,340 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-01 13:31:34,341 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-01 13:31:34,341 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-01 13:31:34,342 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-01 13:31:34,344 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-12-01 13:31:35,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-01 13:31:35,641 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-12-01 13:31:35,652 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:31:35,953 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-01 13:31:35,953 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:31:36,095 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [50225090] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:31:36,095 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-01 13:31:36,095 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-12-01 13:31:36,095 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2046465031] [2024-12-01 13:31:36,095 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-01 13:31:36,096 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-01 13:31:36,096 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-01 13:31:36,097 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-01 13:31:36,097 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-12-01 13:31:36,097 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:31:36,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-01 13:31:36,550 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-12-01 13:31:36,551 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-01 13:31:36,551 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-12-01 13:31:36,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-01 13:31:36,552 INFO L225 Difference]: With dead ends: 36 [2024-12-01 13:31:36,552 INFO L226 Difference]: Without dead ends: 34 [2024-12-01 13:31:36,552 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-12-01 13:31:36,553 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-01 13:31:36,553 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-01 13:31:36,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-12-01 13:31:36,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-12-01 13:31:36,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-01 13:31:36,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-12-01 13:31:36,561 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-12-01 13:31:36,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-01 13:31:36,561 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-12-01 13:31:36,561 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-01 13:31:36,561 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-12-01 13:31:36,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-12-01 13:31:36,563 INFO L210 NwaCegarLoop]: Found error trace [2024-12-01 13:31:36,563 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-12-01 13:31:36,571 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-12-01 13:31:36,770 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-01 13:31:36,963 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:31:36,964 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-01 13:31:36,964 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-01 13:31:36,964 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-12-01 13:31:36,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-01 13:31:36,966 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [393773911] [2024-12-01 13:31:36,966 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-01 13:31:36,966 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:31:36,966 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-01 13:31:36,967 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-01 13:31:36,968 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-01 13:31:37,775 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-01 13:31:37,775 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-01 13:31:37,787 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-12-01 13:31:37,803 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:31:41,438 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-01 13:31:41,438 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:31:47,025 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse7 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse5 (forall ((|v_ULTIMATE.start_main_~var_232_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse7 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_232_arg_1~0#1_17|)))))))))))))) (.cse6 (= (_ bv0 8) |c_ULTIMATE.start_main_~state_213~0#1|))) (let ((.cse11 (not .cse6)) (.cse10 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_190~0#1|)) (.cse12 (or .cse5 .cse6))) (let ((.cse2 (and (or .cse11 (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse7 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_17|) .cse10))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_17|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|))))))))) .cse12)) (.cse4 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)) (.cse3 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_209~0#1|))) (let ((.cse8 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse1 (let ((.cse9 (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_177~0#1|)))))) .cse3))) (and (or .cse9 .cse2) (or (and (or (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse7 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_17|) .cse10))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_17|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_17|)))))))))))))))))))))) .cse11) .cse12) (not .cse9)))))) (and (or (let ((.cse0 (= ((_ extract 7 0) (bvand .cse7 (_ bv254 32))) (_ bv0 8)))) (and (or .cse0 .cse1) (or (not .cse0) (and (or .cse2 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| (_ BitVec 8))) (= .cse3 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_180_arg_2~0#1_15|))))))))) (or .cse5 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| (_ BitVec 8))) (not (= .cse3 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_180_arg_2~0#1_15|))))))))) .cse6))))) .cse8) (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse7 (_ bv255 32)))) (not .cse8) .cse1))))))) is different from false [2024-12-01 13:31:47,241 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-01 13:31:47,241 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [393773911] [2024-12-01 13:31:47,242 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [393773911] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-01 13:31:47,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1025870178] [2024-12-01 13:31:47,242 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-01 13:31:47,242 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-01 13:31:47,242 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-01 13:31:47,243 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-01 13:31:47,244 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-12-01 13:31:49,009 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-01 13:31:49,009 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-01 13:31:49,069 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-12-01 13:31:49,080 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-01 13:31:51,520 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-01 13:31:51,520 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-01 13:31:55,556 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-12-01 13:31:55,556 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-12-01 13:31:55,557 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2024-12-01 13:31:55,571 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-12-01 13:31:55,766 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-01 13:31:55,958 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-01 13:31:55,959 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:842) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:555) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:395) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:267) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:325) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:181) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:267) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:317) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 46 more [2024-12-01 13:31:55,963 INFO L158 Benchmark]: Toolchain (without parser) took 27712.09ms. Allocated memory was 92.3MB in the beginning and 729.8MB in the end (delta: 637.5MB). Free memory was 67.5MB in the beginning and 267.8MB in the end (delta: -200.2MB). Peak memory consumption was 440.9MB. Max. memory is 16.1GB. [2024-12-01 13:31:55,963 INFO L158 Benchmark]: CDTParser took 0.31ms. Allocated memory is still 83.9MB. Free memory is still 47.7MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-01 13:31:55,963 INFO L158 Benchmark]: CACSL2BoogieTranslator took 525.24ms. Allocated memory is still 92.3MB. Free memory was 67.4MB in the beginning and 49.7MB in the end (delta: 17.8MB). Peak memory consumption was 40.0MB. Max. memory is 16.1GB. [2024-12-01 13:31:55,963 INFO L158 Benchmark]: Boogie Procedure Inliner took 87.48ms. Allocated memory is still 92.3MB. Free memory was 49.7MB in the beginning and 39.2MB in the end (delta: 10.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-12-01 13:31:55,964 INFO L158 Benchmark]: Boogie Preprocessor took 117.51ms. Allocated memory is still 92.3MB. Free memory was 39.2MB in the beginning and 56.7MB in the end (delta: -17.5MB). Peak memory consumption was 12.4MB. Max. memory is 16.1GB. [2024-12-01 13:31:55,964 INFO L158 Benchmark]: RCFGBuilder took 1336.04ms. Allocated memory was 92.3MB in the beginning and 142.6MB in the end (delta: 50.3MB). Free memory was 56.3MB in the beginning and 39.2MB in the end (delta: 17.1MB). Peak memory consumption was 71.6MB. Max. memory is 16.1GB. [2024-12-01 13:31:55,964 INFO L158 Benchmark]: TraceAbstraction took 25639.90ms. Allocated memory was 142.6MB in the beginning and 729.8MB in the end (delta: 587.2MB). Free memory was 39.2MB in the beginning and 267.8MB in the end (delta: -228.6MB). Peak memory consumption was 365.8MB. Max. memory is 16.1GB. [2024-12-01 13:31:55,966 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.31ms. Allocated memory is still 83.9MB. Free memory is still 47.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 525.24ms. Allocated memory is still 92.3MB. Free memory was 67.4MB in the beginning and 49.7MB in the end (delta: 17.8MB). Peak memory consumption was 40.0MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 87.48ms. Allocated memory is still 92.3MB. Free memory was 49.7MB in the beginning and 39.2MB in the end (delta: 10.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 117.51ms. Allocated memory is still 92.3MB. Free memory was 39.2MB in the beginning and 56.7MB in the end (delta: -17.5MB). Peak memory consumption was 12.4MB. Max. memory is 16.1GB. * RCFGBuilder took 1336.04ms. Allocated memory was 92.3MB in the beginning and 142.6MB in the end (delta: 50.3MB). Free memory was 56.3MB in the beginning and 39.2MB in the end (delta: 17.1MB). Peak memory consumption was 71.6MB. Max. memory is 16.1GB. * TraceAbstraction took 25639.90ms. Allocated memory was 142.6MB in the beginning and 729.8MB in the end (delta: 587.2MB). Free memory was 39.2MB in the beginning and 267.8MB in the end (delta: -228.6MB). Peak memory consumption was 365.8MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46da453a-0f71-4f0a-abf8-103af946050e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")