./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 13:08:05,109 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 13:08:05,168 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-12-02 13:08:05,173 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 13:08:05,173 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 13:08:05,195 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 13:08:05,196 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 13:08:05,196 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 13:08:05,196 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 13:08:05,197 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 13:08:05,197 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 13:08:05,197 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 13:08:05,197 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 13:08:05,197 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 13:08:05,197 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 13:08:05,197 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * sizeof long=4 [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * sizeof long double=12 [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 13:08:05,198 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 13:08:05,199 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 13:08:05,199 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 13:08:05,199 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 13:08:05,199 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 13:08:05,199 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 13:08:05,199 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 13:08:05,199 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 13:08:05,199 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 13:08:05,199 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 13:08:05,199 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 13:08:05,199 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 13:08:05,200 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d [2024-12-02 13:08:05,435 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 13:08:05,443 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 13:08:05,446 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 13:08:05,447 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 13:08:05,447 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 13:08:05,448 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2024-12-02 13:08:08,077 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/data/7ad975a84/cdcc6934a564460d808eba1a6cca133e/FLAGaccdd34ea [2024-12-02 13:08:08,284 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 13:08:08,284 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2024-12-02 13:08:08,294 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/data/7ad975a84/cdcc6934a564460d808eba1a6cca133e/FLAGaccdd34ea [2024-12-02 13:08:08,306 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/data/7ad975a84/cdcc6934a564460d808eba1a6cca133e [2024-12-02 13:08:08,308 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 13:08:08,310 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 13:08:08,311 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 13:08:08,311 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 13:08:08,314 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 13:08:08,315 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,315 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6d83839 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08, skipping insertion in model container [2024-12-02 13:08:08,315 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,338 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 13:08:08,532 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2024-12-02 13:08:08,536 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 13:08:08,546 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 13:08:08,599 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2024-12-02 13:08:08,600 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 13:08:08,613 INFO L204 MainTranslator]: Completed translation [2024-12-02 13:08:08,613 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08 WrapperNode [2024-12-02 13:08:08,614 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 13:08:08,614 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 13:08:08,614 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 13:08:08,614 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 13:08:08,619 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,630 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,659 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 504 [2024-12-02 13:08:08,660 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 13:08:08,660 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 13:08:08,660 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 13:08:08,660 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 13:08:08,668 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,668 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,672 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,687 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 13:08:08,687 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,688 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,698 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,699 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,705 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,707 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,709 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,713 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 13:08:08,714 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 13:08:08,714 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 13:08:08,714 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 13:08:08,715 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (1/1) ... [2024-12-02 13:08:08,720 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 13:08:08,729 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:08:08,738 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 13:08:08,744 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 13:08:08,764 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2024-12-02 13:08:08,764 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2024-12-02 13:08:08,764 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 13:08:08,764 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2024-12-02 13:08:08,764 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2024-12-02 13:08:08,764 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2024-12-02 13:08:08,764 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2024-12-02 13:08:08,764 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2024-12-02 13:08:08,764 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2024-12-02 13:08:08,764 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 13:08:08,764 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 13:08:08,765 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 13:08:08,765 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2024-12-02 13:08:08,765 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2024-12-02 13:08:08,765 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 13:08:08,765 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 13:08:08,765 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2024-12-02 13:08:08,765 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2024-12-02 13:08:08,858 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 13:08:08,860 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 13:08:09,382 INFO L? ?]: Removed 113 outVars from TransFormulas that were not future-live. [2024-12-02 13:08:09,382 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 13:08:09,395 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 13:08:09,396 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 13:08:09,396 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 01:08:09 BoogieIcfgContainer [2024-12-02 13:08:09,396 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 13:08:09,398 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 13:08:09,398 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 13:08:09,402 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 13:08:09,403 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 01:08:08" (1/3) ... [2024-12-02 13:08:09,403 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@725a99c4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 01:08:09, skipping insertion in model container [2024-12-02 13:08:09,403 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 01:08:08" (2/3) ... [2024-12-02 13:08:09,403 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@725a99c4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 01:08:09, skipping insertion in model container [2024-12-02 13:08:09,404 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 01:08:09" (3/3) ... [2024-12-02 13:08:09,405 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2024-12-02 13:08:09,419 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 13:08:09,422 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c that has 8 procedures, 180 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 13:08:09,476 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 13:08:09,488 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@59ccd786, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 13:08:09,488 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 13:08:09,493 INFO L276 IsEmpty]: Start isEmpty. Operand has 180 states, 140 states have (on average 1.542857142857143) internal successors, (216), 141 states have internal predecessors, (216), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 13:08:09,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2024-12-02 13:08:09,498 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:09,498 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:09,498 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:09,502 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:09,502 INFO L85 PathProgramCache]: Analyzing trace with hash -1962550167, now seen corresponding path program 1 times [2024-12-02 13:08:09,507 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:09,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853493525] [2024-12-02 13:08:09,508 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:09,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:09,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:09,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-02 13:08:09,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:09,729 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853493525] [2024-12-02 13:08:09,730 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [853493525] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:09,730 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:09,730 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-12-02 13:08:09,731 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1267090132] [2024-12-02 13:08:09,732 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:09,735 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 13:08:09,735 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:09,753 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 13:08:09,754 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 13:08:09,756 INFO L87 Difference]: Start difference. First operand has 180 states, 140 states have (on average 1.542857142857143) internal successors, (216), 141 states have internal predecessors, (216), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 12.5) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 13:08:09,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:09,792 INFO L93 Difference]: Finished difference Result 344 states and 556 transitions. [2024-12-02 13:08:09,793 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 13:08:09,794 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 12.5) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2024-12-02 13:08:09,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:09,801 INFO L225 Difference]: With dead ends: 344 [2024-12-02 13:08:09,801 INFO L226 Difference]: Without dead ends: 176 [2024-12-02 13:08:09,805 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 13:08:09,807 INFO L435 NwaCegarLoop]: 275 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 275 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:09,808 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 275 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:09,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2024-12-02 13:08:09,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2024-12-02 13:08:09,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 137 states have (on average 1.5255474452554745) internal successors, (209), 137 states have internal predecessors, (209), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 13:08:09,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 271 transitions. [2024-12-02 13:08:09,850 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 271 transitions. Word has length 29 [2024-12-02 13:08:09,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:09,851 INFO L471 AbstractCegarLoop]: Abstraction has 176 states and 271 transitions. [2024-12-02 13:08:09,851 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 12.5) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 13:08:09,851 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 271 transitions. [2024-12-02 13:08:09,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2024-12-02 13:08:09,852 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:09,853 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:09,853 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-12-02 13:08:09,853 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:09,854 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:09,854 INFO L85 PathProgramCache]: Analyzing trace with hash 526978795, now seen corresponding path program 1 times [2024-12-02 13:08:09,854 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:09,854 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446966739] [2024-12-02 13:08:09,854 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:09,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:09,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:10,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-02 13:08:10,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:10,087 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446966739] [2024-12-02 13:08:10,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [446966739] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:10,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:10,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 13:08:10,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486069605] [2024-12-02 13:08:10,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:10,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 13:08:10,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:10,090 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 13:08:10,090 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 13:08:10,090 INFO L87 Difference]: Start difference. First operand 176 states and 271 transitions. Second operand has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 13:08:10,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:10,222 INFO L93 Difference]: Finished difference Result 450 states and 700 transitions. [2024-12-02 13:08:10,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 13:08:10,223 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2024-12-02 13:08:10,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:10,226 INFO L225 Difference]: With dead ends: 450 [2024-12-02 13:08:10,226 INFO L226 Difference]: Without dead ends: 288 [2024-12-02 13:08:10,227 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 13:08:10,228 INFO L435 NwaCegarLoop]: 265 mSDtfsCounter, 131 mSDsluCounter, 1037 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 1302 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:10,228 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [157 Valid, 1302 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 13:08:10,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2024-12-02 13:08:10,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 176. [2024-12-02 13:08:10,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 137 states have (on average 1.437956204379562) internal successors, (197), 137 states have internal predecessors, (197), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 13:08:10,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 259 transitions. [2024-12-02 13:08:10,248 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 259 transitions. Word has length 29 [2024-12-02 13:08:10,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:10,248 INFO L471 AbstractCegarLoop]: Abstraction has 176 states and 259 transitions. [2024-12-02 13:08:10,248 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 13:08:10,248 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 259 transitions. [2024-12-02 13:08:10,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2024-12-02 13:08:10,249 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:10,249 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:10,250 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 13:08:10,250 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:10,250 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:10,250 INFO L85 PathProgramCache]: Analyzing trace with hash 252414694, now seen corresponding path program 1 times [2024-12-02 13:08:10,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:10,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328595202] [2024-12-02 13:08:10,251 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:10,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:10,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:10,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-02 13:08:10,484 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:10,484 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [328595202] [2024-12-02 13:08:10,484 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [328595202] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:10,484 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:10,484 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:10,484 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339997701] [2024-12-02 13:08:10,484 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:10,485 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:10,485 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:10,485 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:10,486 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:10,486 INFO L87 Difference]: Start difference. First operand 176 states and 259 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 3 states have internal predecessors, (36), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 13:08:10,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:10,544 INFO L93 Difference]: Finished difference Result 339 states and 508 transitions. [2024-12-02 13:08:10,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 13:08:10,545 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 3 states have internal predecessors, (36), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 40 [2024-12-02 13:08:10,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:10,547 INFO L225 Difference]: With dead ends: 339 [2024-12-02 13:08:10,547 INFO L226 Difference]: Without dead ends: 180 [2024-12-02 13:08:10,548 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:10,549 INFO L435 NwaCegarLoop]: 253 mSDtfsCounter, 3 mSDsluCounter, 496 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 749 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:10,549 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 749 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:10,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2024-12-02 13:08:10,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2024-12-02 13:08:10,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 140 states have (on average 1.4285714285714286) internal successors, (200), 140 states have internal predecessors, (200), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 13:08:10,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 262 transitions. [2024-12-02 13:08:10,563 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 262 transitions. Word has length 40 [2024-12-02 13:08:10,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:10,564 INFO L471 AbstractCegarLoop]: Abstraction has 180 states and 262 transitions. [2024-12-02 13:08:10,564 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 3 states have internal predecessors, (36), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 13:08:10,564 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 262 transitions. [2024-12-02 13:08:10,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-12-02 13:08:10,565 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:10,565 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:10,566 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 13:08:10,566 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:10,566 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:10,566 INFO L85 PathProgramCache]: Analyzing trace with hash -131386120, now seen corresponding path program 1 times [2024-12-02 13:08:10,566 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:10,566 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [548035026] [2024-12-02 13:08:10,567 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:10,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:10,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:10,656 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 13:08:10,656 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:10,656 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [548035026] [2024-12-02 13:08:10,656 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [548035026] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:10,656 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:10,656 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 13:08:10,657 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [822626824] [2024-12-02 13:08:10,657 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:10,657 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 13:08:10,657 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:10,658 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 13:08:10,658 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 13:08:10,658 INFO L87 Difference]: Start difference. First operand 180 states and 262 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 13:08:10,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:10,694 INFO L93 Difference]: Finished difference Result 494 states and 729 transitions. [2024-12-02 13:08:10,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 13:08:10,695 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2024-12-02 13:08:10,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:10,698 INFO L225 Difference]: With dead ends: 494 [2024-12-02 13:08:10,698 INFO L226 Difference]: Without dead ends: 331 [2024-12-02 13:08:10,699 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 13:08:10,700 INFO L435 NwaCegarLoop]: 270 mSDtfsCounter, 210 mSDsluCounter, 250 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 210 SdHoareTripleChecker+Valid, 520 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:10,700 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [210 Valid, 520 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:10,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2024-12-02 13:08:10,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 324. [2024-12-02 13:08:10,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 247 states have (on average 1.4493927125506072) internal successors, (358), 248 states have internal predecessors, (358), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2024-12-02 13:08:10,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 478 transitions. [2024-12-02 13:08:10,722 INFO L78 Accepts]: Start accepts. Automaton has 324 states and 478 transitions. Word has length 56 [2024-12-02 13:08:10,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:10,722 INFO L471 AbstractCegarLoop]: Abstraction has 324 states and 478 transitions. [2024-12-02 13:08:10,723 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 13:08:10,723 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 478 transitions. [2024-12-02 13:08:10,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2024-12-02 13:08:10,724 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:10,724 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:10,724 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 13:08:10,724 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:10,725 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:10,725 INFO L85 PathProgramCache]: Analyzing trace with hash 529706369, now seen corresponding path program 1 times [2024-12-02 13:08:10,725 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:10,725 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [49713751] [2024-12-02 13:08:10,725 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:10,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:10,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:10,797 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 13:08:10,798 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:10,798 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [49713751] [2024-12-02 13:08:10,798 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [49713751] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:10,798 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:10,798 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 13:08:10,798 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1418557611] [2024-12-02 13:08:10,798 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:10,798 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 13:08:10,798 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:10,799 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 13:08:10,799 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 13:08:10,800 INFO L87 Difference]: Start difference. First operand 324 states and 478 transitions. Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 13:08:10,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:10,846 INFO L93 Difference]: Finished difference Result 911 states and 1355 transitions. [2024-12-02 13:08:10,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 13:08:10,846 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2024-12-02 13:08:10,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:10,852 INFO L225 Difference]: With dead ends: 911 [2024-12-02 13:08:10,852 INFO L226 Difference]: Without dead ends: 604 [2024-12-02 13:08:10,853 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 13:08:10,853 INFO L435 NwaCegarLoop]: 290 mSDtfsCounter, 212 mSDsluCounter, 252 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 212 SdHoareTripleChecker+Valid, 542 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:10,854 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [212 Valid, 542 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:10,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 604 states. [2024-12-02 13:08:10,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 604 to 598. [2024-12-02 13:08:10,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 598 states, 449 states have (on average 1.4587973273942094) internal successors, (655), 452 states have internal predecessors, (655), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2024-12-02 13:08:10,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 598 states to 598 states and 889 transitions. [2024-12-02 13:08:10,896 INFO L78 Accepts]: Start accepts. Automaton has 598 states and 889 transitions. Word has length 57 [2024-12-02 13:08:10,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:10,896 INFO L471 AbstractCegarLoop]: Abstraction has 598 states and 889 transitions. [2024-12-02 13:08:10,896 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 13:08:10,897 INFO L276 IsEmpty]: Start isEmpty. Operand 598 states and 889 transitions. [2024-12-02 13:08:10,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2024-12-02 13:08:10,898 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:10,898 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:10,898 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 13:08:10,898 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:10,899 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:10,899 INFO L85 PathProgramCache]: Analyzing trace with hash -750157309, now seen corresponding path program 1 times [2024-12-02 13:08:10,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:10,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816583345] [2024-12-02 13:08:10,905 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:10,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:10,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:11,050 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 13:08:11,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:11,051 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [816583345] [2024-12-02 13:08:11,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [816583345] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:11,051 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:11,051 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 13:08:11,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [534292258] [2024-12-02 13:08:11,051 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:11,051 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 13:08:11,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:11,052 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 13:08:11,052 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:11,052 INFO L87 Difference]: Start difference. First operand 598 states and 889 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 13:08:11,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:11,260 INFO L93 Difference]: Finished difference Result 1280 states and 1897 transitions. [2024-12-02 13:08:11,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 13:08:11,260 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2024-12-02 13:08:11,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:11,266 INFO L225 Difference]: With dead ends: 1280 [2024-12-02 13:08:11,266 INFO L226 Difference]: Without dead ends: 699 [2024-12-02 13:08:11,268 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 13:08:11,268 INFO L435 NwaCegarLoop]: 227 mSDtfsCounter, 358 mSDsluCounter, 444 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 358 SdHoareTripleChecker+Valid, 671 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:11,269 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [358 Valid, 671 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 13:08:11,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2024-12-02 13:08:11,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 687. [2024-12-02 13:08:11,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 687 states, 525 states have (on average 1.4438095238095239) internal successors, (758), 528 states have internal predecessors, (758), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 13:08:11,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 687 states to 687 states and 1006 transitions. [2024-12-02 13:08:11,329 INFO L78 Accepts]: Start accepts. Automaton has 687 states and 1006 transitions. Word has length 57 [2024-12-02 13:08:11,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:11,329 INFO L471 AbstractCegarLoop]: Abstraction has 687 states and 1006 transitions. [2024-12-02 13:08:11,330 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 13:08:11,330 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 1006 transitions. [2024-12-02 13:08:11,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2024-12-02 13:08:11,331 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:11,331 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:11,331 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 13:08:11,331 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:11,332 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:11,332 INFO L85 PathProgramCache]: Analyzing trace with hash -1817877, now seen corresponding path program 1 times [2024-12-02 13:08:11,332 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:11,332 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1774849166] [2024-12-02 13:08:11,332 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:11,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:11,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:11,472 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 13:08:11,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:11,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1774849166] [2024-12-02 13:08:11,472 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1774849166] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:11,473 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:11,473 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 13:08:11,473 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1100136372] [2024-12-02 13:08:11,473 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:11,473 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 13:08:11,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:11,474 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 13:08:11,474 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:11,474 INFO L87 Difference]: Start difference. First operand 687 states and 1006 transitions. Second operand has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 13:08:11,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:11,663 INFO L93 Difference]: Finished difference Result 1280 states and 1889 transitions. [2024-12-02 13:08:11,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 13:08:11,664 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 58 [2024-12-02 13:08:11,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:11,669 INFO L225 Difference]: With dead ends: 1280 [2024-12-02 13:08:11,669 INFO L226 Difference]: Without dead ends: 699 [2024-12-02 13:08:11,671 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 13:08:11,672 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 355 mSDsluCounter, 446 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 355 SdHoareTripleChecker+Valid, 674 SdHoareTripleChecker+Invalid, 104 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:11,672 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [355 Valid, 674 Invalid, 104 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 13:08:11,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2024-12-02 13:08:11,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 687. [2024-12-02 13:08:11,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 687 states, 525 states have (on average 1.4361904761904762) internal successors, (754), 528 states have internal predecessors, (754), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 13:08:11,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 687 states to 687 states and 1002 transitions. [2024-12-02 13:08:11,727 INFO L78 Accepts]: Start accepts. Automaton has 687 states and 1002 transitions. Word has length 58 [2024-12-02 13:08:11,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:11,727 INFO L471 AbstractCegarLoop]: Abstraction has 687 states and 1002 transitions. [2024-12-02 13:08:11,728 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 13:08:11,728 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 1002 transitions. [2024-12-02 13:08:11,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2024-12-02 13:08:11,729 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:11,729 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:11,729 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 13:08:11,729 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:11,729 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:11,730 INFO L85 PathProgramCache]: Analyzing trace with hash 702120406, now seen corresponding path program 1 times [2024-12-02 13:08:11,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:11,730 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977998256] [2024-12-02 13:08:11,730 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:11,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:11,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:11,927 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 13:08:11,927 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:11,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977998256] [2024-12-02 13:08:11,928 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [977998256] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:11,928 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:11,928 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:11,928 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [224567312] [2024-12-02 13:08:11,928 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:11,928 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:11,928 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:11,929 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:11,929 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:11,929 INFO L87 Difference]: Start difference. First operand 687 states and 1002 transitions. Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 3 states have internal predecessors, (48), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 13:08:12,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:12,008 INFO L93 Difference]: Finished difference Result 1288 states and 1901 transitions. [2024-12-02 13:08:12,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 13:08:12,008 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 3 states have internal predecessors, (48), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 59 [2024-12-02 13:08:12,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:12,013 INFO L225 Difference]: With dead ends: 1288 [2024-12-02 13:08:12,013 INFO L226 Difference]: Without dead ends: 707 [2024-12-02 13:08:12,015 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:12,016 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 4 mSDsluCounter, 506 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 761 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:12,016 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 761 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:12,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 707 states. [2024-12-02 13:08:12,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 707 to 707. [2024-12-02 13:08:12,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 707 states, 541 states have (on average 1.423290203327172) internal successors, (770), 544 states have internal predecessors, (770), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 13:08:12,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 707 states to 707 states and 1018 transitions. [2024-12-02 13:08:12,072 INFO L78 Accepts]: Start accepts. Automaton has 707 states and 1018 transitions. Word has length 59 [2024-12-02 13:08:12,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:12,072 INFO L471 AbstractCegarLoop]: Abstraction has 707 states and 1018 transitions. [2024-12-02 13:08:12,072 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 3 states have internal predecessors, (48), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 13:08:12,072 INFO L276 IsEmpty]: Start isEmpty. Operand 707 states and 1018 transitions. [2024-12-02 13:08:12,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2024-12-02 13:08:12,073 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:12,073 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:12,073 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 13:08:12,073 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:12,074 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:12,074 INFO L85 PathProgramCache]: Analyzing trace with hash 439665052, now seen corresponding path program 1 times [2024-12-02 13:08:12,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:12,074 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1546557947] [2024-12-02 13:08:12,074 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:12,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:12,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:12,258 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 13:08:12,258 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:12,258 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1546557947] [2024-12-02 13:08:12,258 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1546557947] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:12,258 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:12,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:12,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54579823] [2024-12-02 13:08:12,259 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:12,259 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:12,259 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:12,260 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:12,260 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:12,260 INFO L87 Difference]: Start difference. First operand 707 states and 1018 transitions. Second operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-12-02 13:08:12,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:12,338 INFO L93 Difference]: Finished difference Result 1328 states and 1945 transitions. [2024-12-02 13:08:12,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 13:08:12,339 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 67 [2024-12-02 13:08:12,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:12,342 INFO L225 Difference]: With dead ends: 1328 [2024-12-02 13:08:12,342 INFO L226 Difference]: Without dead ends: 727 [2024-12-02 13:08:12,344 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:12,344 INFO L435 NwaCegarLoop]: 252 mSDtfsCounter, 4 mSDsluCounter, 495 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 747 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:12,345 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 747 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:12,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 727 states. [2024-12-02 13:08:12,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 727 to 727. [2024-12-02 13:08:12,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 727 states, 557 states have (on average 1.4111310592459605) internal successors, (786), 560 states have internal predecessors, (786), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 13:08:12,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 727 states to 727 states and 1034 transitions. [2024-12-02 13:08:12,403 INFO L78 Accepts]: Start accepts. Automaton has 727 states and 1034 transitions. Word has length 67 [2024-12-02 13:08:12,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:12,403 INFO L471 AbstractCegarLoop]: Abstraction has 727 states and 1034 transitions. [2024-12-02 13:08:12,404 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-12-02 13:08:12,404 INFO L276 IsEmpty]: Start isEmpty. Operand 727 states and 1034 transitions. [2024-12-02 13:08:12,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2024-12-02 13:08:12,405 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:12,405 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:12,405 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 13:08:12,405 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:12,406 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:12,406 INFO L85 PathProgramCache]: Analyzing trace with hash -891608570, now seen corresponding path program 1 times [2024-12-02 13:08:12,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:12,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1964449982] [2024-12-02 13:08:12,406 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:12,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:12,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:12,571 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 13:08:12,571 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:12,571 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1964449982] [2024-12-02 13:08:12,571 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1964449982] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:12,571 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:12,571 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:12,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1249264406] [2024-12-02 13:08:12,571 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:12,572 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:12,572 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:12,572 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:12,572 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:12,572 INFO L87 Difference]: Start difference. First operand 727 states and 1034 transitions. Second operand has 4 states, 4 states have (on average 15.0) internal successors, (60), 3 states have internal predecessors, (60), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 13:08:12,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:12,655 INFO L93 Difference]: Finished difference Result 1364 states and 1961 transitions. [2024-12-02 13:08:12,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 13:08:12,656 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.0) internal successors, (60), 3 states have internal predecessors, (60), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 75 [2024-12-02 13:08:12,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:12,661 INFO L225 Difference]: With dead ends: 1364 [2024-12-02 13:08:12,661 INFO L226 Difference]: Without dead ends: 743 [2024-12-02 13:08:12,663 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:12,664 INFO L435 NwaCegarLoop]: 257 mSDtfsCounter, 3 mSDsluCounter, 500 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 757 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:12,664 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 757 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:12,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 743 states. [2024-12-02 13:08:12,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 743 to 743. [2024-12-02 13:08:12,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 743 states, 569 states have (on average 1.4024604569420036) internal successors, (798), 572 states have internal predecessors, (798), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 13:08:12,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 743 states to 743 states and 1046 transitions. [2024-12-02 13:08:12,721 INFO L78 Accepts]: Start accepts. Automaton has 743 states and 1046 transitions. Word has length 75 [2024-12-02 13:08:12,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:12,722 INFO L471 AbstractCegarLoop]: Abstraction has 743 states and 1046 transitions. [2024-12-02 13:08:12,722 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.0) internal successors, (60), 3 states have internal predecessors, (60), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 13:08:12,722 INFO L276 IsEmpty]: Start isEmpty. Operand 743 states and 1046 transitions. [2024-12-02 13:08:12,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2024-12-02 13:08:12,723 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:12,723 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:12,723 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 13:08:12,724 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:12,724 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:12,724 INFO L85 PathProgramCache]: Analyzing trace with hash 1504850733, now seen corresponding path program 1 times [2024-12-02 13:08:12,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:12,724 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308119185] [2024-12-02 13:08:12,724 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:12,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:12,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:12,908 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 13:08:12,908 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:12,908 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [308119185] [2024-12-02 13:08:12,908 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [308119185] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:12,908 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:12,909 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:12,909 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [516659613] [2024-12-02 13:08:12,909 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:12,909 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:12,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:12,909 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:12,909 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:12,909 INFO L87 Difference]: Start difference. First operand 743 states and 1046 transitions. Second operand has 4 states, 4 states have (on average 15.0) internal successors, (60), 3 states have internal predecessors, (60), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 13:08:12,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:12,987 INFO L93 Difference]: Finished difference Result 1400 states and 2001 transitions. [2024-12-02 13:08:12,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 13:08:12,988 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.0) internal successors, (60), 3 states have internal predecessors, (60), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 75 [2024-12-02 13:08:12,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:12,991 INFO L225 Difference]: With dead ends: 1400 [2024-12-02 13:08:12,992 INFO L226 Difference]: Without dead ends: 763 [2024-12-02 13:08:12,993 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:12,993 INFO L435 NwaCegarLoop]: 252 mSDtfsCounter, 4 mSDsluCounter, 495 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 747 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:12,994 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 747 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:12,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 763 states. [2024-12-02 13:08:13,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 763 to 763. [2024-12-02 13:08:13,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 763 states, 585 states have (on average 1.3914529914529914) internal successors, (814), 588 states have internal predecessors, (814), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 13:08:13,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 763 states to 763 states and 1062 transitions. [2024-12-02 13:08:13,032 INFO L78 Accepts]: Start accepts. Automaton has 763 states and 1062 transitions. Word has length 75 [2024-12-02 13:08:13,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:13,032 INFO L471 AbstractCegarLoop]: Abstraction has 763 states and 1062 transitions. [2024-12-02 13:08:13,032 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.0) internal successors, (60), 3 states have internal predecessors, (60), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 13:08:13,032 INFO L276 IsEmpty]: Start isEmpty. Operand 763 states and 1062 transitions. [2024-12-02 13:08:13,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2024-12-02 13:08:13,034 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:13,034 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:13,034 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 13:08:13,034 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:13,035 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:13,035 INFO L85 PathProgramCache]: Analyzing trace with hash -140933203, now seen corresponding path program 1 times [2024-12-02 13:08:13,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:13,035 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [819262767] [2024-12-02 13:08:13,035 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:13,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:13,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:13,185 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 13:08:13,185 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:13,185 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [819262767] [2024-12-02 13:08:13,185 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [819262767] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:13,185 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:13,185 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:13,186 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255338050] [2024-12-02 13:08:13,186 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:13,186 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:13,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:13,186 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:13,186 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:13,187 INFO L87 Difference]: Start difference. First operand 763 states and 1062 transitions. Second operand has 4 states, 4 states have (on average 15.5) internal successors, (62), 3 states have internal predecessors, (62), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-12-02 13:08:13,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:13,261 INFO L93 Difference]: Finished difference Result 1444 states and 2029 transitions. [2024-12-02 13:08:13,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 13:08:13,261 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.5) internal successors, (62), 3 states have internal predecessors, (62), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 83 [2024-12-02 13:08:13,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:13,265 INFO L225 Difference]: With dead ends: 1444 [2024-12-02 13:08:13,265 INFO L226 Difference]: Without dead ends: 787 [2024-12-02 13:08:13,266 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:13,267 INFO L435 NwaCegarLoop]: 256 mSDtfsCounter, 5 mSDsluCounter, 503 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 759 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:13,267 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 759 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:13,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 787 states. [2024-12-02 13:08:13,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 787 to 787. [2024-12-02 13:08:13,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 787 states, 605 states have (on average 1.3785123966942148) internal successors, (834), 608 states have internal predecessors, (834), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 13:08:13,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 787 states to 787 states and 1082 transitions. [2024-12-02 13:08:13,321 INFO L78 Accepts]: Start accepts. Automaton has 787 states and 1082 transitions. Word has length 83 [2024-12-02 13:08:13,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:13,321 INFO L471 AbstractCegarLoop]: Abstraction has 787 states and 1082 transitions. [2024-12-02 13:08:13,321 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.5) internal successors, (62), 3 states have internal predecessors, (62), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-12-02 13:08:13,321 INFO L276 IsEmpty]: Start isEmpty. Operand 787 states and 1082 transitions. [2024-12-02 13:08:13,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2024-12-02 13:08:13,323 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:13,323 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:13,323 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 13:08:13,323 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:13,324 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:13,324 INFO L85 PathProgramCache]: Analyzing trace with hash 135302277, now seen corresponding path program 1 times [2024-12-02 13:08:13,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:13,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1378044250] [2024-12-02 13:08:13,324 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:13,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:13,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:13,777 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 13:08:13,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:13,777 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1378044250] [2024-12-02 13:08:13,777 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1378044250] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:13,777 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:13,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 13:08:13,778 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [143908803] [2024-12-02 13:08:13,778 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:13,778 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 13:08:13,778 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:13,779 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 13:08:13,779 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 13:08:13,779 INFO L87 Difference]: Start difference. First operand 787 states and 1082 transitions. Second operand has 7 states, 7 states have (on average 9.285714285714286) internal successors, (65), 6 states have internal predecessors, (65), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-12-02 13:08:14,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:14,200 INFO L93 Difference]: Finished difference Result 2042 states and 2796 transitions. [2024-12-02 13:08:14,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 13:08:14,201 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.285714285714286) internal successors, (65), 6 states have internal predecessors, (65), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 86 [2024-12-02 13:08:14,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:14,211 INFO L225 Difference]: With dead ends: 2042 [2024-12-02 13:08:14,211 INFO L226 Difference]: Without dead ends: 1361 [2024-12-02 13:08:14,214 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 13:08:14,214 INFO L435 NwaCegarLoop]: 262 mSDtfsCounter, 198 mSDsluCounter, 1206 mSDsCounter, 0 mSdLazyCounter, 102 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 1468 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:14,215 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [202 Valid, 1468 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 102 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 13:08:14,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1361 states. [2024-12-02 13:08:14,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1361 to 1071. [2024-12-02 13:08:14,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1071 states, 816 states have (on average 1.3676470588235294) internal successors, (1116), 821 states have internal predecessors, (1116), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 13:08:14,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1071 states to 1071 states and 1460 transitions. [2024-12-02 13:08:14,324 INFO L78 Accepts]: Start accepts. Automaton has 1071 states and 1460 transitions. Word has length 86 [2024-12-02 13:08:14,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:14,324 INFO L471 AbstractCegarLoop]: Abstraction has 1071 states and 1460 transitions. [2024-12-02 13:08:14,325 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.285714285714286) internal successors, (65), 6 states have internal predecessors, (65), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-12-02 13:08:14,325 INFO L276 IsEmpty]: Start isEmpty. Operand 1071 states and 1460 transitions. [2024-12-02 13:08:14,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2024-12-02 13:08:14,326 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:14,326 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:14,326 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 13:08:14,327 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:14,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:14,327 INFO L85 PathProgramCache]: Analyzing trace with hash 1778548198, now seen corresponding path program 1 times [2024-12-02 13:08:14,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:14,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1961433388] [2024-12-02 13:08:14,327 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:14,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:14,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:14,495 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 13:08:14,495 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:14,495 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1961433388] [2024-12-02 13:08:14,495 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1961433388] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:14,495 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:14,495 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:14,495 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [269491170] [2024-12-02 13:08:14,495 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:14,496 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:14,496 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:14,496 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:14,496 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:14,496 INFO L87 Difference]: Start difference. First operand 1071 states and 1460 transitions. Second operand has 4 states, 4 states have (on average 17.25) internal successors, (69), 3 states have internal predecessors, (69), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 13:08:14,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:14,603 INFO L93 Difference]: Finished difference Result 1992 states and 2737 transitions. [2024-12-02 13:08:14,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 13:08:14,606 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.25) internal successors, (69), 3 states have internal predecessors, (69), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 90 [2024-12-02 13:08:14,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:14,611 INFO L225 Difference]: With dead ends: 1992 [2024-12-02 13:08:14,611 INFO L226 Difference]: Without dead ends: 1095 [2024-12-02 13:08:14,613 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:14,614 INFO L435 NwaCegarLoop]: 257 mSDtfsCounter, 3 mSDsluCounter, 500 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 757 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:14,614 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 757 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:14,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1095 states. [2024-12-02 13:08:14,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1095 to 1095. [2024-12-02 13:08:14,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1095 states, 834 states have (on average 1.3597122302158273) internal successors, (1134), 839 states have internal predecessors, (1134), 172 states have call successors, (172), 88 states have call predecessors, (172), 88 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 13:08:14,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1095 states to 1095 states and 1478 transitions. [2024-12-02 13:08:14,688 INFO L78 Accepts]: Start accepts. Automaton has 1095 states and 1478 transitions. Word has length 90 [2024-12-02 13:08:14,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:14,689 INFO L471 AbstractCegarLoop]: Abstraction has 1095 states and 1478 transitions. [2024-12-02 13:08:14,689 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.25) internal successors, (69), 3 states have internal predecessors, (69), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 13:08:14,689 INFO L276 IsEmpty]: Start isEmpty. Operand 1095 states and 1478 transitions. [2024-12-02 13:08:14,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2024-12-02 13:08:14,690 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:14,690 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:14,690 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 13:08:14,690 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:14,691 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:14,691 INFO L85 PathProgramCache]: Analyzing trace with hash -186938458, now seen corresponding path program 1 times [2024-12-02 13:08:14,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:14,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502482306] [2024-12-02 13:08:14,691 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:14,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:14,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:14,960 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-02 13:08:14,960 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:14,960 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1502482306] [2024-12-02 13:08:14,960 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1502482306] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 13:08:14,961 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [176045633] [2024-12-02 13:08:14,961 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:14,961 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:08:14,961 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:08:14,963 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 13:08:14,965 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 13:08:15,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:15,145 INFO L256 TraceCheckSpWp]: Trace formula consists of 475 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-12-02 13:08:15,150 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 13:08:15,258 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-12-02 13:08:15,258 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 13:08:15,258 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [176045633] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:15,258 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 13:08:15,258 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2024-12-02 13:08:15,258 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527223522] [2024-12-02 13:08:15,259 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:15,259 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 13:08:15,259 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:15,259 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 13:08:15,259 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2024-12-02 13:08:15,260 INFO L87 Difference]: Start difference. First operand 1095 states and 1478 transitions. Second operand has 8 states, 7 states have (on average 9.285714285714286) internal successors, (65), 7 states have internal predecessors, (65), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 13:08:15,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:15,473 INFO L93 Difference]: Finished difference Result 2352 states and 3292 transitions. [2024-12-02 13:08:15,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-02 13:08:15,474 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 9.285714285714286) internal successors, (65), 7 states have internal predecessors, (65), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 89 [2024-12-02 13:08:15,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:15,480 INFO L225 Difference]: With dead ends: 2352 [2024-12-02 13:08:15,480 INFO L226 Difference]: Without dead ends: 1519 [2024-12-02 13:08:15,481 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2024-12-02 13:08:15,482 INFO L435 NwaCegarLoop]: 434 mSDtfsCounter, 137 mSDsluCounter, 2406 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 163 SdHoareTripleChecker+Valid, 2840 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:15,482 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [163 Valid, 2840 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 13:08:15,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1519 states. [2024-12-02 13:08:15,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1519 to 1103. [2024-12-02 13:08:15,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1103 states, 838 states have (on average 1.3508353221957041) internal successors, (1132), 845 states have internal predecessors, (1132), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2024-12-02 13:08:15,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1103 states to 1103 states and 1480 transitions. [2024-12-02 13:08:15,563 INFO L78 Accepts]: Start accepts. Automaton has 1103 states and 1480 transitions. Word has length 89 [2024-12-02 13:08:15,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:15,563 INFO L471 AbstractCegarLoop]: Abstraction has 1103 states and 1480 transitions. [2024-12-02 13:08:15,563 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 9.285714285714286) internal successors, (65), 7 states have internal predecessors, (65), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 13:08:15,563 INFO L276 IsEmpty]: Start isEmpty. Operand 1103 states and 1480 transitions. [2024-12-02 13:08:15,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2024-12-02 13:08:15,564 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:15,564 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:15,571 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 13:08:15,765 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2024-12-02 13:08:15,765 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:15,765 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:15,766 INFO L85 PathProgramCache]: Analyzing trace with hash -1949748139, now seen corresponding path program 1 times [2024-12-02 13:08:15,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:15,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350245068] [2024-12-02 13:08:15,766 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:15,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:15,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:15,881 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-12-02 13:08:15,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:15,881 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350245068] [2024-12-02 13:08:15,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1350245068] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:15,881 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:15,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 13:08:15,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1284929212] [2024-12-02 13:08:15,882 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:15,882 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 13:08:15,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:15,882 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 13:08:15,882 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 13:08:15,883 INFO L87 Difference]: Start difference. First operand 1103 states and 1480 transitions. Second operand has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-12-02 13:08:16,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:16,102 INFO L93 Difference]: Finished difference Result 1991 states and 2673 transitions. [2024-12-02 13:08:16,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 13:08:16,103 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 92 [2024-12-02 13:08:16,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:16,109 INFO L225 Difference]: With dead ends: 1991 [2024-12-02 13:08:16,109 INFO L226 Difference]: Without dead ends: 1144 [2024-12-02 13:08:16,112 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 13:08:16,112 INFO L435 NwaCegarLoop]: 257 mSDtfsCounter, 252 mSDsluCounter, 1216 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 253 SdHoareTripleChecker+Valid, 1473 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:16,112 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [253 Valid, 1473 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 13:08:16,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1144 states. [2024-12-02 13:08:16,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1144 to 1110. [2024-12-02 13:08:16,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1110 states, 856 states have (on average 1.3422897196261683) internal successors, (1149), 868 states have internal predecessors, (1149), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2024-12-02 13:08:16,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1110 states to 1110 states and 1473 transitions. [2024-12-02 13:08:16,195 INFO L78 Accepts]: Start accepts. Automaton has 1110 states and 1473 transitions. Word has length 92 [2024-12-02 13:08:16,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:16,196 INFO L471 AbstractCegarLoop]: Abstraction has 1110 states and 1473 transitions. [2024-12-02 13:08:16,196 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-12-02 13:08:16,196 INFO L276 IsEmpty]: Start isEmpty. Operand 1110 states and 1473 transitions. [2024-12-02 13:08:16,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-12-02 13:08:16,197 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:16,197 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:16,197 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-12-02 13:08:16,197 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:16,198 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:16,198 INFO L85 PathProgramCache]: Analyzing trace with hash -1166544085, now seen corresponding path program 1 times [2024-12-02 13:08:16,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:16,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1274784876] [2024-12-02 13:08:16,198 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:16,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:16,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:16,776 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-12-02 13:08:16,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:16,777 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1274784876] [2024-12-02 13:08:16,777 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1274784876] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:16,777 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:16,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 13:08:16,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [229541119] [2024-12-02 13:08:16,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:16,777 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 13:08:16,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:16,778 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 13:08:16,778 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 13:08:16,778 INFO L87 Difference]: Start difference. First operand 1110 states and 1473 transitions. Second operand has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 13:08:17,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:17,014 INFO L93 Difference]: Finished difference Result 1982 states and 2638 transitions. [2024-12-02 13:08:17,015 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 13:08:17,015 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 94 [2024-12-02 13:08:17,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:17,021 INFO L225 Difference]: With dead ends: 1982 [2024-12-02 13:08:17,021 INFO L226 Difference]: Without dead ends: 1108 [2024-12-02 13:08:17,022 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 13:08:17,023 INFO L435 NwaCegarLoop]: 287 mSDtfsCounter, 152 mSDsluCounter, 1306 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 1593 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:17,023 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [154 Valid, 1593 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 13:08:17,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1108 states. [2024-12-02 13:08:17,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1108 to 999. [2024-12-02 13:08:17,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 999 states, 772 states have (on average 1.3445595854922279) internal successors, (1038), 782 states have internal predecessors, (1038), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2024-12-02 13:08:17,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 999 states to 999 states and 1328 transitions. [2024-12-02 13:08:17,104 INFO L78 Accepts]: Start accepts. Automaton has 999 states and 1328 transitions. Word has length 94 [2024-12-02 13:08:17,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:17,104 INFO L471 AbstractCegarLoop]: Abstraction has 999 states and 1328 transitions. [2024-12-02 13:08:17,104 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 13:08:17,105 INFO L276 IsEmpty]: Start isEmpty. Operand 999 states and 1328 transitions. [2024-12-02 13:08:17,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2024-12-02 13:08:17,106 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:17,106 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:17,106 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 13:08:17,106 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:17,107 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:17,107 INFO L85 PathProgramCache]: Analyzing trace with hash 605598244, now seen corresponding path program 1 times [2024-12-02 13:08:17,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:17,107 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937422256] [2024-12-02 13:08:17,107 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:17,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:17,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:17,542 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-02 13:08:17,542 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:17,542 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937422256] [2024-12-02 13:08:17,542 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1937422256] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:17,542 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:17,542 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 13:08:17,542 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [829379072] [2024-12-02 13:08:17,542 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:17,543 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 13:08:17,543 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:17,543 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 13:08:17,543 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 13:08:17,543 INFO L87 Difference]: Start difference. First operand 999 states and 1328 transitions. Second operand has 7 states, 7 states have (on average 10.285714285714286) internal successors, (72), 6 states have internal predecessors, (72), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:18,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:18,010 INFO L93 Difference]: Finished difference Result 1925 states and 2553 transitions. [2024-12-02 13:08:18,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 13:08:18,010 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.285714285714286) internal successors, (72), 6 states have internal predecessors, (72), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) Word has length 95 [2024-12-02 13:08:18,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:18,017 INFO L225 Difference]: With dead ends: 1925 [2024-12-02 13:08:18,017 INFO L226 Difference]: Without dead ends: 1092 [2024-12-02 13:08:18,019 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-12-02 13:08:18,020 INFO L435 NwaCegarLoop]: 322 mSDtfsCounter, 515 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 521 SdHoareTripleChecker+Valid, 1430 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:18,020 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [521 Valid, 1430 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 13:08:18,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1092 states. [2024-12-02 13:08:18,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1092 to 1037. [2024-12-02 13:08:18,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1037 states, 795 states have (on average 1.3232704402515723) internal successors, (1052), 806 states have internal predecessors, (1052), 154 states have call successors, (154), 87 states have call predecessors, (154), 87 states have return successors, (154), 143 states have call predecessors, (154), 154 states have call successors, (154) [2024-12-02 13:08:18,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1037 states to 1037 states and 1360 transitions. [2024-12-02 13:08:18,122 INFO L78 Accepts]: Start accepts. Automaton has 1037 states and 1360 transitions. Word has length 95 [2024-12-02 13:08:18,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:18,122 INFO L471 AbstractCegarLoop]: Abstraction has 1037 states and 1360 transitions. [2024-12-02 13:08:18,122 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.285714285714286) internal successors, (72), 6 states have internal predecessors, (72), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:18,122 INFO L276 IsEmpty]: Start isEmpty. Operand 1037 states and 1360 transitions. [2024-12-02 13:08:18,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2024-12-02 13:08:18,123 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:18,123 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:18,123 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 13:08:18,124 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:18,124 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:18,124 INFO L85 PathProgramCache]: Analyzing trace with hash 255622973, now seen corresponding path program 1 times [2024-12-02 13:08:18,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:18,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [408158277] [2024-12-02 13:08:18,124 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:18,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:18,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:18,626 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-02 13:08:18,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:18,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [408158277] [2024-12-02 13:08:18,626 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [408158277] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:18,626 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:18,626 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 13:08:18,627 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924245589] [2024-12-02 13:08:18,627 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:18,627 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 13:08:18,627 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:18,627 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 13:08:18,628 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 13:08:18,628 INFO L87 Difference]: Start difference. First operand 1037 states and 1360 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 13:08:19,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:19,074 INFO L93 Difference]: Finished difference Result 2014 states and 2623 transitions. [2024-12-02 13:08:19,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 13:08:19,075 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 97 [2024-12-02 13:08:19,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:19,081 INFO L225 Difference]: With dead ends: 2014 [2024-12-02 13:08:19,081 INFO L226 Difference]: Without dead ends: 1156 [2024-12-02 13:08:19,084 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-12-02 13:08:19,084 INFO L435 NwaCegarLoop]: 282 mSDtfsCounter, 405 mSDsluCounter, 984 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 411 SdHoareTripleChecker+Valid, 1266 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:19,084 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [411 Valid, 1266 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 13:08:19,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1156 states. [2024-12-02 13:08:19,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1156 to 1059. [2024-12-02 13:08:19,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1059 states, 809 states have (on average 1.30778739184178) internal successors, (1058), 821 states have internal predecessors, (1058), 157 states have call successors, (157), 92 states have call predecessors, (157), 92 states have return successors, (157), 145 states have call predecessors, (157), 157 states have call successors, (157) [2024-12-02 13:08:19,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1059 states to 1059 states and 1372 transitions. [2024-12-02 13:08:19,218 INFO L78 Accepts]: Start accepts. Automaton has 1059 states and 1372 transitions. Word has length 97 [2024-12-02 13:08:19,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:19,218 INFO L471 AbstractCegarLoop]: Abstraction has 1059 states and 1372 transitions. [2024-12-02 13:08:19,219 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 13:08:19,219 INFO L276 IsEmpty]: Start isEmpty. Operand 1059 states and 1372 transitions. [2024-12-02 13:08:19,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2024-12-02 13:08:19,220 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:19,220 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:19,220 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 13:08:19,220 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:19,220 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:19,221 INFO L85 PathProgramCache]: Analyzing trace with hash 733147027, now seen corresponding path program 1 times [2024-12-02 13:08:19,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:19,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1485648824] [2024-12-02 13:08:19,221 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:19,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:19,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:19,334 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 13:08:19,335 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:19,335 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1485648824] [2024-12-02 13:08:19,335 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1485648824] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:19,335 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:19,335 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:19,335 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932617204] [2024-12-02 13:08:19,335 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:19,335 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:19,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:19,336 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:19,336 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:19,336 INFO L87 Difference]: Start difference. First operand 1059 states and 1372 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:19,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:19,610 INFO L93 Difference]: Finished difference Result 2765 states and 3608 transitions. [2024-12-02 13:08:19,610 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 13:08:19,610 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 98 [2024-12-02 13:08:19,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:19,620 INFO L225 Difference]: With dead ends: 2765 [2024-12-02 13:08:19,620 INFO L226 Difference]: Without dead ends: 1963 [2024-12-02 13:08:19,623 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:19,624 INFO L435 NwaCegarLoop]: 464 mSDtfsCounter, 199 mSDsluCounter, 693 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 1157 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:19,624 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 1157 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:19,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1963 states. [2024-12-02 13:08:19,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1963 to 1780. [2024-12-02 13:08:19,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1780 states, 1342 states have (on average 1.3092399403874813) internal successors, (1757), 1362 states have internal predecessors, (1757), 280 states have call successors, (280), 157 states have call predecessors, (280), 157 states have return successors, (280), 260 states have call predecessors, (280), 280 states have call successors, (280) [2024-12-02 13:08:19,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1780 states to 1780 states and 2317 transitions. [2024-12-02 13:08:19,836 INFO L78 Accepts]: Start accepts. Automaton has 1780 states and 2317 transitions. Word has length 98 [2024-12-02 13:08:19,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:19,836 INFO L471 AbstractCegarLoop]: Abstraction has 1780 states and 2317 transitions. [2024-12-02 13:08:19,837 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:19,837 INFO L276 IsEmpty]: Start isEmpty. Operand 1780 states and 2317 transitions. [2024-12-02 13:08:19,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2024-12-02 13:08:19,838 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:19,838 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:19,838 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 13:08:19,838 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:19,839 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:19,839 INFO L85 PathProgramCache]: Analyzing trace with hash -296973064, now seen corresponding path program 1 times [2024-12-02 13:08:19,839 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:19,839 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [809072645] [2024-12-02 13:08:19,839 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:19,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:19,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:19,976 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 13:08:19,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:19,977 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [809072645] [2024-12-02 13:08:19,977 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [809072645] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:19,977 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:19,977 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:19,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1873547509] [2024-12-02 13:08:19,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:19,977 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:19,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:19,978 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:19,978 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:19,978 INFO L87 Difference]: Start difference. First operand 1780 states and 2317 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:20,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:20,398 INFO L93 Difference]: Finished difference Result 4138 states and 5408 transitions. [2024-12-02 13:08:20,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 13:08:20,398 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2024-12-02 13:08:20,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:20,411 INFO L225 Difference]: With dead ends: 4138 [2024-12-02 13:08:20,411 INFO L226 Difference]: Without dead ends: 2684 [2024-12-02 13:08:20,415 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:20,416 INFO L435 NwaCegarLoop]: 482 mSDtfsCounter, 200 mSDsluCounter, 709 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 1191 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:20,416 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 1191 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 13:08:20,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2684 states. [2024-12-02 13:08:20,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2684 to 2499. [2024-12-02 13:08:20,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2499 states, 1873 states have (on average 1.3080619327282434) internal successors, (2450), 1901 states have internal predecessors, (2450), 403 states have call successors, (403), 222 states have call predecessors, (403), 222 states have return successors, (403), 375 states have call predecessors, (403), 403 states have call successors, (403) [2024-12-02 13:08:20,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2499 states to 2499 states and 3256 transitions. [2024-12-02 13:08:20,715 INFO L78 Accepts]: Start accepts. Automaton has 2499 states and 3256 transitions. Word has length 100 [2024-12-02 13:08:20,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:20,715 INFO L471 AbstractCegarLoop]: Abstraction has 2499 states and 3256 transitions. [2024-12-02 13:08:20,715 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:20,715 INFO L276 IsEmpty]: Start isEmpty. Operand 2499 states and 3256 transitions. [2024-12-02 13:08:20,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2024-12-02 13:08:20,717 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:20,717 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:20,717 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 13:08:20,717 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:20,718 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:20,718 INFO L85 PathProgramCache]: Analyzing trace with hash 791063784, now seen corresponding path program 1 times [2024-12-02 13:08:20,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:20,718 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623563293] [2024-12-02 13:08:20,718 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:20,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:20,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:20,813 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 13:08:20,813 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:20,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1623563293] [2024-12-02 13:08:20,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1623563293] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:20,814 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:20,814 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:20,814 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1186163586] [2024-12-02 13:08:20,814 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:20,814 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:20,814 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:20,815 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:20,815 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:20,815 INFO L87 Difference]: Start difference. First operand 2499 states and 3256 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:21,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:21,302 INFO L93 Difference]: Finished difference Result 6410 states and 8389 transitions. [2024-12-02 13:08:21,303 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 13:08:21,303 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2024-12-02 13:08:21,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:21,323 INFO L225 Difference]: With dead ends: 6410 [2024-12-02 13:08:21,323 INFO L226 Difference]: Without dead ends: 4341 [2024-12-02 13:08:21,329 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:21,330 INFO L435 NwaCegarLoop]: 471 mSDtfsCounter, 206 mSDsluCounter, 706 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 206 SdHoareTripleChecker+Valid, 1177 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:21,331 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [206 Valid, 1177 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:21,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4341 states. [2024-12-02 13:08:21,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4341 to 3999. [2024-12-02 13:08:21,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3999 states, 2962 states have (on average 1.2967589466576637) internal successors, (3841), 3006 states have internal predecessors, (3841), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-12-02 13:08:21,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3999 states to 3999 states and 5185 transitions. [2024-12-02 13:08:21,802 INFO L78 Accepts]: Start accepts. Automaton has 3999 states and 5185 transitions. Word has length 100 [2024-12-02 13:08:21,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:21,803 INFO L471 AbstractCegarLoop]: Abstraction has 3999 states and 5185 transitions. [2024-12-02 13:08:21,803 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:21,803 INFO L276 IsEmpty]: Start isEmpty. Operand 3999 states and 5185 transitions. [2024-12-02 13:08:21,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2024-12-02 13:08:21,805 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:21,805 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:21,805 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 13:08:21,805 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:21,806 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:21,806 INFO L85 PathProgramCache]: Analyzing trace with hash -2134783378, now seen corresponding path program 1 times [2024-12-02 13:08:21,806 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:21,806 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612863313] [2024-12-02 13:08:21,806 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:21,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:21,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:21,861 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 13:08:21,861 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:21,861 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612863313] [2024-12-02 13:08:21,861 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [612863313] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:21,862 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:21,862 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 13:08:21,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452482225] [2024-12-02 13:08:21,862 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:21,862 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 13:08:21,862 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:21,862 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 13:08:21,862 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 13:08:21,863 INFO L87 Difference]: Start difference. First operand 3999 states and 5185 transitions. Second operand has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:22,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:22,330 INFO L93 Difference]: Finished difference Result 7688 states and 10012 transitions. [2024-12-02 13:08:22,330 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 13:08:22,330 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 101 [2024-12-02 13:08:22,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:22,353 INFO L225 Difference]: With dead ends: 7688 [2024-12-02 13:08:22,353 INFO L226 Difference]: Without dead ends: 4032 [2024-12-02 13:08:22,361 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 13:08:22,361 INFO L435 NwaCegarLoop]: 258 mSDtfsCounter, 6 mSDsluCounter, 225 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 483 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:22,362 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 483 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:22,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4032 states. [2024-12-02 13:08:22,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4032 to 4005. [2024-12-02 13:08:22,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4005 states, 2968 states have (on average 1.2961590296495957) internal successors, (3847), 3012 states have internal predecessors, (3847), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-12-02 13:08:22,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4005 states to 4005 states and 5191 transitions. [2024-12-02 13:08:22,943 INFO L78 Accepts]: Start accepts. Automaton has 4005 states and 5191 transitions. Word has length 101 [2024-12-02 13:08:22,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:22,943 INFO L471 AbstractCegarLoop]: Abstraction has 4005 states and 5191 transitions. [2024-12-02 13:08:22,944 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:22,944 INFO L276 IsEmpty]: Start isEmpty. Operand 4005 states and 5191 transitions. [2024-12-02 13:08:22,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-12-02 13:08:22,946 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:22,946 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:22,946 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 13:08:22,947 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:22,947 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:22,947 INFO L85 PathProgramCache]: Analyzing trace with hash 81156627, now seen corresponding path program 1 times [2024-12-02 13:08:22,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:22,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347425028] [2024-12-02 13:08:22,947 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:22,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:22,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:23,081 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 13:08:23,082 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:23,082 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347425028] [2024-12-02 13:08:23,082 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [347425028] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:23,082 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:23,082 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:23,082 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2082323757] [2024-12-02 13:08:23,082 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:23,082 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:23,083 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:23,083 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:23,083 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:23,083 INFO L87 Difference]: Start difference. First operand 4005 states and 5191 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:23,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:23,473 INFO L93 Difference]: Finished difference Result 7653 states and 9939 transitions. [2024-12-02 13:08:23,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 13:08:23,473 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 102 [2024-12-02 13:08:23,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:23,494 INFO L225 Difference]: With dead ends: 7653 [2024-12-02 13:08:23,494 INFO L226 Difference]: Without dead ends: 3721 [2024-12-02 13:08:23,501 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:23,502 INFO L435 NwaCegarLoop]: 262 mSDtfsCounter, 79 mSDsluCounter, 474 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 736 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:23,502 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 736 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:23,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3721 states. [2024-12-02 13:08:23,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3721 to 3658. [2024-12-02 13:08:23,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3658 states, 2704 states have (on average 1.3043639053254439) internal successors, (3527), 2738 states have internal predecessors, (3527), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-12-02 13:08:23,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3658 states to 3658 states and 4767 transitions. [2024-12-02 13:08:23,894 INFO L78 Accepts]: Start accepts. Automaton has 3658 states and 4767 transitions. Word has length 102 [2024-12-02 13:08:23,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:23,894 INFO L471 AbstractCegarLoop]: Abstraction has 3658 states and 4767 transitions. [2024-12-02 13:08:23,894 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:23,894 INFO L276 IsEmpty]: Start isEmpty. Operand 3658 states and 4767 transitions. [2024-12-02 13:08:23,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-12-02 13:08:23,896 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:23,896 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:23,896 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 13:08:23,896 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:23,897 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:23,897 INFO L85 PathProgramCache]: Analyzing trace with hash -998993762, now seen corresponding path program 1 times [2024-12-02 13:08:23,897 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:23,897 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248834101] [2024-12-02 13:08:23,897 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:23,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:23,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:23,956 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 13:08:23,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:23,956 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248834101] [2024-12-02 13:08:23,956 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [248834101] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:23,956 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:23,956 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 13:08:23,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559811963] [2024-12-02 13:08:23,956 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:23,956 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 13:08:23,957 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:23,957 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 13:08:23,957 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 13:08:23,957 INFO L87 Difference]: Start difference. First operand 3658 states and 4767 transitions. Second operand has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:24,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:24,335 INFO L93 Difference]: Finished difference Result 7191 states and 9409 transitions. [2024-12-02 13:08:24,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 13:08:24,336 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 103 [2024-12-02 13:08:24,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:24,355 INFO L225 Difference]: With dead ends: 7191 [2024-12-02 13:08:24,355 INFO L226 Difference]: Without dead ends: 3709 [2024-12-02 13:08:24,362 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 13:08:24,363 INFO L435 NwaCegarLoop]: 261 mSDtfsCounter, 6 mSDsluCounter, 224 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 485 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:24,363 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 485 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:24,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3709 states. [2024-12-02 13:08:24,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3709 to 3668. [2024-12-02 13:08:24,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3668 states, 2714 states have (on average 1.3032424465733234) internal successors, (3537), 2748 states have internal predecessors, (3537), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-12-02 13:08:24,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3668 states to 3668 states and 4777 transitions. [2024-12-02 13:08:24,757 INFO L78 Accepts]: Start accepts. Automaton has 3668 states and 4777 transitions. Word has length 103 [2024-12-02 13:08:24,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:24,757 INFO L471 AbstractCegarLoop]: Abstraction has 3668 states and 4777 transitions. [2024-12-02 13:08:24,757 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:24,757 INFO L276 IsEmpty]: Start isEmpty. Operand 3668 states and 4777 transitions. [2024-12-02 13:08:24,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-12-02 13:08:24,759 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:24,759 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:24,759 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 13:08:24,759 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:24,759 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:24,759 INFO L85 PathProgramCache]: Analyzing trace with hash 1213350851, now seen corresponding path program 1 times [2024-12-02 13:08:24,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:24,759 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262823267] [2024-12-02 13:08:24,759 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:24,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:24,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:24,846 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 13:08:24,846 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:24,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262823267] [2024-12-02 13:08:24,847 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [262823267] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:24,847 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:24,847 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 13:08:24,847 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1351401947] [2024-12-02 13:08:24,847 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:24,847 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 13:08:24,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:24,848 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 13:08:24,848 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 13:08:24,848 INFO L87 Difference]: Start difference. First operand 3668 states and 4777 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:25,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:25,106 INFO L93 Difference]: Finished difference Result 7142 states and 9320 transitions. [2024-12-02 13:08:25,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 13:08:25,106 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 103 [2024-12-02 13:08:25,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:25,119 INFO L225 Difference]: With dead ends: 7142 [2024-12-02 13:08:25,119 INFO L226 Difference]: Without dead ends: 3590 [2024-12-02 13:08:25,124 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 13:08:25,125 INFO L435 NwaCegarLoop]: 267 mSDtfsCounter, 60 mSDsluCounter, 479 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 746 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:25,125 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [60 Valid, 746 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:25,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3590 states. [2024-12-02 13:08:25,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3590 to 2756. [2024-12-02 13:08:25,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2756 states, 2036 states have (on average 1.2961689587426326) internal successors, (2639), 2055 states have internal predecessors, (2639), 469 states have call successors, (469), 250 states have call predecessors, (469), 250 states have return successors, (469), 450 states have call predecessors, (469), 469 states have call successors, (469) [2024-12-02 13:08:25,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2756 states to 2756 states and 3577 transitions. [2024-12-02 13:08:25,397 INFO L78 Accepts]: Start accepts. Automaton has 2756 states and 3577 transitions. Word has length 103 [2024-12-02 13:08:25,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:25,398 INFO L471 AbstractCegarLoop]: Abstraction has 2756 states and 3577 transitions. [2024-12-02 13:08:25,398 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 13:08:25,398 INFO L276 IsEmpty]: Start isEmpty. Operand 2756 states and 3577 transitions. [2024-12-02 13:08:25,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2024-12-02 13:08:25,401 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:25,401 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:25,401 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 13:08:25,402 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:25,402 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:25,402 INFO L85 PathProgramCache]: Analyzing trace with hash -2099424267, now seen corresponding path program 1 times [2024-12-02 13:08:25,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:25,402 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1075624627] [2024-12-02 13:08:25,402 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:25,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:25,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:25,929 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 11 proven. 18 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 13:08:25,929 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:25,929 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1075624627] [2024-12-02 13:08:25,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1075624627] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 13:08:25,929 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [735979007] [2024-12-02 13:08:25,929 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:25,929 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:08:25,929 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:08:25,931 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 13:08:25,932 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 13:08:26,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:26,159 INFO L256 TraceCheckSpWp]: Trace formula consists of 731 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-12-02 13:08:26,163 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 13:08:26,206 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-12-02 13:08:26,206 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 13:08:26,206 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [735979007] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:26,206 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 13:08:26,207 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [8] total 11 [2024-12-02 13:08:26,207 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992744326] [2024-12-02 13:08:26,207 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:26,207 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 13:08:26,207 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:26,208 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 13:08:26,208 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-12-02 13:08:26,208 INFO L87 Difference]: Start difference. First operand 2756 states and 3577 transitions. Second operand has 5 states, 4 states have (on average 24.5) internal successors, (98), 5 states have internal predecessors, (98), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) [2024-12-02 13:08:26,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:26,378 INFO L93 Difference]: Finished difference Result 5189 states and 6772 transitions. [2024-12-02 13:08:26,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 13:08:26,379 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 24.5) internal successors, (98), 5 states have internal predecessors, (98), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) Word has length 154 [2024-12-02 13:08:26,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:26,389 INFO L225 Difference]: With dead ends: 5189 [2024-12-02 13:08:26,389 INFO L226 Difference]: Without dead ends: 2589 [2024-12-02 13:08:26,393 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 152 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-12-02 13:08:26,393 INFO L435 NwaCegarLoop]: 256 mSDtfsCounter, 0 mSDsluCounter, 756 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1012 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:26,394 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1012 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 13:08:26,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2589 states. [2024-12-02 13:08:26,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2589 to 2572. [2024-12-02 13:08:26,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2572 states, 1897 states have (on average 1.2925672113863995) internal successors, (2452), 1914 states have internal predecessors, (2452), 440 states have call successors, (440), 234 states have call predecessors, (440), 234 states have return successors, (440), 423 states have call predecessors, (440), 440 states have call successors, (440) [2024-12-02 13:08:26,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2572 states to 2572 states and 3332 transitions. [2024-12-02 13:08:26,553 INFO L78 Accepts]: Start accepts. Automaton has 2572 states and 3332 transitions. Word has length 154 [2024-12-02 13:08:26,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:26,553 INFO L471 AbstractCegarLoop]: Abstraction has 2572 states and 3332 transitions. [2024-12-02 13:08:26,553 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 24.5) internal successors, (98), 5 states have internal predecessors, (98), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) [2024-12-02 13:08:26,553 INFO L276 IsEmpty]: Start isEmpty. Operand 2572 states and 3332 transitions. [2024-12-02 13:08:26,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-02 13:08:26,556 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:26,557 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:26,564 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-12-02 13:08:26,757 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2024-12-02 13:08:26,757 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:26,757 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:26,758 INFO L85 PathProgramCache]: Analyzing trace with hash 566332757, now seen corresponding path program 1 times [2024-12-02 13:08:26,758 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:26,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840747036] [2024-12-02 13:08:26,758 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:26,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:26,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:27,229 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 23 proven. 7 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 13:08:27,229 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:27,229 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1840747036] [2024-12-02 13:08:27,229 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1840747036] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 13:08:27,230 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2086262751] [2024-12-02 13:08:27,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:27,230 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:08:27,230 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:08:27,231 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 13:08:27,232 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 13:08:27,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:27,470 INFO L256 TraceCheckSpWp]: Trace formula consists of 765 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-12-02 13:08:27,475 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 13:08:27,776 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 33 proven. 44 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 13:08:27,776 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 13:08:28,108 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 13 proven. 17 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 13:08:28,108 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2086262751] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 13:08:28,108 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 13:08:28,108 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 8] total 24 [2024-12-02 13:08:28,108 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975023121] [2024-12-02 13:08:28,108 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 13:08:28,109 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-12-02 13:08:28,109 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:28,110 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-12-02 13:08:28,110 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=487, Unknown=0, NotChecked=0, Total=552 [2024-12-02 13:08:28,111 INFO L87 Difference]: Start difference. First operand 2572 states and 3332 transitions. Second operand has 24 states, 24 states have (on average 10.916666666666666) internal successors, (262), 22 states have internal predecessors, (262), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) [2024-12-02 13:08:32,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:32,389 INFO L93 Difference]: Finished difference Result 7522 states and 9770 transitions. [2024-12-02 13:08:32,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2024-12-02 13:08:32,390 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 10.916666666666666) internal successors, (262), 22 states have internal predecessors, (262), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) Word has length 156 [2024-12-02 13:08:32,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:32,403 INFO L225 Difference]: With dead ends: 7522 [2024-12-02 13:08:32,403 INFO L226 Difference]: Without dead ends: 5187 [2024-12-02 13:08:32,408 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 411 GetRequests, 328 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1798 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1040, Invalid=6100, Unknown=0, NotChecked=0, Total=7140 [2024-12-02 13:08:32,408 INFO L435 NwaCegarLoop]: 653 mSDtfsCounter, 2365 mSDsluCounter, 6862 mSDsCounter, 0 mSdLazyCounter, 3635 mSolverCounterSat, 912 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2365 SdHoareTripleChecker+Valid, 7515 SdHoareTripleChecker+Invalid, 4547 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 912 IncrementalHoareTripleChecker+Valid, 3635 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:32,409 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2365 Valid, 7515 Invalid, 4547 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [912 Valid, 3635 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2024-12-02 13:08:32,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5187 states. [2024-12-02 13:08:32,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5187 to 4499. [2024-12-02 13:08:32,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4499 states, 3319 states have (on average 1.295269659536005) internal successors, (4299), 3348 states have internal predecessors, (4299), 765 states have call successors, (765), 414 states have call predecessors, (765), 414 states have return successors, (765), 736 states have call predecessors, (765), 765 states have call successors, (765) [2024-12-02 13:08:32,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4499 states to 4499 states and 5829 transitions. [2024-12-02 13:08:32,864 INFO L78 Accepts]: Start accepts. Automaton has 4499 states and 5829 transitions. Word has length 156 [2024-12-02 13:08:32,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:32,864 INFO L471 AbstractCegarLoop]: Abstraction has 4499 states and 5829 transitions. [2024-12-02 13:08:32,864 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 10.916666666666666) internal successors, (262), 22 states have internal predecessors, (262), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) [2024-12-02 13:08:32,864 INFO L276 IsEmpty]: Start isEmpty. Operand 4499 states and 5829 transitions. [2024-12-02 13:08:32,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2024-12-02 13:08:32,868 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:32,868 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:32,875 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 13:08:33,068 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2024-12-02 13:08:33,068 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:33,069 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:33,069 INFO L85 PathProgramCache]: Analyzing trace with hash 533998020, now seen corresponding path program 1 times [2024-12-02 13:08:33,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:33,069 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105653271] [2024-12-02 13:08:33,069 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:33,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:33,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:33,332 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 15 proven. 13 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 13:08:33,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:33,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1105653271] [2024-12-02 13:08:33,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1105653271] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 13:08:33,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1898912156] [2024-12-02 13:08:33,332 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:33,332 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:08:33,332 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:08:33,334 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 13:08:33,335 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 13:08:33,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:33,562 INFO L256 TraceCheckSpWp]: Trace formula consists of 766 conjuncts, 50 conjuncts are in the unsatisfiable core [2024-12-02 13:08:33,565 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 13:08:34,077 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 61 proven. 14 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 13:08:34,077 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 13:08:34,698 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 15 proven. 13 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 13:08:34,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1898912156] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 13:08:34,699 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 13:08:34,699 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 10, 11] total 22 [2024-12-02 13:08:34,699 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [600090428] [2024-12-02 13:08:34,699 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 13:08:34,699 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-12-02 13:08:34,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:34,700 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-12-02 13:08:34,700 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=368, Unknown=0, NotChecked=0, Total=462 [2024-12-02 13:08:34,701 INFO L87 Difference]: Start difference. First operand 4499 states and 5829 transitions. Second operand has 22 states, 22 states have (on average 11.318181818181818) internal successors, (249), 22 states have internal predecessors, (249), 9 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 9 states have call predecessors, (36), 9 states have call successors, (36) [2024-12-02 13:08:36,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:36,829 INFO L93 Difference]: Finished difference Result 9855 states and 12764 transitions. [2024-12-02 13:08:36,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-12-02 13:08:36,829 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 11.318181818181818) internal successors, (249), 22 states have internal predecessors, (249), 9 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 9 states have call predecessors, (36), 9 states have call successors, (36) Word has length 157 [2024-12-02 13:08:36,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:36,844 INFO L225 Difference]: With dead ends: 9855 [2024-12-02 13:08:36,844 INFO L226 Difference]: Without dead ends: 5604 [2024-12-02 13:08:36,850 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 347 GetRequests, 306 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 458 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=457, Invalid=1349, Unknown=0, NotChecked=0, Total=1806 [2024-12-02 13:08:36,850 INFO L435 NwaCegarLoop]: 321 mSDtfsCounter, 1708 mSDsluCounter, 2632 mSDsCounter, 0 mSdLazyCounter, 1406 mSolverCounterSat, 610 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1708 SdHoareTripleChecker+Valid, 2953 SdHoareTripleChecker+Invalid, 2016 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 610 IncrementalHoareTripleChecker+Valid, 1406 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:36,850 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1708 Valid, 2953 Invalid, 2016 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [610 Valid, 1406 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-12-02 13:08:36,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5604 states. [2024-12-02 13:08:37,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5604 to 5245. [2024-12-02 13:08:37,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5245 states, 3880 states have (on average 1.2896907216494846) internal successors, (5004), 3913 states have internal predecessors, (5004), 878 states have call successors, (878), 486 states have call predecessors, (878), 486 states have return successors, (878), 845 states have call predecessors, (878), 878 states have call successors, (878) [2024-12-02 13:08:37,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5245 states to 5245 states and 6760 transitions. [2024-12-02 13:08:37,493 INFO L78 Accepts]: Start accepts. Automaton has 5245 states and 6760 transitions. Word has length 157 [2024-12-02 13:08:37,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:37,494 INFO L471 AbstractCegarLoop]: Abstraction has 5245 states and 6760 transitions. [2024-12-02 13:08:37,494 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 11.318181818181818) internal successors, (249), 22 states have internal predecessors, (249), 9 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 9 states have call predecessors, (36), 9 states have call successors, (36) [2024-12-02 13:08:37,494 INFO L276 IsEmpty]: Start isEmpty. Operand 5245 states and 6760 transitions. [2024-12-02 13:08:37,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-12-02 13:08:37,499 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:37,500 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:37,510 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-02 13:08:37,700 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2024-12-02 13:08:37,700 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:37,701 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:37,701 INFO L85 PathProgramCache]: Analyzing trace with hash 198500585, now seen corresponding path program 1 times [2024-12-02 13:08:37,701 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:37,701 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1694800581] [2024-12-02 13:08:37,701 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:37,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:37,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:37,865 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-12-02 13:08:37,865 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:37,865 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1694800581] [2024-12-02 13:08:37,865 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1694800581] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 13:08:37,865 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 13:08:37,865 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 13:08:37,865 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102158381] [2024-12-02 13:08:37,865 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 13:08:37,866 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 13:08:37,866 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:37,866 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 13:08:37,866 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 13:08:37,866 INFO L87 Difference]: Start difference. First operand 5245 states and 6760 transitions. Second operand has 7 states, 7 states have (on average 13.142857142857142) internal successors, (92), 6 states have internal predecessors, (92), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-12-02 13:08:39,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:39,196 INFO L93 Difference]: Finished difference Result 15241 states and 19720 transitions. [2024-12-02 13:08:39,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 13:08:39,196 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.142857142857142) internal successors, (92), 6 states have internal predecessors, (92), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) Word has length 159 [2024-12-02 13:08:39,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:39,221 INFO L225 Difference]: With dead ends: 15241 [2024-12-02 13:08:39,221 INFO L226 Difference]: Without dead ends: 10328 [2024-12-02 13:08:39,228 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 13:08:39,228 INFO L435 NwaCegarLoop]: 481 mSDtfsCounter, 221 mSDsluCounter, 2072 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 226 SdHoareTripleChecker+Valid, 2553 SdHoareTripleChecker+Invalid, 132 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:39,228 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [226 Valid, 2553 Invalid, 132 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 13:08:39,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10328 states. [2024-12-02 13:08:40,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10328 to 7616. [2024-12-02 13:08:40,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7616 states, 5587 states have (on average 1.2897798460712369) internal successors, (7206), 5637 states have internal predecessors, (7206), 1321 states have call successors, (1321), 707 states have call predecessors, (1321), 707 states have return successors, (1321), 1271 states have call predecessors, (1321), 1321 states have call successors, (1321) [2024-12-02 13:08:40,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7616 states to 7616 states and 9848 transitions. [2024-12-02 13:08:40,032 INFO L78 Accepts]: Start accepts. Automaton has 7616 states and 9848 transitions. Word has length 159 [2024-12-02 13:08:40,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:40,032 INFO L471 AbstractCegarLoop]: Abstraction has 7616 states and 9848 transitions. [2024-12-02 13:08:40,033 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.142857142857142) internal successors, (92), 6 states have internal predecessors, (92), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-12-02 13:08:40,033 INFO L276 IsEmpty]: Start isEmpty. Operand 7616 states and 9848 transitions. [2024-12-02 13:08:40,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-12-02 13:08:40,038 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:40,038 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:40,038 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-12-02 13:08:40,039 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:40,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:40,039 INFO L85 PathProgramCache]: Analyzing trace with hash -1207336531, now seen corresponding path program 1 times [2024-12-02 13:08:40,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:40,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834933225] [2024-12-02 13:08:40,039 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:40,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:40,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:40,885 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 20 proven. 10 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 13:08:40,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:40,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1834933225] [2024-12-02 13:08:40,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1834933225] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 13:08:40,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1297764953] [2024-12-02 13:08:40,885 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:40,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:08:40,886 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:08:40,887 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 13:08:40,888 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 13:08:41,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:41,109 INFO L256 TraceCheckSpWp]: Trace formula consists of 783 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-12-02 13:08:41,113 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 13:08:41,585 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 59 proven. 18 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 13:08:41,586 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 13:08:43,389 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 20 proven. 10 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 13:08:43,389 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1297764953] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 13:08:43,390 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 13:08:43,390 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12, 10] total 29 [2024-12-02 13:08:43,390 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2109758159] [2024-12-02 13:08:43,390 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 13:08:43,390 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2024-12-02 13:08:43,390 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:43,391 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2024-12-02 13:08:43,391 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=694, Unknown=0, NotChecked=0, Total=812 [2024-12-02 13:08:43,392 INFO L87 Difference]: Start difference. First operand 7616 states and 9848 transitions. Second operand has 29 states, 29 states have (on average 9.137931034482758) internal successors, (265), 29 states have internal predecessors, (265), 10 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 10 states have call predecessors, (36), 10 states have call successors, (36) [2024-12-02 13:08:46,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:46,465 INFO L93 Difference]: Finished difference Result 15710 states and 20385 transitions. [2024-12-02 13:08:46,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-12-02 13:08:46,466 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 9.137931034482758) internal successors, (265), 29 states have internal predecessors, (265), 10 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 10 states have call predecessors, (36), 10 states have call successors, (36) Word has length 159 [2024-12-02 13:08:46,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:46,516 INFO L225 Difference]: With dead ends: 15710 [2024-12-02 13:08:46,516 INFO L226 Difference]: Without dead ends: 8426 [2024-12-02 13:08:46,524 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 350 GetRequests, 305 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 533 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=378, Invalid=1784, Unknown=0, NotChecked=0, Total=2162 [2024-12-02 13:08:46,525 INFO L435 NwaCegarLoop]: 461 mSDtfsCounter, 636 mSDsluCounter, 5546 mSDsCounter, 0 mSdLazyCounter, 3017 mSolverCounterSat, 125 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 636 SdHoareTripleChecker+Valid, 6007 SdHoareTripleChecker+Invalid, 3142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 125 IncrementalHoareTripleChecker+Valid, 3017 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:46,525 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [636 Valid, 6007 Invalid, 3142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [125 Valid, 3017 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-02 13:08:46,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8426 states. [2024-12-02 13:08:47,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8426 to 8226. [2024-12-02 13:08:47,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8226 states, 6043 states have (on average 1.289260301174913) internal successors, (7791), 6098 states have internal predecessors, (7791), 1420 states have call successors, (1420), 762 states have call predecessors, (1420), 762 states have return successors, (1420), 1365 states have call predecessors, (1420), 1420 states have call successors, (1420) [2024-12-02 13:08:47,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8226 states to 8226 states and 10631 transitions. [2024-12-02 13:08:47,471 INFO L78 Accepts]: Start accepts. Automaton has 8226 states and 10631 transitions. Word has length 159 [2024-12-02 13:08:47,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:47,471 INFO L471 AbstractCegarLoop]: Abstraction has 8226 states and 10631 transitions. [2024-12-02 13:08:47,471 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 9.137931034482758) internal successors, (265), 29 states have internal predecessors, (265), 10 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 10 states have call predecessors, (36), 10 states have call successors, (36) [2024-12-02 13:08:47,471 INFO L276 IsEmpty]: Start isEmpty. Operand 8226 states and 10631 transitions. [2024-12-02 13:08:47,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2024-12-02 13:08:47,476 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:47,476 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:47,482 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 13:08:47,676 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:08:47,677 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:47,677 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:47,677 INFO L85 PathProgramCache]: Analyzing trace with hash -692963248, now seen corresponding path program 1 times [2024-12-02 13:08:47,677 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:47,677 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119014933] [2024-12-02 13:08:47,677 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:47,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:47,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:48,381 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 23 proven. 10 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 13:08:48,381 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:48,381 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1119014933] [2024-12-02 13:08:48,381 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1119014933] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 13:08:48,381 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1210210321] [2024-12-02 13:08:48,382 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:48,382 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:08:48,382 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:08:48,383 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 13:08:48,384 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 13:08:48,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:48,603 INFO L256 TraceCheckSpWp]: Trace formula consists of 768 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-12-02 13:08:48,606 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 13:08:48,848 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 69 proven. 4 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-02 13:08:48,848 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 13:08:49,070 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-12-02 13:08:49,071 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1210210321] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 13:08:49,071 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 13:08:49,071 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 13, 9] total 26 [2024-12-02 13:08:49,071 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1406994348] [2024-12-02 13:08:49,071 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 13:08:49,072 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-12-02 13:08:49,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:49,072 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-12-02 13:08:49,072 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=583, Unknown=0, NotChecked=0, Total=650 [2024-12-02 13:08:49,073 INFO L87 Difference]: Start difference. First operand 8226 states and 10631 transitions. Second operand has 26 states, 26 states have (on average 8.538461538461538) internal successors, (222), 22 states have internal predecessors, (222), 7 states have call successors, (32), 4 states have call predecessors, (32), 8 states have return successors, (34), 10 states have call predecessors, (34), 7 states have call successors, (34) [2024-12-02 13:08:53,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:08:53,723 INFO L93 Difference]: Finished difference Result 22341 states and 28796 transitions. [2024-12-02 13:08:53,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2024-12-02 13:08:53,724 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 8.538461538461538) internal successors, (222), 22 states have internal predecessors, (222), 7 states have call successors, (32), 4 states have call predecessors, (32), 8 states have return successors, (34), 10 states have call predecessors, (34), 7 states have call successors, (34) Word has length 160 [2024-12-02 13:08:53,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:08:53,776 INFO L225 Difference]: With dead ends: 22341 [2024-12-02 13:08:53,776 INFO L226 Difference]: Without dead ends: 14388 [2024-12-02 13:08:53,788 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 380 GetRequests, 322 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 597 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=536, Invalid=3004, Unknown=0, NotChecked=0, Total=3540 [2024-12-02 13:08:53,788 INFO L435 NwaCegarLoop]: 382 mSDtfsCounter, 1577 mSDsluCounter, 5292 mSDsCounter, 0 mSdLazyCounter, 2331 mSolverCounterSat, 675 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1577 SdHoareTripleChecker+Valid, 5674 SdHoareTripleChecker+Invalid, 3006 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 675 IncrementalHoareTripleChecker+Valid, 2331 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2024-12-02 13:08:53,788 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1577 Valid, 5674 Invalid, 3006 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [675 Valid, 2331 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2024-12-02 13:08:53,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14388 states. [2024-12-02 13:08:55,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14388 to 9464. [2024-12-02 13:08:55,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9464 states, 6946 states have (on average 1.2887993089547942) internal successors, (8952), 7013 states have internal predecessors, (8952), 1627 states have call successors, (1627), 890 states have call predecessors, (1627), 890 states have return successors, (1627), 1560 states have call predecessors, (1627), 1627 states have call successors, (1627) [2024-12-02 13:08:55,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9464 states to 9464 states and 12206 transitions. [2024-12-02 13:08:55,448 INFO L78 Accepts]: Start accepts. Automaton has 9464 states and 12206 transitions. Word has length 160 [2024-12-02 13:08:55,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:08:55,449 INFO L471 AbstractCegarLoop]: Abstraction has 9464 states and 12206 transitions. [2024-12-02 13:08:55,449 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 8.538461538461538) internal successors, (222), 22 states have internal predecessors, (222), 7 states have call successors, (32), 4 states have call predecessors, (32), 8 states have return successors, (34), 10 states have call predecessors, (34), 7 states have call successors, (34) [2024-12-02 13:08:55,449 INFO L276 IsEmpty]: Start isEmpty. Operand 9464 states and 12206 transitions. [2024-12-02 13:08:55,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-12-02 13:08:55,454 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:08:55,454 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:08:55,461 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 13:08:55,654 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:08:55,654 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:08:55,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:08:55,655 INFO L85 PathProgramCache]: Analyzing trace with hash -2104547611, now seen corresponding path program 1 times [2024-12-02 13:08:55,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:08:55,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801288612] [2024-12-02 13:08:55,655 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:55,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:08:55,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:56,189 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 23 proven. 7 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 13:08:56,189 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:08:56,189 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801288612] [2024-12-02 13:08:56,189 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1801288612] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 13:08:56,189 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1081827132] [2024-12-02 13:08:56,189 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:08:56,189 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:08:56,189 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:08:56,191 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 13:08:56,191 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 13:08:56,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:08:56,400 INFO L256 TraceCheckSpWp]: Trace formula consists of 803 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-12-02 13:08:56,402 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 13:08:56,791 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 71 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 13:08:56,791 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 13:08:57,156 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 23 proven. 7 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 13:08:57,156 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1081827132] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 13:08:57,156 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 13:08:57,156 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 8] total 19 [2024-12-02 13:08:57,156 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1760310779] [2024-12-02 13:08:57,156 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 13:08:57,157 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-12-02 13:08:57,157 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:08:57,157 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-12-02 13:08:57,158 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=258, Unknown=0, NotChecked=0, Total=342 [2024-12-02 13:08:57,158 INFO L87 Difference]: Start difference. First operand 9464 states and 12206 transitions. Second operand has 19 states, 19 states have (on average 12.421052631578947) internal successors, (236), 19 states have internal predecessors, (236), 8 states have call successors, (32), 5 states have call predecessors, (32), 6 states have return successors, (31), 8 states have call predecessors, (31), 8 states have call successors, (31) [2024-12-02 13:09:00,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:09:00,386 INFO L93 Difference]: Finished difference Result 22709 states and 29397 transitions. [2024-12-02 13:09:00,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-12-02 13:09:00,386 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 12.421052631578947) internal successors, (236), 19 states have internal predecessors, (236), 8 states have call successors, (32), 5 states have call predecessors, (32), 6 states have return successors, (31), 8 states have call predecessors, (31), 8 states have call successors, (31) Word has length 168 [2024-12-02 13:09:00,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:09:00,425 INFO L225 Difference]: With dead ends: 22709 [2024-12-02 13:09:00,426 INFO L226 Difference]: Without dead ends: 13600 [2024-12-02 13:09:00,440 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 332 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=318, Invalid=1088, Unknown=0, NotChecked=0, Total=1406 [2024-12-02 13:09:00,440 INFO L435 NwaCegarLoop]: 347 mSDtfsCounter, 1138 mSDsluCounter, 1816 mSDsCounter, 0 mSdLazyCounter, 1212 mSolverCounterSat, 310 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1138 SdHoareTripleChecker+Valid, 2163 SdHoareTripleChecker+Invalid, 1522 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 310 IncrementalHoareTripleChecker+Valid, 1212 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-12-02 13:09:00,440 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1138 Valid, 2163 Invalid, 1522 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [310 Valid, 1212 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-12-02 13:09:00,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13600 states. [2024-12-02 13:09:02,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13600 to 12865. [2024-12-02 13:09:02,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12865 states, 9417 states have (on average 1.2927683975788469) internal successors, (12174), 9512 states have internal predecessors, (12174), 2232 states have call successors, (2232), 1215 states have call predecessors, (2232), 1215 states have return successors, (2232), 2137 states have call predecessors, (2232), 2232 states have call successors, (2232) [2024-12-02 13:09:02,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12865 states to 12865 states and 16638 transitions. [2024-12-02 13:09:02,476 INFO L78 Accepts]: Start accepts. Automaton has 12865 states and 16638 transitions. Word has length 168 [2024-12-02 13:09:02,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:09:02,477 INFO L471 AbstractCegarLoop]: Abstraction has 12865 states and 16638 transitions. [2024-12-02 13:09:02,477 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 12.421052631578947) internal successors, (236), 19 states have internal predecessors, (236), 8 states have call successors, (32), 5 states have call predecessors, (32), 6 states have return successors, (31), 8 states have call predecessors, (31), 8 states have call successors, (31) [2024-12-02 13:09:02,477 INFO L276 IsEmpty]: Start isEmpty. Operand 12865 states and 16638 transitions. [2024-12-02 13:09:02,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-12-02 13:09:02,482 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:09:02,482 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:09:02,489 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-12-02 13:09:02,682 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2024-12-02 13:09:02,683 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:09:02,683 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:09:02,683 INFO L85 PathProgramCache]: Analyzing trace with hash 1716927805, now seen corresponding path program 1 times [2024-12-02 13:09:02,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:09:02,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385696058] [2024-12-02 13:09:02,683 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:09:02,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:09:02,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:09:03,434 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 13:09:03,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:09:03,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385696058] [2024-12-02 13:09:03,435 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [385696058] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 13:09:03,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1447903146] [2024-12-02 13:09:03,435 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:09:03,435 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:09:03,435 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:09:03,437 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 13:09:03,438 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 13:09:03,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:09:03,667 INFO L256 TraceCheckSpWp]: Trace formula consists of 802 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 13:09:03,669 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 13:09:03,770 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 50 proven. 4 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-12-02 13:09:03,770 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 13:09:03,857 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 27 proven. 2 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-12-02 13:09:03,857 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1447903146] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 13:09:03,857 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 13:09:03,857 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 7] total 16 [2024-12-02 13:09:03,857 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [499362165] [2024-12-02 13:09:03,857 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 13:09:03,857 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2024-12-02 13:09:03,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:09:03,858 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-12-02 13:09:03,858 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2024-12-02 13:09:03,858 INFO L87 Difference]: Start difference. First operand 12865 states and 16638 transitions. Second operand has 16 states, 16 states have (on average 12.5625) internal successors, (201), 15 states have internal predecessors, (201), 6 states have call successors, (37), 4 states have call predecessors, (37), 6 states have return successors, (37), 7 states have call predecessors, (37), 6 states have call successors, (37) [2024-12-02 13:09:07,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:09:07,265 INFO L93 Difference]: Finished difference Result 25764 states and 33305 transitions. [2024-12-02 13:09:07,266 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2024-12-02 13:09:07,266 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.5625) internal successors, (201), 15 states have internal predecessors, (201), 6 states have call successors, (37), 4 states have call predecessors, (37), 6 states have return successors, (37), 7 states have call predecessors, (37), 6 states have call successors, (37) Word has length 168 [2024-12-02 13:09:07,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:09:07,297 INFO L225 Difference]: With dead ends: 25764 [2024-12-02 13:09:07,297 INFO L226 Difference]: Without dead ends: 13108 [2024-12-02 13:09:07,312 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 383 GetRequests, 341 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 395 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=260, Invalid=1632, Unknown=0, NotChecked=0, Total=1892 [2024-12-02 13:09:07,313 INFO L435 NwaCegarLoop]: 476 mSDtfsCounter, 642 mSDsluCounter, 4367 mSDsCounter, 0 mSdLazyCounter, 1503 mSolverCounterSat, 132 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 643 SdHoareTripleChecker+Valid, 4843 SdHoareTripleChecker+Invalid, 1635 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 132 IncrementalHoareTripleChecker+Valid, 1503 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 13:09:07,313 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [643 Valid, 4843 Invalid, 1635 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [132 Valid, 1503 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 13:09:07,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13108 states. [2024-12-02 13:09:09,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13108 to 12856. [2024-12-02 13:09:09,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12856 states, 9408 states have (on average 1.2921981292517006) internal successors, (12157), 9503 states have internal predecessors, (12157), 2232 states have call successors, (2232), 1215 states have call predecessors, (2232), 1215 states have return successors, (2232), 2137 states have call predecessors, (2232), 2232 states have call successors, (2232) [2024-12-02 13:09:09,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12856 states to 12856 states and 16621 transitions. [2024-12-02 13:09:09,731 INFO L78 Accepts]: Start accepts. Automaton has 12856 states and 16621 transitions. Word has length 168 [2024-12-02 13:09:09,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:09:09,731 INFO L471 AbstractCegarLoop]: Abstraction has 12856 states and 16621 transitions. [2024-12-02 13:09:09,732 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.5625) internal successors, (201), 15 states have internal predecessors, (201), 6 states have call successors, (37), 4 states have call predecessors, (37), 6 states have return successors, (37), 7 states have call predecessors, (37), 6 states have call successors, (37) [2024-12-02 13:09:09,732 INFO L276 IsEmpty]: Start isEmpty. Operand 12856 states and 16621 transitions. [2024-12-02 13:09:09,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-12-02 13:09:09,737 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:09:09,737 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:09:09,745 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-12-02 13:09:09,938 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2024-12-02 13:09:09,938 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:09:09,938 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:09:09,938 INFO L85 PathProgramCache]: Analyzing trace with hash -2128815470, now seen corresponding path program 1 times [2024-12-02 13:09:09,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:09:09,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937705099] [2024-12-02 13:09:09,938 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:09:09,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:09:09,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:09:10,420 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-12-02 13:09:10,420 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 13:09:10,421 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937705099] [2024-12-02 13:09:10,421 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1937705099] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 13:09:10,421 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1212473561] [2024-12-02 13:09:10,421 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:09:10,421 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 13:09:10,421 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 13:09:10,422 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 13:09:10,423 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 13:09:10,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 13:09:10,636 INFO L256 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-12-02 13:09:10,638 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 13:09:10,817 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 76 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 13:09:10,818 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 13:09:11,024 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 30 proven. 8 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-12-02 13:09:11,024 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1212473561] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 13:09:11,024 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 13:09:11,024 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 10] total 23 [2024-12-02 13:09:11,024 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378179303] [2024-12-02 13:09:11,024 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 13:09:11,025 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-12-02 13:09:11,025 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 13:09:11,026 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-12-02 13:09:11,026 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=437, Unknown=0, NotChecked=0, Total=506 [2024-12-02 13:09:11,026 INFO L87 Difference]: Start difference. First operand 12856 states and 16621 transitions. Second operand has 23 states, 23 states have (on average 7.782608695652174) internal successors, (179), 18 states have internal predecessors, (179), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) [2024-12-02 13:09:16,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 13:09:16,104 INFO L93 Difference]: Finished difference Result 35912 states and 47725 transitions. [2024-12-02 13:09:16,105 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-12-02 13:09:16,105 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 7.782608695652174) internal successors, (179), 18 states have internal predecessors, (179), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) Word has length 177 [2024-12-02 13:09:16,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 13:09:16,170 INFO L225 Difference]: With dead ends: 35912 [2024-12-02 13:09:16,170 INFO L226 Difference]: Without dead ends: 23265 [2024-12-02 13:09:16,189 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 382 GetRequests, 346 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 226 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=201, Invalid=1205, Unknown=0, NotChecked=0, Total=1406 [2024-12-02 13:09:16,190 INFO L435 NwaCegarLoop]: 365 mSDtfsCounter, 772 mSDsluCounter, 3750 mSDsCounter, 0 mSdLazyCounter, 1279 mSolverCounterSat, 212 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 777 SdHoareTripleChecker+Valid, 4115 SdHoareTripleChecker+Invalid, 1491 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 212 IncrementalHoareTripleChecker+Valid, 1279 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 13:09:16,190 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [777 Valid, 4115 Invalid, 1491 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [212 Valid, 1279 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 13:09:16,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23265 states. [2024-12-02 13:09:19,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23265 to 15540. [2024-12-02 13:09:19,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15540 states, 11332 states have (on average 1.289710554182845) internal successors, (14615), 11455 states have internal predecessors, (14615), 2720 states have call successors, (2720), 1487 states have call predecessors, (2720), 1487 states have return successors, (2720), 2597 states have call predecessors, (2720), 2720 states have call successors, (2720) [2024-12-02 13:09:19,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15540 states to 15540 states and 20055 transitions. [2024-12-02 13:09:19,296 INFO L78 Accepts]: Start accepts. Automaton has 15540 states and 20055 transitions. Word has length 177 [2024-12-02 13:09:19,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 13:09:19,296 INFO L471 AbstractCegarLoop]: Abstraction has 15540 states and 20055 transitions. [2024-12-02 13:09:19,296 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 7.782608695652174) internal successors, (179), 18 states have internal predecessors, (179), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) [2024-12-02 13:09:19,296 INFO L276 IsEmpty]: Start isEmpty. Operand 15540 states and 20055 transitions. [2024-12-02 13:09:19,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2024-12-02 13:09:19,302 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 13:09:19,302 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:09:19,311 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-12-02 13:09:19,502 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2024-12-02 13:09:19,503 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 13:09:19,503 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 13:09:19,503 INFO L85 PathProgramCache]: Analyzing trace with hash 717279674, now seen corresponding path program 1 times [2024-12-02 13:09:19,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 13:09:19,503 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077371568] [2024-12-02 13:09:19,503 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 13:09:19,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 13:09:19,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 13:09:19,598 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 13:09:19,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 13:09:19,752 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 13:09:19,752 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 13:09:19,753 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 13:09:19,754 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-12-02 13:09:19,756 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 13:09:19,874 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 13:09:19,876 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 01:09:19 BoogieIcfgContainer [2024-12-02 13:09:19,876 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 13:09:19,877 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 13:09:19,877 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 13:09:19,877 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 13:09:19,878 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 01:08:09" (3/4) ... [2024-12-02 13:09:19,878 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-12-02 13:09:20,009 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 144. [2024-12-02 13:09:20,092 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/witness.graphml [2024-12-02 13:09:20,092 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/witness.yml [2024-12-02 13:09:20,092 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 13:09:20,093 INFO L158 Benchmark]: Toolchain (without parser) took 71783.36ms. Allocated memory was 142.6MB in the beginning and 2.9GB in the end (delta: 2.8GB). Free memory was 116.5MB in the beginning and 2.5GB in the end (delta: -2.4GB). Peak memory consumption was 401.0MB. Max. memory is 16.1GB. [2024-12-02 13:09:20,093 INFO L158 Benchmark]: CDTParser took 0.30ms. Allocated memory is still 142.6MB. Free memory is still 82.2MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 13:09:20,093 INFO L158 Benchmark]: CACSL2BoogieTranslator took 303.19ms. Allocated memory is still 142.6MB. Free memory was 116.5MB in the beginning and 98.5MB in the end (delta: 18.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-12-02 13:09:20,093 INFO L158 Benchmark]: Boogie Procedure Inliner took 45.60ms. Allocated memory is still 142.6MB. Free memory was 98.3MB in the beginning and 95.0MB in the end (delta: 3.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 13:09:20,094 INFO L158 Benchmark]: Boogie Preprocessor took 52.81ms. Allocated memory is still 142.6MB. Free memory was 95.0MB in the beginning and 91.0MB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 13:09:20,094 INFO L158 Benchmark]: RCFGBuilder took 682.34ms. Allocated memory is still 142.6MB. Free memory was 91.0MB in the beginning and 110.3MB in the end (delta: -19.3MB). Peak memory consumption was 48.3MB. Max. memory is 16.1GB. [2024-12-02 13:09:20,094 INFO L158 Benchmark]: TraceAbstraction took 70478.30ms. Allocated memory was 142.6MB in the beginning and 2.9GB in the end (delta: 2.8GB). Free memory was 109.7MB in the beginning and 2.5GB in the end (delta: -2.4GB). Peak memory consumption was 352.7MB. Max. memory is 16.1GB. [2024-12-02 13:09:20,094 INFO L158 Benchmark]: Witness Printer took 215.48ms. Allocated memory is still 2.9GB. Free memory was 2.5GB in the beginning and 2.5GB in the end (delta: 42.0MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-12-02 13:09:20,095 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30ms. Allocated memory is still 142.6MB. Free memory is still 82.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 303.19ms. Allocated memory is still 142.6MB. Free memory was 116.5MB in the beginning and 98.5MB in the end (delta: 18.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 45.60ms. Allocated memory is still 142.6MB. Free memory was 98.3MB in the beginning and 95.0MB in the end (delta: 3.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 52.81ms. Allocated memory is still 142.6MB. Free memory was 95.0MB in the beginning and 91.0MB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 682.34ms. Allocated memory is still 142.6MB. Free memory was 91.0MB in the beginning and 110.3MB in the end (delta: -19.3MB). Peak memory consumption was 48.3MB. Max. memory is 16.1GB. * TraceAbstraction took 70478.30ms. Allocated memory was 142.6MB in the beginning and 2.9GB in the end (delta: 2.8GB). Free memory was 109.7MB in the beginning and 2.5GB in the end (delta: -2.4GB). Peak memory consumption was 352.7MB. Max. memory is 16.1GB. * Witness Printer took 215.48ms. Allocated memory is still 2.9GB. Free memory was 2.5GB in the beginning and 2.5GB in the end (delta: 42.0MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 611]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L555] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L555] RET, EXPR init() [L555] i2 = init() [L556] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L556] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L574] COND TRUE i2 < 10 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] RET Console_task_each_pals_period() [L577] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND TRUE \read(side1Failed) [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L577] RET Side1_activestandby_task_each_pals_period() [L578] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L578] RET Side2_activestandby_task_each_pals_period() [L579] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] RET write_active_side_history(active_side) [L579] RET Pendulum_prism_task_each_pals_period() [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L596] CALL, EXPR check() [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L447] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L447] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L448] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L448] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L450] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L450] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L452] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L452] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L478] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L478] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L494] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L496] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L510] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND FALSE !((int )index == 0) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=2, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L151] COND FALSE !((int )index == 1) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=2, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [\old(index)=2, \result=-2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L510] RET, EXPR read_active_side_history((unsigned char)2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L529] return (1); VAL [\result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L596] RET, EXPR check() [L596] c1 = check() [L597] CALL assert(c1) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L609] COND FALSE !(! arg) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L597] RET assert(c1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L598] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L574] COND TRUE i2 < 10 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] RET Console_task_each_pals_period() [L577] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L577] RET Side1_activestandby_task_each_pals_period() [L578] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND TRUE \read(side2Failed) [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L578] RET Side2_activestandby_task_each_pals_period() [L579] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L409] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L409] RET write_active_side_history(active_side) [L579] RET Pendulum_prism_task_each_pals_period() [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L596] CALL, EXPR check() [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L447] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L447] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L448] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, index=1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=-1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L448] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L478] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, index=1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L478] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L480] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, index=1, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L480] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L482] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L482] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [\result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L596] RET, EXPR check() [L596] c1 = check() [L597] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L609] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L611] reach_error() VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 180 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 70.3s, OverallIterations: 36, TraceHistogramMax: 5, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 34.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 12850 SdHoareTripleChecker+Valid, 10.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 12766 mSDsluCounter, 62141 SdHoareTripleChecker+Invalid, 8.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 50753 mSDsCounter, 3134 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 15876 IncrementalHoareTripleChecker+Invalid, 19010 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 3134 mSolverCounterUnsat, 11388 mSDtfsCounter, 15876 mSolverCounterSat, 0.3s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 3066 GetRequests, 2592 SyntacticMatches, 0 SemanticMatches, 474 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4404 ImplicationChecksByTransitivity, 6.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=15540occurred in iteration=35, InterpolantAutomatonStates: 369, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 15.9s AutomataMinimizationTime, 35 MinimizatonAttempts, 20437 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 1.7s SatisfiabilityAnalysisTime, 14.5s InterpolantComputationTime, 5065 NumberOfCodeBlocks, 5065 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 5975 ConstructedInterpolants, 0 QuantifiedInterpolants, 17630 SizeOfPredicates, 30 NumberOfNonLiveVariables, 6699 ConjunctsInSsa, 244 ConjunctsInUnsatCore, 51 InterpolantComputations, 28 PerfectInterpolantSequences, 2144/2391 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-12-02 13:09:20,116 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_063a527e-0f49-4065-886b-8433f10e5380/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE