./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash cdd691469d2e12c2dd1871c48be4dd2db0b9d27541ac5dee5ff25a04db0d98eb --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 12:44:15,176 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 12:44:15,231 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-12-02 12:44:15,235 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 12:44:15,236 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 12:44:15,255 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 12:44:15,256 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 12:44:15,256 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 12:44:15,256 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 12:44:15,257 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 12:44:15,257 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 12:44:15,257 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 12:44:15,257 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 12:44:15,257 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 12:44:15,257 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 12:44:15,258 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 12:44:15,258 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 12:44:15,258 INFO L153 SettingsManager]: * sizeof long=4 [2024-12-02 12:44:15,258 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 12:44:15,258 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-12-02 12:44:15,258 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 12:44:15,258 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 12:44:15,258 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 12:44:15,258 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 12:44:15,259 INFO L153 SettingsManager]: * sizeof long double=12 [2024-12-02 12:44:15,259 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 12:44:15,259 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 12:44:15,259 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 12:44:15,259 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 12:44:15,259 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 12:44:15,259 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 12:44:15,259 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 12:44:15,259 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 12:44:15,260 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 12:44:15,260 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 12:44:15,260 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 12:44:15,260 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 12:44:15,260 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 12:44:15,260 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 12:44:15,260 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 12:44:15,260 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 12:44:15,260 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 12:44:15,260 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 12:44:15,261 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 12:44:15,261 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 12:44:15,261 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 12:44:15,261 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 12:44:15,261 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 12:44:15,261 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cdd691469d2e12c2dd1871c48be4dd2db0b9d27541ac5dee5ff25a04db0d98eb [2024-12-02 12:44:15,463 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 12:44:15,470 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 12:44:15,472 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 12:44:15,473 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 12:44:15,473 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 12:44:15,474 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2024-12-02 12:44:18,128 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/data/7728a0757/9a1fffd5ec8a4335a1b66dd2323943f1/FLAGe020e33af [2024-12-02 12:44:18,339 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 12:44:18,340 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2024-12-02 12:44:18,348 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/data/7728a0757/9a1fffd5ec8a4335a1b66dd2323943f1/FLAGe020e33af [2024-12-02 12:44:18,361 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/data/7728a0757/9a1fffd5ec8a4335a1b66dd2323943f1 [2024-12-02 12:44:18,363 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 12:44:18,365 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 12:44:18,366 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 12:44:18,366 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 12:44:18,370 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 12:44:18,371 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,372 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@278e3d2d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18, skipping insertion in model container [2024-12-02 12:44:18,372 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,396 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 12:44:18,591 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2024-12-02 12:44:18,594 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 12:44:18,602 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 12:44:18,655 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2024-12-02 12:44:18,655 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 12:44:18,671 INFO L204 MainTranslator]: Completed translation [2024-12-02 12:44:18,671 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18 WrapperNode [2024-12-02 12:44:18,672 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 12:44:18,673 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 12:44:18,673 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 12:44:18,673 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 12:44:18,679 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,690 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,719 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 509 [2024-12-02 12:44:18,720 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 12:44:18,720 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 12:44:18,720 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 12:44:18,720 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 12:44:18,730 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,730 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,734 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,750 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 12:44:18,750 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,750 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,761 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,762 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,767 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,769 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,771 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,775 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 12:44:18,776 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 12:44:18,776 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 12:44:18,776 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 12:44:18,777 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (1/1) ... [2024-12-02 12:44:18,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 12:44:18,794 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:44:18,805 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 12:44:18,808 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 12:44:18,830 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2024-12-02 12:44:18,830 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2024-12-02 12:44:18,830 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 12:44:18,830 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2024-12-02 12:44:18,830 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2024-12-02 12:44:18,830 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2024-12-02 12:44:18,830 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2024-12-02 12:44:18,830 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2024-12-02 12:44:18,830 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2024-12-02 12:44:18,830 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 12:44:18,831 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 12:44:18,831 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 12:44:18,831 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2024-12-02 12:44:18,831 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2024-12-02 12:44:18,831 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 12:44:18,831 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 12:44:18,831 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2024-12-02 12:44:18,831 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2024-12-02 12:44:18,926 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 12:44:18,928 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 12:44:19,438 INFO L? ?]: Removed 115 outVars from TransFormulas that were not future-live. [2024-12-02 12:44:19,439 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 12:44:19,451 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 12:44:19,452 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 12:44:19,452 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 12:44:19 BoogieIcfgContainer [2024-12-02 12:44:19,452 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 12:44:19,454 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 12:44:19,454 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 12:44:19,459 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 12:44:19,459 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 12:44:18" (1/3) ... [2024-12-02 12:44:19,460 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@13792a85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 12:44:19, skipping insertion in model container [2024-12-02 12:44:19,460 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:44:18" (2/3) ... [2024-12-02 12:44:19,460 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@13792a85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 12:44:19, skipping insertion in model container [2024-12-02 12:44:19,460 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 12:44:19" (3/3) ... [2024-12-02 12:44:19,461 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2024-12-02 12:44:19,476 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 12:44:19,479 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c that has 8 procedures, 182 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 12:44:19,526 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 12:44:19,536 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7df2e5ac, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 12:44:19,536 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 12:44:19,540 INFO L276 IsEmpty]: Start isEmpty. Operand has 182 states, 142 states have (on average 1.5492957746478873) internal successors, (220), 143 states have internal predecessors, (220), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 12:44:19,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2024-12-02 12:44:19,545 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:19,546 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:19,546 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:19,550 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:19,550 INFO L85 PathProgramCache]: Analyzing trace with hash 1322673909, now seen corresponding path program 1 times [2024-12-02 12:44:19,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:19,556 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601494476] [2024-12-02 12:44:19,556 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:19,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:19,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:19,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-02 12:44:19,774 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:19,774 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601494476] [2024-12-02 12:44:19,775 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1601494476] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:19,775 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:19,775 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-12-02 12:44:19,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879925882] [2024-12-02 12:44:19,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:19,781 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 12:44:19,781 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:19,798 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 12:44:19,799 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 12:44:19,801 INFO L87 Difference]: Start difference. First operand has 182 states, 142 states have (on average 1.5492957746478873) internal successors, (220), 143 states have internal predecessors, (220), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 12.5) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 12:44:19,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:19,839 INFO L93 Difference]: Finished difference Result 348 states and 564 transitions. [2024-12-02 12:44:19,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 12:44:19,841 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 12.5) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2024-12-02 12:44:19,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:19,848 INFO L225 Difference]: With dead ends: 348 [2024-12-02 12:44:19,848 INFO L226 Difference]: Without dead ends: 178 [2024-12-02 12:44:19,851 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 12:44:19,854 INFO L435 NwaCegarLoop]: 279 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:19,855 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 279 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:19,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2024-12-02 12:44:19,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2024-12-02 12:44:19,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 178 states, 139 states have (on average 1.5323741007194245) internal successors, (213), 139 states have internal predecessors, (213), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 12:44:19,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 275 transitions. [2024-12-02 12:44:19,899 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 275 transitions. Word has length 29 [2024-12-02 12:44:19,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:19,899 INFO L471 AbstractCegarLoop]: Abstraction has 178 states and 275 transitions. [2024-12-02 12:44:19,900 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 12.5) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 12:44:19,900 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 275 transitions. [2024-12-02 12:44:19,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2024-12-02 12:44:19,901 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:19,902 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:19,902 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-12-02 12:44:19,902 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:19,902 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:19,903 INFO L85 PathProgramCache]: Analyzing trace with hash -482764425, now seen corresponding path program 1 times [2024-12-02 12:44:19,903 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:19,903 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564113140] [2024-12-02 12:44:19,903 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:19,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:19,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:20,135 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-02 12:44:20,135 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:20,135 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564113140] [2024-12-02 12:44:20,135 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564113140] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:20,136 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:20,136 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 12:44:20,136 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1045259758] [2024-12-02 12:44:20,136 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:20,137 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 12:44:20,137 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:20,137 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 12:44:20,137 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 12:44:20,138 INFO L87 Difference]: Start difference. First operand 178 states and 275 transitions. Second operand has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 12:44:20,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:20,258 INFO L93 Difference]: Finished difference Result 456 states and 712 transitions. [2024-12-02 12:44:20,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 12:44:20,259 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2024-12-02 12:44:20,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:20,261 INFO L225 Difference]: With dead ends: 456 [2024-12-02 12:44:20,261 INFO L226 Difference]: Without dead ends: 292 [2024-12-02 12:44:20,263 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 12:44:20,263 INFO L435 NwaCegarLoop]: 269 mSDtfsCounter, 135 mSDsluCounter, 1053 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 161 SdHoareTripleChecker+Valid, 1322 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:20,264 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [161 Valid, 1322 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:20,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2024-12-02 12:44:20,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 178. [2024-12-02 12:44:20,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 178 states, 139 states have (on average 1.4460431654676258) internal successors, (201), 139 states have internal predecessors, (201), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 12:44:20,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 263 transitions. [2024-12-02 12:44:20,282 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 263 transitions. Word has length 29 [2024-12-02 12:44:20,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:20,283 INFO L471 AbstractCegarLoop]: Abstraction has 178 states and 263 transitions. [2024-12-02 12:44:20,283 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 12:44:20,283 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 263 transitions. [2024-12-02 12:44:20,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2024-12-02 12:44:20,284 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:20,284 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:20,284 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 12:44:20,284 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:20,285 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:20,285 INFO L85 PathProgramCache]: Analyzing trace with hash -757328526, now seen corresponding path program 1 times [2024-12-02 12:44:20,285 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:20,285 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632421731] [2024-12-02 12:44:20,285 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:20,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:20,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:20,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-02 12:44:20,505 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:20,505 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632421731] [2024-12-02 12:44:20,505 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [632421731] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:20,505 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:20,505 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:20,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027524611] [2024-12-02 12:44:20,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:20,506 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:20,506 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:20,507 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:20,507 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:20,507 INFO L87 Difference]: Start difference. First operand 178 states and 263 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 3 states have internal predecessors, (36), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 12:44:20,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:20,582 INFO L93 Difference]: Finished difference Result 343 states and 516 transitions. [2024-12-02 12:44:20,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:20,583 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 3 states have internal predecessors, (36), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 40 [2024-12-02 12:44:20,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:20,585 INFO L225 Difference]: With dead ends: 343 [2024-12-02 12:44:20,585 INFO L226 Difference]: Without dead ends: 182 [2024-12-02 12:44:20,586 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:20,586 INFO L435 NwaCegarLoop]: 257 mSDtfsCounter, 3 mSDsluCounter, 504 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 761 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:20,587 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 761 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:20,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2024-12-02 12:44:20,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2024-12-02 12:44:20,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 182 states, 142 states have (on average 1.4366197183098592) internal successors, (204), 142 states have internal predecessors, (204), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 12:44:20,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 266 transitions. [2024-12-02 12:44:20,600 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 266 transitions. Word has length 40 [2024-12-02 12:44:20,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:20,600 INFO L471 AbstractCegarLoop]: Abstraction has 182 states and 266 transitions. [2024-12-02 12:44:20,600 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 3 states have internal predecessors, (36), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 12:44:20,601 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 266 transitions. [2024-12-02 12:44:20,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-12-02 12:44:20,602 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:20,602 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:20,602 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 12:44:20,602 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:20,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:20,603 INFO L85 PathProgramCache]: Analyzing trace with hash 958748420, now seen corresponding path program 1 times [2024-12-02 12:44:20,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:20,603 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136982971] [2024-12-02 12:44:20,603 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:20,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:20,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:20,692 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 12:44:20,692 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:20,692 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1136982971] [2024-12-02 12:44:20,692 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1136982971] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:20,692 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:20,693 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 12:44:20,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [545160549] [2024-12-02 12:44:20,693 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:20,693 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 12:44:20,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:20,694 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 12:44:20,694 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 12:44:20,694 INFO L87 Difference]: Start difference. First operand 182 states and 266 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:20,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:20,735 INFO L93 Difference]: Finished difference Result 500 states and 741 transitions. [2024-12-02 12:44:20,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 12:44:20,735 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2024-12-02 12:44:20,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:20,738 INFO L225 Difference]: With dead ends: 500 [2024-12-02 12:44:20,738 INFO L226 Difference]: Without dead ends: 335 [2024-12-02 12:44:20,739 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 12:44:20,740 INFO L435 NwaCegarLoop]: 274 mSDtfsCounter, 214 mSDsluCounter, 254 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 214 SdHoareTripleChecker+Valid, 528 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:20,740 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [214 Valid, 528 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:20,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335 states. [2024-12-02 12:44:20,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335 to 328. [2024-12-02 12:44:20,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 328 states, 251 states have (on average 1.4581673306772909) internal successors, (366), 252 states have internal predecessors, (366), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2024-12-02 12:44:20,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 486 transitions. [2024-12-02 12:44:20,768 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 486 transitions. Word has length 56 [2024-12-02 12:44:20,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:20,768 INFO L471 AbstractCegarLoop]: Abstraction has 328 states and 486 transitions. [2024-12-02 12:44:20,768 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:20,768 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 486 transitions. [2024-12-02 12:44:20,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2024-12-02 12:44:20,770 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:20,770 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:20,770 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 12:44:20,770 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:20,770 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:20,770 INFO L85 PathProgramCache]: Analyzing trace with hash -261203095, now seen corresponding path program 1 times [2024-12-02 12:44:20,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:20,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [756266750] [2024-12-02 12:44:20,771 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:20,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:20,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:20,850 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 12:44:20,851 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:20,851 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [756266750] [2024-12-02 12:44:20,851 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [756266750] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:20,851 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:20,851 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 12:44:20,851 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [3919918] [2024-12-02 12:44:20,851 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:20,851 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 12:44:20,851 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:20,852 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 12:44:20,852 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 12:44:20,852 INFO L87 Difference]: Start difference. First operand 328 states and 486 transitions. Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:20,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:20,909 INFO L93 Difference]: Finished difference Result 923 states and 1379 transitions. [2024-12-02 12:44:20,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 12:44:20,910 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2024-12-02 12:44:20,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:20,915 INFO L225 Difference]: With dead ends: 923 [2024-12-02 12:44:20,915 INFO L226 Difference]: Without dead ends: 612 [2024-12-02 12:44:20,916 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 12:44:20,917 INFO L435 NwaCegarLoop]: 294 mSDtfsCounter, 216 mSDsluCounter, 256 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 216 SdHoareTripleChecker+Valid, 550 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:20,917 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [216 Valid, 550 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:20,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 612 states. [2024-12-02 12:44:20,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 612 to 606. [2024-12-02 12:44:20,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 606 states, 457 states have (on average 1.4682713347921226) internal successors, (671), 460 states have internal predecessors, (671), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2024-12-02 12:44:20,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 905 transitions. [2024-12-02 12:44:20,974 INFO L78 Accepts]: Start accepts. Automaton has 606 states and 905 transitions. Word has length 57 [2024-12-02 12:44:20,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:20,975 INFO L471 AbstractCegarLoop]: Abstraction has 606 states and 905 transitions. [2024-12-02 12:44:20,975 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:20,975 INFO L276 IsEmpty]: Start isEmpty. Operand 606 states and 905 transitions. [2024-12-02 12:44:20,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2024-12-02 12:44:20,976 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:20,976 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:20,977 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 12:44:20,977 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:20,977 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:20,977 INFO L85 PathProgramCache]: Analyzing trace with hash -1541066773, now seen corresponding path program 1 times [2024-12-02 12:44:20,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:20,977 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033515668] [2024-12-02 12:44:20,977 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:20,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:21,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:21,148 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 12:44:21,148 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:21,148 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033515668] [2024-12-02 12:44:21,149 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1033515668] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:21,149 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:21,149 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 12:44:21,149 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1724786994] [2024-12-02 12:44:21,149 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:21,149 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 12:44:21,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:21,150 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 12:44:21,150 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:21,150 INFO L87 Difference]: Start difference. First operand 606 states and 905 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:21,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:21,376 INFO L93 Difference]: Finished difference Result 1300 states and 1937 transitions. [2024-12-02 12:44:21,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 12:44:21,377 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2024-12-02 12:44:21,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:21,382 INFO L225 Difference]: With dead ends: 1300 [2024-12-02 12:44:21,382 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 12:44:21,384 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:44:21,385 INFO L435 NwaCegarLoop]: 229 mSDtfsCounter, 371 mSDsluCounter, 446 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 371 SdHoareTripleChecker+Valid, 675 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:21,386 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [371 Valid, 675 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:21,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 12:44:21,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 695. [2024-12-02 12:44:21,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 695 states, 533 states have (on average 1.452157598499062) internal successors, (774), 536 states have internal predecessors, (774), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 12:44:21,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 695 states to 695 states and 1022 transitions. [2024-12-02 12:44:21,465 INFO L78 Accepts]: Start accepts. Automaton has 695 states and 1022 transitions. Word has length 57 [2024-12-02 12:44:21,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:21,465 INFO L471 AbstractCegarLoop]: Abstraction has 695 states and 1022 transitions. [2024-12-02 12:44:21,465 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:21,465 INFO L276 IsEmpty]: Start isEmpty. Operand 695 states and 1022 transitions. [2024-12-02 12:44:21,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2024-12-02 12:44:21,466 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:21,467 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:21,467 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 12:44:21,467 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:21,467 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:21,467 INFO L85 PathProgramCache]: Analyzing trace with hash 1635374083, now seen corresponding path program 1 times [2024-12-02 12:44:21,467 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:21,467 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957916229] [2024-12-02 12:44:21,468 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:21,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:21,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:21,632 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 12:44:21,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:21,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1957916229] [2024-12-02 12:44:21,632 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1957916229] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:21,632 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:21,632 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 12:44:21,632 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122816376] [2024-12-02 12:44:21,632 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:21,633 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 12:44:21,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:21,633 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 12:44:21,633 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:21,634 INFO L87 Difference]: Start difference. First operand 695 states and 1022 transitions. Second operand has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:21,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:21,849 INFO L93 Difference]: Finished difference Result 1304 states and 1937 transitions. [2024-12-02 12:44:21,849 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 12:44:21,849 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 58 [2024-12-02 12:44:21,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:21,855 INFO L225 Difference]: With dead ends: 1304 [2024-12-02 12:44:21,855 INFO L226 Difference]: Without dead ends: 715 [2024-12-02 12:44:21,857 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:44:21,858 INFO L435 NwaCegarLoop]: 229 mSDtfsCounter, 371 mSDsluCounter, 446 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 371 SdHoareTripleChecker+Valid, 675 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:21,858 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [371 Valid, 675 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:21,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2024-12-02 12:44:21,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 703. [2024-12-02 12:44:21,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 703 states, 541 states have (on average 1.44547134935305) internal successors, (782), 544 states have internal predecessors, (782), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 12:44:21,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 703 states to 703 states and 1030 transitions. [2024-12-02 12:44:21,935 INFO L78 Accepts]: Start accepts. Automaton has 703 states and 1030 transitions. Word has length 58 [2024-12-02 12:44:21,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:21,936 INFO L471 AbstractCegarLoop]: Abstraction has 703 states and 1030 transitions. [2024-12-02 12:44:21,936 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:21,936 INFO L276 IsEmpty]: Start isEmpty. Operand 703 states and 1030 transitions. [2024-12-02 12:44:21,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2024-12-02 12:44:21,937 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:21,937 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:21,937 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 12:44:21,937 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:21,938 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:21,938 INFO L85 PathProgramCache]: Analyzing trace with hash 852896981, now seen corresponding path program 1 times [2024-12-02 12:44:21,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:21,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127456058] [2024-12-02 12:44:21,938 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:21,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:21,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:22,110 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 12:44:22,110 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:22,110 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127456058] [2024-12-02 12:44:22,110 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [127456058] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:22,111 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:22,111 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:22,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1711489882] [2024-12-02 12:44:22,111 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:22,111 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:22,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:22,112 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:22,112 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:22,112 INFO L87 Difference]: Start difference. First operand 703 states and 1030 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:22,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:22,297 INFO L93 Difference]: Finished difference Result 1292 states and 1917 transitions. [2024-12-02 12:44:22,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:22,298 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 60 [2024-12-02 12:44:22,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:22,303 INFO L225 Difference]: With dead ends: 1292 [2024-12-02 12:44:22,303 INFO L226 Difference]: Without dead ends: 703 [2024-12-02 12:44:22,306 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:22,306 INFO L435 NwaCegarLoop]: 230 mSDtfsCounter, 61 mSDsluCounter, 439 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 669 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:22,306 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [61 Valid, 669 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:22,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 703 states. [2024-12-02 12:44:22,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 703 to 703. [2024-12-02 12:44:22,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 703 states, 541 states have (on average 1.4380776340110906) internal successors, (778), 544 states have internal predecessors, (778), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 12:44:22,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 703 states to 703 states and 1026 transitions. [2024-12-02 12:44:22,375 INFO L78 Accepts]: Start accepts. Automaton has 703 states and 1026 transitions. Word has length 60 [2024-12-02 12:44:22,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:22,376 INFO L471 AbstractCegarLoop]: Abstraction has 703 states and 1026 transitions. [2024-12-02 12:44:22,376 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 12:44:22,376 INFO L276 IsEmpty]: Start isEmpty. Operand 703 states and 1026 transitions. [2024-12-02 12:44:22,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2024-12-02 12:44:22,377 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:22,377 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:22,377 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 12:44:22,377 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:22,378 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:22,378 INFO L85 PathProgramCache]: Analyzing trace with hash 316098937, now seen corresponding path program 1 times [2024-12-02 12:44:22,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:22,378 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695519358] [2024-12-02 12:44:22,378 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:22,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:22,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:22,553 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 12:44:22,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:22,553 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1695519358] [2024-12-02 12:44:22,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1695519358] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:22,553 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:22,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:22,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [792963783] [2024-12-02 12:44:22,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:22,554 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:22,554 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:22,555 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:22,555 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:22,555 INFO L87 Difference]: Start difference. First operand 703 states and 1026 transitions. Second operand has 4 states, 4 states have (on average 12.5) internal successors, (50), 3 states have internal predecessors, (50), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 12:44:22,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:22,624 INFO L93 Difference]: Finished difference Result 1312 states and 1941 transitions. [2024-12-02 12:44:22,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:22,625 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.5) internal successors, (50), 3 states have internal predecessors, (50), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 61 [2024-12-02 12:44:22,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:22,629 INFO L225 Difference]: With dead ends: 1312 [2024-12-02 12:44:22,629 INFO L226 Difference]: Without dead ends: 723 [2024-12-02 12:44:22,631 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:22,632 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 4 mSDsluCounter, 514 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 773 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:22,632 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 773 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:22,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 723 states. [2024-12-02 12:44:22,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 723 to 723. [2024-12-02 12:44:22,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 723 states, 557 states have (on average 1.4254937163375225) internal successors, (794), 560 states have internal predecessors, (794), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 12:44:22,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 723 states to 723 states and 1042 transitions. [2024-12-02 12:44:22,682 INFO L78 Accepts]: Start accepts. Automaton has 723 states and 1042 transitions. Word has length 61 [2024-12-02 12:44:22,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:22,682 INFO L471 AbstractCegarLoop]: Abstraction has 723 states and 1042 transitions. [2024-12-02 12:44:22,682 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.5) internal successors, (50), 3 states have internal predecessors, (50), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 12:44:22,682 INFO L276 IsEmpty]: Start isEmpty. Operand 723 states and 1042 transitions. [2024-12-02 12:44:22,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-12-02 12:44:22,683 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:22,684 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:22,684 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 12:44:22,684 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:22,684 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:22,684 INFO L85 PathProgramCache]: Analyzing trace with hash -1317892801, now seen corresponding path program 1 times [2024-12-02 12:44:22,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:22,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [131174059] [2024-12-02 12:44:22,684 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:22,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:22,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:22,860 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 12:44:22,861 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:22,861 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [131174059] [2024-12-02 12:44:22,861 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [131174059] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:22,861 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:22,861 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:22,861 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430242952] [2024-12-02 12:44:22,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:22,861 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:22,861 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:22,862 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:22,862 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:22,862 INFO L87 Difference]: Start difference. First operand 723 states and 1042 transitions. Second operand has 4 states, 4 states have (on average 14.0) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-12-02 12:44:22,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:22,944 INFO L93 Difference]: Finished difference Result 1352 states and 1985 transitions. [2024-12-02 12:44:22,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:22,945 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.0) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 69 [2024-12-02 12:44:22,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:22,950 INFO L225 Difference]: With dead ends: 1352 [2024-12-02 12:44:22,950 INFO L226 Difference]: Without dead ends: 743 [2024-12-02 12:44:22,952 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:22,952 INFO L435 NwaCegarLoop]: 256 mSDtfsCounter, 4 mSDsluCounter, 503 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 759 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:22,953 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 759 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:22,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 743 states. [2024-12-02 12:44:22,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 743 to 743. [2024-12-02 12:44:22,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 743 states, 573 states have (on average 1.4136125654450262) internal successors, (810), 576 states have internal predecessors, (810), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 12:44:23,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 743 states to 743 states and 1058 transitions. [2024-12-02 12:44:23,002 INFO L78 Accepts]: Start accepts. Automaton has 743 states and 1058 transitions. Word has length 69 [2024-12-02 12:44:23,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:23,003 INFO L471 AbstractCegarLoop]: Abstraction has 743 states and 1058 transitions. [2024-12-02 12:44:23,003 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.0) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-12-02 12:44:23,003 INFO L276 IsEmpty]: Start isEmpty. Operand 743 states and 1058 transitions. [2024-12-02 12:44:23,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2024-12-02 12:44:23,004 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:23,004 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:23,004 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 12:44:23,005 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:23,005 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:23,005 INFO L85 PathProgramCache]: Analyzing trace with hash -501943895, now seen corresponding path program 1 times [2024-12-02 12:44:23,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:23,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146452957] [2024-12-02 12:44:23,005 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:23,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:23,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:23,172 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 12:44:23,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:23,172 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146452957] [2024-12-02 12:44:23,172 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2146452957] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:23,172 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:23,173 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:23,173 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399016926] [2024-12-02 12:44:23,173 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:23,173 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:23,173 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:23,173 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:23,173 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:23,174 INFO L87 Difference]: Start difference. First operand 743 states and 1058 transitions. Second operand has 4 states, 4 states have (on average 15.5) internal successors, (62), 3 states have internal predecessors, (62), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 12:44:23,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:23,247 INFO L93 Difference]: Finished difference Result 1388 states and 2001 transitions. [2024-12-02 12:44:23,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:23,248 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.5) internal successors, (62), 3 states have internal predecessors, (62), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 77 [2024-12-02 12:44:23,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:23,253 INFO L225 Difference]: With dead ends: 1388 [2024-12-02 12:44:23,253 INFO L226 Difference]: Without dead ends: 759 [2024-12-02 12:44:23,255 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:23,255 INFO L435 NwaCegarLoop]: 261 mSDtfsCounter, 3 mSDsluCounter, 508 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 769 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:23,255 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 769 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:23,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 759 states. [2024-12-02 12:44:23,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 759 to 759. [2024-12-02 12:44:23,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 759 states, 585 states have (on average 1.405128205128205) internal successors, (822), 588 states have internal predecessors, (822), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 12:44:23,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 759 states to 759 states and 1070 transitions. [2024-12-02 12:44:23,310 INFO L78 Accepts]: Start accepts. Automaton has 759 states and 1070 transitions. Word has length 77 [2024-12-02 12:44:23,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:23,310 INFO L471 AbstractCegarLoop]: Abstraction has 759 states and 1070 transitions. [2024-12-02 12:44:23,311 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.5) internal successors, (62), 3 states have internal predecessors, (62), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 12:44:23,311 INFO L276 IsEmpty]: Start isEmpty. Operand 759 states and 1070 transitions. [2024-12-02 12:44:23,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2024-12-02 12:44:23,312 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:23,312 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:23,312 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 12:44:23,313 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:23,313 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:23,313 INFO L85 PathProgramCache]: Analyzing trace with hash 1894515408, now seen corresponding path program 1 times [2024-12-02 12:44:23,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:23,313 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985714582] [2024-12-02 12:44:23,313 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:23,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:23,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:23,481 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 12:44:23,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:23,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985714582] [2024-12-02 12:44:23,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1985714582] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:23,481 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:23,481 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:23,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1210268258] [2024-12-02 12:44:23,481 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:23,482 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:23,482 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:23,482 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:23,482 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:23,482 INFO L87 Difference]: Start difference. First operand 759 states and 1070 transitions. Second operand has 4 states, 4 states have (on average 15.5) internal successors, (62), 3 states have internal predecessors, (62), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 12:44:23,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:23,570 INFO L93 Difference]: Finished difference Result 1424 states and 2041 transitions. [2024-12-02 12:44:23,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:23,570 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.5) internal successors, (62), 3 states have internal predecessors, (62), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 77 [2024-12-02 12:44:23,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:23,575 INFO L225 Difference]: With dead ends: 1424 [2024-12-02 12:44:23,576 INFO L226 Difference]: Without dead ends: 779 [2024-12-02 12:44:23,577 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:23,578 INFO L435 NwaCegarLoop]: 256 mSDtfsCounter, 4 mSDsluCounter, 503 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 759 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:23,578 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 759 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:23,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 779 states. [2024-12-02 12:44:23,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 779 to 779. [2024-12-02 12:44:23,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 779 states, 601 states have (on average 1.394342762063228) internal successors, (838), 604 states have internal predecessors, (838), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 12:44:23,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 779 states to 779 states and 1086 transitions. [2024-12-02 12:44:23,627 INFO L78 Accepts]: Start accepts. Automaton has 779 states and 1086 transitions. Word has length 77 [2024-12-02 12:44:23,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:23,627 INFO L471 AbstractCegarLoop]: Abstraction has 779 states and 1086 transitions. [2024-12-02 12:44:23,627 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.5) internal successors, (62), 3 states have internal predecessors, (62), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 12:44:23,627 INFO L276 IsEmpty]: Start isEmpty. Operand 779 states and 1086 transitions. [2024-12-02 12:44:23,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2024-12-02 12:44:23,629 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:23,629 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:23,629 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 12:44:23,630 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:23,630 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:23,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1393000016, now seen corresponding path program 1 times [2024-12-02 12:44:23,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:23,630 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300148177] [2024-12-02 12:44:23,630 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:23,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:23,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:23,846 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 12:44:23,846 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:23,846 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300148177] [2024-12-02 12:44:23,846 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1300148177] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:23,846 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:23,846 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:23,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1350127925] [2024-12-02 12:44:23,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:23,846 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:23,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:23,847 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:23,847 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:23,847 INFO L87 Difference]: Start difference. First operand 779 states and 1086 transitions. Second operand has 4 states, 4 states have (on average 16.0) internal successors, (64), 3 states have internal predecessors, (64), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-12-02 12:44:23,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:23,924 INFO L93 Difference]: Finished difference Result 1468 states and 2069 transitions. [2024-12-02 12:44:23,924 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:23,924 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 16.0) internal successors, (64), 3 states have internal predecessors, (64), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 85 [2024-12-02 12:44:23,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:23,929 INFO L225 Difference]: With dead ends: 1468 [2024-12-02 12:44:23,929 INFO L226 Difference]: Without dead ends: 803 [2024-12-02 12:44:23,931 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:23,931 INFO L435 NwaCegarLoop]: 260 mSDtfsCounter, 5 mSDsluCounter, 511 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 771 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:23,932 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 771 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:23,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 803 states. [2024-12-02 12:44:23,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 803 to 803. [2024-12-02 12:44:23,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 803 states, 621 states have (on average 1.3816425120772946) internal successors, (858), 624 states have internal predecessors, (858), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 12:44:23,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 803 states to 803 states and 1106 transitions. [2024-12-02 12:44:23,983 INFO L78 Accepts]: Start accepts. Automaton has 803 states and 1106 transitions. Word has length 85 [2024-12-02 12:44:23,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:23,983 INFO L471 AbstractCegarLoop]: Abstraction has 803 states and 1106 transitions. [2024-12-02 12:44:23,983 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 16.0) internal successors, (64), 3 states have internal predecessors, (64), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-12-02 12:44:23,983 INFO L276 IsEmpty]: Start isEmpty. Operand 803 states and 1106 transitions. [2024-12-02 12:44:23,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2024-12-02 12:44:23,985 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:23,985 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:23,986 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 12:44:23,986 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:23,986 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:23,986 INFO L85 PathProgramCache]: Analyzing trace with hash -557210378, now seen corresponding path program 1 times [2024-12-02 12:44:23,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:23,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2036641043] [2024-12-02 12:44:23,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:23,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:24,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:24,540 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 12:44:24,540 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:24,540 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2036641043] [2024-12-02 12:44:24,540 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2036641043] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:24,540 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:24,540 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 12:44:24,540 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [529680919] [2024-12-02 12:44:24,540 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:24,541 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 12:44:24,541 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:24,541 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 12:44:24,541 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:44:24,542 INFO L87 Difference]: Start difference. First operand 803 states and 1106 transitions. Second operand has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-12-02 12:44:24,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:24,807 INFO L93 Difference]: Finished difference Result 2066 states and 2836 transitions. [2024-12-02 12:44:24,808 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 12:44:24,808 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 88 [2024-12-02 12:44:24,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:24,813 INFO L225 Difference]: With dead ends: 2066 [2024-12-02 12:44:24,814 INFO L226 Difference]: Without dead ends: 1377 [2024-12-02 12:44:24,815 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 12:44:24,815 INFO L435 NwaCegarLoop]: 260 mSDtfsCounter, 212 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 216 SdHoareTripleChecker+Valid, 1455 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:24,816 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [216 Valid, 1455 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:24,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1377 states. [2024-12-02 12:44:24,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1377 to 1087. [2024-12-02 12:44:24,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1087 states, 832 states have (on average 1.3701923076923077) internal successors, (1140), 837 states have internal predecessors, (1140), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 12:44:24,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1087 states to 1087 states and 1484 transitions. [2024-12-02 12:44:24,868 INFO L78 Accepts]: Start accepts. Automaton has 1087 states and 1484 transitions. Word has length 88 [2024-12-02 12:44:24,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:24,868 INFO L471 AbstractCegarLoop]: Abstraction has 1087 states and 1484 transitions. [2024-12-02 12:44:24,869 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-12-02 12:44:24,869 INFO L276 IsEmpty]: Start isEmpty. Operand 1087 states and 1484 transitions. [2024-12-02 12:44:24,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2024-12-02 12:44:24,870 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:24,870 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:24,870 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 12:44:24,870 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:24,870 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:24,871 INFO L85 PathProgramCache]: Analyzing trace with hash 67909963, now seen corresponding path program 1 times [2024-12-02 12:44:24,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:24,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [268033978] [2024-12-02 12:44:24,871 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:24,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:24,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:24,979 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 12:44:24,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:24,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [268033978] [2024-12-02 12:44:24,979 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [268033978] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:24,979 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:24,979 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:24,979 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1877847008] [2024-12-02 12:44:24,979 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:24,980 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:24,980 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:24,980 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:24,980 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:24,980 INFO L87 Difference]: Start difference. First operand 1087 states and 1484 transitions. Second operand has 4 states, 4 states have (on average 17.75) internal successors, (71), 3 states have internal predecessors, (71), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 12:44:25,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:25,074 INFO L93 Difference]: Finished difference Result 2016 states and 2777 transitions. [2024-12-02 12:44:25,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:25,075 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.75) internal successors, (71), 3 states have internal predecessors, (71), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 92 [2024-12-02 12:44:25,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:25,081 INFO L225 Difference]: With dead ends: 2016 [2024-12-02 12:44:25,082 INFO L226 Difference]: Without dead ends: 1111 [2024-12-02 12:44:25,084 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:25,084 INFO L435 NwaCegarLoop]: 261 mSDtfsCounter, 3 mSDsluCounter, 508 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 769 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:25,084 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 769 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:25,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1111 states. [2024-12-02 12:44:25,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1111 to 1111. [2024-12-02 12:44:25,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1111 states, 850 states have (on average 1.3623529411764705) internal successors, (1158), 855 states have internal predecessors, (1158), 172 states have call successors, (172), 88 states have call predecessors, (172), 88 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 12:44:25,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1111 states to 1111 states and 1502 transitions. [2024-12-02 12:44:25,157 INFO L78 Accepts]: Start accepts. Automaton has 1111 states and 1502 transitions. Word has length 92 [2024-12-02 12:44:25,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:25,157 INFO L471 AbstractCegarLoop]: Abstraction has 1111 states and 1502 transitions. [2024-12-02 12:44:25,158 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.75) internal successors, (71), 3 states have internal predecessors, (71), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 12:44:25,158 INFO L276 IsEmpty]: Start isEmpty. Operand 1111 states and 1502 transitions. [2024-12-02 12:44:25,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2024-12-02 12:44:25,159 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:25,159 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:25,159 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-02 12:44:25,159 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:25,160 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:25,160 INFO L85 PathProgramCache]: Analyzing trace with hash -1748531319, now seen corresponding path program 1 times [2024-12-02 12:44:25,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:25,160 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [102054996] [2024-12-02 12:44:25,160 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:25,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:25,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:25,424 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-02 12:44:25,424 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:25,424 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [102054996] [2024-12-02 12:44:25,424 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [102054996] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:44:25,424 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [134196604] [2024-12-02 12:44:25,424 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:25,425 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:44:25,425 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:44:25,427 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:44:25,428 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 12:44:25,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:25,604 INFO L256 TraceCheckSpWp]: Trace formula consists of 478 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-12-02 12:44:25,609 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:44:25,715 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-12-02 12:44:25,716 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 12:44:25,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [134196604] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:25,716 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 12:44:25,716 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2024-12-02 12:44:25,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [437563953] [2024-12-02 12:44:25,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:25,716 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 12:44:25,716 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:25,717 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 12:44:25,717 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2024-12-02 12:44:25,717 INFO L87 Difference]: Start difference. First operand 1111 states and 1502 transitions. Second operand has 8 states, 7 states have (on average 9.571428571428571) internal successors, (67), 7 states have internal predecessors, (67), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 12:44:25,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:25,911 INFO L93 Difference]: Finished difference Result 2384 states and 3348 transitions. [2024-12-02 12:44:25,911 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-02 12:44:25,911 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 9.571428571428571) internal successors, (67), 7 states have internal predecessors, (67), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 91 [2024-12-02 12:44:25,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:25,917 INFO L225 Difference]: With dead ends: 2384 [2024-12-02 12:44:25,917 INFO L226 Difference]: Without dead ends: 1543 [2024-12-02 12:44:25,919 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2024-12-02 12:44:25,919 INFO L435 NwaCegarLoop]: 442 mSDtfsCounter, 141 mSDsluCounter, 2450 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 167 SdHoareTripleChecker+Valid, 2892 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:25,919 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [167 Valid, 2892 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:25,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1543 states. [2024-12-02 12:44:25,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1543 to 1119. [2024-12-02 12:44:25,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1119 states, 854 states have (on average 1.3536299765807962) internal successors, (1156), 861 states have internal predecessors, (1156), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2024-12-02 12:44:25,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1119 states to 1119 states and 1504 transitions. [2024-12-02 12:44:25,992 INFO L78 Accepts]: Start accepts. Automaton has 1119 states and 1504 transitions. Word has length 91 [2024-12-02 12:44:25,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:25,992 INFO L471 AbstractCegarLoop]: Abstraction has 1119 states and 1504 transitions. [2024-12-02 12:44:25,992 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 9.571428571428571) internal successors, (67), 7 states have internal predecessors, (67), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 12:44:25,993 INFO L276 IsEmpty]: Start isEmpty. Operand 1119 states and 1504 transitions. [2024-12-02 12:44:25,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-12-02 12:44:25,994 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:25,994 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:26,000 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 12:44:26,194 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2024-12-02 12:44:26,194 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:26,195 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:26,195 INFO L85 PathProgramCache]: Analyzing trace with hash -1775559546, now seen corresponding path program 1 times [2024-12-02 12:44:26,195 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:26,195 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1605866923] [2024-12-02 12:44:26,195 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:26,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:26,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:26,302 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-12-02 12:44:26,302 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:26,302 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1605866923] [2024-12-02 12:44:26,302 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1605866923] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:26,302 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:26,302 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 12:44:26,302 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843150195] [2024-12-02 12:44:26,302 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:26,302 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 12:44:26,303 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:26,303 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 12:44:26,303 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:44:26,303 INFO L87 Difference]: Start difference. First operand 1119 states and 1504 transitions. Second operand has 7 states, 7 states have (on average 10.0) internal successors, (70), 6 states have internal predecessors, (70), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-12-02 12:44:26,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:26,480 INFO L93 Difference]: Finished difference Result 2023 states and 2729 transitions. [2024-12-02 12:44:26,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 12:44:26,480 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.0) internal successors, (70), 6 states have internal predecessors, (70), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 94 [2024-12-02 12:44:26,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:26,485 INFO L225 Difference]: With dead ends: 2023 [2024-12-02 12:44:26,485 INFO L226 Difference]: Without dead ends: 1168 [2024-12-02 12:44:26,487 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 12:44:26,487 INFO L435 NwaCegarLoop]: 261 mSDtfsCounter, 258 mSDsluCounter, 1236 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 259 SdHoareTripleChecker+Valid, 1497 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:26,487 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [259 Valid, 1497 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:26,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1168 states. [2024-12-02 12:44:26,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1168 to 1126. [2024-12-02 12:44:26,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1126 states, 872 states have (on average 1.3451834862385321) internal successors, (1173), 884 states have internal predecessors, (1173), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2024-12-02 12:44:26,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1126 states to 1126 states and 1497 transitions. [2024-12-02 12:44:26,539 INFO L78 Accepts]: Start accepts. Automaton has 1126 states and 1497 transitions. Word has length 94 [2024-12-02 12:44:26,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:26,539 INFO L471 AbstractCegarLoop]: Abstraction has 1126 states and 1497 transitions. [2024-12-02 12:44:26,540 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.0) internal successors, (70), 6 states have internal predecessors, (70), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-12-02 12:44:26,540 INFO L276 IsEmpty]: Start isEmpty. Operand 1126 states and 1497 transitions. [2024-12-02 12:44:26,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2024-12-02 12:44:26,541 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:26,541 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:26,541 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 12:44:26,541 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:26,542 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:26,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1057916828, now seen corresponding path program 1 times [2024-12-02 12:44:26,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:26,542 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459985013] [2024-12-02 12:44:26,542 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:26,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:26,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:26,935 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-12-02 12:44:26,936 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:26,936 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [459985013] [2024-12-02 12:44:26,936 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [459985013] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:26,936 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:26,936 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 12:44:26,936 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329506001] [2024-12-02 12:44:26,936 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:26,936 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 12:44:26,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:26,937 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 12:44:26,937 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:44:26,937 INFO L87 Difference]: Start difference. First operand 1126 states and 1497 transitions. Second operand has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 12:44:27,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:27,177 INFO L93 Difference]: Finished difference Result 2006 states and 2678 transitions. [2024-12-02 12:44:27,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 12:44:27,178 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 96 [2024-12-02 12:44:27,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:27,184 INFO L225 Difference]: With dead ends: 2006 [2024-12-02 12:44:27,184 INFO L226 Difference]: Without dead ends: 1124 [2024-12-02 12:44:27,186 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 12:44:27,187 INFO L435 NwaCegarLoop]: 291 mSDtfsCounter, 152 mSDsluCounter, 1326 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 1617 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:27,187 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [154 Valid, 1617 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:27,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1124 states. [2024-12-02 12:44:27,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1124 to 1015. [2024-12-02 12:44:27,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1015 states, 788 states have (on average 1.3477157360406091) internal successors, (1062), 798 states have internal predecessors, (1062), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2024-12-02 12:44:27,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1015 states to 1015 states and 1352 transitions. [2024-12-02 12:44:27,265 INFO L78 Accepts]: Start accepts. Automaton has 1015 states and 1352 transitions. Word has length 96 [2024-12-02 12:44:27,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:27,265 INFO L471 AbstractCegarLoop]: Abstraction has 1015 states and 1352 transitions. [2024-12-02 12:44:27,265 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 12:44:27,265 INFO L276 IsEmpty]: Start isEmpty. Operand 1015 states and 1352 transitions. [2024-12-02 12:44:27,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2024-12-02 12:44:27,266 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:27,267 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:27,267 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 12:44:27,267 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:27,267 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:27,267 INFO L85 PathProgramCache]: Analyzing trace with hash 272118471, now seen corresponding path program 1 times [2024-12-02 12:44:27,267 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:27,267 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1196087025] [2024-12-02 12:44:27,268 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:27,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:27,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:27,772 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-02 12:44:27,772 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:27,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1196087025] [2024-12-02 12:44:27,772 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1196087025] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:27,772 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:27,772 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 12:44:27,773 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740937945] [2024-12-02 12:44:27,773 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:27,773 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 12:44:27,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:27,773 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 12:44:27,773 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:44:27,774 INFO L87 Difference]: Start difference. First operand 1015 states and 1352 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 12:44:28,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:28,189 INFO L93 Difference]: Finished difference Result 1939 states and 2567 transitions. [2024-12-02 12:44:28,189 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 12:44:28,189 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 97 [2024-12-02 12:44:28,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:28,195 INFO L225 Difference]: With dead ends: 1939 [2024-12-02 12:44:28,196 INFO L226 Difference]: Without dead ends: 1088 [2024-12-02 12:44:28,198 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-12-02 12:44:28,198 INFO L435 NwaCegarLoop]: 286 mSDtfsCounter, 413 mSDsluCounter, 1000 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 419 SdHoareTripleChecker+Valid, 1286 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:28,198 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [419 Valid, 1286 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 12:44:28,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1088 states. [2024-12-02 12:44:28,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1088 to 1031. [2024-12-02 12:44:28,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1031 states, 796 states have (on average 1.3253768844221105) internal successors, (1055), 807 states have internal predecessors, (1055), 148 states have call successors, (148), 86 states have call predecessors, (148), 86 states have return successors, (148), 137 states have call predecessors, (148), 148 states have call successors, (148) [2024-12-02 12:44:28,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1031 states to 1031 states and 1351 transitions. [2024-12-02 12:44:28,294 INFO L78 Accepts]: Start accepts. Automaton has 1031 states and 1351 transitions. Word has length 97 [2024-12-02 12:44:28,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:28,295 INFO L471 AbstractCegarLoop]: Abstraction has 1031 states and 1351 transitions. [2024-12-02 12:44:28,295 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 12:44:28,295 INFO L276 IsEmpty]: Start isEmpty. Operand 1031 states and 1351 transitions. [2024-12-02 12:44:28,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2024-12-02 12:44:28,296 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:28,296 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:28,296 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 12:44:28,296 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:28,297 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:28,297 INFO L85 PathProgramCache]: Analyzing trace with hash -1488358529, now seen corresponding path program 1 times [2024-12-02 12:44:28,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:28,297 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269138022] [2024-12-02 12:44:28,297 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:28,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:28,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:28,422 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 12:44:28,422 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:28,422 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1269138022] [2024-12-02 12:44:28,422 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1269138022] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:28,422 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:28,422 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:28,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [434833535] [2024-12-02 12:44:28,422 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:28,423 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:28,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:28,423 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:28,423 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:28,423 INFO L87 Difference]: Start difference. First operand 1031 states and 1351 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:28,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:28,703 INFO L93 Difference]: Finished difference Result 2712 states and 3577 transitions. [2024-12-02 12:44:28,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 12:44:28,704 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 98 [2024-12-02 12:44:28,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:28,715 INFO L225 Difference]: With dead ends: 2712 [2024-12-02 12:44:28,715 INFO L226 Difference]: Without dead ends: 1896 [2024-12-02 12:44:28,718 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:28,719 INFO L435 NwaCegarLoop]: 472 mSDtfsCounter, 203 mSDsluCounter, 705 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 203 SdHoareTripleChecker+Valid, 1177 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:28,719 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [203 Valid, 1177 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:28,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1896 states. [2024-12-02 12:44:28,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1896 to 1777. [2024-12-02 12:44:28,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1777 states, 1352 states have (on average 1.3187869822485208) internal successors, (1783), 1371 states have internal predecessors, (1783), 272 states have call successors, (272), 152 states have call predecessors, (272), 152 states have return successors, (272), 253 states have call predecessors, (272), 272 states have call successors, (272) [2024-12-02 12:44:28,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1777 states to 1777 states and 2327 transitions. [2024-12-02 12:44:28,893 INFO L78 Accepts]: Start accepts. Automaton has 1777 states and 2327 transitions. Word has length 98 [2024-12-02 12:44:28,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:28,894 INFO L471 AbstractCegarLoop]: Abstraction has 1777 states and 2327 transitions. [2024-12-02 12:44:28,894 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:28,894 INFO L276 IsEmpty]: Start isEmpty. Operand 1777 states and 2327 transitions. [2024-12-02 12:44:28,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2024-12-02 12:44:28,895 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:28,895 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:28,895 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 12:44:28,896 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:28,896 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:28,896 INFO L85 PathProgramCache]: Analyzing trace with hash -1415758364, now seen corresponding path program 1 times [2024-12-02 12:44:28,896 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:28,896 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122910821] [2024-12-02 12:44:28,896 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:28,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:28,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:28,992 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 12:44:28,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:28,992 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [122910821] [2024-12-02 12:44:28,992 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [122910821] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:28,992 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:28,992 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:28,993 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [769267517] [2024-12-02 12:44:28,993 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:28,993 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:28,993 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:28,993 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:28,993 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:28,994 INFO L87 Difference]: Start difference. First operand 1777 states and 2327 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:29,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:29,234 INFO L93 Difference]: Finished difference Result 4116 states and 5418 transitions. [2024-12-02 12:44:29,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 12:44:29,234 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2024-12-02 12:44:29,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:29,241 INFO L225 Difference]: With dead ends: 4116 [2024-12-02 12:44:29,242 INFO L226 Difference]: Without dead ends: 2641 [2024-12-02 12:44:29,244 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:29,245 INFO L435 NwaCegarLoop]: 490 mSDtfsCounter, 204 mSDsluCounter, 721 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 204 SdHoareTripleChecker+Valid, 1211 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:29,245 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [204 Valid, 1211 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:29,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2641 states. [2024-12-02 12:44:29,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2641 to 2520. [2024-12-02 12:44:29,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2520 states, 1905 states have (on average 1.3133858267716536) internal successors, (2502), 1932 states have internal predecessors, (2502), 396 states have call successors, (396), 218 states have call predecessors, (396), 218 states have return successors, (396), 369 states have call predecessors, (396), 396 states have call successors, (396) [2024-12-02 12:44:29,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2520 states to 2520 states and 3294 transitions. [2024-12-02 12:44:29,379 INFO L78 Accepts]: Start accepts. Automaton has 2520 states and 3294 transitions. Word has length 100 [2024-12-02 12:44:29,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:29,379 INFO L471 AbstractCegarLoop]: Abstraction has 2520 states and 3294 transitions. [2024-12-02 12:44:29,379 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:29,379 INFO L276 IsEmpty]: Start isEmpty. Operand 2520 states and 3294 transitions. [2024-12-02 12:44:29,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2024-12-02 12:44:29,380 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:29,380 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:29,380 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 12:44:29,381 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:29,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:29,381 INFO L85 PathProgramCache]: Analyzing trace with hash 534410324, now seen corresponding path program 1 times [2024-12-02 12:44:29,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:29,381 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930244646] [2024-12-02 12:44:29,381 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:29,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:29,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:29,769 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-02 12:44:29,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:29,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930244646] [2024-12-02 12:44:29,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930244646] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:29,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:29,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 12:44:29,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807241450] [2024-12-02 12:44:29,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:29,770 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 12:44:29,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:29,770 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 12:44:29,770 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:44:29,771 INFO L87 Difference]: Start difference. First operand 2520 states and 3294 transitions. Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 6 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:30,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:30,386 INFO L93 Difference]: Finished difference Result 4901 states and 6409 transitions. [2024-12-02 12:44:30,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 12:44:30,387 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 11.0) internal successors, (77), 6 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2024-12-02 12:44:30,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:30,401 INFO L225 Difference]: With dead ends: 4901 [2024-12-02 12:44:30,401 INFO L226 Difference]: Without dead ends: 2778 [2024-12-02 12:44:30,406 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-12-02 12:44:30,408 INFO L435 NwaCegarLoop]: 326 mSDtfsCounter, 423 mSDsluCounter, 1170 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 429 SdHoareTripleChecker+Valid, 1496 SdHoareTripleChecker+Invalid, 183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:30,408 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [429 Valid, 1496 Invalid, 183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 12:44:30,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2778 states. [2024-12-02 12:44:30,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2778 to 2527. [2024-12-02 12:44:30,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2527 states, 1901 states have (on average 1.3119410836401895) internal successors, (2494), 1929 states have internal predecessors, (2494), 403 states have call successors, (403), 222 states have call predecessors, (403), 222 states have return successors, (403), 375 states have call predecessors, (403), 403 states have call successors, (403) [2024-12-02 12:44:30,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2527 states to 2527 states and 3300 transitions. [2024-12-02 12:44:30,714 INFO L78 Accepts]: Start accepts. Automaton has 2527 states and 3300 transitions. Word has length 100 [2024-12-02 12:44:30,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:30,714 INFO L471 AbstractCegarLoop]: Abstraction has 2527 states and 3300 transitions. [2024-12-02 12:44:30,714 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 11.0) internal successors, (77), 6 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:30,714 INFO L276 IsEmpty]: Start isEmpty. Operand 2527 states and 3300 transitions. [2024-12-02 12:44:30,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-12-02 12:44:30,716 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:30,716 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:30,716 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 12:44:30,717 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:30,717 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:30,717 INFO L85 PathProgramCache]: Analyzing trace with hash 1472031769, now seen corresponding path program 1 times [2024-12-02 12:44:30,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:30,717 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392074318] [2024-12-02 12:44:30,717 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:30,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:30,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:30,807 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 12:44:30,807 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:30,807 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392074318] [2024-12-02 12:44:30,807 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [392074318] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:30,807 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:30,807 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:30,807 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396191884] [2024-12-02 12:44:30,807 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:30,807 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:30,807 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:30,808 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:30,808 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:30,808 INFO L87 Difference]: Start difference. First operand 2527 states and 3300 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:31,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:31,342 INFO L93 Difference]: Finished difference Result 6470 states and 8489 transitions. [2024-12-02 12:44:31,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 12:44:31,342 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 102 [2024-12-02 12:44:31,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:31,366 INFO L225 Difference]: With dead ends: 6470 [2024-12-02 12:44:31,366 INFO L226 Difference]: Without dead ends: 4385 [2024-12-02 12:44:31,372 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:31,372 INFO L435 NwaCegarLoop]: 479 mSDtfsCounter, 208 mSDsluCounter, 718 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 1197 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:31,373 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 1197 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:31,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4385 states. [2024-12-02 12:44:31,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4385 to 4041. [2024-12-02 12:44:31,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4041 states, 3004 states have (on average 1.3005992010652463) internal successors, (3907), 3048 states have internal predecessors, (3907), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-12-02 12:44:31,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4041 states to 4041 states and 5251 transitions. [2024-12-02 12:44:31,816 INFO L78 Accepts]: Start accepts. Automaton has 4041 states and 5251 transitions. Word has length 102 [2024-12-02 12:44:31,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:31,816 INFO L471 AbstractCegarLoop]: Abstraction has 4041 states and 5251 transitions. [2024-12-02 12:44:31,817 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:31,817 INFO L276 IsEmpty]: Start isEmpty. Operand 4041 states and 5251 transitions. [2024-12-02 12:44:31,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-12-02 12:44:31,819 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:31,820 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:31,820 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 12:44:31,820 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:31,820 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:31,820 INFO L85 PathProgramCache]: Analyzing trace with hash -1614875897, now seen corresponding path program 1 times [2024-12-02 12:44:31,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:31,820 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509775776] [2024-12-02 12:44:31,820 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:31,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:31,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:31,875 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 12:44:31,875 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:31,875 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1509775776] [2024-12-02 12:44:31,875 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1509775776] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:31,875 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:31,875 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 12:44:31,875 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869648993] [2024-12-02 12:44:31,875 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:31,876 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 12:44:31,876 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:31,876 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 12:44:31,876 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 12:44:31,876 INFO L87 Difference]: Start difference. First operand 4041 states and 5251 transitions. Second operand has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:32,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:32,224 INFO L93 Difference]: Finished difference Result 7760 states and 10132 transitions. [2024-12-02 12:44:32,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 12:44:32,224 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 103 [2024-12-02 12:44:32,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:32,243 INFO L225 Difference]: With dead ends: 7760 [2024-12-02 12:44:32,244 INFO L226 Difference]: Without dead ends: 4074 [2024-12-02 12:44:32,249 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 12:44:32,250 INFO L435 NwaCegarLoop]: 264 mSDtfsCounter, 6 mSDsluCounter, 227 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 491 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:32,250 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 491 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 41 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:32,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4074 states. [2024-12-02 12:44:32,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4074 to 4047. [2024-12-02 12:44:32,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4047 states, 3010 states have (on average 1.3) internal successors, (3913), 3054 states have internal predecessors, (3913), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-12-02 12:44:32,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4047 states to 4047 states and 5257 transitions. [2024-12-02 12:44:32,612 INFO L78 Accepts]: Start accepts. Automaton has 4047 states and 5257 transitions. Word has length 103 [2024-12-02 12:44:32,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:32,612 INFO L471 AbstractCegarLoop]: Abstraction has 4047 states and 5257 transitions. [2024-12-02 12:44:32,612 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:32,612 INFO L276 IsEmpty]: Start isEmpty. Operand 4047 states and 5257 transitions. [2024-12-02 12:44:32,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2024-12-02 12:44:32,615 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:32,615 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:32,615 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 12:44:32,615 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:32,615 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:32,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1907577092, now seen corresponding path program 1 times [2024-12-02 12:44:32,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:32,615 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092687993] [2024-12-02 12:44:32,615 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:32,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:32,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:32,744 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 12:44:32,744 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:32,745 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1092687993] [2024-12-02 12:44:32,745 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1092687993] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:32,745 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:32,745 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:32,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1615595667] [2024-12-02 12:44:32,745 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:32,745 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:32,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:32,746 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:32,746 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:32,746 INFO L87 Difference]: Start difference. First operand 4047 states and 5257 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:33,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:33,115 INFO L93 Difference]: Finished difference Result 7725 states and 10059 transitions. [2024-12-02 12:44:33,116 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:33,116 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 104 [2024-12-02 12:44:33,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:33,134 INFO L225 Difference]: With dead ends: 7725 [2024-12-02 12:44:33,134 INFO L226 Difference]: Without dead ends: 3755 [2024-12-02 12:44:33,141 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:33,142 INFO L435 NwaCegarLoop]: 268 mSDtfsCounter, 83 mSDsluCounter, 484 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 83 SdHoareTripleChecker+Valid, 752 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:33,142 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [83 Valid, 752 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:33,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3755 states. [2024-12-02 12:44:33,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3755 to 3692. [2024-12-02 12:44:33,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3692 states, 2738 states have (on average 1.3093498904309715) internal successors, (3585), 2772 states have internal predecessors, (3585), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-12-02 12:44:33,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3692 states to 3692 states and 4825 transitions. [2024-12-02 12:44:33,485 INFO L78 Accepts]: Start accepts. Automaton has 3692 states and 4825 transitions. Word has length 104 [2024-12-02 12:44:33,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:33,485 INFO L471 AbstractCegarLoop]: Abstraction has 3692 states and 4825 transitions. [2024-12-02 12:44:33,485 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:33,485 INFO L276 IsEmpty]: Start isEmpty. Operand 3692 states and 4825 transitions. [2024-12-02 12:44:33,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2024-12-02 12:44:33,487 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:33,487 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:33,487 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 12:44:33,487 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:33,488 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:33,488 INFO L85 PathProgramCache]: Analyzing trace with hash 540150455, now seen corresponding path program 1 times [2024-12-02 12:44:33,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:33,488 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680779814] [2024-12-02 12:44:33,488 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:33,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:33,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:33,562 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 12:44:33,562 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:33,562 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680779814] [2024-12-02 12:44:33,562 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1680779814] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:33,562 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:33,562 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 12:44:33,563 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1625134965] [2024-12-02 12:44:33,563 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:33,563 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 12:44:33,563 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:33,563 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 12:44:33,564 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 12:44:33,564 INFO L87 Difference]: Start difference. First operand 3692 states and 4825 transitions. Second operand has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:33,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:33,994 INFO L93 Difference]: Finished difference Result 7212 states and 9458 transitions. [2024-12-02 12:44:33,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 12:44:33,995 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 105 [2024-12-02 12:44:33,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:34,008 INFO L225 Difference]: With dead ends: 7212 [2024-12-02 12:44:34,008 INFO L226 Difference]: Without dead ends: 3702 [2024-12-02 12:44:34,012 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 12:44:34,013 INFO L435 NwaCegarLoop]: 262 mSDtfsCounter, 0 mSDsluCounter, 227 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 489 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:34,013 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 489 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:34,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3702 states. [2024-12-02 12:44:34,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3702 to 3702. [2024-12-02 12:44:34,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3702 states, 2748 states have (on average 1.3082241630276565) internal successors, (3595), 2782 states have internal predecessors, (3595), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-12-02 12:44:34,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3702 states to 3702 states and 4835 transitions. [2024-12-02 12:44:34,273 INFO L78 Accepts]: Start accepts. Automaton has 3702 states and 4835 transitions. Word has length 105 [2024-12-02 12:44:34,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:34,273 INFO L471 AbstractCegarLoop]: Abstraction has 3702 states and 4835 transitions. [2024-12-02 12:44:34,273 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:34,273 INFO L276 IsEmpty]: Start isEmpty. Operand 3702 states and 4835 transitions. [2024-12-02 12:44:34,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2024-12-02 12:44:34,275 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:34,275 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:34,275 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 12:44:34,276 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:34,276 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:34,276 INFO L85 PathProgramCache]: Analyzing trace with hash 594512028, now seen corresponding path program 1 times [2024-12-02 12:44:34,276 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:34,276 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632919258] [2024-12-02 12:44:34,276 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:34,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:34,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:34,389 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 12:44:34,389 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:34,390 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632919258] [2024-12-02 12:44:34,390 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [632919258] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:34,390 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:34,390 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 12:44:34,390 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862651529] [2024-12-02 12:44:34,390 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:34,390 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 12:44:34,390 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:34,391 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 12:44:34,391 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 12:44:34,391 INFO L87 Difference]: Start difference. First operand 3702 states and 4835 transitions. Second operand has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:34,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:34,581 INFO L93 Difference]: Finished difference Result 7204 states and 9430 transitions. [2024-12-02 12:44:34,582 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 12:44:34,582 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 105 [2024-12-02 12:44:34,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:34,594 INFO L225 Difference]: With dead ends: 7204 [2024-12-02 12:44:34,594 INFO L226 Difference]: Without dead ends: 3622 [2024-12-02 12:44:34,599 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:44:34,599 INFO L435 NwaCegarLoop]: 273 mSDtfsCounter, 64 mSDsluCounter, 489 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 762 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:34,600 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [64 Valid, 762 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:34,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3622 states. [2024-12-02 12:44:34,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3622 to 2788. [2024-12-02 12:44:34,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2788 states, 2068 states have (on average 1.303191489361702) internal successors, (2695), 2087 states have internal predecessors, (2695), 469 states have call successors, (469), 250 states have call predecessors, (469), 250 states have return successors, (469), 450 states have call predecessors, (469), 469 states have call successors, (469) [2024-12-02 12:44:34,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2788 states to 2788 states and 3633 transitions. [2024-12-02 12:44:34,777 INFO L78 Accepts]: Start accepts. Automaton has 2788 states and 3633 transitions. Word has length 105 [2024-12-02 12:44:34,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:34,778 INFO L471 AbstractCegarLoop]: Abstraction has 2788 states and 3633 transitions. [2024-12-02 12:44:34,778 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 12:44:34,778 INFO L276 IsEmpty]: Start isEmpty. Operand 2788 states and 3633 transitions. [2024-12-02 12:44:34,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-02 12:44:34,781 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:34,781 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:34,781 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-02 12:44:34,781 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:34,781 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:34,781 INFO L85 PathProgramCache]: Analyzing trace with hash 2045136114, now seen corresponding path program 1 times [2024-12-02 12:44:34,781 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:34,781 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [242257398] [2024-12-02 12:44:34,782 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:34,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:34,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:35,020 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 16 proven. 13 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 12:44:35,021 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:35,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [242257398] [2024-12-02 12:44:35,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [242257398] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:44:35,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1696076550] [2024-12-02 12:44:35,021 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:35,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:44:35,021 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:44:35,023 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:44:35,024 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 12:44:35,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:35,246 INFO L256 TraceCheckSpWp]: Trace formula consists of 734 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-12-02 12:44:35,250 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:44:35,290 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-12-02 12:44:35,290 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 12:44:35,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1696076550] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:35,290 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 12:44:35,290 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [7] total 10 [2024-12-02 12:44:35,290 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [721504779] [2024-12-02 12:44:35,290 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:35,291 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 12:44:35,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:35,291 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 12:44:35,291 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2024-12-02 12:44:35,291 INFO L87 Difference]: Start difference. First operand 2788 states and 3633 transitions. Second operand has 5 states, 4 states have (on average 24.75) internal successors, (99), 5 states have internal predecessors, (99), 3 states have call successors, (13), 2 states have call predecessors, (13), 3 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) [2024-12-02 12:44:35,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:35,444 INFO L93 Difference]: Finished difference Result 5245 states and 6876 transitions. [2024-12-02 12:44:35,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 12:44:35,444 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 24.75) internal successors, (99), 5 states have internal predecessors, (99), 3 states have call successors, (13), 2 states have call predecessors, (13), 3 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) Word has length 156 [2024-12-02 12:44:35,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:35,454 INFO L225 Difference]: With dead ends: 5245 [2024-12-02 12:44:35,454 INFO L226 Difference]: Without dead ends: 2617 [2024-12-02 12:44:35,457 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 154 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2024-12-02 12:44:35,458 INFO L435 NwaCegarLoop]: 260 mSDtfsCounter, 0 mSDsluCounter, 768 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1028 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:35,458 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1028 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 12:44:35,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2617 states. [2024-12-02 12:44:35,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2617 to 2600. [2024-12-02 12:44:35,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2600 states, 1925 states have (on average 1.2997402597402596) internal successors, (2502), 1942 states have internal predecessors, (2502), 440 states have call successors, (440), 234 states have call predecessors, (440), 234 states have return successors, (440), 423 states have call predecessors, (440), 440 states have call successors, (440) [2024-12-02 12:44:35,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2600 states to 2600 states and 3382 transitions. [2024-12-02 12:44:35,728 INFO L78 Accepts]: Start accepts. Automaton has 2600 states and 3382 transitions. Word has length 156 [2024-12-02 12:44:35,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:35,728 INFO L471 AbstractCegarLoop]: Abstraction has 2600 states and 3382 transitions. [2024-12-02 12:44:35,728 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 24.75) internal successors, (99), 5 states have internal predecessors, (99), 3 states have call successors, (13), 2 states have call predecessors, (13), 3 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) [2024-12-02 12:44:35,728 INFO L276 IsEmpty]: Start isEmpty. Operand 2600 states and 3382 transitions. [2024-12-02 12:44:35,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-02 12:44:35,732 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:35,732 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:35,742 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-12-02 12:44:35,933 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2024-12-02 12:44:35,933 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:35,933 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:35,934 INFO L85 PathProgramCache]: Analyzing trace with hash -364480390, now seen corresponding path program 1 times [2024-12-02 12:44:35,934 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:35,934 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1097331510] [2024-12-02 12:44:35,934 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:35,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:35,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:36,579 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 23 proven. 7 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 12:44:36,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:36,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1097331510] [2024-12-02 12:44:36,579 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1097331510] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:44:36,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1208079119] [2024-12-02 12:44:36,579 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:36,579 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:44:36,579 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:44:36,581 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:44:36,583 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 12:44:36,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:36,814 INFO L256 TraceCheckSpWp]: Trace formula consists of 768 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-12-02 12:44:36,819 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:44:37,128 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 33 proven. 44 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 12:44:37,128 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:44:37,472 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 13 proven. 17 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 12:44:37,473 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1208079119] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:44:37,473 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:44:37,473 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 8] total 24 [2024-12-02 12:44:37,473 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [340469148] [2024-12-02 12:44:37,473 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:44:37,474 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-12-02 12:44:37,474 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:37,475 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-12-02 12:44:37,475 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=487, Unknown=0, NotChecked=0, Total=552 [2024-12-02 12:44:37,476 INFO L87 Difference]: Start difference. First operand 2600 states and 3382 transitions. Second operand has 24 states, 24 states have (on average 11.166666666666666) internal successors, (268), 22 states have internal predecessors, (268), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) [2024-12-02 12:44:41,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:41,693 INFO L93 Difference]: Finished difference Result 7598 states and 9916 transitions. [2024-12-02 12:44:41,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2024-12-02 12:44:41,693 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 11.166666666666666) internal successors, (268), 22 states have internal predecessors, (268), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) Word has length 158 [2024-12-02 12:44:41,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:41,706 INFO L225 Difference]: With dead ends: 7598 [2024-12-02 12:44:41,706 INFO L226 Difference]: Without dead ends: 5241 [2024-12-02 12:44:41,711 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 415 GetRequests, 332 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1798 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1040, Invalid=6100, Unknown=0, NotChecked=0, Total=7140 [2024-12-02 12:44:41,711 INFO L435 NwaCegarLoop]: 659 mSDtfsCounter, 2810 mSDsluCounter, 5807 mSDsCounter, 0 mSdLazyCounter, 2967 mSolverCounterSat, 1021 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2810 SdHoareTripleChecker+Valid, 6466 SdHoareTripleChecker+Invalid, 3988 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1021 IncrementalHoareTripleChecker+Valid, 2967 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:41,711 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2810 Valid, 6466 Invalid, 3988 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1021 Valid, 2967 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2024-12-02 12:44:41,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5241 states. [2024-12-02 12:44:42,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5241 to 4547. [2024-12-02 12:44:42,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4547 states, 3367 states have (on average 1.3035343035343034) internal successors, (4389), 3396 states have internal predecessors, (4389), 765 states have call successors, (765), 414 states have call predecessors, (765), 414 states have return successors, (765), 736 states have call predecessors, (765), 765 states have call successors, (765) [2024-12-02 12:44:42,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4547 states to 4547 states and 5919 transitions. [2024-12-02 12:44:42,077 INFO L78 Accepts]: Start accepts. Automaton has 4547 states and 5919 transitions. Word has length 158 [2024-12-02 12:44:42,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:42,077 INFO L471 AbstractCegarLoop]: Abstraction has 4547 states and 5919 transitions. [2024-12-02 12:44:42,077 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 11.166666666666666) internal successors, (268), 22 states have internal predecessors, (268), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) [2024-12-02 12:44:42,077 INFO L276 IsEmpty]: Start isEmpty. Operand 4547 states and 5919 transitions. [2024-12-02 12:44:42,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-12-02 12:44:42,081 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:42,081 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:42,102 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 12:44:42,281 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2024-12-02 12:44:42,281 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:42,282 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:42,282 INFO L85 PathProgramCache]: Analyzing trace with hash -1983812197, now seen corresponding path program 1 times [2024-12-02 12:44:42,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:42,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2116586208] [2024-12-02 12:44:42,282 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:42,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:42,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:42,980 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 22 proven. 6 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 12:44:42,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:42,980 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2116586208] [2024-12-02 12:44:42,980 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2116586208] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:44:42,980 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1585832190] [2024-12-02 12:44:42,980 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:42,980 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:44:42,980 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:44:42,982 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:44:42,982 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 12:44:43,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:43,175 INFO L256 TraceCheckSpWp]: Trace formula consists of 769 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-12-02 12:44:43,179 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:44:43,723 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 61 proven. 14 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 12:44:43,723 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:44:44,324 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 15 proven. 13 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 12:44:44,324 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1585832190] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:44:44,324 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:44:44,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 11] total 26 [2024-12-02 12:44:44,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677400660] [2024-12-02 12:44:44,325 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:44:44,326 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-12-02 12:44:44,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:44,326 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-12-02 12:44:44,327 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=542, Unknown=0, NotChecked=0, Total=650 [2024-12-02 12:44:44,327 INFO L87 Difference]: Start difference. First operand 4547 states and 5919 transitions. Second operand has 26 states, 26 states have (on average 9.807692307692308) internal successors, (255), 26 states have internal predecessors, (255), 10 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 10 states have call predecessors, (37), 10 states have call successors, (37) [2024-12-02 12:44:47,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:47,147 INFO L93 Difference]: Finished difference Result 10450 states and 13599 transitions. [2024-12-02 12:44:47,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2024-12-02 12:44:47,148 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 9.807692307692308) internal successors, (255), 26 states have internal predecessors, (255), 10 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 10 states have call predecessors, (37), 10 states have call successors, (37) Word has length 159 [2024-12-02 12:44:47,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:47,165 INFO L225 Difference]: With dead ends: 10450 [2024-12-02 12:44:47,165 INFO L226 Difference]: Without dead ends: 6157 [2024-12-02 12:44:47,172 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 379 GetRequests, 317 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1117 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=874, Invalid=3158, Unknown=0, NotChecked=0, Total=4032 [2024-12-02 12:44:47,172 INFO L435 NwaCegarLoop]: 318 mSDtfsCounter, 2098 mSDsluCounter, 3350 mSDsCounter, 0 mSdLazyCounter, 1876 mSolverCounterSat, 666 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2098 SdHoareTripleChecker+Valid, 3668 SdHoareTripleChecker+Invalid, 2542 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 666 IncrementalHoareTripleChecker+Valid, 1876 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:47,173 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2098 Valid, 3668 Invalid, 2542 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [666 Valid, 1876 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-12-02 12:44:47,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6157 states. [2024-12-02 12:44:48,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6157 to 5943. [2024-12-02 12:44:48,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5943 states, 4392 states have (on average 1.2962204007285973) internal successors, (5693), 4431 states have internal predecessors, (5693), 999 states have call successors, (999), 551 states have call predecessors, (999), 551 states have return successors, (999), 960 states have call predecessors, (999), 999 states have call successors, (999) [2024-12-02 12:44:48,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5943 states to 5943 states and 7691 transitions. [2024-12-02 12:44:48,052 INFO L78 Accepts]: Start accepts. Automaton has 5943 states and 7691 transitions. Word has length 159 [2024-12-02 12:44:48,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:48,052 INFO L471 AbstractCegarLoop]: Abstraction has 5943 states and 7691 transitions. [2024-12-02 12:44:48,052 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 9.807692307692308) internal successors, (255), 26 states have internal predecessors, (255), 10 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 10 states have call predecessors, (37), 10 states have call successors, (37) [2024-12-02 12:44:48,053 INFO L276 IsEmpty]: Start isEmpty. Operand 5943 states and 7691 transitions. [2024-12-02 12:44:48,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2024-12-02 12:44:48,058 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:48,058 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:48,068 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-02 12:44:48,259 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:44:48,259 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:48,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:48,259 INFO L85 PathProgramCache]: Analyzing trace with hash -1810657676, now seen corresponding path program 1 times [2024-12-02 12:44:48,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:48,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [761232368] [2024-12-02 12:44:48,260 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:48,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:48,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:48,395 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-12-02 12:44:48,395 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:48,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [761232368] [2024-12-02 12:44:48,395 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [761232368] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:44:48,395 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:44:48,395 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 12:44:48,396 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1401226955] [2024-12-02 12:44:48,396 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:44:48,396 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 12:44:48,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:48,396 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 12:44:48,396 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:44:48,396 INFO L87 Difference]: Start difference. First operand 5943 states and 7691 transitions. Second operand has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 6 states have internal predecessors, (94), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-12-02 12:44:49,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:49,958 INFO L93 Difference]: Finished difference Result 17413 states and 22597 transitions. [2024-12-02 12:44:49,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 12:44:49,958 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 6 states have internal predecessors, (94), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) Word has length 161 [2024-12-02 12:44:49,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:49,982 INFO L225 Difference]: With dead ends: 17413 [2024-12-02 12:44:49,983 INFO L226 Difference]: Without dead ends: 11776 [2024-12-02 12:44:49,991 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 12:44:49,991 INFO L435 NwaCegarLoop]: 489 mSDtfsCounter, 225 mSDsluCounter, 2106 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 230 SdHoareTripleChecker+Valid, 2595 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:49,992 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [230 Valid, 2595 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:44:49,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11776 states. [2024-12-02 12:44:50,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11776 to 8427. [2024-12-02 12:44:50,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8427 states, 6180 states have (on average 1.2944983818770226) internal successors, (8000), 6237 states have internal predecessors, (8000), 1463 states have call successors, (1463), 783 states have call predecessors, (1463), 783 states have return successors, (1463), 1406 states have call predecessors, (1463), 1463 states have call successors, (1463) [2024-12-02 12:44:51,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8427 states to 8427 states and 10926 transitions. [2024-12-02 12:44:51,027 INFO L78 Accepts]: Start accepts. Automaton has 8427 states and 10926 transitions. Word has length 161 [2024-12-02 12:44:51,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:51,028 INFO L471 AbstractCegarLoop]: Abstraction has 8427 states and 10926 transitions. [2024-12-02 12:44:51,028 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.428571428571429) internal successors, (94), 6 states have internal predecessors, (94), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-12-02 12:44:51,028 INFO L276 IsEmpty]: Start isEmpty. Operand 8427 states and 10926 transitions. [2024-12-02 12:44:51,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2024-12-02 12:44:51,036 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:51,036 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:51,036 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-02 12:44:51,036 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:51,037 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:51,037 INFO L85 PathProgramCache]: Analyzing trace with hash 1459390940, now seen corresponding path program 1 times [2024-12-02 12:44:51,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:51,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1301117487] [2024-12-02 12:44:51,037 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:51,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:51,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:51,889 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 20 proven. 10 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 12:44:51,889 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:51,889 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1301117487] [2024-12-02 12:44:51,889 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1301117487] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:44:51,889 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1999299542] [2024-12-02 12:44:51,889 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:51,889 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:44:51,890 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:44:51,891 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:44:51,893 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 12:44:52,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:52,112 INFO L256 TraceCheckSpWp]: Trace formula consists of 786 conjuncts, 41 conjuncts are in the unsatisfiable core [2024-12-02 12:44:52,119 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:44:52,539 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 59 proven. 18 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 12:44:52,539 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:44:53,482 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 20 proven. 10 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 12:44:53,482 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1999299542] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:44:53,482 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:44:53,483 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 13, 10] total 27 [2024-12-02 12:44:53,483 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1549697957] [2024-12-02 12:44:53,483 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:44:53,483 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2024-12-02 12:44:53,484 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:53,484 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-12-02 12:44:53,484 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=590, Unknown=0, NotChecked=0, Total=702 [2024-12-02 12:44:53,484 INFO L87 Difference]: Start difference. First operand 8427 states and 10926 transitions. Second operand has 27 states, 27 states have (on average 8.962962962962964) internal successors, (242), 27 states have internal predecessors, (242), 8 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 8 states have call predecessors, (29), 8 states have call successors, (29) [2024-12-02 12:44:56,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:44:56,171 INFO L93 Difference]: Finished difference Result 17251 states and 22421 transitions. [2024-12-02 12:44:56,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-12-02 12:44:56,172 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 8.962962962962964) internal successors, (242), 27 states have internal predecessors, (242), 8 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 8 states have call predecessors, (29), 8 states have call successors, (29) Word has length 161 [2024-12-02 12:44:56,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:44:56,190 INFO L225 Difference]: With dead ends: 17251 [2024-12-02 12:44:56,190 INFO L226 Difference]: Without dead ends: 9130 [2024-12-02 12:44:56,198 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 352 GetRequests, 311 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 355 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=315, Invalid=1491, Unknown=0, NotChecked=0, Total=1806 [2024-12-02 12:44:56,199 INFO L435 NwaCegarLoop]: 468 mSDtfsCounter, 934 mSDsluCounter, 4135 mSDsCounter, 0 mSdLazyCounter, 2260 mSolverCounterSat, 228 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 934 SdHoareTripleChecker+Valid, 4603 SdHoareTripleChecker+Invalid, 2488 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 228 IncrementalHoareTripleChecker+Valid, 2260 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-12-02 12:44:56,199 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [934 Valid, 4603 Invalid, 2488 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [228 Valid, 2260 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-12-02 12:44:56,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9130 states. [2024-12-02 12:44:57,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9130 to 8821. [2024-12-02 12:44:57,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8821 states, 6477 states have (on average 1.293808862127528) internal successors, (8380), 6537 states have internal predecessors, (8380), 1526 states have call successors, (1526), 817 states have call predecessors, (1526), 817 states have return successors, (1526), 1466 states have call predecessors, (1526), 1526 states have call successors, (1526) [2024-12-02 12:44:57,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8821 states to 8821 states and 11432 transitions. [2024-12-02 12:44:57,332 INFO L78 Accepts]: Start accepts. Automaton has 8821 states and 11432 transitions. Word has length 161 [2024-12-02 12:44:57,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:44:57,333 INFO L471 AbstractCegarLoop]: Abstraction has 8821 states and 11432 transitions. [2024-12-02 12:44:57,333 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 8.962962962962964) internal successors, (242), 27 states have internal predecessors, (242), 8 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 8 states have call predecessors, (29), 8 states have call successors, (29) [2024-12-02 12:44:57,333 INFO L276 IsEmpty]: Start isEmpty. Operand 8821 states and 11432 transitions. [2024-12-02 12:44:57,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-12-02 12:44:57,339 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:44:57,339 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:44:57,349 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 12:44:57,539 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable31 [2024-12-02 12:44:57,540 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:44:57,540 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:44:57,540 INFO L85 PathProgramCache]: Analyzing trace with hash -958161478, now seen corresponding path program 1 times [2024-12-02 12:44:57,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:44:57,540 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651343905] [2024-12-02 12:44:57,540 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:57,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:44:57,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:58,093 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 28 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-12-02 12:44:58,094 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:44:58,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651343905] [2024-12-02 12:44:58,094 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [651343905] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:44:58,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [89761613] [2024-12-02 12:44:58,094 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:44:58,094 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:44:58,094 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:44:58,096 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:44:58,097 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 12:44:58,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:44:58,288 INFO L256 TraceCheckSpWp]: Trace formula consists of 787 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-12-02 12:44:58,293 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:44:58,590 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 66 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 12:44:58,590 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:44:59,045 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 23 proven. 7 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 12:44:59,046 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [89761613] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:44:59,046 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:44:59,046 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 8] total 23 [2024-12-02 12:44:59,046 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631562145] [2024-12-02 12:44:59,046 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:44:59,046 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-12-02 12:44:59,047 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:44:59,047 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-12-02 12:44:59,047 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=428, Unknown=0, NotChecked=0, Total=506 [2024-12-02 12:44:59,048 INFO L87 Difference]: Start difference. First operand 8821 states and 11432 transitions. Second operand has 23 states, 22 states have (on average 12.227272727272727) internal successors, (269), 21 states have internal predecessors, (269), 9 states have call successors, (37), 5 states have call predecessors, (37), 7 states have return successors, (36), 10 states have call predecessors, (36), 9 states have call successors, (36) [2024-12-02 12:45:04,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:45:04,497 INFO L93 Difference]: Finished difference Result 31760 states and 41033 transitions. [2024-12-02 12:45:04,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-12-02 12:45:04,497 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 12.227272727272727) internal successors, (269), 21 states have internal predecessors, (269), 9 states have call successors, (37), 5 states have call predecessors, (37), 7 states have return successors, (36), 10 states have call predecessors, (36), 9 states have call successors, (36) Word has length 162 [2024-12-02 12:45:04,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:45:04,543 INFO L225 Difference]: With dead ends: 31760 [2024-12-02 12:45:04,543 INFO L226 Difference]: Without dead ends: 23218 [2024-12-02 12:45:04,557 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 397 GetRequests, 328 SyntacticMatches, 0 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1368 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=710, Invalid=4260, Unknown=0, NotChecked=0, Total=4970 [2024-12-02 12:45:04,557 INFO L435 NwaCegarLoop]: 453 mSDtfsCounter, 3088 mSDsluCounter, 4447 mSDsCounter, 0 mSdLazyCounter, 2378 mSolverCounterSat, 999 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3096 SdHoareTripleChecker+Valid, 4900 SdHoareTripleChecker+Invalid, 3377 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 999 IncrementalHoareTripleChecker+Valid, 2378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-02 12:45:04,558 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3096 Valid, 4900 Invalid, 3377 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [999 Valid, 2378 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-02 12:45:04,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23218 states. [2024-12-02 12:45:06,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23218 to 14617. [2024-12-02 12:45:06,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14617 states, 10685 states have (on average 1.296771174543753) internal successors, (13856), 10797 states have internal predecessors, (13856), 2546 states have call successors, (2546), 1385 states have call predecessors, (2546), 1385 states have return successors, (2546), 2434 states have call predecessors, (2546), 2546 states have call successors, (2546) [2024-12-02 12:45:06,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14617 states to 14617 states and 18948 transitions. [2024-12-02 12:45:06,899 INFO L78 Accepts]: Start accepts. Automaton has 14617 states and 18948 transitions. Word has length 162 [2024-12-02 12:45:06,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:45:06,899 INFO L471 AbstractCegarLoop]: Abstraction has 14617 states and 18948 transitions. [2024-12-02 12:45:06,900 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 12.227272727272727) internal successors, (269), 21 states have internal predecessors, (269), 9 states have call successors, (37), 5 states have call predecessors, (37), 7 states have return successors, (36), 10 states have call predecessors, (36), 9 states have call successors, (36) [2024-12-02 12:45:06,900 INFO L276 IsEmpty]: Start isEmpty. Operand 14617 states and 18948 transitions. [2024-12-02 12:45:06,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-12-02 12:45:06,904 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:45:06,904 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:45:06,911 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 12:45:07,105 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2024-12-02 12:45:07,106 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:45:07,107 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:45:07,107 INFO L85 PathProgramCache]: Analyzing trace with hash 334524777, now seen corresponding path program 1 times [2024-12-02 12:45:07,108 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:45:07,108 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [216045806] [2024-12-02 12:45:07,108 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:07,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:45:07,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:07,342 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 16 proven. 17 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 12:45:07,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:45:07,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [216045806] [2024-12-02 12:45:07,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [216045806] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:45:07,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [204875952] [2024-12-02 12:45:07,342 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:07,342 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:45:07,343 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:45:07,344 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:45:07,345 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 12:45:07,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:07,552 INFO L256 TraceCheckSpWp]: Trace formula consists of 793 conjuncts, 36 conjuncts are in the unsatisfiable core [2024-12-02 12:45:07,555 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:45:07,892 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 60 proven. 25 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 12:45:07,892 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:45:08,364 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 16 proven. 17 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 12:45:08,364 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [204875952] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:45:08,364 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:45:08,364 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 10, 10] total 23 [2024-12-02 12:45:08,364 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074535287] [2024-12-02 12:45:08,364 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:45:08,365 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-12-02 12:45:08,365 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:45:08,365 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-12-02 12:45:08,366 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=430, Unknown=0, NotChecked=0, Total=506 [2024-12-02 12:45:08,366 INFO L87 Difference]: Start difference. First operand 14617 states and 18948 transitions. Second operand has 23 states, 23 states have (on average 12.304347826086957) internal successors, (283), 22 states have internal predecessors, (283), 9 states have call successors, (41), 5 states have call predecessors, (41), 6 states have return successors, (41), 10 states have call predecessors, (41), 9 states have call successors, (41) [2024-12-02 12:45:16,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:45:16,163 INFO L93 Difference]: Finished difference Result 37046 states and 48231 transitions. [2024-12-02 12:45:16,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 128 states. [2024-12-02 12:45:16,164 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 12.304347826086957) internal successors, (283), 22 states have internal predecessors, (283), 9 states have call successors, (41), 5 states have call predecessors, (41), 6 states have return successors, (41), 10 states have call predecessors, (41), 9 states have call successors, (41) Word has length 171 [2024-12-02 12:45:16,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:45:16,206 INFO L225 Difference]: With dead ends: 37046 [2024-12-02 12:45:16,207 INFO L226 Difference]: Without dead ends: 22749 [2024-12-02 12:45:16,231 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 519 GetRequests, 375 SyntacticMatches, 0 SemanticMatches, 144 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8002 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=2714, Invalid=18456, Unknown=0, NotChecked=0, Total=21170 [2024-12-02 12:45:16,231 INFO L435 NwaCegarLoop]: 382 mSDtfsCounter, 3737 mSDsluCounter, 4045 mSDsCounter, 0 mSdLazyCounter, 2303 mSolverCounterSat, 1070 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3737 SdHoareTripleChecker+Valid, 4427 SdHoareTripleChecker+Invalid, 3373 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1070 IncrementalHoareTripleChecker+Valid, 2303 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2024-12-02 12:45:16,231 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3737 Valid, 4427 Invalid, 3373 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1070 Valid, 2303 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2024-12-02 12:45:16,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22749 states. [2024-12-02 12:45:19,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22749 to 21444. [2024-12-02 12:45:19,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21444 states, 15755 states have (on average 1.3002856236115519) internal successors, (20486), 15914 states have internal predecessors, (20486), 3670 states have call successors, (3670), 2018 states have call predecessors, (3670), 2018 states have return successors, (3670), 3511 states have call predecessors, (3670), 3670 states have call successors, (3670) [2024-12-02 12:45:19,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21444 states to 21444 states and 27826 transitions. [2024-12-02 12:45:19,681 INFO L78 Accepts]: Start accepts. Automaton has 21444 states and 27826 transitions. Word has length 171 [2024-12-02 12:45:19,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:45:19,681 INFO L471 AbstractCegarLoop]: Abstraction has 21444 states and 27826 transitions. [2024-12-02 12:45:19,681 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 12.304347826086957) internal successors, (283), 22 states have internal predecessors, (283), 9 states have call successors, (41), 5 states have call predecessors, (41), 6 states have return successors, (41), 10 states have call predecessors, (41), 9 states have call successors, (41) [2024-12-02 12:45:19,681 INFO L276 IsEmpty]: Start isEmpty. Operand 21444 states and 27826 transitions. [2024-12-02 12:45:19,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-12-02 12:45:19,687 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:45:19,687 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:45:19,697 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-12-02 12:45:19,887 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:45:19,887 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:45:19,888 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:45:19,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1352529230, now seen corresponding path program 1 times [2024-12-02 12:45:19,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:45:19,888 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154086825] [2024-12-02 12:45:19,888 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:19,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:45:19,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:20,590 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 24 proven. 10 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 12:45:20,590 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:45:20,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154086825] [2024-12-02 12:45:20,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1154086825] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:45:20,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1137750454] [2024-12-02 12:45:20,591 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:20,591 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:45:20,591 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:45:20,592 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:45:20,593 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 12:45:20,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:20,808 INFO L256 TraceCheckSpWp]: Trace formula consists of 791 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 12:45:20,810 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:45:20,903 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 52 proven. 4 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-12-02 12:45:20,903 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:45:20,999 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 29 proven. 2 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-12-02 12:45:20,999 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1137750454] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:45:20,999 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:45:21,000 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 7] total 15 [2024-12-02 12:45:21,000 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [659860309] [2024-12-02 12:45:21,000 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:45:21,000 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-12-02 12:45:21,001 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:45:21,001 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-12-02 12:45:21,001 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2024-12-02 12:45:21,001 INFO L87 Difference]: Start difference. First operand 21444 states and 27826 transitions. Second operand has 15 states, 15 states have (on average 13.866666666666667) internal successors, (208), 14 states have internal predecessors, (208), 6 states have call successors, (37), 4 states have call predecessors, (37), 6 states have return successors, (37), 7 states have call predecessors, (37), 6 states have call successors, (37) [2024-12-02 12:45:25,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:45:25,635 INFO L93 Difference]: Finished difference Result 43794 states and 56753 transitions. [2024-12-02 12:45:25,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-12-02 12:45:25,635 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 13.866666666666667) internal successors, (208), 14 states have internal predecessors, (208), 6 states have call successors, (37), 4 states have call predecessors, (37), 6 states have return successors, (37), 7 states have call predecessors, (37), 6 states have call successors, (37) Word has length 171 [2024-12-02 12:45:25,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:45:25,757 INFO L225 Difference]: With dead ends: 43794 [2024-12-02 12:45:25,757 INFO L226 Difference]: Without dead ends: 22565 [2024-12-02 12:45:25,784 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 386 GetRequests, 348 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 318 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=249, Invalid=1311, Unknown=0, NotChecked=0, Total=1560 [2024-12-02 12:45:25,785 INFO L435 NwaCegarLoop]: 365 mSDtfsCounter, 1303 mSDsluCounter, 2818 mSDsCounter, 0 mSdLazyCounter, 842 mSolverCounterSat, 483 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1303 SdHoareTripleChecker+Valid, 3183 SdHoareTripleChecker+Invalid, 1325 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 483 IncrementalHoareTripleChecker+Valid, 842 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 12:45:25,785 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1303 Valid, 3183 Invalid, 1325 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [483 Valid, 842 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 12:45:25,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22565 states. [2024-12-02 12:45:29,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22565 to 22147. [2024-12-02 12:45:29,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22147 states, 16282 states have (on average 1.2995332268763051) internal successors, (21159), 16446 states have internal predecessors, (21159), 3781 states have call successors, (3781), 2083 states have call predecessors, (3781), 2083 states have return successors, (3781), 3617 states have call predecessors, (3781), 3781 states have call successors, (3781) [2024-12-02 12:45:29,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22147 states to 22147 states and 28721 transitions. [2024-12-02 12:45:29,711 INFO L78 Accepts]: Start accepts. Automaton has 22147 states and 28721 transitions. Word has length 171 [2024-12-02 12:45:29,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:45:29,712 INFO L471 AbstractCegarLoop]: Abstraction has 22147 states and 28721 transitions. [2024-12-02 12:45:29,712 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 13.866666666666667) internal successors, (208), 14 states have internal predecessors, (208), 6 states have call successors, (37), 4 states have call predecessors, (37), 6 states have return successors, (37), 7 states have call predecessors, (37), 6 states have call successors, (37) [2024-12-02 12:45:29,712 INFO L276 IsEmpty]: Start isEmpty. Operand 22147 states and 28721 transitions. [2024-12-02 12:45:29,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2024-12-02 12:45:29,718 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:45:29,718 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:45:29,724 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-12-02 12:45:29,918 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2024-12-02 12:45:29,919 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:45:29,919 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:45:29,919 INFO L85 PathProgramCache]: Analyzing trace with hash -1832071165, now seen corresponding path program 1 times [2024-12-02 12:45:29,919 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:45:29,919 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1823761342] [2024-12-02 12:45:29,919 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:29,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:45:29,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:30,275 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 23 proven. 7 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 12:45:30,275 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:45:30,275 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1823761342] [2024-12-02 12:45:30,275 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1823761342] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:45:30,275 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [382146353] [2024-12-02 12:45:30,275 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:30,275 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:45:30,275 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:45:30,277 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:45:30,278 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 12:45:30,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:30,482 INFO L256 TraceCheckSpWp]: Trace formula consists of 825 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-12-02 12:45:30,485 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:45:30,864 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 76 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-12-02 12:45:30,864 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:45:31,309 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 23 proven. 7 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 12:45:31,309 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [382146353] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:45:31,310 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:45:31,310 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 10] total 22 [2024-12-02 12:45:31,310 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318523724] [2024-12-02 12:45:31,310 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:45:31,310 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-12-02 12:45:31,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:45:31,311 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-12-02 12:45:31,311 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=368, Unknown=0, NotChecked=0, Total=462 [2024-12-02 12:45:31,311 INFO L87 Difference]: Start difference. First operand 22147 states and 28721 transitions. Second operand has 22 states, 22 states have (on average 11.590909090909092) internal successors, (255), 21 states have internal predecessors, (255), 8 states have call successors, (34), 5 states have call predecessors, (34), 6 states have return successors, (34), 9 states have call predecessors, (34), 8 states have call successors, (34) [2024-12-02 12:45:35,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:45:35,988 INFO L93 Difference]: Finished difference Result 43999 states and 57130 transitions. [2024-12-02 12:45:35,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-12-02 12:45:35,988 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 11.590909090909092) internal successors, (255), 21 states have internal predecessors, (255), 8 states have call successors, (34), 5 states have call predecessors, (34), 6 states have return successors, (34), 9 states have call predecessors, (34), 8 states have call successors, (34) Word has length 179 [2024-12-02 12:45:35,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:45:36,045 INFO L225 Difference]: With dead ends: 43999 [2024-12-02 12:45:36,046 INFO L226 Difference]: Without dead ends: 22172 [2024-12-02 12:45:36,074 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 398 GetRequests, 356 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 435 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=402, Invalid=1490, Unknown=0, NotChecked=0, Total=1892 [2024-12-02 12:45:36,074 INFO L435 NwaCegarLoop]: 366 mSDtfsCounter, 1401 mSDsluCounter, 2907 mSDsCounter, 0 mSdLazyCounter, 1667 mSolverCounterSat, 344 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1401 SdHoareTripleChecker+Valid, 3273 SdHoareTripleChecker+Invalid, 2011 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 344 IncrementalHoareTripleChecker+Valid, 1667 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:45:36,074 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1401 Valid, 3273 Invalid, 2011 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [344 Valid, 1667 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-12-02 12:45:36,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22172 states. [2024-12-02 12:45:39,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22172 to 22080. [2024-12-02 12:45:39,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22080 states, 16225 states have (on average 1.2989830508474576) internal successors, (21076), 16389 states have internal predecessors, (21076), 3776 states have call successors, (3776), 2078 states have call predecessors, (3776), 2078 states have return successors, (3776), 3612 states have call predecessors, (3776), 3776 states have call successors, (3776) [2024-12-02 12:45:39,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22080 states to 22080 states and 28628 transitions. [2024-12-02 12:45:39,930 INFO L78 Accepts]: Start accepts. Automaton has 22080 states and 28628 transitions. Word has length 179 [2024-12-02 12:45:39,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:45:39,931 INFO L471 AbstractCegarLoop]: Abstraction has 22080 states and 28628 transitions. [2024-12-02 12:45:39,931 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 11.590909090909092) internal successors, (255), 21 states have internal predecessors, (255), 8 states have call successors, (34), 5 states have call predecessors, (34), 6 states have return successors, (34), 9 states have call predecessors, (34), 8 states have call successors, (34) [2024-12-02 12:45:39,931 INFO L276 IsEmpty]: Start isEmpty. Operand 22080 states and 28628 transitions. [2024-12-02 12:45:39,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2024-12-02 12:45:39,937 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:45:39,937 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:45:39,944 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-12-02 12:45:40,138 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:45:40,138 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:45:40,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:45:40,138 INFO L85 PathProgramCache]: Analyzing trace with hash 648932033, now seen corresponding path program 1 times [2024-12-02 12:45:40,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:45:40,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1362533283] [2024-12-02 12:45:40,138 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:40,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:45:40,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:40,814 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 12:45:40,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:45:40,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1362533283] [2024-12-02 12:45:40,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1362533283] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:45:40,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1569587317] [2024-12-02 12:45:40,814 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:40,814 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:45:40,815 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:45:40,816 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:45:40,817 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-12-02 12:45:41,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:41,052 INFO L256 TraceCheckSpWp]: Trace formula consists of 824 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-12-02 12:45:41,054 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:45:41,257 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 63 proven. 27 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-12-02 12:45:41,257 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:45:41,447 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 18 proven. 15 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 12:45:41,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1569587317] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:45:41,447 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:45:41,447 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 7] total 20 [2024-12-02 12:45:41,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [886458142] [2024-12-02 12:45:41,447 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:45:41,448 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2024-12-02 12:45:41,448 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:45:41,448 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2024-12-02 12:45:41,448 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2024-12-02 12:45:41,448 INFO L87 Difference]: Start difference. First operand 22080 states and 28628 transitions. Second operand has 20 states, 20 states have (on average 12.65) internal successors, (253), 20 states have internal predecessors, (253), 8 states have call successors, (44), 5 states have call predecessors, (44), 6 states have return successors, (43), 8 states have call predecessors, (43), 8 states have call successors, (43) [2024-12-02 12:45:47,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:45:47,650 INFO L93 Difference]: Finished difference Result 46445 states and 60207 transitions. [2024-12-02 12:45:47,650 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2024-12-02 12:45:47,650 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 12.65) internal successors, (253), 20 states have internal predecessors, (253), 8 states have call successors, (44), 5 states have call predecessors, (44), 6 states have return successors, (43), 8 states have call predecessors, (43), 8 states have call successors, (43) Word has length 179 [2024-12-02 12:45:47,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:45:47,711 INFO L225 Difference]: With dead ends: 46445 [2024-12-02 12:45:47,711 INFO L226 Difference]: Without dead ends: 24685 [2024-12-02 12:45:47,736 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 407 GetRequests, 360 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 450 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=388, Invalid=1964, Unknown=0, NotChecked=0, Total=2352 [2024-12-02 12:45:47,736 INFO L435 NwaCegarLoop]: 547 mSDtfsCounter, 1469 mSDsluCounter, 4692 mSDsCounter, 0 mSdLazyCounter, 2996 mSolverCounterSat, 475 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1469 SdHoareTripleChecker+Valid, 5239 SdHoareTripleChecker+Invalid, 3471 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 475 IncrementalHoareTripleChecker+Valid, 2996 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-02 12:45:47,736 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1469 Valid, 5239 Invalid, 3471 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [475 Valid, 2996 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-02 12:45:47,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24685 states. [2024-12-02 12:45:51,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24685 to 23559. [2024-12-02 12:45:51,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23559 states, 17336 states have (on average 1.2966658975542225) internal successors, (22479), 17510 states have internal predecessors, (22479), 4000 states have call successors, (4000), 2222 states have call predecessors, (4000), 2222 states have return successors, (4000), 3826 states have call predecessors, (4000), 4000 states have call successors, (4000) [2024-12-02 12:45:51,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23559 states to 23559 states and 30479 transitions. [2024-12-02 12:45:51,612 INFO L78 Accepts]: Start accepts. Automaton has 23559 states and 30479 transitions. Word has length 179 [2024-12-02 12:45:51,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:45:51,613 INFO L471 AbstractCegarLoop]: Abstraction has 23559 states and 30479 transitions. [2024-12-02 12:45:51,613 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 12.65) internal successors, (253), 20 states have internal predecessors, (253), 8 states have call successors, (44), 5 states have call predecessors, (44), 6 states have return successors, (43), 8 states have call predecessors, (43), 8 states have call successors, (43) [2024-12-02 12:45:51,613 INFO L276 IsEmpty]: Start isEmpty. Operand 23559 states and 30479 transitions. [2024-12-02 12:45:51,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2024-12-02 12:45:51,618 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:45:51,618 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:45:51,625 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-12-02 12:45:51,818 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:45:51,818 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:45:51,819 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:45:51,819 INFO L85 PathProgramCache]: Analyzing trace with hash -1840403702, now seen corresponding path program 1 times [2024-12-02 12:45:51,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:45:51,819 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081301245] [2024-12-02 12:45:51,819 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:51,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:45:51,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:52,328 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 29 proven. 8 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-12-02 12:45:52,329 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:45:52,329 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2081301245] [2024-12-02 12:45:52,329 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2081301245] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:45:52,329 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [240707197] [2024-12-02 12:45:52,329 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:45:52,329 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:45:52,329 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:45:52,330 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:45:52,331 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-12-02 12:45:52,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:45:52,539 INFO L256 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 29 conjuncts are in the unsatisfiable core [2024-12-02 12:45:52,542 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:45:53,066 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 64 proven. 28 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-12-02 12:45:53,066 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:45:53,665 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 15 proven. 16 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 12:45:53,665 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [240707197] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:45:53,665 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:45:53,665 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 10] total 23 [2024-12-02 12:45:53,665 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [660929223] [2024-12-02 12:45:53,665 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:45:53,665 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-12-02 12:45:53,665 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:45:53,666 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-12-02 12:45:53,666 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=428, Unknown=0, NotChecked=0, Total=506 [2024-12-02 12:45:53,666 INFO L87 Difference]: Start difference. First operand 23559 states and 30479 transitions. Second operand has 23 states, 22 states have (on average 13.409090909090908) internal successors, (295), 21 states have internal predecessors, (295), 10 states have call successors, (43), 6 states have call predecessors, (43), 7 states have return successors, (42), 11 states have call predecessors, (42), 10 states have call successors, (42) [2024-12-02 12:46:02,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:46:02,496 INFO L93 Difference]: Finished difference Result 59818 states and 77371 transitions. [2024-12-02 12:46:02,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-12-02 12:46:02,496 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 13.409090909090908) internal successors, (295), 21 states have internal predecessors, (295), 10 states have call successors, (43), 6 states have call predecessors, (43), 7 states have return successors, (42), 11 states have call predecessors, (42), 10 states have call successors, (42) Word has length 180 [2024-12-02 12:46:02,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:46:02,581 INFO L225 Difference]: With dead ends: 59818 [2024-12-02 12:46:02,581 INFO L226 Difference]: Without dead ends: 36474 [2024-12-02 12:46:02,610 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 418 GetRequests, 362 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 780 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=685, Invalid=2621, Unknown=0, NotChecked=0, Total=3306 [2024-12-02 12:46:02,611 INFO L435 NwaCegarLoop]: 463 mSDtfsCounter, 1533 mSDsluCounter, 3974 mSDsCounter, 0 mSdLazyCounter, 2003 mSolverCounterSat, 497 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1533 SdHoareTripleChecker+Valid, 4437 SdHoareTripleChecker+Invalid, 2500 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 497 IncrementalHoareTripleChecker+Valid, 2003 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2024-12-02 12:46:02,611 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1533 Valid, 4437 Invalid, 2500 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [497 Valid, 2003 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2024-12-02 12:46:02,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36474 states. [2024-12-02 12:46:08,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36474 to 30017. [2024-12-02 12:46:08,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30017 states, 21995 states have (on average 1.2977040236417368) internal successors, (28543), 22226 states have internal predecessors, (28543), 5175 states have call successors, (5175), 2846 states have call predecessors, (5175), 2846 states have return successors, (5175), 4944 states have call predecessors, (5175), 5175 states have call successors, (5175) [2024-12-02 12:46:08,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30017 states to 30017 states and 38893 transitions. [2024-12-02 12:46:08,636 INFO L78 Accepts]: Start accepts. Automaton has 30017 states and 38893 transitions. Word has length 180 [2024-12-02 12:46:08,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:46:08,636 INFO L471 AbstractCegarLoop]: Abstraction has 30017 states and 38893 transitions. [2024-12-02 12:46:08,636 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 13.409090909090908) internal successors, (295), 21 states have internal predecessors, (295), 10 states have call successors, (43), 6 states have call predecessors, (43), 7 states have return successors, (42), 11 states have call predecessors, (42), 10 states have call successors, (42) [2024-12-02 12:46:08,637 INFO L276 IsEmpty]: Start isEmpty. Operand 30017 states and 38893 transitions. [2024-12-02 12:46:08,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2024-12-02 12:46:08,643 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:46:08,643 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:46:08,650 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-12-02 12:46:08,843 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:46:08,844 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:46:08,844 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:46:08,844 INFO L85 PathProgramCache]: Analyzing trace with hash -886698347, now seen corresponding path program 1 times [2024-12-02 12:46:08,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:46:08,844 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642720901] [2024-12-02 12:46:08,844 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:46:08,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:46:08,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:46:09,247 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 20 proven. 10 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2024-12-02 12:46:09,248 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:46:09,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1642720901] [2024-12-02 12:46:09,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1642720901] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:46:09,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1997206486] [2024-12-02 12:46:09,248 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:46:09,248 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:46:09,248 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:46:09,250 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:46:09,250 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-12-02 12:46:09,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:46:09,488 INFO L256 TraceCheckSpWp]: Trace formula consists of 843 conjuncts, 36 conjuncts are in the unsatisfiable core [2024-12-02 12:46:09,490 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:46:09,837 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 77 proven. 14 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-02 12:46:09,837 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:46:10,367 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 20 proven. 10 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2024-12-02 12:46:10,367 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1997206486] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:46:10,367 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:46:10,367 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 10] total 20 [2024-12-02 12:46:10,367 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495232378] [2024-12-02 12:46:10,367 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:46:10,368 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2024-12-02 12:46:10,368 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:46:10,368 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2024-12-02 12:46:10,368 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=306, Unknown=0, NotChecked=0, Total=380 [2024-12-02 12:46:10,368 INFO L87 Difference]: Start difference. First operand 30017 states and 38893 transitions. Second operand has 20 states, 20 states have (on average 12.25) internal successors, (245), 19 states have internal predecessors, (245), 7 states have call successors, (36), 5 states have call predecessors, (36), 6 states have return successors, (36), 8 states have call predecessors, (36), 7 states have call successors, (36) [2024-12-02 12:46:18,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:46:18,351 INFO L93 Difference]: Finished difference Result 66469 states and 86274 transitions. [2024-12-02 12:46:18,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-12-02 12:46:18,351 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 12.25) internal successors, (245), 19 states have internal predecessors, (245), 7 states have call successors, (36), 5 states have call predecessors, (36), 6 states have return successors, (36), 8 states have call predecessors, (36), 7 states have call successors, (36) Word has length 187 [2024-12-02 12:46:18,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:46:18,460 INFO L225 Difference]: With dead ends: 66469 [2024-12-02 12:46:18,460 INFO L226 Difference]: Without dead ends: 36772 [2024-12-02 12:46:18,503 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 408 GetRequests, 371 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=280, Invalid=1202, Unknown=0, NotChecked=0, Total=1482 [2024-12-02 12:46:18,503 INFO L435 NwaCegarLoop]: 385 mSDtfsCounter, 944 mSDsluCounter, 3204 mSDsCounter, 0 mSdLazyCounter, 2048 mSolverCounterSat, 217 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 944 SdHoareTripleChecker+Valid, 3589 SdHoareTripleChecker+Invalid, 2265 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 217 IncrementalHoareTripleChecker+Valid, 2048 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-12-02 12:46:18,504 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [944 Valid, 3589 Invalid, 2265 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [217 Valid, 2048 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-12-02 12:46:18,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36772 states. [2024-12-02 12:46:26,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36772 to 36325. [2024-12-02 12:46:26,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36325 states, 26614 states have (on average 1.2978883294506651) internal successors, (34542), 26895 states have internal predecessors, (34542), 6273 states have call successors, (6273), 3437 states have call predecessors, (6273), 3437 states have return successors, (6273), 5992 states have call predecessors, (6273), 6273 states have call successors, (6273) [2024-12-02 12:46:26,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36325 states to 36325 states and 47088 transitions. [2024-12-02 12:46:26,556 INFO L78 Accepts]: Start accepts. Automaton has 36325 states and 47088 transitions. Word has length 187 [2024-12-02 12:46:26,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:46:26,557 INFO L471 AbstractCegarLoop]: Abstraction has 36325 states and 47088 transitions. [2024-12-02 12:46:26,557 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 12.25) internal successors, (245), 19 states have internal predecessors, (245), 7 states have call successors, (36), 5 states have call predecessors, (36), 6 states have return successors, (36), 8 states have call predecessors, (36), 7 states have call successors, (36) [2024-12-02 12:46:26,557 INFO L276 IsEmpty]: Start isEmpty. Operand 36325 states and 47088 transitions. [2024-12-02 12:46:26,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2024-12-02 12:46:26,562 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:46:26,562 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:46:26,569 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-12-02 12:46:26,762 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:46:26,763 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:46:26,763 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:46:26,763 INFO L85 PathProgramCache]: Analyzing trace with hash 933389200, now seen corresponding path program 1 times [2024-12-02 12:46:26,763 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:46:26,763 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33899943] [2024-12-02 12:46:26,763 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:46:26,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:46:26,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:46:27,540 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 16 proven. 22 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-12-02 12:46:27,540 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:46:27,540 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33899943] [2024-12-02 12:46:27,540 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [33899943] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:46:27,540 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1627358797] [2024-12-02 12:46:27,540 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:46:27,540 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:46:27,540 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:46:27,542 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:46:27,543 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-12-02 12:46:27,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:46:27,781 INFO L256 TraceCheckSpWp]: Trace formula consists of 842 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-12-02 12:46:27,784 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:46:28,028 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 25 proven. 66 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-02 12:46:28,028 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:46:28,325 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 16 proven. 22 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-12-02 12:46:28,326 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1627358797] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:46:28,326 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:46:28,326 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12, 9] total 25 [2024-12-02 12:46:28,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919278037] [2024-12-02 12:46:28,326 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:46:28,326 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-12-02 12:46:28,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:46:28,327 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-12-02 12:46:28,327 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=516, Unknown=0, NotChecked=0, Total=600 [2024-12-02 12:46:28,327 INFO L87 Difference]: Start difference. First operand 36325 states and 47088 transitions. Second operand has 25 states, 25 states have (on average 11.96) internal successors, (299), 22 states have internal predecessors, (299), 9 states have call successors, (44), 5 states have call predecessors, (44), 9 states have return successors, (43), 12 states have call predecessors, (43), 9 states have call successors, (43) [2024-12-02 12:46:35,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:46:35,970 INFO L93 Difference]: Finished difference Result 64918 states and 83102 transitions. [2024-12-02 12:46:35,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-12-02 12:46:35,971 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 11.96) internal successors, (299), 22 states have internal predecessors, (299), 9 states have call successors, (44), 5 states have call predecessors, (44), 9 states have return successors, (43), 12 states have call predecessors, (43), 9 states have call successors, (43) Word has length 187 [2024-12-02 12:46:35,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:46:36,057 INFO L225 Difference]: With dead ends: 64918 [2024-12-02 12:46:36,057 INFO L226 Difference]: Without dead ends: 28320 [2024-12-02 12:46:36,104 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 414 GetRequests, 369 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 460 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=432, Invalid=1730, Unknown=0, NotChecked=0, Total=2162 [2024-12-02 12:46:36,104 INFO L435 NwaCegarLoop]: 318 mSDtfsCounter, 2599 mSDsluCounter, 3125 mSDsCounter, 0 mSdLazyCounter, 1268 mSolverCounterSat, 937 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2599 SdHoareTripleChecker+Valid, 3443 SdHoareTripleChecker+Invalid, 2205 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 937 IncrementalHoareTripleChecker+Valid, 1268 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:46:36,104 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2599 Valid, 3443 Invalid, 2205 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [937 Valid, 1268 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-12-02 12:46:36,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28320 states. [2024-12-02 12:46:40,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28320 to 20873. [2024-12-02 12:46:40,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20873 states, 15485 states have (on average 1.280852437843074) internal successors, (19834), 15647 states have internal predecessors, (19834), 3408 states have call successors, (3408), 1979 states have call predecessors, (3408), 1979 states have return successors, (3408), 3246 states have call predecessors, (3408), 3408 states have call successors, (3408) [2024-12-02 12:46:40,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20873 states to 20873 states and 26650 transitions. [2024-12-02 12:46:40,474 INFO L78 Accepts]: Start accepts. Automaton has 20873 states and 26650 transitions. Word has length 187 [2024-12-02 12:46:40,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:46:40,475 INFO L471 AbstractCegarLoop]: Abstraction has 20873 states and 26650 transitions. [2024-12-02 12:46:40,475 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 11.96) internal successors, (299), 22 states have internal predecessors, (299), 9 states have call successors, (44), 5 states have call predecessors, (44), 9 states have return successors, (43), 12 states have call predecessors, (43), 9 states have call successors, (43) [2024-12-02 12:46:40,475 INFO L276 IsEmpty]: Start isEmpty. Operand 20873 states and 26650 transitions. [2024-12-02 12:46:40,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2024-12-02 12:46:40,478 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:46:40,478 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:46:40,485 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-12-02 12:46:40,678 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:46:40,679 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:46:40,679 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:46:40,679 INFO L85 PathProgramCache]: Analyzing trace with hash -587553829, now seen corresponding path program 1 times [2024-12-02 12:46:40,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:46:40,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181316552] [2024-12-02 12:46:40,679 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:46:40,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:46:40,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:46:40,813 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2024-12-02 12:46:40,813 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:46:40,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1181316552] [2024-12-02 12:46:40,813 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1181316552] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:46:40,813 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:46:40,813 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 12:46:40,813 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1700663660] [2024-12-02 12:46:40,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:46:40,814 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 12:46:40,814 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:46:40,814 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 12:46:40,814 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:46:40,814 INFO L87 Difference]: Start difference. First operand 20873 states and 26650 transitions. Second operand has 7 states, 7 states have (on average 15.142857142857142) internal successors, (106), 6 states have internal predecessors, (106), 3 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (17), 3 states have call predecessors, (17), 2 states have call successors, (17) [2024-12-02 12:46:47,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:46:47,279 INFO L93 Difference]: Finished difference Result 50390 states and 63968 transitions. [2024-12-02 12:46:47,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 12:46:47,280 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 15.142857142857142) internal successors, (106), 6 states have internal predecessors, (106), 3 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (17), 3 states have call predecessors, (17), 2 states have call successors, (17) Word has length 190 [2024-12-02 12:46:47,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:46:47,360 INFO L225 Difference]: With dead ends: 50390 [2024-12-02 12:46:47,360 INFO L226 Difference]: Without dead ends: 29807 [2024-12-02 12:46:47,383 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 12:46:47,384 INFO L435 NwaCegarLoop]: 394 mSDtfsCounter, 203 mSDsluCounter, 1740 mSDsCounter, 0 mSdLazyCounter, 119 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 207 SdHoareTripleChecker+Valid, 2134 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 119 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:46:47,384 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [207 Valid, 2134 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 119 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:46:47,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29807 states. [2024-12-02 12:46:52,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29807 to 25882. [2024-12-02 12:46:52,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25882 states, 19138 states have (on average 1.2715539763820671) internal successors, (24335), 19341 states have internal predecessors, (24335), 4231 states have call successors, (4231), 2512 states have call predecessors, (4231), 2512 states have return successors, (4231), 4028 states have call predecessors, (4231), 4231 states have call successors, (4231) [2024-12-02 12:46:52,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25882 states to 25882 states and 32797 transitions. [2024-12-02 12:46:52,864 INFO L78 Accepts]: Start accepts. Automaton has 25882 states and 32797 transitions. Word has length 190 [2024-12-02 12:46:52,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:46:52,864 INFO L471 AbstractCegarLoop]: Abstraction has 25882 states and 32797 transitions. [2024-12-02 12:46:52,864 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 15.142857142857142) internal successors, (106), 6 states have internal predecessors, (106), 3 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (17), 3 states have call predecessors, (17), 2 states have call successors, (17) [2024-12-02 12:46:52,864 INFO L276 IsEmpty]: Start isEmpty. Operand 25882 states and 32797 transitions. [2024-12-02 12:46:52,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2024-12-02 12:46:52,868 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:46:52,868 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 5, 5, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:46:52,868 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-12-02 12:46:52,868 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:46:52,868 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:46:52,868 INFO L85 PathProgramCache]: Analyzing trace with hash 635405493, now seen corresponding path program 1 times [2024-12-02 12:46:52,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:46:52,868 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1003791045] [2024-12-02 12:46:52,868 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:46:52,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:46:52,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:46:53,010 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 14 proven. 33 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2024-12-02 12:46:53,010 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:46:53,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1003791045] [2024-12-02 12:46:53,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1003791045] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:46:53,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1951114410] [2024-12-02 12:46:53,010 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:46:53,010 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:46:53,011 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:46:53,012 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:46:53,013 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-12-02 12:46:53,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:46:53,239 INFO L256 TraceCheckSpWp]: Trace formula consists of 847 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-12-02 12:46:53,241 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:46:53,406 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 8 proven. 115 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-12-02 12:46:53,406 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:46:53,564 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 14 proven. 33 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2024-12-02 12:46:53,564 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1951114410] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:46:53,564 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:46:53,565 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 10 [2024-12-02 12:46:53,565 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1085751947] [2024-12-02 12:46:53,565 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:46:53,565 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 12:46:53,565 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:46:53,566 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 12:46:53,566 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2024-12-02 12:46:53,566 INFO L87 Difference]: Start difference. First operand 25882 states and 32797 transitions. Second operand has 10 states, 10 states have (on average 17.1) internal successors, (171), 9 states have internal predecessors, (171), 4 states have call successors, (38), 5 states have call predecessors, (38), 7 states have return successors, (37), 4 states have call predecessors, (37), 3 states have call successors, (37) [2024-12-02 12:47:00,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:47:00,597 INFO L93 Difference]: Finished difference Result 59312 states and 74337 transitions. [2024-12-02 12:47:00,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-12-02 12:47:00,597 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 17.1) internal successors, (171), 9 states have internal predecessors, (171), 4 states have call successors, (38), 5 states have call predecessors, (38), 7 states have return successors, (37), 4 states have call predecessors, (37), 3 states have call successors, (37) Word has length 196 [2024-12-02 12:47:00,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:47:00,783 INFO L225 Difference]: With dead ends: 59312 [2024-12-02 12:47:00,784 INFO L226 Difference]: Without dead ends: 33720 [2024-12-02 12:47:00,808 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 409 GetRequests, 388 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=267, Unknown=0, NotChecked=0, Total=342 [2024-12-02 12:47:00,809 INFO L435 NwaCegarLoop]: 282 mSDtfsCounter, 312 mSDsluCounter, 1817 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 313 SdHoareTripleChecker+Valid, 2099 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:47:00,809 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [313 Valid, 2099 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 12:47:00,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33720 states. [2024-12-02 12:47:07,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33720 to 29568. [2024-12-02 12:47:07,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29568 states, 21920 states have (on average 1.252874087591241) internal successors, (27463), 22146 states have internal predecessors, (27463), 4724 states have call successors, (4724), 2923 states have call predecessors, (4724), 2923 states have return successors, (4724), 4498 states have call predecessors, (4724), 4724 states have call successors, (4724) [2024-12-02 12:47:07,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29568 states to 29568 states and 36911 transitions. [2024-12-02 12:47:07,226 INFO L78 Accepts]: Start accepts. Automaton has 29568 states and 36911 transitions. Word has length 196 [2024-12-02 12:47:07,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:47:07,226 INFO L471 AbstractCegarLoop]: Abstraction has 29568 states and 36911 transitions. [2024-12-02 12:47:07,226 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 17.1) internal successors, (171), 9 states have internal predecessors, (171), 4 states have call successors, (38), 5 states have call predecessors, (38), 7 states have return successors, (37), 4 states have call predecessors, (37), 3 states have call successors, (37) [2024-12-02 12:47:07,226 INFO L276 IsEmpty]: Start isEmpty. Operand 29568 states and 36911 transitions. [2024-12-02 12:47:07,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2024-12-02 12:47:07,229 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:47:07,230 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:47:07,237 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2024-12-02 12:47:07,430 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:47:07,430 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:47:07,431 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:47:07,431 INFO L85 PathProgramCache]: Analyzing trace with hash -283356298, now seen corresponding path program 1 times [2024-12-02 12:47:07,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:47:07,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [44713833] [2024-12-02 12:47:07,431 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:47:07,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:47:07,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:47:07,956 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 21 proven. 27 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-12-02 12:47:07,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:47:07,956 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [44713833] [2024-12-02 12:47:07,956 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [44713833] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:47:07,956 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1211360418] [2024-12-02 12:47:07,956 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:47:07,956 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:47:07,957 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:47:07,958 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:47:07,959 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-12-02 12:47:08,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:47:08,184 INFO L256 TraceCheckSpWp]: Trace formula consists of 848 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-12-02 12:47:08,186 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:47:08,402 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 63 proven. 60 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-02 12:47:08,402 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:47:08,646 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 22 proven. 26 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-12-02 12:47:08,646 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1211360418] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:47:08,646 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:47:08,646 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 8] total 24 [2024-12-02 12:47:08,646 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2132541287] [2024-12-02 12:47:08,646 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:47:08,647 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-12-02 12:47:08,647 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:47:08,648 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-12-02 12:47:08,648 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=466, Unknown=0, NotChecked=0, Total=552 [2024-12-02 12:47:08,648 INFO L87 Difference]: Start difference. First operand 29568 states and 36911 transitions. Second operand has 24 states, 24 states have (on average 12.041666666666666) internal successors, (289), 21 states have internal predecessors, (289), 9 states have call successors, (46), 4 states have call predecessors, (46), 8 states have return successors, (45), 12 states have call predecessors, (45), 9 states have call successors, (45) [2024-12-02 12:47:16,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:47:16,504 INFO L93 Difference]: Finished difference Result 54867 states and 68522 transitions. [2024-12-02 12:47:16,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-12-02 12:47:16,505 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 12.041666666666666) internal successors, (289), 21 states have internal predecessors, (289), 9 states have call successors, (46), 4 states have call predecessors, (46), 8 states have return successors, (45), 12 states have call predecessors, (45), 9 states have call successors, (45) Word has length 196 [2024-12-02 12:47:16,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:47:16,589 INFO L225 Difference]: With dead ends: 54867 [2024-12-02 12:47:16,589 INFO L226 Difference]: Without dead ends: 28740 [2024-12-02 12:47:16,618 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 432 GetRequests, 385 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 437 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=426, Invalid=1926, Unknown=0, NotChecked=0, Total=2352 [2024-12-02 12:47:16,619 INFO L435 NwaCegarLoop]: 627 mSDtfsCounter, 797 mSDsluCounter, 5891 mSDsCounter, 0 mSdLazyCounter, 1203 mSolverCounterSat, 209 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 802 SdHoareTripleChecker+Valid, 6518 SdHoareTripleChecker+Invalid, 1412 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 209 IncrementalHoareTripleChecker+Valid, 1203 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 12:47:16,619 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [802 Valid, 6518 Invalid, 1412 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [209 Valid, 1203 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 12:47:16,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28740 states. [2024-12-02 12:47:22,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28740 to 27221. [2024-12-02 12:47:22,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27221 states, 20250 states have (on average 1.238320987654321) internal successors, (25076), 20460 states have internal predecessors, (25076), 4219 states have call successors, (4219), 2751 states have call predecessors, (4219), 2751 states have return successors, (4219), 4009 states have call predecessors, (4219), 4219 states have call successors, (4219) [2024-12-02 12:47:22,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27221 states to 27221 states and 33514 transitions. [2024-12-02 12:47:22,760 INFO L78 Accepts]: Start accepts. Automaton has 27221 states and 33514 transitions. Word has length 196 [2024-12-02 12:47:22,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:47:22,760 INFO L471 AbstractCegarLoop]: Abstraction has 27221 states and 33514 transitions. [2024-12-02 12:47:22,760 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 12.041666666666666) internal successors, (289), 21 states have internal predecessors, (289), 9 states have call successors, (46), 4 states have call predecessors, (46), 8 states have return successors, (45), 12 states have call predecessors, (45), 9 states have call successors, (45) [2024-12-02 12:47:22,760 INFO L276 IsEmpty]: Start isEmpty. Operand 27221 states and 33514 transitions. [2024-12-02 12:47:22,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2024-12-02 12:47:22,763 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:47:22,763 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:47:22,771 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2024-12-02 12:47:22,964 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:47:22,964 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:47:22,964 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:47:22,964 INFO L85 PathProgramCache]: Analyzing trace with hash 1611689432, now seen corresponding path program 1 times [2024-12-02 12:47:22,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:47:22,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593141359] [2024-12-02 12:47:22,964 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:47:22,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:47:23,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:47:23,426 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 103 trivial. 0 not checked. [2024-12-02 12:47:23,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:47:23,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593141359] [2024-12-02 12:47:23,427 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [593141359] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 12:47:23,427 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 12:47:23,427 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 12:47:23,427 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2070271777] [2024-12-02 12:47:23,427 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 12:47:23,427 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 12:47:23,427 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:47:23,428 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 12:47:23,428 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:47:23,428 INFO L87 Difference]: Start difference. First operand 27221 states and 33514 transitions. Second operand has 7 states, 7 states have (on average 16.714285714285715) internal successors, (117), 6 states have internal predecessors, (117), 3 states have call successors, (19), 2 states have call predecessors, (19), 2 states have return successors, (18), 3 states have call predecessors, (18), 2 states have call successors, (18) [2024-12-02 12:47:29,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:47:29,906 INFO L93 Difference]: Finished difference Result 51167 states and 63411 transitions. [2024-12-02 12:47:29,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 12:47:29,906 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.714285714285715) internal successors, (117), 6 states have internal predecessors, (117), 3 states have call successors, (19), 2 states have call predecessors, (19), 2 states have return successors, (18), 3 states have call predecessors, (18), 2 states have call successors, (18) Word has length 196 [2024-12-02 12:47:29,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:47:29,997 INFO L225 Difference]: With dead ends: 51167 [2024-12-02 12:47:29,997 INFO L226 Difference]: Without dead ends: 27607 [2024-12-02 12:47:30,022 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-12-02 12:47:30,022 INFO L435 NwaCegarLoop]: 362 mSDtfsCounter, 492 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 199 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 498 SdHoareTripleChecker+Valid, 1550 SdHoareTripleChecker+Invalid, 226 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 199 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 12:47:30,022 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [498 Valid, 1550 Invalid, 226 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 199 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 12:47:30,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27607 states. [2024-12-02 12:47:36,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27607 to 27201. [2024-12-02 12:47:36,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27201 states, 20232 states have (on average 1.237099644128114) internal successors, (25029), 20441 states have internal predecessors, (25029), 4218 states have call successors, (4218), 2750 states have call predecessors, (4218), 2750 states have return successors, (4218), 4009 states have call predecessors, (4218), 4218 states have call successors, (4218) [2024-12-02 12:47:36,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27201 states to 27201 states and 33465 transitions. [2024-12-02 12:47:36,215 INFO L78 Accepts]: Start accepts. Automaton has 27201 states and 33465 transitions. Word has length 196 [2024-12-02 12:47:36,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:47:36,215 INFO L471 AbstractCegarLoop]: Abstraction has 27201 states and 33465 transitions. [2024-12-02 12:47:36,215 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.714285714285715) internal successors, (117), 6 states have internal predecessors, (117), 3 states have call successors, (19), 2 states have call predecessors, (19), 2 states have return successors, (18), 3 states have call predecessors, (18), 2 states have call successors, (18) [2024-12-02 12:47:36,215 INFO L276 IsEmpty]: Start isEmpty. Operand 27201 states and 33465 transitions. [2024-12-02 12:47:36,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2024-12-02 12:47:36,218 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:47:36,219 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:47:36,219 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-02 12:47:36,219 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:47:36,219 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:47:36,219 INFO L85 PathProgramCache]: Analyzing trace with hash 1228287277, now seen corresponding path program 1 times [2024-12-02 12:47:36,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:47:36,219 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217525870] [2024-12-02 12:47:36,219 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:47:36,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:47:36,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:47:36,846 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 41 proven. 10 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2024-12-02 12:47:36,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 12:47:36,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217525870] [2024-12-02 12:47:36,847 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1217525870] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:47:36,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [648760561] [2024-12-02 12:47:36,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:47:36,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:47:36,847 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:47:36,848 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:47:36,850 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-12-02 12:47:37,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:47:37,103 INFO L256 TraceCheckSpWp]: Trace formula consists of 862 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-12-02 12:47:37,106 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:47:37,341 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 29 proven. 77 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-12-02 12:47:37,341 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:47:37,616 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-12-02 12:47:37,616 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [648760561] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:47:37,616 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:47:37,616 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 8] total 25 [2024-12-02 12:47:37,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946555256] [2024-12-02 12:47:37,616 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:47:37,617 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-12-02 12:47:37,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 12:47:37,618 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-12-02 12:47:37,618 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=533, Unknown=0, NotChecked=0, Total=600 [2024-12-02 12:47:37,618 INFO L87 Difference]: Start difference. First operand 27201 states and 33465 transitions. Second operand has 25 states, 25 states have (on average 12.0) internal successors, (300), 21 states have internal predecessors, (300), 8 states have call successors, (52), 4 states have call predecessors, (52), 9 states have return successors, (51), 12 states have call predecessors, (51), 8 states have call successors, (51) [2024-12-02 12:48:02,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:48:02,534 INFO L93 Difference]: Finished difference Result 109025 states and 133986 transitions. [2024-12-02 12:48:02,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2024-12-02 12:48:02,534 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 12.0) internal successors, (300), 21 states have internal predecessors, (300), 8 states have call successors, (52), 4 states have call predecessors, (52), 9 states have return successors, (51), 12 states have call predecessors, (51), 8 states have call successors, (51) Word has length 196 [2024-12-02 12:48:02,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 12:48:02,743 INFO L225 Difference]: With dead ends: 109025 [2024-12-02 12:48:02,743 INFO L226 Difference]: Without dead ends: 82963 [2024-12-02 12:48:02,787 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 504 GetRequests, 394 SyntacticMatches, 0 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3748 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1235, Invalid=11197, Unknown=0, NotChecked=0, Total=12432 [2024-12-02 12:48:02,788 INFO L435 NwaCegarLoop]: 958 mSDtfsCounter, 1678 mSDsluCounter, 13471 mSDsCounter, 0 mSdLazyCounter, 3285 mSolverCounterSat, 567 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1691 SdHoareTripleChecker+Valid, 14429 SdHoareTripleChecker+Invalid, 3852 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 567 IncrementalHoareTripleChecker+Valid, 3285 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2024-12-02 12:48:02,788 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1691 Valid, 14429 Invalid, 3852 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [567 Valid, 3285 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2024-12-02 12:48:02,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82963 states. [2024-12-02 12:48:14,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82963 to 50145. [2024-12-02 12:48:14,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50145 states, 37319 states have (on average 1.2365015139741151) internal successors, (46145), 37779 states have internal predecessors, (46145), 7724 states have call successors, (7724), 5101 states have call predecessors, (7724), 5101 states have return successors, (7724), 7264 states have call predecessors, (7724), 7724 states have call successors, (7724) [2024-12-02 12:48:15,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50145 states to 50145 states and 61593 transitions. [2024-12-02 12:48:15,083 INFO L78 Accepts]: Start accepts. Automaton has 50145 states and 61593 transitions. Word has length 196 [2024-12-02 12:48:15,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 12:48:15,084 INFO L471 AbstractCegarLoop]: Abstraction has 50145 states and 61593 transitions. [2024-12-02 12:48:15,084 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 12.0) internal successors, (300), 21 states have internal predecessors, (300), 8 states have call successors, (52), 4 states have call predecessors, (52), 9 states have return successors, (51), 12 states have call predecessors, (51), 8 states have call successors, (51) [2024-12-02 12:48:15,084 INFO L276 IsEmpty]: Start isEmpty. Operand 50145 states and 61593 transitions. [2024-12-02 12:48:15,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2024-12-02 12:48:15,088 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 12:48:15,088 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:48:15,096 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2024-12-02 12:48:15,288 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:48:15,289 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 12:48:15,289 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:48:15,289 INFO L85 PathProgramCache]: Analyzing trace with hash 1216790633, now seen corresponding path program 1 times [2024-12-02 12:48:15,289 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 12:48:15,289 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1370806162] [2024-12-02 12:48:15,289 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:48:15,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:48:15,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:48:15,542 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 12:48:15,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:48:15,723 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 12:48:15,723 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 12:48:15,724 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 12:48:15,727 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-12-02 12:48:15,732 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:48:15,933 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 12:48:15,937 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 12:48:15 BoogieIcfgContainer [2024-12-02 12:48:15,937 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 12:48:15,938 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 12:48:15,938 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 12:48:15,938 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 12:48:15,939 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 12:44:19" (3/4) ... [2024-12-02 12:48:15,940 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-12-02 12:48:16,158 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 154. [2024-12-02 12:48:16,262 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/witness.graphml [2024-12-02 12:48:16,262 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/witness.yml [2024-12-02 12:48:16,263 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 12:48:16,263 INFO L158 Benchmark]: Toolchain (without parser) took 237898.92ms. Allocated memory was 142.6MB in the beginning and 5.3GB in the end (delta: 5.2GB). Free memory was 117.5MB in the beginning and 4.6GB in the end (delta: -4.5GB). Peak memory consumption was 707.5MB. Max. memory is 16.1GB. [2024-12-02 12:48:16,264 INFO L158 Benchmark]: CDTParser took 0.23ms. Allocated memory is still 142.6MB. Free memory is still 82.4MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 12:48:16,264 INFO L158 Benchmark]: CACSL2BoogieTranslator took 306.16ms. Allocated memory is still 142.6MB. Free memory was 117.3MB in the beginning and 99.2MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-12-02 12:48:16,264 INFO L158 Benchmark]: Boogie Procedure Inliner took 47.25ms. Allocated memory is still 142.6MB. Free memory was 99.2MB in the beginning and 95.7MB in the end (delta: 3.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 12:48:16,264 INFO L158 Benchmark]: Boogie Preprocessor took 54.94ms. Allocated memory is still 142.6MB. Free memory was 95.7MB in the beginning and 91.7MB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 12:48:16,264 INFO L158 Benchmark]: RCFGBuilder took 676.20ms. Allocated memory is still 142.6MB. Free memory was 91.7MB in the beginning and 103.0MB in the end (delta: -11.3MB). Peak memory consumption was 31.0MB. Max. memory is 16.1GB. [2024-12-02 12:48:16,265 INFO L158 Benchmark]: TraceAbstraction took 236482.58ms. Allocated memory was 142.6MB in the beginning and 5.3GB in the end (delta: 5.2GB). Free memory was 102.5MB in the beginning and 4.7GB in the end (delta: -4.6GB). Peak memory consumption was 651.3MB. Max. memory is 16.1GB. [2024-12-02 12:48:16,265 INFO L158 Benchmark]: Witness Printer took 324.72ms. Allocated memory is still 5.3GB. Free memory was 4.7GB in the beginning and 4.6GB in the end (delta: 46.1MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-12-02 12:48:16,266 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23ms. Allocated memory is still 142.6MB. Free memory is still 82.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 306.16ms. Allocated memory is still 142.6MB. Free memory was 117.3MB in the beginning and 99.2MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 47.25ms. Allocated memory is still 142.6MB. Free memory was 99.2MB in the beginning and 95.7MB in the end (delta: 3.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 54.94ms. Allocated memory is still 142.6MB. Free memory was 95.7MB in the beginning and 91.7MB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 676.20ms. Allocated memory is still 142.6MB. Free memory was 91.7MB in the beginning and 103.0MB in the end (delta: -11.3MB). Peak memory consumption was 31.0MB. Max. memory is 16.1GB. * TraceAbstraction took 236482.58ms. Allocated memory was 142.6MB in the beginning and 5.3GB in the end (delta: 5.2GB). Free memory was 102.5MB in the beginning and 4.7GB in the end (delta: -4.6GB). Peak memory consumption was 651.3MB. Max. memory is 16.1GB. * Witness Printer took 324.72ms. Allocated memory is still 5.3GB. Free memory was 4.7GB in the beginning and 4.6GB in the end (delta: 46.1MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 619]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L563] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L563] RET, EXPR init() [L563] i2 = init() [L564] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L564] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L582] COND TRUE i2 < 10 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] RET Console_task_each_pals_period() [L585] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND TRUE \read(side1Failed) [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L585] RET Side1_activestandby_task_each_pals_period() [L586] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L586] RET Side2_activestandby_task_each_pals_period() [L587] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L417] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=4, cs1_old=-1, cs2=0, cs2_new=4, cs2_old=-1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L417] RET write_active_side_history(active_side) [L587] RET Pendulum_prism_task_each_pals_period() [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L604] CALL, EXPR check() [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L455] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L455] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L456] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, index=1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L456] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L458] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, index=1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L458] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L460] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L460] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L486] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, index=1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L486] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L502] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, index=1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L502] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L502] tmp___11 = read_side1_failed_history((unsigned char)1) [L503] COND TRUE ! tmp___11 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L504] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, index=1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L504] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L504] tmp___12 = read_side2_failed_history((unsigned char)1) [L505] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L518] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND FALSE !((int )index == 0) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, index=2, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L151] COND FALSE !((int )index == 1) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, index=2, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [\old(index)=2, \result=-2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L518] RET, EXPR read_active_side_history((unsigned char)2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L518] tmp___20 = read_active_side_history((unsigned char)2) [L519] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L537] return (1); VAL [\result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L604] RET, EXPR check() [L604] c1 = check() [L605] CALL assert(c1) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L617] COND FALSE !(! arg) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L605] RET assert(c1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, i2=0, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L606] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, i2=1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L582] COND TRUE i2 < 10 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, i2=1, manual_selection_History_0=4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] RET Console_task_each_pals_period() [L585] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND TRUE \read(side1Failed) [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L585] RET Side1_activestandby_task_each_pals_period() [L586] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L350] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L351] COND TRUE (int )side2 != (int )nomsg [L352] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=4, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L586] RET Side2_activestandby_task_each_pals_period() [L587] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] COND TRUE (int )side2 == 0 [L410] active_side = (int8_t )2 VAL [active_side=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L417] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=4, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L417] RET write_active_side_history(active_side) [L587] RET Pendulum_prism_task_each_pals_period() [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L604] CALL, EXPR check() [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L455] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L455] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L456] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=4, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L456] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L486] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L486] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND TRUE \read(tmp___7) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L488] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L488] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L488] tmp___8 = read_side2_failed_history((unsigned char)1) [L489] COND TRUE ! tmp___8 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L490] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=2, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L490] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L490] tmp___5 = read_active_side_history((unsigned char)0) [L491] COND FALSE !(! ((int )tmp___5 == 2)) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] CALL, EXPR read_side2_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L494] RET, EXPR read_side2_failed_history((unsigned char)0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] tmp___6 = read_side2_failed_history((unsigned char)0) [L495] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] COND TRUE ! ((int )side2_written == 1) [L497] return (0); VAL [\result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L604] RET, EXPR check() [L604] c1 = check() [L605] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L617] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L619] reach_error() VAL [\old(arg)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 182 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 236.2s, OverallIterations: 46, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 125.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 29498 SdHoareTripleChecker+Valid, 20.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 29384 mSDsluCounter, 103962 SdHoareTripleChecker+Invalid, 16.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 87878 mSDsCounter, 7894 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 29159 IncrementalHoareTripleChecker+Invalid, 37053 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 7894 mSolverCounterUnsat, 16084 mSDtfsCounter, 29159 mSolverCounterSat, 0.4s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 6316 GetRequests, 5321 SyntacticMatches, 4 SemanticMatches, 991 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19713 ImplicationChecksByTransitivity, 14.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=50145occurred in iteration=45, InterpolantAutomatonStates: 792, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 78.8s AutomataMinimizationTime, 45 MinimizatonAttempts, 76132 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.8s SsaConstructionTime, 2.6s SatisfiabilityAnalysisTime, 22.3s InterpolantComputationTime, 8241 NumberOfCodeBlocks, 8241 NumberOfCodeBlocksAsserted, 62 NumberOfCheckSat, 10451 ConstructedInterpolants, 0 QuantifiedInterpolants, 36473 SizeOfPredicates, 52 NumberOfNonLiveVariables, 12607 ConjunctsInSsa, 438 ConjunctsInUnsatCore, 75 InterpolantComputations, 31 PerfectInterpolantSequences, 4500/5425 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-12-02 12:48:16,290 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8b72682a-e5b3-4247-b555-bb44ce592e7e/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE