./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 01a21536345230b7194ff5017879c469eb8be909ba72352bb81feb2f101a934f --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:21:03,328 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:21:03,384 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-12-02 08:21:03,389 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:21:03,390 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:21:03,413 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:21:03,413 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:21:03,414 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:21:03,414 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:21:03,414 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:21:03,414 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:21:03,414 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:21:03,415 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:21:03,415 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:21:03,415 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:21:03,415 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:21:03,415 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:21:03,415 INFO L153 SettingsManager]: * sizeof long=4 [2024-12-02 08:21:03,415 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 08:21:03,415 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-12-02 08:21:03,415 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:21:03,415 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * sizeof long double=12 [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:21:03,416 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:21:03,416 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:21:03,416 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:21:03,417 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:21:03,417 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:21:03,418 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:21:03,418 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:21:03,418 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 01a21536345230b7194ff5017879c469eb8be909ba72352bb81feb2f101a934f [2024-12-02 08:21:03,644 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:21:03,652 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:21:03,654 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:21:03,655 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:21:03,656 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:21:03,657 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2024-12-02 08:21:06,281 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/data/0713058d4/93585e8acd364349b7e9de77905328a7/FLAG8358464d2 [2024-12-02 08:21:06,556 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:21:06,556 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2024-12-02 08:21:06,566 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/data/0713058d4/93585e8acd364349b7e9de77905328a7/FLAG8358464d2 [2024-12-02 08:21:06,840 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/data/0713058d4/93585e8acd364349b7e9de77905328a7 [2024-12-02 08:21:06,842 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:21:06,844 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:21:06,845 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:21:06,845 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:21:06,848 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:21:06,849 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:21:06" (1/1) ... [2024-12-02 08:21:06,849 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@f1f6137 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:06, skipping insertion in model container [2024-12-02 08:21:06,849 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:21:06" (1/1) ... [2024-12-02 08:21:06,870 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:21:07,077 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2024-12-02 08:21:07,080 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:21:07,089 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:21:07,143 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2024-12-02 08:21:07,144 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:21:07,159 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:21:07,159 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07 WrapperNode [2024-12-02 08:21:07,159 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:21:07,160 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:21:07,160 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:21:07,160 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:21:07,166 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,177 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,204 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 506 [2024-12-02 08:21:07,204 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:21:07,205 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:21:07,205 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:21:07,205 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:21:07,214 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,214 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,218 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,233 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:21:07,233 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,234 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,243 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,245 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,250 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,252 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,254 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,258 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:21:07,259 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:21:07,259 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:21:07,259 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:21:07,260 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (1/1) ... [2024-12-02 08:21:07,265 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:21:07,277 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:21:07,288 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:21:07,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:21:07,315 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2024-12-02 08:21:07,315 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2024-12-02 08:21:07,315 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:21:07,315 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2024-12-02 08:21:07,315 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2024-12-02 08:21:07,315 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2024-12-02 08:21:07,316 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2024-12-02 08:21:07,316 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2024-12-02 08:21:07,316 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2024-12-02 08:21:07,316 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:21:07,316 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:21:07,316 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 08:21:07,316 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2024-12-02 08:21:07,316 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2024-12-02 08:21:07,316 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:21:07,316 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:21:07,316 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2024-12-02 08:21:07,316 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2024-12-02 08:21:07,402 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:21:07,403 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:21:07,902 INFO L? ?]: Removed 115 outVars from TransFormulas that were not future-live. [2024-12-02 08:21:07,902 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:21:07,915 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:21:07,915 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-12-02 08:21:07,916 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:21:07 BoogieIcfgContainer [2024-12-02 08:21:07,916 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:21:07,918 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:21:07,918 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:21:07,923 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:21:07,923 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:21:06" (1/3) ... [2024-12-02 08:21:07,923 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@20270ac2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:21:07, skipping insertion in model container [2024-12-02 08:21:07,924 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:21:07" (2/3) ... [2024-12-02 08:21:07,924 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@20270ac2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:21:07, skipping insertion in model container [2024-12-02 08:21:07,924 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:21:07" (3/3) ... [2024-12-02 08:21:07,925 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2024-12-02 08:21:07,940 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:21:07,943 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c that has 8 procedures, 180 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:21:07,996 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:21:08,007 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7d73e4fb, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:21:08,007 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:21:08,011 INFO L276 IsEmpty]: Start isEmpty. Operand has 180 states, 140 states have (on average 1.5571428571428572) internal successors, (218), 142 states have internal predecessors, (218), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 08:21:08,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-12-02 08:21:08,016 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:08,016 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:08,017 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:08,020 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:08,020 INFO L85 PathProgramCache]: Analyzing trace with hash 1699901086, now seen corresponding path program 1 times [2024-12-02 08:21:08,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:08,026 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795524814] [2024-12-02 08:21:08,026 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:08,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:08,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:08,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-02 08:21:08,239 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:08,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795524814] [2024-12-02 08:21:08,240 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1795524814] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:08,240 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:08,240 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-12-02 08:21:08,242 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841798992] [2024-12-02 08:21:08,242 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:08,246 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 08:21:08,246 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:08,263 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 08:21:08,264 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:21:08,266 INFO L87 Difference]: Start difference. First operand has 180 states, 140 states have (on average 1.5571428571428572) internal successors, (218), 142 states have internal predecessors, (218), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 08:21:08,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:08,306 INFO L93 Difference]: Finished difference Result 340 states and 557 transitions. [2024-12-02 08:21:08,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 08:21:08,308 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2024-12-02 08:21:08,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:08,316 INFO L225 Difference]: With dead ends: 340 [2024-12-02 08:21:08,316 INFO L226 Difference]: Without dead ends: 176 [2024-12-02 08:21:08,320 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:21:08,323 INFO L435 NwaCegarLoop]: 273 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 273 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:08,324 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 273 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:08,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2024-12-02 08:21:08,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2024-12-02 08:21:08,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 137 states have (on average 1.5401459854014599) internal successors, (211), 138 states have internal predecessors, (211), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 08:21:08,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 273 transitions. [2024-12-02 08:21:08,371 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 273 transitions. Word has length 28 [2024-12-02 08:21:08,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:08,372 INFO L471 AbstractCegarLoop]: Abstraction has 176 states and 273 transitions. [2024-12-02 08:21:08,372 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 08:21:08,372 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 273 transitions. [2024-12-02 08:21:08,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-12-02 08:21:08,374 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:08,374 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:08,374 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-12-02 08:21:08,374 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:08,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:08,375 INFO L85 PathProgramCache]: Analyzing trace with hash 1918755804, now seen corresponding path program 1 times [2024-12-02 08:21:08,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:08,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383879387] [2024-12-02 08:21:08,375 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:08,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:08,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:08,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-02 08:21:08,612 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:08,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383879387] [2024-12-02 08:21:08,612 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [383879387] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:08,612 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:08,612 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:21:08,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [758389864] [2024-12-02 08:21:08,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:08,613 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:21:08,613 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:08,614 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:21:08,614 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:21:08,614 INFO L87 Difference]: Start difference. First operand 176 states and 273 transitions. Second operand has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 08:21:08,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:08,708 INFO L93 Difference]: Finished difference Result 338 states and 520 transitions. [2024-12-02 08:21:08,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:21:08,709 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2024-12-02 08:21:08,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:08,711 INFO L225 Difference]: With dead ends: 338 [2024-12-02 08:21:08,711 INFO L226 Difference]: Without dead ends: 176 [2024-12-02 08:21:08,712 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:21:08,713 INFO L435 NwaCegarLoop]: 269 mSDtfsCounter, 0 mSDsluCounter, 1054 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1323 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:08,713 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1323 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:21:08,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2024-12-02 08:21:08,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2024-12-02 08:21:08,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 137 states have (on average 1.4525547445255473) internal successors, (199), 138 states have internal predecessors, (199), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 08:21:08,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 261 transitions. [2024-12-02 08:21:08,728 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 261 transitions. Word has length 28 [2024-12-02 08:21:08,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:08,729 INFO L471 AbstractCegarLoop]: Abstraction has 176 states and 261 transitions. [2024-12-02 08:21:08,729 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 08:21:08,729 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 261 transitions. [2024-12-02 08:21:08,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2024-12-02 08:21:08,730 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:08,730 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:08,730 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 08:21:08,730 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:08,731 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:08,731 INFO L85 PathProgramCache]: Analyzing trace with hash 1355709569, now seen corresponding path program 1 times [2024-12-02 08:21:08,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:08,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374151163] [2024-12-02 08:21:08,731 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:08,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:08,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:08,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-02 08:21:08,966 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:08,966 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374151163] [2024-12-02 08:21:08,966 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1374151163] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:08,966 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:08,966 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:08,966 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1969732270] [2024-12-02 08:21:08,967 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:08,967 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:08,967 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:08,967 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:08,967 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:08,968 INFO L87 Difference]: Start difference. First operand 176 states and 261 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 08:21:09,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:09,027 INFO L93 Difference]: Finished difference Result 339 states and 512 transitions. [2024-12-02 08:21:09,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:09,027 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2024-12-02 08:21:09,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:09,029 INFO L225 Difference]: With dead ends: 339 [2024-12-02 08:21:09,029 INFO L226 Difference]: Without dead ends: 180 [2024-12-02 08:21:09,030 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:09,030 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 3 mSDsluCounter, 500 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 755 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:09,031 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 755 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:09,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2024-12-02 08:21:09,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2024-12-02 08:21:09,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 140 states have (on average 1.4428571428571428) internal successors, (202), 141 states have internal predecessors, (202), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-12-02 08:21:09,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 264 transitions. [2024-12-02 08:21:09,060 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 264 transitions. Word has length 39 [2024-12-02 08:21:09,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:09,060 INFO L471 AbstractCegarLoop]: Abstraction has 180 states and 264 transitions. [2024-12-02 08:21:09,060 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-12-02 08:21:09,060 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 264 transitions. [2024-12-02 08:21:09,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2024-12-02 08:21:09,061 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:09,062 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:09,062 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 08:21:09,062 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:09,062 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:09,063 INFO L85 PathProgramCache]: Analyzing trace with hash -2086587661, now seen corresponding path program 1 times [2024-12-02 08:21:09,063 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:09,063 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833382784] [2024-12-02 08:21:09,063 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:09,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:09,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:09,157 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:09,157 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:09,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833382784] [2024-12-02 08:21:09,158 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1833382784] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:09,158 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:09,158 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 08:21:09,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [508717003] [2024-12-02 08:21:09,158 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:09,158 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 08:21:09,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:09,159 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 08:21:09,159 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 08:21:09,159 INFO L87 Difference]: Start difference. First operand 180 states and 264 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:09,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:09,201 INFO L93 Difference]: Finished difference Result 494 states and 735 transitions. [2024-12-02 08:21:09,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 08:21:09,202 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 55 [2024-12-02 08:21:09,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:09,205 INFO L225 Difference]: With dead ends: 494 [2024-12-02 08:21:09,205 INFO L226 Difference]: Without dead ends: 331 [2024-12-02 08:21:09,206 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 08:21:09,206 INFO L435 NwaCegarLoop]: 271 mSDtfsCounter, 212 mSDsluCounter, 252 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 212 SdHoareTripleChecker+Valid, 523 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:09,207 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [212 Valid, 523 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:09,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2024-12-02 08:21:09,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 326. [2024-12-02 08:21:09,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 326 states, 249 states have (on average 1.461847389558233) internal successors, (364), 251 states have internal predecessors, (364), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2024-12-02 08:21:09,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 484 transitions. [2024-12-02 08:21:09,233 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 484 transitions. Word has length 55 [2024-12-02 08:21:09,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:09,234 INFO L471 AbstractCegarLoop]: Abstraction has 326 states and 484 transitions. [2024-12-02 08:21:09,234 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:09,234 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 484 transitions. [2024-12-02 08:21:09,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-12-02 08:21:09,235 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:09,236 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:09,236 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 08:21:09,236 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:09,237 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:09,237 INFO L85 PathProgramCache]: Analyzing trace with hash 651939805, now seen corresponding path program 1 times [2024-12-02 08:21:09,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:09,237 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858085118] [2024-12-02 08:21:09,237 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:09,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:09,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:09,328 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:09,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:09,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858085118] [2024-12-02 08:21:09,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1858085118] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:09,328 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:09,328 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 08:21:09,329 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [514791255] [2024-12-02 08:21:09,329 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:09,329 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 08:21:09,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:09,329 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 08:21:09,329 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 08:21:09,330 INFO L87 Difference]: Start difference. First operand 326 states and 484 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:09,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:09,385 INFO L93 Difference]: Finished difference Result 917 states and 1373 transitions. [2024-12-02 08:21:09,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 08:21:09,386 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2024-12-02 08:21:09,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:09,392 INFO L225 Difference]: With dead ends: 917 [2024-12-02 08:21:09,392 INFO L226 Difference]: Without dead ends: 608 [2024-12-02 08:21:09,393 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 08:21:09,394 INFO L435 NwaCegarLoop]: 291 mSDtfsCounter, 214 mSDsluCounter, 254 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 214 SdHoareTripleChecker+Valid, 545 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:09,394 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [214 Valid, 545 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:09,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 608 states. [2024-12-02 08:21:09,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 608 to 602. [2024-12-02 08:21:09,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 602 states, 453 states have (on average 1.4724061810154525) internal successors, (667), 457 states have internal predecessors, (667), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2024-12-02 08:21:09,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 602 states to 602 states and 901 transitions. [2024-12-02 08:21:09,444 INFO L78 Accepts]: Start accepts. Automaton has 602 states and 901 transitions. Word has length 56 [2024-12-02 08:21:09,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:09,445 INFO L471 AbstractCegarLoop]: Abstraction has 602 states and 901 transitions. [2024-12-02 08:21:09,445 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:09,445 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 901 transitions. [2024-12-02 08:21:09,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-12-02 08:21:09,458 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:09,458 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:09,458 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 08:21:09,458 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:09,459 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:09,459 INFO L85 PathProgramCache]: Analyzing trace with hash -627923873, now seen corresponding path program 1 times [2024-12-02 08:21:09,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:09,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148244131] [2024-12-02 08:21:09,459 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:09,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:09,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:09,630 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:09,631 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:09,631 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1148244131] [2024-12-02 08:21:09,631 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1148244131] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:09,631 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:09,631 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:21:09,631 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248858506] [2024-12-02 08:21:09,631 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:09,632 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:21:09,632 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:09,632 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:21:09,633 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:09,633 INFO L87 Difference]: Start difference. First operand 602 states and 901 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:09,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:09,856 INFO L93 Difference]: Finished difference Result 1291 states and 1928 transitions. [2024-12-02 08:21:09,856 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:21:09,856 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2024-12-02 08:21:09,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:09,862 INFO L225 Difference]: With dead ends: 1291 [2024-12-02 08:21:09,862 INFO L226 Difference]: Without dead ends: 706 [2024-12-02 08:21:09,864 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:21:09,865 INFO L435 NwaCegarLoop]: 227 mSDtfsCounter, 368 mSDsluCounter, 442 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 368 SdHoareTripleChecker+Valid, 669 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:09,865 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [368 Valid, 669 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:21:09,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 706 states. [2024-12-02 08:21:09,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 706 to 690. [2024-12-02 08:21:09,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 690 states, 528 states have (on average 1.456439393939394) internal successors, (769), 531 states have internal predecessors, (769), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 08:21:09,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 690 states to 690 states and 1017 transitions. [2024-12-02 08:21:09,946 INFO L78 Accepts]: Start accepts. Automaton has 690 states and 1017 transitions. Word has length 56 [2024-12-02 08:21:09,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:09,946 INFO L471 AbstractCegarLoop]: Abstraction has 690 states and 1017 transitions. [2024-12-02 08:21:09,947 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:09,947 INFO L276 IsEmpty]: Start isEmpty. Operand 690 states and 1017 transitions. [2024-12-02 08:21:09,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2024-12-02 08:21:09,948 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:09,948 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:09,949 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 08:21:09,949 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:09,949 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:09,949 INFO L85 PathProgramCache]: Analyzing trace with hash 707313810, now seen corresponding path program 1 times [2024-12-02 08:21:09,949 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:09,949 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [678736891] [2024-12-02 08:21:09,950 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:09,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:09,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:10,112 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:10,112 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:10,112 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [678736891] [2024-12-02 08:21:10,113 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [678736891] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:10,113 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:10,113 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:21:10,113 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053888481] [2024-12-02 08:21:10,113 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:10,113 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:21:10,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:10,114 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:21:10,114 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:10,114 INFO L87 Difference]: Start difference. First operand 690 states and 1017 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:10,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:10,311 INFO L93 Difference]: Finished difference Result 1295 states and 1928 transitions. [2024-12-02 08:21:10,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:21:10,312 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2024-12-02 08:21:10,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:10,316 INFO L225 Difference]: With dead ends: 1295 [2024-12-02 08:21:10,316 INFO L226 Difference]: Without dead ends: 710 [2024-12-02 08:21:10,318 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:21:10,318 INFO L435 NwaCegarLoop]: 227 mSDtfsCounter, 368 mSDsluCounter, 442 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 368 SdHoareTripleChecker+Valid, 669 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:10,318 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [368 Valid, 669 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:21:10,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 710 states. [2024-12-02 08:21:10,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 710 to 698. [2024-12-02 08:21:10,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 698 states, 536 states have (on average 1.4496268656716418) internal successors, (777), 539 states have internal predecessors, (777), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 08:21:10,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 698 states to 698 states and 1025 transitions. [2024-12-02 08:21:10,370 INFO L78 Accepts]: Start accepts. Automaton has 698 states and 1025 transitions. Word has length 57 [2024-12-02 08:21:10,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:10,371 INFO L471 AbstractCegarLoop]: Abstraction has 698 states and 1025 transitions. [2024-12-02 08:21:10,371 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:10,371 INFO L276 IsEmpty]: Start isEmpty. Operand 698 states and 1025 transitions. [2024-12-02 08:21:10,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2024-12-02 08:21:10,372 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:10,372 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:10,373 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 08:21:10,373 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:10,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:10,373 INFO L85 PathProgramCache]: Analyzing trace with hash -1187610108, now seen corresponding path program 1 times [2024-12-02 08:21:10,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:10,373 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530158640] [2024-12-02 08:21:10,374 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:10,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:10,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:10,517 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:10,517 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:10,517 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [530158640] [2024-12-02 08:21:10,517 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [530158640] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:10,518 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:10,518 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:10,518 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1218725031] [2024-12-02 08:21:10,518 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:10,518 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:10,518 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:10,519 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:10,519 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:10,519 INFO L87 Difference]: Start difference. First operand 698 states and 1025 transitions. Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:10,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:10,692 INFO L93 Difference]: Finished difference Result 1283 states and 1908 transitions. [2024-12-02 08:21:10,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:10,693 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 59 [2024-12-02 08:21:10,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:10,698 INFO L225 Difference]: With dead ends: 1283 [2024-12-02 08:21:10,699 INFO L226 Difference]: Without dead ends: 698 [2024-12-02 08:21:10,701 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:10,701 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 61 mSDsluCounter, 435 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 663 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:10,702 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [61 Valid, 663 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:21:10,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 698 states. [2024-12-02 08:21:10,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 698 to 698. [2024-12-02 08:21:10,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 698 states, 536 states have (on average 1.4421641791044777) internal successors, (773), 539 states have internal predecessors, (773), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 08:21:10,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 698 states to 698 states and 1021 transitions. [2024-12-02 08:21:10,776 INFO L78 Accepts]: Start accepts. Automaton has 698 states and 1021 transitions. Word has length 59 [2024-12-02 08:21:10,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:10,776 INFO L471 AbstractCegarLoop]: Abstraction has 698 states and 1021 transitions. [2024-12-02 08:21:10,776 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:21:10,776 INFO L276 IsEmpty]: Start isEmpty. Operand 698 states and 1021 transitions. [2024-12-02 08:21:10,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2024-12-02 08:21:10,786 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:10,786 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:10,786 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 08:21:10,786 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:10,787 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:10,787 INFO L85 PathProgramCache]: Analyzing trace with hash -1980797779, now seen corresponding path program 1 times [2024-12-02 08:21:10,787 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:10,787 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176258560] [2024-12-02 08:21:10,787 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:10,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:10,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:10,963 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:10,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:10,963 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [176258560] [2024-12-02 08:21:10,964 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [176258560] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:10,964 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:10,964 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:10,964 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [312616957] [2024-12-02 08:21:10,964 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:10,964 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:10,964 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:10,964 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:10,965 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:10,965 INFO L87 Difference]: Start difference. First operand 698 states and 1021 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:21:11,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:11,031 INFO L93 Difference]: Finished difference Result 1303 states and 1932 transitions. [2024-12-02 08:21:11,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:11,032 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 60 [2024-12-02 08:21:11,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:11,036 INFO L225 Difference]: With dead ends: 1303 [2024-12-02 08:21:11,036 INFO L226 Difference]: Without dead ends: 718 [2024-12-02 08:21:11,038 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:11,039 INFO L435 NwaCegarLoop]: 257 mSDtfsCounter, 4 mSDsluCounter, 510 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 767 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:11,039 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 767 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:11,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2024-12-02 08:21:11,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 718. [2024-12-02 08:21:11,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 552 states have (on average 1.4293478260869565) internal successors, (789), 555 states have internal predecessors, (789), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 08:21:11,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1037 transitions. [2024-12-02 08:21:11,088 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1037 transitions. Word has length 60 [2024-12-02 08:21:11,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:11,088 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1037 transitions. [2024-12-02 08:21:11,088 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:21:11,088 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1037 transitions. [2024-12-02 08:21:11,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2024-12-02 08:21:11,090 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:11,090 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:11,090 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 08:21:11,090 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:11,090 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:11,090 INFO L85 PathProgramCache]: Analyzing trace with hash 1474712019, now seen corresponding path program 1 times [2024-12-02 08:21:11,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:11,090 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616252999] [2024-12-02 08:21:11,090 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:11,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:11,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:11,271 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:11,271 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:11,271 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616252999] [2024-12-02 08:21:11,272 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [616252999] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:11,272 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:11,272 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:11,272 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [541816142] [2024-12-02 08:21:11,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:11,272 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:11,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:11,272 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:11,272 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:11,273 INFO L87 Difference]: Start difference. First operand 718 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-12-02 08:21:11,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:11,355 INFO L93 Difference]: Finished difference Result 1343 states and 1976 transitions. [2024-12-02 08:21:11,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:11,355 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 68 [2024-12-02 08:21:11,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:11,360 INFO L225 Difference]: With dead ends: 1343 [2024-12-02 08:21:11,360 INFO L226 Difference]: Without dead ends: 738 [2024-12-02 08:21:11,362 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:11,363 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 4 mSDsluCounter, 499 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 753 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:11,363 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 753 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:11,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 738 states. [2024-12-02 08:21:11,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 738 to 738. [2024-12-02 08:21:11,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 738 states, 568 states have (on average 1.4172535211267605) internal successors, (805), 571 states have internal predecessors, (805), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 08:21:11,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 738 states to 738 states and 1053 transitions. [2024-12-02 08:21:11,417 INFO L78 Accepts]: Start accepts. Automaton has 738 states and 1053 transitions. Word has length 68 [2024-12-02 08:21:11,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:11,417 INFO L471 AbstractCegarLoop]: Abstraction has 738 states and 1053 transitions. [2024-12-02 08:21:11,418 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-12-02 08:21:11,418 INFO L276 IsEmpty]: Start isEmpty. Operand 738 states and 1053 transitions. [2024-12-02 08:21:11,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2024-12-02 08:21:11,419 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:11,419 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:11,419 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 08:21:11,419 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:11,420 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:11,420 INFO L85 PathProgramCache]: Analyzing trace with hash -799213667, now seen corresponding path program 1 times [2024-12-02 08:21:11,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:11,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [366752325] [2024-12-02 08:21:11,420 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:11,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:11,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:11,610 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:11,611 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:11,611 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [366752325] [2024-12-02 08:21:11,611 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [366752325] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:11,611 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:11,611 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:11,611 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860597797] [2024-12-02 08:21:11,611 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:11,611 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:11,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:11,612 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:11,612 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:11,612 INFO L87 Difference]: Start difference. First operand 738 states and 1053 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 08:21:11,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:11,687 INFO L93 Difference]: Finished difference Result 1379 states and 1992 transitions. [2024-12-02 08:21:11,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:11,687 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 76 [2024-12-02 08:21:11,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:11,692 INFO L225 Difference]: With dead ends: 1379 [2024-12-02 08:21:11,692 INFO L226 Difference]: Without dead ends: 754 [2024-12-02 08:21:11,694 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:11,695 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 3 mSDsluCounter, 504 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 763 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:11,695 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 763 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:11,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 754 states. [2024-12-02 08:21:11,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 754 to 754. [2024-12-02 08:21:11,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 754 states, 580 states have (on average 1.4086206896551725) internal successors, (817), 583 states have internal predecessors, (817), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 08:21:11,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 754 states to 754 states and 1065 transitions. [2024-12-02 08:21:11,748 INFO L78 Accepts]: Start accepts. Automaton has 754 states and 1065 transitions. Word has length 76 [2024-12-02 08:21:11,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:11,748 INFO L471 AbstractCegarLoop]: Abstraction has 754 states and 1065 transitions. [2024-12-02 08:21:11,748 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 08:21:11,748 INFO L276 IsEmpty]: Start isEmpty. Operand 754 states and 1065 transitions. [2024-12-02 08:21:11,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2024-12-02 08:21:11,750 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:11,750 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:11,750 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 08:21:11,750 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:11,750 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:11,750 INFO L85 PathProgramCache]: Analyzing trace with hash 1597245636, now seen corresponding path program 1 times [2024-12-02 08:21:11,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:11,751 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [473087729] [2024-12-02 08:21:11,751 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:11,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:11,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:11,932 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:11,932 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:11,932 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [473087729] [2024-12-02 08:21:11,932 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [473087729] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:11,932 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:11,932 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:11,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905204680] [2024-12-02 08:21:11,933 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:11,933 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:11,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:11,934 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:11,934 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:11,934 INFO L87 Difference]: Start difference. First operand 754 states and 1065 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 08:21:12,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:12,022 INFO L93 Difference]: Finished difference Result 1415 states and 2032 transitions. [2024-12-02 08:21:12,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:12,022 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 76 [2024-12-02 08:21:12,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:12,027 INFO L225 Difference]: With dead ends: 1415 [2024-12-02 08:21:12,027 INFO L226 Difference]: Without dead ends: 774 [2024-12-02 08:21:12,029 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:12,029 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 4 mSDsluCounter, 499 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 753 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:12,030 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 753 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:12,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 774 states. [2024-12-02 08:21:12,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 774 to 774. [2024-12-02 08:21:12,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 774 states, 596 states have (on average 1.3976510067114094) internal successors, (833), 599 states have internal predecessors, (833), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 08:21:12,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 774 states to 774 states and 1081 transitions. [2024-12-02 08:21:12,080 INFO L78 Accepts]: Start accepts. Automaton has 774 states and 1081 transitions. Word has length 76 [2024-12-02 08:21:12,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:12,080 INFO L471 AbstractCegarLoop]: Abstraction has 774 states and 1081 transitions. [2024-12-02 08:21:12,080 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-12-02 08:21:12,080 INFO L276 IsEmpty]: Start isEmpty. Operand 774 states and 1081 transitions. [2024-12-02 08:21:12,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2024-12-02 08:21:12,082 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:12,082 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:12,082 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 08:21:12,082 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:12,083 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:12,083 INFO L85 PathProgramCache]: Analyzing trace with hash 837268772, now seen corresponding path program 1 times [2024-12-02 08:21:12,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:12,083 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056676207] [2024-12-02 08:21:12,083 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:12,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:12,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:12,319 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 08:21:12,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:12,319 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056676207] [2024-12-02 08:21:12,319 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2056676207] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:12,319 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:12,319 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:12,319 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677620895] [2024-12-02 08:21:12,319 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:12,320 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:12,320 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:12,320 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:12,320 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:12,320 INFO L87 Difference]: Start difference. First operand 774 states and 1081 transitions. Second operand has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-12-02 08:21:12,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:12,392 INFO L93 Difference]: Finished difference Result 1459 states and 2060 transitions. [2024-12-02 08:21:12,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:12,393 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 84 [2024-12-02 08:21:12,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:12,398 INFO L225 Difference]: With dead ends: 1459 [2024-12-02 08:21:12,398 INFO L226 Difference]: Without dead ends: 798 [2024-12-02 08:21:12,400 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:12,400 INFO L435 NwaCegarLoop]: 258 mSDtfsCounter, 5 mSDsluCounter, 507 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 765 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:12,400 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 765 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:12,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 798 states. [2024-12-02 08:21:12,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 798 to 798. [2024-12-02 08:21:12,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 798 states, 616 states have (on average 1.3847402597402598) internal successors, (853), 619 states have internal predecessors, (853), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 08:21:12,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 798 states to 798 states and 1101 transitions. [2024-12-02 08:21:12,448 INFO L78 Accepts]: Start accepts. Automaton has 798 states and 1101 transitions. Word has length 84 [2024-12-02 08:21:12,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:12,449 INFO L471 AbstractCegarLoop]: Abstraction has 798 states and 1101 transitions. [2024-12-02 08:21:12,449 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-12-02 08:21:12,449 INFO L276 IsEmpty]: Start isEmpty. Operand 798 states and 1101 transitions. [2024-12-02 08:21:12,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2024-12-02 08:21:12,451 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:12,451 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:12,451 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 08:21:12,451 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:12,452 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:12,452 INFO L85 PathProgramCache]: Analyzing trace with hash 1610117125, now seen corresponding path program 1 times [2024-12-02 08:21:12,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:12,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545105301] [2024-12-02 08:21:12,452 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:12,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:12,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:12,994 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:21:12,994 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:12,994 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [545105301] [2024-12-02 08:21:12,995 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [545105301] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:12,995 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:12,995 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:21:12,995 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1891619814] [2024-12-02 08:21:12,995 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:12,995 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:21:12,995 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:12,995 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:21:12,996 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:21:12,996 INFO L87 Difference]: Start difference. First operand 798 states and 1101 transitions. Second operand has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-12-02 08:21:13,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:13,336 INFO L93 Difference]: Finished difference Result 2053 states and 2823 transitions. [2024-12-02 08:21:13,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:21:13,337 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 87 [2024-12-02 08:21:13,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:13,345 INFO L225 Difference]: With dead ends: 2053 [2024-12-02 08:21:13,345 INFO L226 Difference]: Without dead ends: 1368 [2024-12-02 08:21:13,347 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:21:13,347 INFO L435 NwaCegarLoop]: 263 mSDtfsCounter, 196 mSDsluCounter, 1213 mSDsCounter, 0 mSdLazyCounter, 102 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 1476 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:13,347 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 1476 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 102 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:21:13,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1368 states. [2024-12-02 08:21:13,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1368 to 1082. [2024-12-02 08:21:13,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1082 states, 827 states have (on average 1.3724304715840387) internal successors, (1135), 832 states have internal predecessors, (1135), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 08:21:13,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1082 states to 1082 states and 1479 transitions. [2024-12-02 08:21:13,436 INFO L78 Accepts]: Start accepts. Automaton has 1082 states and 1479 transitions. Word has length 87 [2024-12-02 08:21:13,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:13,437 INFO L471 AbstractCegarLoop]: Abstraction has 1082 states and 1479 transitions. [2024-12-02 08:21:13,437 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-12-02 08:21:13,437 INFO L276 IsEmpty]: Start isEmpty. Operand 1082 states and 1479 transitions. [2024-12-02 08:21:13,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2024-12-02 08:21:13,438 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:13,438 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:13,439 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 08:21:13,439 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:13,439 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:13,440 INFO L85 PathProgramCache]: Analyzing trace with hash 1820782171, now seen corresponding path program 1 times [2024-12-02 08:21:13,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:13,440 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546412036] [2024-12-02 08:21:13,440 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:13,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:13,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:13,597 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:21:13,597 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:13,597 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546412036] [2024-12-02 08:21:13,597 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [546412036] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:13,597 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:13,597 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:13,597 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [140987159] [2024-12-02 08:21:13,597 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:13,598 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:13,598 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:13,598 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:13,598 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:13,598 INFO L87 Difference]: Start difference. First operand 1082 states and 1479 transitions. Second operand has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 08:21:13,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:13,706 INFO L93 Difference]: Finished difference Result 2007 states and 2768 transitions. [2024-12-02 08:21:13,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:13,707 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 91 [2024-12-02 08:21:13,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:13,714 INFO L225 Difference]: With dead ends: 2007 [2024-12-02 08:21:13,714 INFO L226 Difference]: Without dead ends: 1106 [2024-12-02 08:21:13,716 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:13,717 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 3 mSDsluCounter, 504 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 763 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:13,717 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 763 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:13,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states. [2024-12-02 08:21:13,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 1106. [2024-12-02 08:21:13,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1106 states, 845 states have (on average 1.3644970414201183) internal successors, (1153), 850 states have internal predecessors, (1153), 172 states have call successors, (172), 88 states have call predecessors, (172), 88 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2024-12-02 08:21:13,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1106 states to 1106 states and 1497 transitions. [2024-12-02 08:21:13,844 INFO L78 Accepts]: Start accepts. Automaton has 1106 states and 1497 transitions. Word has length 91 [2024-12-02 08:21:13,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:13,844 INFO L471 AbstractCegarLoop]: Abstraction has 1106 states and 1497 transitions. [2024-12-02 08:21:13,845 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 08:21:13,845 INFO L276 IsEmpty]: Start isEmpty. Operand 1106 states and 1497 transitions. [2024-12-02 08:21:13,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2024-12-02 08:21:13,846 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:13,846 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:13,846 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-02 08:21:13,847 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:13,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:13,847 INFO L85 PathProgramCache]: Analyzing trace with hash 1723609181, now seen corresponding path program 1 times [2024-12-02 08:21:13,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:13,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513070792] [2024-12-02 08:21:13,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:13,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:13,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:14,203 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-02 08:21:14,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:14,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [513070792] [2024-12-02 08:21:14,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [513070792] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:21:14,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1160992019] [2024-12-02 08:21:14,203 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:14,204 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:21:14,204 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:21:14,206 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:21:14,207 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:21:14,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:14,384 INFO L256 TraceCheckSpWp]: Trace formula consists of 477 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-12-02 08:21:14,390 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:21:14,504 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-12-02 08:21:14,504 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:21:14,504 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1160992019] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:14,504 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:21:14,504 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2024-12-02 08:21:14,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973279925] [2024-12-02 08:21:14,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:14,505 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:21:14,505 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:14,505 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:21:14,506 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:21:14,506 INFO L87 Difference]: Start difference. First operand 1106 states and 1497 transitions. Second operand has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 08:21:14,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:14,734 INFO L93 Difference]: Finished difference Result 2371 states and 3335 transitions. [2024-12-02 08:21:14,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-02 08:21:14,735 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 90 [2024-12-02 08:21:14,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:14,743 INFO L225 Difference]: With dead ends: 2371 [2024-12-02 08:21:14,743 INFO L226 Difference]: Without dead ends: 1534 [2024-12-02 08:21:14,746 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2024-12-02 08:21:14,746 INFO L435 NwaCegarLoop]: 438 mSDtfsCounter, 139 mSDsluCounter, 2428 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 165 SdHoareTripleChecker+Valid, 2866 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:14,746 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [165 Valid, 2866 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:21:14,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1534 states. [2024-12-02 08:21:14,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1534 to 1114. [2024-12-02 08:21:14,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1114 states, 849 states have (on average 1.3557126030624265) internal successors, (1151), 856 states have internal predecessors, (1151), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2024-12-02 08:21:14,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1114 states to 1114 states and 1499 transitions. [2024-12-02 08:21:14,859 INFO L78 Accepts]: Start accepts. Automaton has 1114 states and 1499 transitions. Word has length 90 [2024-12-02 08:21:14,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:14,860 INFO L471 AbstractCegarLoop]: Abstraction has 1114 states and 1499 transitions. [2024-12-02 08:21:14,860 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-12-02 08:21:14,860 INFO L276 IsEmpty]: Start isEmpty. Operand 1114 states and 1499 transitions. [2024-12-02 08:21:14,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2024-12-02 08:21:14,861 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:14,861 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:14,871 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:21:15,062 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2024-12-02 08:21:15,062 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:15,062 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:15,062 INFO L85 PathProgramCache]: Analyzing trace with hash 2094931668, now seen corresponding path program 1 times [2024-12-02 08:21:15,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:15,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190512814] [2024-12-02 08:21:15,062 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:15,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:15,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:15,221 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-12-02 08:21:15,222 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:15,222 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1190512814] [2024-12-02 08:21:15,222 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1190512814] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:15,222 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:15,222 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:21:15,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1760957648] [2024-12-02 08:21:15,222 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:15,222 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:21:15,222 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:15,223 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:21:15,223 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:21:15,223 INFO L87 Difference]: Start difference. First operand 1114 states and 1499 transitions. Second operand has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-12-02 08:21:15,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:15,426 INFO L93 Difference]: Finished difference Result 2010 states and 2716 transitions. [2024-12-02 08:21:15,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:21:15,427 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 93 [2024-12-02 08:21:15,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:15,433 INFO L225 Difference]: With dead ends: 2010 [2024-12-02 08:21:15,433 INFO L226 Difference]: Without dead ends: 1159 [2024-12-02 08:21:15,435 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:21:15,436 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 255 mSDsluCounter, 1226 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 256 SdHoareTripleChecker+Valid, 1485 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:15,436 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [256 Valid, 1485 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:21:15,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1159 states. [2024-12-02 08:21:15,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1159 to 1117. [2024-12-02 08:21:15,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1117 states, 863 states have (on average 1.3487833140208574) internal successors, (1164), 875 states have internal predecessors, (1164), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2024-12-02 08:21:15,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1117 states to 1117 states and 1488 transitions. [2024-12-02 08:21:15,518 INFO L78 Accepts]: Start accepts. Automaton has 1117 states and 1488 transitions. Word has length 93 [2024-12-02 08:21:15,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:15,519 INFO L471 AbstractCegarLoop]: Abstraction has 1117 states and 1488 transitions. [2024-12-02 08:21:15,519 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-12-02 08:21:15,519 INFO L276 IsEmpty]: Start isEmpty. Operand 1117 states and 1488 transitions. [2024-12-02 08:21:15,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2024-12-02 08:21:15,520 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:15,520 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:15,521 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 08:21:15,521 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:15,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:15,521 INFO L85 PathProgramCache]: Analyzing trace with hash -1811425973, now seen corresponding path program 1 times [2024-12-02 08:21:15,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:15,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854804464] [2024-12-02 08:21:15,521 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:15,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:15,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:16,040 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-12-02 08:21:16,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:16,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854804464] [2024-12-02 08:21:16,041 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [854804464] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:16,041 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:16,041 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:21:16,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1242709848] [2024-12-02 08:21:16,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:16,041 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:21:16,041 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:16,042 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:21:16,042 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:21:16,042 INFO L87 Difference]: Start difference. First operand 1117 states and 1488 transitions. Second operand has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 08:21:16,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:16,265 INFO L93 Difference]: Finished difference Result 1989 states and 2661 transitions. [2024-12-02 08:21:16,265 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:21:16,265 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 95 [2024-12-02 08:21:16,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:16,272 INFO L225 Difference]: With dead ends: 1989 [2024-12-02 08:21:16,272 INFO L226 Difference]: Without dead ends: 1115 [2024-12-02 08:21:16,274 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:21:16,274 INFO L435 NwaCegarLoop]: 288 mSDtfsCounter, 150 mSDsluCounter, 1313 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 152 SdHoareTripleChecker+Valid, 1601 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:16,274 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [152 Valid, 1601 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:21:16,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1115 states. [2024-12-02 08:21:16,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1115 to 1008. [2024-12-02 08:21:16,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1008 states, 781 states have (on average 1.3508322663252241) internal successors, (1055), 791 states have internal predecessors, (1055), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2024-12-02 08:21:16,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1008 states to 1008 states and 1345 transitions. [2024-12-02 08:21:16,324 INFO L78 Accepts]: Start accepts. Automaton has 1008 states and 1345 transitions. Word has length 95 [2024-12-02 08:21:16,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:16,325 INFO L471 AbstractCegarLoop]: Abstraction has 1008 states and 1345 transitions. [2024-12-02 08:21:16,325 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 08:21:16,325 INFO L276 IsEmpty]: Start isEmpty. Operand 1008 states and 1345 transitions. [2024-12-02 08:21:16,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2024-12-02 08:21:16,326 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:16,326 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:16,326 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 08:21:16,326 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:16,326 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:16,326 INFO L85 PathProgramCache]: Analyzing trace with hash -375753860, now seen corresponding path program 1 times [2024-12-02 08:21:16,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:16,326 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593605420] [2024-12-02 08:21:16,326 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:16,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:16,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:16,697 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-02 08:21:16,697 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:16,697 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593605420] [2024-12-02 08:21:16,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1593605420] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:16,697 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:16,697 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:21:16,698 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2019196339] [2024-12-02 08:21:16,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:16,698 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:21:16,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:16,698 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:21:16,699 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:21:16,699 INFO L87 Difference]: Start difference. First operand 1008 states and 1345 transitions. Second operand has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:17,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:17,101 INFO L93 Difference]: Finished difference Result 1934 states and 2578 transitions. [2024-12-02 08:21:17,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:21:17,102 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) Word has length 96 [2024-12-02 08:21:17,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:17,106 INFO L225 Difference]: With dead ends: 1934 [2024-12-02 08:21:17,106 INFO L226 Difference]: Without dead ends: 1099 [2024-12-02 08:21:17,107 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:21:17,108 INFO L435 NwaCegarLoop]: 321 mSDtfsCounter, 418 mSDsluCounter, 1151 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 424 SdHoareTripleChecker+Valid, 1472 SdHoareTripleChecker+Invalid, 183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:17,108 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [424 Valid, 1472 Invalid, 183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:21:17,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1099 states. [2024-12-02 08:21:17,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1099 to 1046. [2024-12-02 08:21:17,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1046 states, 804 states have (on average 1.3296019900497513) internal successors, (1069), 815 states have internal predecessors, (1069), 154 states have call successors, (154), 87 states have call predecessors, (154), 87 states have return successors, (154), 143 states have call predecessors, (154), 154 states have call successors, (154) [2024-12-02 08:21:17,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1046 states to 1046 states and 1377 transitions. [2024-12-02 08:21:17,169 INFO L78 Accepts]: Start accepts. Automaton has 1046 states and 1377 transitions. Word has length 96 [2024-12-02 08:21:17,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:17,170 INFO L471 AbstractCegarLoop]: Abstraction has 1046 states and 1377 transitions. [2024-12-02 08:21:17,170 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:17,170 INFO L276 IsEmpty]: Start isEmpty. Operand 1046 states and 1377 transitions. [2024-12-02 08:21:17,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2024-12-02 08:21:17,170 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:17,171 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:17,171 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 08:21:17,171 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:17,171 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:17,171 INFO L85 PathProgramCache]: Analyzing trace with hash -1605607307, now seen corresponding path program 1 times [2024-12-02 08:21:17,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:17,171 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247856533] [2024-12-02 08:21:17,171 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:17,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:17,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:17,520 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-02 08:21:17,520 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:17,520 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [247856533] [2024-12-02 08:21:17,520 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [247856533] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:17,520 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:17,520 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:21:17,520 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679832904] [2024-12-02 08:21:17,520 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:17,521 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:21:17,521 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:17,521 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:21:17,521 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:21:17,522 INFO L87 Difference]: Start difference. First operand 1046 states and 1377 transitions. Second operand has 7 states, 7 states have (on average 10.714285714285714) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 08:21:17,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:17,966 INFO L93 Difference]: Finished difference Result 2019 states and 2644 transitions. [2024-12-02 08:21:17,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:21:17,966 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.714285714285714) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 98 [2024-12-02 08:21:17,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:17,972 INFO L225 Difference]: With dead ends: 2019 [2024-12-02 08:21:17,972 INFO L226 Difference]: Without dead ends: 1159 [2024-12-02 08:21:17,974 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:21:17,974 INFO L435 NwaCegarLoop]: 281 mSDtfsCounter, 407 mSDsluCounter, 981 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 413 SdHoareTripleChecker+Valid, 1262 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:17,974 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [413 Valid, 1262 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:21:17,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1159 states. [2024-12-02 08:21:18,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1159 to 1068. [2024-12-02 08:21:18,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1068 states, 818 states have (on average 1.3141809290953546) internal successors, (1075), 830 states have internal predecessors, (1075), 157 states have call successors, (157), 92 states have call predecessors, (157), 92 states have return successors, (157), 145 states have call predecessors, (157), 157 states have call successors, (157) [2024-12-02 08:21:18,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1068 states to 1068 states and 1389 transitions. [2024-12-02 08:21:18,091 INFO L78 Accepts]: Start accepts. Automaton has 1068 states and 1389 transitions. Word has length 98 [2024-12-02 08:21:18,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:18,091 INFO L471 AbstractCegarLoop]: Abstraction has 1068 states and 1389 transitions. [2024-12-02 08:21:18,091 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.714285714285714) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-12-02 08:21:18,091 INFO L276 IsEmpty]: Start isEmpty. Operand 1068 states and 1389 transitions. [2024-12-02 08:21:18,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-12-02 08:21:18,092 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:18,093 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:18,093 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 08:21:18,093 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:18,093 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:18,093 INFO L85 PathProgramCache]: Analyzing trace with hash -1784538508, now seen corresponding path program 1 times [2024-12-02 08:21:18,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:18,093 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923665193] [2024-12-02 08:21:18,093 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:18,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:18,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:18,181 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:21:18,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:18,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923665193] [2024-12-02 08:21:18,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [923665193] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:18,182 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:18,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:18,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1622281450] [2024-12-02 08:21:18,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:18,182 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:18,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:18,182 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:18,182 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:18,183 INFO L87 Difference]: Start difference. First operand 1068 states and 1389 transitions. Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:18,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:18,445 INFO L93 Difference]: Finished difference Result 2778 states and 3641 transitions. [2024-12-02 08:21:18,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:21:18,446 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 99 [2024-12-02 08:21:18,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:18,455 INFO L225 Difference]: With dead ends: 2778 [2024-12-02 08:21:18,455 INFO L226 Difference]: Without dead ends: 1974 [2024-12-02 08:21:18,458 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:18,459 INFO L435 NwaCegarLoop]: 460 mSDtfsCounter, 199 mSDsluCounter, 691 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 1151 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:18,459 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 1151 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:18,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1974 states. [2024-12-02 08:21:18,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1974 to 1793. [2024-12-02 08:21:18,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1793 states, 1355 states have (on average 1.3151291512915129) internal successors, (1782), 1375 states have internal predecessors, (1782), 280 states have call successors, (280), 157 states have call predecessors, (280), 157 states have return successors, (280), 260 states have call predecessors, (280), 280 states have call successors, (280) [2024-12-02 08:21:18,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1793 states to 1793 states and 2342 transitions. [2024-12-02 08:21:18,784 INFO L78 Accepts]: Start accepts. Automaton has 1793 states and 2342 transitions. Word has length 99 [2024-12-02 08:21:18,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:18,785 INFO L471 AbstractCegarLoop]: Abstraction has 1793 states and 2342 transitions. [2024-12-02 08:21:18,785 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:18,785 INFO L276 IsEmpty]: Start isEmpty. Operand 1793 states and 2342 transitions. [2024-12-02 08:21:18,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2024-12-02 08:21:18,786 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:18,786 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:18,787 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 08:21:18,787 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:18,787 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:18,787 INFO L85 PathProgramCache]: Analyzing trace with hash -599061911, now seen corresponding path program 1 times [2024-12-02 08:21:18,787 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:18,787 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1815542098] [2024-12-02 08:21:18,787 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:18,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:18,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:18,878 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:21:18,878 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:18,878 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1815542098] [2024-12-02 08:21:18,878 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1815542098] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:18,879 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:18,879 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:18,879 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1634043901] [2024-12-02 08:21:18,879 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:18,879 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:18,879 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:18,880 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:18,880 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:18,880 INFO L87 Difference]: Start difference. First operand 1793 states and 2342 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:19,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:19,225 INFO L93 Difference]: Finished difference Result 4547 states and 5974 transitions. [2024-12-02 08:21:19,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:21:19,226 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 101 [2024-12-02 08:21:19,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:19,235 INFO L225 Difference]: With dead ends: 4547 [2024-12-02 08:21:19,235 INFO L226 Difference]: Without dead ends: 3091 [2024-12-02 08:21:19,237 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:19,238 INFO L435 NwaCegarLoop]: 476 mSDtfsCounter, 207 mSDsluCounter, 713 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 207 SdHoareTripleChecker+Valid, 1189 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:19,238 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [207 Valid, 1189 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:19,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3091 states. [2024-12-02 08:21:19,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3091 to 2814. [2024-12-02 08:21:19,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2814 states, 2101 states have (on average 1.3055687767729653) internal successors, (2743), 2132 states have internal predecessors, (2743), 460 states have call successors, (460), 252 states have call predecessors, (460), 252 states have return successors, (460), 429 states have call predecessors, (460), 460 states have call successors, (460) [2024-12-02 08:21:19,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2814 states to 2814 states and 3663 transitions. [2024-12-02 08:21:19,420 INFO L78 Accepts]: Start accepts. Automaton has 2814 states and 3663 transitions. Word has length 101 [2024-12-02 08:21:19,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:19,420 INFO L471 AbstractCegarLoop]: Abstraction has 2814 states and 3663 transitions. [2024-12-02 08:21:19,420 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:19,420 INFO L276 IsEmpty]: Start isEmpty. Operand 2814 states and 3663 transitions. [2024-12-02 08:21:19,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2024-12-02 08:21:19,422 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:19,422 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:19,422 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 08:21:19,422 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:19,422 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:19,422 INFO L85 PathProgramCache]: Analyzing trace with hash 647926777, now seen corresponding path program 1 times [2024-12-02 08:21:19,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:19,423 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372692619] [2024-12-02 08:21:19,423 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:19,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:19,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:19,487 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:21:19,487 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:19,487 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372692619] [2024-12-02 08:21:19,487 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [372692619] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:19,487 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:19,487 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:19,487 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698269764] [2024-12-02 08:21:19,488 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:19,488 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:19,488 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:19,488 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:19,488 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:19,488 INFO L87 Difference]: Start difference. First operand 2814 states and 3663 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:19,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:19,787 INFO L93 Difference]: Finished difference Result 6570 states and 8593 transitions. [2024-12-02 08:21:19,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:21:19,788 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 101 [2024-12-02 08:21:19,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:19,801 INFO L225 Difference]: With dead ends: 6570 [2024-12-02 08:21:19,801 INFO L226 Difference]: Without dead ends: 4213 [2024-12-02 08:21:19,805 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:19,806 INFO L435 NwaCegarLoop]: 486 mSDtfsCounter, 200 mSDsluCounter, 715 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 1201 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:19,806 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 1201 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:19,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4213 states. [2024-12-02 08:21:20,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4213 to 4030. [2024-12-02 08:21:20,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4030 states, 2993 states have (on average 1.301703975943869) internal successors, (3896), 3037 states have internal predecessors, (3896), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-12-02 08:21:20,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4030 states to 4030 states and 5240 transitions. [2024-12-02 08:21:20,081 INFO L78 Accepts]: Start accepts. Automaton has 4030 states and 5240 transitions. Word has length 101 [2024-12-02 08:21:20,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:20,081 INFO L471 AbstractCegarLoop]: Abstraction has 4030 states and 5240 transitions. [2024-12-02 08:21:20,081 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:20,081 INFO L276 IsEmpty]: Start isEmpty. Operand 4030 states and 5240 transitions. [2024-12-02 08:21:20,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-12-02 08:21:20,083 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:20,083 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:20,083 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 08:21:20,083 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:20,083 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:20,083 INFO L85 PathProgramCache]: Analyzing trace with hash -1760044486, now seen corresponding path program 1 times [2024-12-02 08:21:20,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:20,083 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [783513220] [2024-12-02 08:21:20,083 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:20,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:20,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:20,119 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:21:20,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:20,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [783513220] [2024-12-02 08:21:20,120 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [783513220] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:20,120 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:20,120 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 08:21:20,120 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800679695] [2024-12-02 08:21:20,120 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:20,120 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 08:21:20,120 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:20,121 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 08:21:20,121 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 08:21:20,121 INFO L87 Difference]: Start difference. First operand 4030 states and 5240 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:20,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:20,483 INFO L93 Difference]: Finished difference Result 7739 states and 10111 transitions. [2024-12-02 08:21:20,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 08:21:20,484 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 102 [2024-12-02 08:21:20,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:20,505 INFO L225 Difference]: With dead ends: 7739 [2024-12-02 08:21:20,505 INFO L226 Difference]: Without dead ends: 4063 [2024-12-02 08:21:20,512 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 08:21:20,513 INFO L435 NwaCegarLoop]: 262 mSDtfsCounter, 6 mSDsluCounter, 225 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 487 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:20,513 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 487 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 41 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:20,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4063 states. [2024-12-02 08:21:20,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4063 to 4036. [2024-12-02 08:21:20,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4036 states, 2999 states have (on average 1.3011003667889296) internal successors, (3902), 3043 states have internal predecessors, (3902), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-12-02 08:21:20,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4036 states to 4036 states and 5246 transitions. [2024-12-02 08:21:20,807 INFO L78 Accepts]: Start accepts. Automaton has 4036 states and 5246 transitions. Word has length 102 [2024-12-02 08:21:20,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:20,807 INFO L471 AbstractCegarLoop]: Abstraction has 4036 states and 5246 transitions. [2024-12-02 08:21:20,808 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:20,808 INFO L276 IsEmpty]: Start isEmpty. Operand 4036 states and 5246 transitions. [2024-12-02 08:21:20,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-12-02 08:21:20,809 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:20,809 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:20,809 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 08:21:20,810 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:20,810 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:20,810 INFO L85 PathProgramCache]: Analyzing trace with hash 1930890164, now seen corresponding path program 1 times [2024-12-02 08:21:20,810 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:20,810 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [142318248] [2024-12-02 08:21:20,810 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:20,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:20,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:20,926 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:21:20,926 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:20,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [142318248] [2024-12-02 08:21:20,927 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [142318248] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:20,927 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:20,927 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:20,927 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2043248506] [2024-12-02 08:21:20,927 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:20,927 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:20,927 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:20,928 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:20,928 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:20,928 INFO L87 Difference]: Start difference. First operand 4036 states and 5246 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:21,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:21,144 INFO L93 Difference]: Finished difference Result 7704 states and 10038 transitions. [2024-12-02 08:21:21,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:21,144 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 103 [2024-12-02 08:21:21,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:21,160 INFO L225 Difference]: With dead ends: 7704 [2024-12-02 08:21:21,161 INFO L226 Difference]: Without dead ends: 3744 [2024-12-02 08:21:21,166 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:21,167 INFO L435 NwaCegarLoop]: 266 mSDtfsCounter, 83 mSDsluCounter, 480 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 83 SdHoareTripleChecker+Valid, 746 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:21,167 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [83 Valid, 746 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:21,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3744 states. [2024-12-02 08:21:21,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3744 to 3681. [2024-12-02 08:21:21,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3681 states, 2727 states have (on average 1.3105977264393105) internal successors, (3574), 2761 states have internal predecessors, (3574), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-12-02 08:21:21,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3681 states to 3681 states and 4814 transitions. [2024-12-02 08:21:21,469 INFO L78 Accepts]: Start accepts. Automaton has 3681 states and 4814 transitions. Word has length 103 [2024-12-02 08:21:21,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:21,469 INFO L471 AbstractCegarLoop]: Abstraction has 3681 states and 4814 transitions. [2024-12-02 08:21:21,469 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:21,469 INFO L276 IsEmpty]: Start isEmpty. Operand 3681 states and 4814 transitions. [2024-12-02 08:21:21,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2024-12-02 08:21:21,471 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:21,471 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:21,471 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 08:21:21,471 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:21,471 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:21,471 INFO L85 PathProgramCache]: Analyzing trace with hash -1500264054, now seen corresponding path program 1 times [2024-12-02 08:21:21,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:21,472 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335202985] [2024-12-02 08:21:21,472 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:21,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:21,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:21,529 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:21:21,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:21,529 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [335202985] [2024-12-02 08:21:21,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [335202985] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:21,529 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:21,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-12-02 08:21:21,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057177176] [2024-12-02 08:21:21,529 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:21,530 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-12-02 08:21:21,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:21,530 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 08:21:21,530 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 08:21:21,530 INFO L87 Difference]: Start difference. First operand 3681 states and 4814 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:21,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:21,911 INFO L93 Difference]: Finished difference Result 7191 states and 9437 transitions. [2024-12-02 08:21:21,912 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 08:21:21,912 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 104 [2024-12-02 08:21:21,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:21,932 INFO L225 Difference]: With dead ends: 7191 [2024-12-02 08:21:21,932 INFO L226 Difference]: Without dead ends: 3691 [2024-12-02 08:21:21,940 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 08:21:21,940 INFO L435 NwaCegarLoop]: 260 mSDtfsCounter, 0 mSDsluCounter, 225 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 485 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:21,940 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 485 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:21,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3691 states. [2024-12-02 08:21:22,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3691 to 3691. [2024-12-02 08:21:22,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3691 states, 2737 states have (on average 1.3094629156010231) internal successors, (3584), 2771 states have internal predecessors, (3584), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-12-02 08:21:22,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3691 states to 3691 states and 4824 transitions. [2024-12-02 08:21:22,347 INFO L78 Accepts]: Start accepts. Automaton has 3691 states and 4824 transitions. Word has length 104 [2024-12-02 08:21:22,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:22,347 INFO L471 AbstractCegarLoop]: Abstraction has 3691 states and 4824 transitions. [2024-12-02 08:21:22,347 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:22,347 INFO L276 IsEmpty]: Start isEmpty. Operand 3691 states and 4824 transitions. [2024-12-02 08:21:22,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2024-12-02 08:21:22,349 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:22,349 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:22,349 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 08:21:22,349 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:22,350 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:22,350 INFO L85 PathProgramCache]: Analyzing trace with hash -1445902481, now seen corresponding path program 1 times [2024-12-02 08:21:22,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:22,350 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317931463] [2024-12-02 08:21:22,350 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:22,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:22,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:22,474 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:21:22,474 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:22,474 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317931463] [2024-12-02 08:21:22,474 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1317931463] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:22,474 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:22,474 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:21:22,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [134889423] [2024-12-02 08:21:22,474 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:22,474 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:21:22,475 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:22,475 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:21:22,475 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:21:22,475 INFO L87 Difference]: Start difference. First operand 3691 states and 4824 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:22,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:22,833 INFO L93 Difference]: Finished difference Result 7183 states and 9409 transitions. [2024-12-02 08:21:22,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:21:22,833 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 104 [2024-12-02 08:21:22,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:22,848 INFO L225 Difference]: With dead ends: 7183 [2024-12-02 08:21:22,848 INFO L226 Difference]: Without dead ends: 3611 [2024-12-02 08:21:22,855 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:21:22,856 INFO L435 NwaCegarLoop]: 271 mSDtfsCounter, 64 mSDsluCounter, 485 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 756 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:22,856 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [64 Valid, 756 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:22,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3611 states. [2024-12-02 08:21:23,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3611 to 2783. [2024-12-02 08:21:23,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2783 states, 2063 states have (on average 1.303926320891905) internal successors, (2690), 2082 states have internal predecessors, (2690), 469 states have call successors, (469), 250 states have call predecessors, (469), 250 states have return successors, (469), 450 states have call predecessors, (469), 469 states have call successors, (469) [2024-12-02 08:21:23,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2783 states to 2783 states and 3628 transitions. [2024-12-02 08:21:23,262 INFO L78 Accepts]: Start accepts. Automaton has 2783 states and 3628 transitions. Word has length 104 [2024-12-02 08:21:23,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:23,262 INFO L471 AbstractCegarLoop]: Abstraction has 2783 states and 3628 transitions. [2024-12-02 08:21:23,262 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-12-02 08:21:23,263 INFO L276 IsEmpty]: Start isEmpty. Operand 2783 states and 3628 transitions. [2024-12-02 08:21:23,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2024-12-02 08:21:23,268 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:23,269 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:23,269 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-02 08:21:23,269 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:23,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:23,269 INFO L85 PathProgramCache]: Analyzing trace with hash 486642331, now seen corresponding path program 1 times [2024-12-02 08:21:23,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:23,269 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120062636] [2024-12-02 08:21:23,270 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:23,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:23,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:24,114 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:21:24,115 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:24,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120062636] [2024-12-02 08:21:24,115 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2120062636] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:21:24,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1907464875] [2024-12-02 08:21:24,115 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:24,115 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:21:24,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:21:24,117 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:21:24,130 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 08:21:24,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:24,362 INFO L256 TraceCheckSpWp]: Trace formula consists of 730 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-12-02 08:21:24,368 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:21:24,528 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 38 proven. 4 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-12-02 08:21:24,528 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:21:24,798 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 29 proven. 7 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2024-12-02 08:21:24,798 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1907464875] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:21:24,798 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:21:24,798 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 9] total 20 [2024-12-02 08:21:24,799 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332382768] [2024-12-02 08:21:24,799 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:21:24,800 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2024-12-02 08:21:24,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:24,801 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2024-12-02 08:21:24,801 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2024-12-02 08:21:24,801 INFO L87 Difference]: Start difference. First operand 2783 states and 3628 transitions. Second operand has 20 states, 18 states have (on average 12.11111111111111) internal successors, (218), 18 states have internal predecessors, (218), 9 states have call successors, (38), 4 states have call predecessors, (38), 8 states have return successors, (38), 9 states have call predecessors, (38), 9 states have call successors, (38) [2024-12-02 08:21:27,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:27,316 INFO L93 Difference]: Finished difference Result 9288 states and 12094 transitions. [2024-12-02 08:21:27,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2024-12-02 08:21:27,317 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 18 states have (on average 12.11111111111111) internal successors, (218), 18 states have internal predecessors, (218), 9 states have call successors, (38), 4 states have call predecessors, (38), 8 states have return successors, (38), 9 states have call predecessors, (38), 9 states have call successors, (38) Word has length 153 [2024-12-02 08:21:27,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:27,345 INFO L225 Difference]: With dead ends: 9288 [2024-12-02 08:21:27,345 INFO L226 Difference]: Without dead ends: 6696 [2024-12-02 08:21:27,352 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 369 GetRequests, 302 SyntacticMatches, 0 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1303 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=620, Invalid=4072, Unknown=0, NotChecked=0, Total=4692 [2024-12-02 08:21:27,352 INFO L435 NwaCegarLoop]: 400 mSDtfsCounter, 1922 mSDsluCounter, 4218 mSDsCounter, 0 mSdLazyCounter, 784 mSolverCounterSat, 686 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1937 SdHoareTripleChecker+Valid, 4618 SdHoareTripleChecker+Invalid, 1470 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 686 IncrementalHoareTripleChecker+Valid, 784 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:27,352 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1937 Valid, 4618 Invalid, 1470 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [686 Valid, 784 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 08:21:27,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6696 states. [2024-12-02 08:21:27,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6696 to 5643. [2024-12-02 08:21:27,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5643 states, 4150 states have (on average 1.304578313253012) internal successors, (5414), 4187 states have internal predecessors, (5414), 972 states have call successors, (972), 520 states have call predecessors, (972), 520 states have return successors, (972), 935 states have call predecessors, (972), 972 states have call successors, (972) [2024-12-02 08:21:27,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5643 states to 5643 states and 7358 transitions. [2024-12-02 08:21:27,890 INFO L78 Accepts]: Start accepts. Automaton has 5643 states and 7358 transitions. Word has length 153 [2024-12-02 08:21:27,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:27,890 INFO L471 AbstractCegarLoop]: Abstraction has 5643 states and 7358 transitions. [2024-12-02 08:21:27,890 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 18 states have (on average 12.11111111111111) internal successors, (218), 18 states have internal predecessors, (218), 9 states have call successors, (38), 4 states have call predecessors, (38), 8 states have return successors, (38), 9 states have call predecessors, (38), 9 states have call successors, (38) [2024-12-02 08:21:27,891 INFO L276 IsEmpty]: Start isEmpty. Operand 5643 states and 7358 transitions. [2024-12-02 08:21:27,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2024-12-02 08:21:27,898 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:27,898 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:27,908 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-12-02 08:21:28,098 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2024-12-02 08:21:28,099 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:28,099 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:28,099 INFO L85 PathProgramCache]: Analyzing trace with hash -950230078, now seen corresponding path program 1 times [2024-12-02 08:21:28,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:28,099 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [621655783] [2024-12-02 08:21:28,099 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:28,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:28,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:28,738 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 26 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-12-02 08:21:28,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:28,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [621655783] [2024-12-02 08:21:28,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [621655783] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:21:28,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2141927834] [2024-12-02 08:21:28,738 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:28,738 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:21:28,738 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:21:28,740 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:21:28,741 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:21:28,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:28,935 INFO L256 TraceCheckSpWp]: Trace formula consists of 748 conjuncts, 37 conjuncts are in the unsatisfiable core [2024-12-02 08:21:28,938 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:21:29,308 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 37 proven. 43 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-12-02 08:21:29,308 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:21:29,383 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-12-02 08:21:29,383 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2141927834] provided 1 perfect and 1 imperfect interpolant sequences [2024-12-02 08:21:29,383 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:21:29,383 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [8, 17] total 24 [2024-12-02 08:21:29,383 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664991376] [2024-12-02 08:21:29,383 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:29,384 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:21:29,384 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:29,384 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:21:29,384 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=483, Unknown=0, NotChecked=0, Total=552 [2024-12-02 08:21:29,384 INFO L87 Difference]: Start difference. First operand 5643 states and 7358 transitions. Second operand has 5 states, 4 states have (on average 22.5) internal successors, (90), 5 states have internal predecessors, (90), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) [2024-12-02 08:21:29,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:29,703 INFO L93 Difference]: Finished difference Result 9923 states and 12992 transitions. [2024-12-02 08:21:29,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:21:29,704 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 22.5) internal successors, (90), 5 states have internal predecessors, (90), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) Word has length 155 [2024-12-02 08:21:29,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:29,720 INFO L225 Difference]: With dead ends: 9923 [2024-12-02 08:21:29,720 INFO L226 Difference]: Without dead ends: 4448 [2024-12-02 08:21:29,729 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 318 GetRequests, 296 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=483, Unknown=0, NotChecked=0, Total=552 [2024-12-02 08:21:29,729 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 0 mSDsluCounter, 508 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 767 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:29,729 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 767 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:21:29,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4448 states. [2024-12-02 08:21:30,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4448 to 4448. [2024-12-02 08:21:30,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4448 states, 3292 states have (on average 1.3049817739975698) internal successors, (4296), 3320 states have internal predecessors, (4296), 751 states have call successors, (751), 404 states have call predecessors, (751), 404 states have return successors, (751), 723 states have call predecessors, (751), 751 states have call successors, (751) [2024-12-02 08:21:30,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4448 states to 4448 states and 5798 transitions. [2024-12-02 08:21:30,211 INFO L78 Accepts]: Start accepts. Automaton has 4448 states and 5798 transitions. Word has length 155 [2024-12-02 08:21:30,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:30,211 INFO L471 AbstractCegarLoop]: Abstraction has 4448 states and 5798 transitions. [2024-12-02 08:21:30,211 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 22.5) internal successors, (90), 5 states have internal predecessors, (90), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) [2024-12-02 08:21:30,211 INFO L276 IsEmpty]: Start isEmpty. Operand 4448 states and 5798 transitions. [2024-12-02 08:21:30,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-02 08:21:30,216 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:30,216 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:30,226 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-12-02 08:21:30,417 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2024-12-02 08:21:30,417 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:30,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:30,417 INFO L85 PathProgramCache]: Analyzing trace with hash -896873483, now seen corresponding path program 1 times [2024-12-02 08:21:30,417 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:30,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820292463] [2024-12-02 08:21:30,418 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:30,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:30,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:31,116 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 22 proven. 5 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:21:31,116 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:31,116 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820292463] [2024-12-02 08:21:31,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1820292463] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:21:31,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [320440550] [2024-12-02 08:21:31,117 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:31,117 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:21:31,117 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:21:31,118 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:21:31,119 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 08:21:31,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:31,320 INFO L256 TraceCheckSpWp]: Trace formula consists of 765 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-12-02 08:21:31,323 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:21:32,002 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 61 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 08:21:32,002 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:21:32,560 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 15 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:21:32,560 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [320440550] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:21:32,561 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:21:32,561 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 11] total 26 [2024-12-02 08:21:32,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1754401952] [2024-12-02 08:21:32,561 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:21:32,561 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-12-02 08:21:32,562 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:32,562 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-12-02 08:21:32,562 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=542, Unknown=0, NotChecked=0, Total=650 [2024-12-02 08:21:32,563 INFO L87 Difference]: Start difference. First operand 4448 states and 5798 transitions. Second operand has 26 states, 26 states have (on average 9.461538461538462) internal successors, (246), 26 states have internal predecessors, (246), 10 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 10 states have call predecessors, (37), 10 states have call successors, (37) [2024-12-02 08:21:36,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:36,921 INFO L93 Difference]: Finished difference Result 10824 states and 14092 transitions. [2024-12-02 08:21:36,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2024-12-02 08:21:36,922 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 9.461538461538462) internal successors, (246), 26 states have internal predecessors, (246), 10 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 10 states have call predecessors, (37), 10 states have call successors, (37) Word has length 156 [2024-12-02 08:21:36,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:36,946 INFO L225 Difference]: With dead ends: 10824 [2024-12-02 08:21:36,946 INFO L226 Difference]: Without dead ends: 6629 [2024-12-02 08:21:36,955 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 407 GetRequests, 318 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2628 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1609, Invalid=6581, Unknown=0, NotChecked=0, Total=8190 [2024-12-02 08:21:36,955 INFO L435 NwaCegarLoop]: 325 mSDtfsCounter, 3302 mSDsluCounter, 3379 mSDsCounter, 0 mSdLazyCounter, 1679 mSolverCounterSat, 1123 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3302 SdHoareTripleChecker+Valid, 3704 SdHoareTripleChecker+Invalid, 2802 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1123 IncrementalHoareTripleChecker+Valid, 1679 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:36,955 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3302 Valid, 3704 Invalid, 2802 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1123 Valid, 1679 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-02 08:21:36,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6629 states. [2024-12-02 08:21:37,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6629 to 6232. [2024-12-02 08:21:37,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6232 states, 4602 states have (on average 1.2970447631464581) internal successors, (5969), 4643 states have internal predecessors, (5969), 1050 states have call successors, (1050), 579 states have call predecessors, (1050), 579 states have return successors, (1050), 1009 states have call predecessors, (1050), 1050 states have call successors, (1050) [2024-12-02 08:21:37,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6232 states to 6232 states and 8069 transitions. [2024-12-02 08:21:37,796 INFO L78 Accepts]: Start accepts. Automaton has 6232 states and 8069 transitions. Word has length 156 [2024-12-02 08:21:37,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:37,796 INFO L471 AbstractCegarLoop]: Abstraction has 6232 states and 8069 transitions. [2024-12-02 08:21:37,796 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 9.461538461538462) internal successors, (246), 26 states have internal predecessors, (246), 10 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 10 states have call predecessors, (37), 10 states have call successors, (37) [2024-12-02 08:21:37,796 INFO L276 IsEmpty]: Start isEmpty. Operand 6232 states and 8069 transitions. [2024-12-02 08:21:37,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-02 08:21:37,806 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:37,806 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:37,812 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-02 08:21:38,006 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:21:38,006 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:38,007 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:38,007 INFO L85 PathProgramCache]: Analyzing trace with hash 1833817774, now seen corresponding path program 1 times [2024-12-02 08:21:38,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:38,007 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564420045] [2024-12-02 08:21:38,007 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:38,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:38,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:38,299 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-12-02 08:21:38,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:38,299 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564420045] [2024-12-02 08:21:38,299 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564420045] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:21:38,299 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:21:38,299 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:21:38,300 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [30535374] [2024-12-02 08:21:38,300 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:21:38,300 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:21:38,300 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:38,300 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:21:38,301 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:21:38,301 INFO L87 Difference]: Start difference. First operand 6232 states and 8069 transitions. Second operand has 7 states, 7 states have (on average 13.142857142857142) internal successors, (92), 6 states have internal predecessors, (92), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-12-02 08:21:39,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:39,882 INFO L93 Difference]: Finished difference Result 18294 states and 23745 transitions. [2024-12-02 08:21:39,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:21:39,883 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.142857142857142) internal successors, (92), 6 states have internal predecessors, (92), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) Word has length 158 [2024-12-02 08:21:39,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:39,920 INFO L225 Difference]: With dead ends: 18294 [2024-12-02 08:21:39,920 INFO L226 Difference]: Without dead ends: 12367 [2024-12-02 08:21:39,930 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:21:39,931 INFO L435 NwaCegarLoop]: 484 mSDtfsCounter, 223 mSDsluCounter, 2084 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 228 SdHoareTripleChecker+Valid, 2568 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:39,931 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [228 Valid, 2568 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:21:39,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12367 states. [2024-12-02 08:21:40,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12367 to 8853. [2024-12-02 08:21:40,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8853 states, 6489 states have (on average 1.294960702727693) internal successors, (8403), 6549 states have internal predecessors, (8403), 1539 states have call successors, (1539), 824 states have call predecessors, (1539), 824 states have return successors, (1539), 1479 states have call predecessors, (1539), 1539 states have call successors, (1539) [2024-12-02 08:21:40,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8853 states to 8853 states and 11481 transitions. [2024-12-02 08:21:40,885 INFO L78 Accepts]: Start accepts. Automaton has 8853 states and 11481 transitions. Word has length 158 [2024-12-02 08:21:40,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:40,885 INFO L471 AbstractCegarLoop]: Abstraction has 8853 states and 11481 transitions. [2024-12-02 08:21:40,885 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.142857142857142) internal successors, (92), 6 states have internal predecessors, (92), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-12-02 08:21:40,886 INFO L276 IsEmpty]: Start isEmpty. Operand 8853 states and 11481 transitions. [2024-12-02 08:21:40,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-02 08:21:40,891 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:40,891 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:40,891 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-02 08:21:40,891 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:40,891 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:40,891 INFO L85 PathProgramCache]: Analyzing trace with hash -1397411830, now seen corresponding path program 1 times [2024-12-02 08:21:40,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:40,892 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243204144] [2024-12-02 08:21:40,892 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:40,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:40,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:41,848 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 20 proven. 9 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:21:41,848 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:41,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243204144] [2024-12-02 08:21:41,848 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1243204144] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:21:41,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1580783590] [2024-12-02 08:21:41,848 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:41,848 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:21:41,849 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:21:41,850 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:21:41,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:21:42,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:42,057 INFO L256 TraceCheckSpWp]: Trace formula consists of 782 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-12-02 08:21:42,060 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:21:42,430 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 59 proven. 17 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 08:21:42,431 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:21:44,901 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 20 proven. 9 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:21:44,901 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1580783590] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:21:44,902 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:21:44,902 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12, 10] total 29 [2024-12-02 08:21:44,902 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1129300491] [2024-12-02 08:21:44,902 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:21:44,903 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2024-12-02 08:21:44,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:44,903 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2024-12-02 08:21:44,904 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=688, Unknown=0, NotChecked=0, Total=812 [2024-12-02 08:21:44,904 INFO L87 Difference]: Start difference. First operand 8853 states and 11481 transitions. Second operand has 29 states, 29 states have (on average 9.03448275862069) internal successors, (262), 29 states have internal predecessors, (262), 10 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 10 states have call predecessors, (36), 10 states have call successors, (36) [2024-12-02 08:21:48,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:48,229 INFO L93 Difference]: Finished difference Result 18102 states and 23530 transitions. [2024-12-02 08:21:48,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-12-02 08:21:48,230 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 9.03448275862069) internal successors, (262), 29 states have internal predecessors, (262), 10 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 10 states have call predecessors, (36), 10 states have call successors, (36) Word has length 158 [2024-12-02 08:21:48,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:48,255 INFO L225 Difference]: With dead ends: 18102 [2024-12-02 08:21:48,255 INFO L226 Difference]: Without dead ends: 9554 [2024-12-02 08:21:48,265 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 349 GetRequests, 303 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 598 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=405, Invalid=1851, Unknown=0, NotChecked=0, Total=2256 [2024-12-02 08:21:48,266 INFO L435 NwaCegarLoop]: 464 mSDtfsCounter, 1108 mSDsluCounter, 6015 mSDsCounter, 0 mSdLazyCounter, 2863 mSolverCounterSat, 306 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1108 SdHoareTripleChecker+Valid, 6479 SdHoareTripleChecker+Invalid, 3169 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 306 IncrementalHoareTripleChecker+Valid, 2863 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:48,266 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1108 Valid, 6479 Invalid, 3169 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [306 Valid, 2863 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-02 08:21:48,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9554 states. [2024-12-02 08:21:49,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9554 to 9245. [2024-12-02 08:21:49,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9245 states, 6784 states have (on average 1.294369103773585) internal successors, (8781), 6847 states have internal predecessors, (8781), 1602 states have call successors, (1602), 858 states have call predecessors, (1602), 858 states have return successors, (1602), 1539 states have call predecessors, (1602), 1602 states have call successors, (1602) [2024-12-02 08:21:49,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9245 states to 9245 states and 11985 transitions. [2024-12-02 08:21:49,324 INFO L78 Accepts]: Start accepts. Automaton has 9245 states and 11985 transitions. Word has length 158 [2024-12-02 08:21:49,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:49,324 INFO L471 AbstractCegarLoop]: Abstraction has 9245 states and 11985 transitions. [2024-12-02 08:21:49,324 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 9.03448275862069) internal successors, (262), 29 states have internal predecessors, (262), 10 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 10 states have call predecessors, (36), 10 states have call successors, (36) [2024-12-02 08:21:49,325 INFO L276 IsEmpty]: Start isEmpty. Operand 9245 states and 11985 transitions. [2024-12-02 08:21:49,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-12-02 08:21:49,330 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:49,330 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:49,339 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:21:49,530 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:21:49,530 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:49,530 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:49,530 INFO L85 PathProgramCache]: Analyzing trace with hash -747886001, now seen corresponding path program 1 times [2024-12-02 08:21:49,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:49,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324080354] [2024-12-02 08:21:49,531 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:49,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:49,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:49,945 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 23 proven. 6 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:21:49,945 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:49,945 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [324080354] [2024-12-02 08:21:49,945 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [324080354] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:21:49,945 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1724451014] [2024-12-02 08:21:49,945 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:49,945 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:21:49,945 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:21:49,947 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:21:49,947 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 08:21:50,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:50,149 INFO L256 TraceCheckSpWp]: Trace formula consists of 783 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-12-02 08:21:50,151 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:21:50,473 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 66 proven. 10 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 08:21:50,473 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:21:50,797 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 23 proven. 6 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:21:50,797 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1724451014] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:21:50,797 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:21:50,797 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 8] total 17 [2024-12-02 08:21:50,797 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [219153043] [2024-12-02 08:21:50,797 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:21:50,798 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2024-12-02 08:21:50,798 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:50,798 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-12-02 08:21:50,799 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=209, Unknown=0, NotChecked=0, Total=272 [2024-12-02 08:21:50,799 INFO L87 Difference]: Start difference. First operand 9245 states and 11985 transitions. Second operand has 17 states, 17 states have (on average 12.352941176470589) internal successors, (210), 17 states have internal predecessors, (210), 7 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 7 states have call predecessors, (29), 7 states have call successors, (29) [2024-12-02 08:21:53,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:53,587 INFO L93 Difference]: Finished difference Result 23230 states and 30203 transitions. [2024-12-02 08:21:53,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-12-02 08:21:53,587 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 12.352941176470589) internal successors, (210), 17 states have internal predecessors, (210), 7 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 7 states have call predecessors, (29), 7 states have call successors, (29) Word has length 159 [2024-12-02 08:21:53,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:53,657 INFO L225 Difference]: With dead ends: 23230 [2024-12-02 08:21:53,657 INFO L226 Difference]: Without dead ends: 14290 [2024-12-02 08:21:53,667 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 349 GetRequests, 316 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 285 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=268, Invalid=922, Unknown=0, NotChecked=0, Total=1190 [2024-12-02 08:21:53,668 INFO L435 NwaCegarLoop]: 444 mSDtfsCounter, 2292 mSDsluCounter, 2109 mSDsCounter, 0 mSdLazyCounter, 1407 mSolverCounterSat, 598 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2292 SdHoareTripleChecker+Valid, 2553 SdHoareTripleChecker+Invalid, 2005 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 598 IncrementalHoareTripleChecker+Valid, 1407 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:53,668 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2292 Valid, 2553 Invalid, 2005 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [598 Valid, 1407 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 08:21:53,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14290 states. [2024-12-02 08:21:55,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14290 to 13095. [2024-12-02 08:21:55,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13095 states, 9588 states have (on average 1.2982895285773883) internal successors, (12448), 9683 states have internal predecessors, (12448), 2284 states have call successors, (2284), 1222 states have call predecessors, (2284), 1222 states have return successors, (2284), 2189 states have call predecessors, (2284), 2284 states have call successors, (2284) [2024-12-02 08:21:55,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13095 states to 13095 states and 17016 transitions. [2024-12-02 08:21:55,061 INFO L78 Accepts]: Start accepts. Automaton has 13095 states and 17016 transitions. Word has length 159 [2024-12-02 08:21:55,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:21:55,061 INFO L471 AbstractCegarLoop]: Abstraction has 13095 states and 17016 transitions. [2024-12-02 08:21:55,062 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 12.352941176470589) internal successors, (210), 17 states have internal predecessors, (210), 7 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 7 states have call predecessors, (29), 7 states have call successors, (29) [2024-12-02 08:21:55,062 INFO L276 IsEmpty]: Start isEmpty. Operand 13095 states and 17016 transitions. [2024-12-02 08:21:55,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2024-12-02 08:21:55,066 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:21:55,067 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:21:55,073 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 08:21:55,267 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2024-12-02 08:21:55,267 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:21:55,267 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:21:55,267 INFO L85 PathProgramCache]: Analyzing trace with hash -1784161869, now seen corresponding path program 1 times [2024-12-02 08:21:55,267 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:21:55,267 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269156846] [2024-12-02 08:21:55,268 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:55,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:21:55,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:55,642 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 16 proven. 16 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:21:55,642 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:21:55,642 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1269156846] [2024-12-02 08:21:55,642 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1269156846] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:21:55,642 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [587289357] [2024-12-02 08:21:55,642 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:21:55,642 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:21:55,642 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:21:55,644 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:21:55,644 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 08:21:55,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:21:55,830 INFO L256 TraceCheckSpWp]: Trace formula consists of 770 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-12-02 08:21:55,832 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:21:56,120 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 55 proven. 24 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 08:21:56,120 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:21:56,504 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 16 proven. 16 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:21:56,504 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [587289357] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:21:56,504 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:21:56,504 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 9] total 18 [2024-12-02 08:21:56,504 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355489093] [2024-12-02 08:21:56,504 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:21:56,505 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2024-12-02 08:21:56,505 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:21:56,506 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-12-02 08:21:56,506 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2024-12-02 08:21:56,506 INFO L87 Difference]: Start difference. First operand 13095 states and 17016 transitions. Second operand has 18 states, 18 states have (on average 12.5) internal successors, (225), 18 states have internal predecessors, (225), 7 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 7 states have call predecessors, (29), 7 states have call successors, (29) [2024-12-02 08:21:59,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:21:59,873 INFO L93 Difference]: Finished difference Result 31966 states and 41701 transitions. [2024-12-02 08:21:59,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-12-02 08:21:59,873 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 12.5) internal successors, (225), 18 states have internal predecessors, (225), 7 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 7 states have call predecessors, (29), 7 states have call successors, (29) Word has length 160 [2024-12-02 08:21:59,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:21:59,911 INFO L225 Difference]: With dead ends: 31966 [2024-12-02 08:21:59,911 INFO L226 Difference]: Without dead ends: 19176 [2024-12-02 08:21:59,931 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 367 GetRequests, 321 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 579 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=431, Invalid=1731, Unknown=0, NotChecked=0, Total=2162 [2024-12-02 08:21:59,931 INFO L435 NwaCegarLoop]: 370 mSDtfsCounter, 1656 mSDsluCounter, 2052 mSDsCounter, 0 mSdLazyCounter, 1377 mSolverCounterSat, 451 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1656 SdHoareTripleChecker+Valid, 2422 SdHoareTripleChecker+Invalid, 1828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 451 IncrementalHoareTripleChecker+Valid, 1377 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 08:21:59,931 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1656 Valid, 2422 Invalid, 1828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [451 Valid, 1377 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 08:21:59,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19176 states. [2024-12-02 08:22:02,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19176 to 18925. [2024-12-02 08:22:02,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18925 states, 13911 states have (on average 1.3017755732873266) internal successors, (18109), 14045 states have internal predecessors, (18109), 3255 states have call successors, (3255), 1758 states have call predecessors, (3255), 1758 states have return successors, (3255), 3121 states have call predecessors, (3255), 3255 states have call successors, (3255) [2024-12-02 08:22:02,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18925 states to 18925 states and 24619 transitions. [2024-12-02 08:22:02,374 INFO L78 Accepts]: Start accepts. Automaton has 18925 states and 24619 transitions. Word has length 160 [2024-12-02 08:22:02,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:22:02,375 INFO L471 AbstractCegarLoop]: Abstraction has 18925 states and 24619 transitions. [2024-12-02 08:22:02,375 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 12.5) internal successors, (225), 18 states have internal predecessors, (225), 7 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 7 states have call predecessors, (29), 7 states have call successors, (29) [2024-12-02 08:22:02,375 INFO L276 IsEmpty]: Start isEmpty. Operand 18925 states and 24619 transitions. [2024-12-02 08:22:02,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2024-12-02 08:22:02,385 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:22:02,385 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:22:02,395 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-12-02 08:22:02,586 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2024-12-02 08:22:02,586 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:22:02,586 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:22:02,586 INFO L85 PathProgramCache]: Analyzing trace with hash 823751420, now seen corresponding path program 1 times [2024-12-02 08:22:02,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:22:02,586 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245400476] [2024-12-02 08:22:02,587 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:02,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:22:02,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:03,142 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 24 proven. 9 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-12-02 08:22:03,142 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:22:03,142 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245400476] [2024-12-02 08:22:03,142 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245400476] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:22:03,142 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1526544286] [2024-12-02 08:22:03,142 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:03,142 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:22:03,142 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:22:03,144 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:22:03,144 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 08:22:03,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:03,343 INFO L256 TraceCheckSpWp]: Trace formula consists of 768 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-12-02 08:22:03,346 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:22:03,540 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 69 proven. 4 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-02 08:22:03,540 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:22:03,751 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 31 proven. 6 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-12-02 08:22:03,751 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1526544286] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:22:03,751 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:22:03,751 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12, 9] total 25 [2024-12-02 08:22:03,752 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863380565] [2024-12-02 08:22:03,752 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:22:03,752 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-12-02 08:22:03,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:22:03,752 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-12-02 08:22:03,752 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=536, Unknown=0, NotChecked=0, Total=600 [2024-12-02 08:22:03,753 INFO L87 Difference]: Start difference. First operand 18925 states and 24619 transitions. Second operand has 25 states, 25 states have (on average 8.84) internal successors, (221), 21 states have internal predecessors, (221), 7 states have call successors, (32), 4 states have call predecessors, (32), 8 states have return successors, (34), 10 states have call predecessors, (34), 7 states have call successors, (34) [2024-12-02 08:22:10,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:22:10,823 INFO L93 Difference]: Finished difference Result 51209 states and 66298 transitions. [2024-12-02 08:22:10,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2024-12-02 08:22:10,824 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 8.84) internal successors, (221), 21 states have internal predecessors, (221), 7 states have call successors, (32), 4 states have call predecessors, (32), 8 states have return successors, (34), 10 states have call predecessors, (34), 7 states have call successors, (34) Word has length 160 [2024-12-02 08:22:10,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:22:10,905 INFO L225 Difference]: With dead ends: 51209 [2024-12-02 08:22:10,905 INFO L226 Difference]: Without dead ends: 32562 [2024-12-02 08:22:10,934 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 378 GetRequests, 322 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 568 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=462, Invalid=2844, Unknown=0, NotChecked=0, Total=3306 [2024-12-02 08:22:10,934 INFO L435 NwaCegarLoop]: 384 mSDtfsCounter, 1829 mSDsluCounter, 4752 mSDsCounter, 0 mSdLazyCounter, 2109 mSolverCounterSat, 783 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1829 SdHoareTripleChecker+Valid, 5136 SdHoareTripleChecker+Invalid, 2892 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 783 IncrementalHoareTripleChecker+Valid, 2109 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:22:10,934 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1829 Valid, 5136 Invalid, 2892 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [783 Valid, 2109 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2024-12-02 08:22:10,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32562 states. [2024-12-02 08:22:14,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32562 to 21755. [2024-12-02 08:22:14,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21755 states, 15954 states have (on average 1.3004889056036104) internal successors, (20748), 16117 states have internal predecessors, (20748), 3747 states have call successors, (3747), 2053 states have call predecessors, (3747), 2053 states have return successors, (3747), 3584 states have call predecessors, (3747), 3747 states have call successors, (3747) [2024-12-02 08:22:14,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21755 states to 21755 states and 28242 transitions. [2024-12-02 08:22:14,323 INFO L78 Accepts]: Start accepts. Automaton has 21755 states and 28242 transitions. Word has length 160 [2024-12-02 08:22:14,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:22:14,323 INFO L471 AbstractCegarLoop]: Abstraction has 21755 states and 28242 transitions. [2024-12-02 08:22:14,323 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 8.84) internal successors, (221), 21 states have internal predecessors, (221), 7 states have call successors, (32), 4 states have call predecessors, (32), 8 states have return successors, (34), 10 states have call predecessors, (34), 7 states have call successors, (34) [2024-12-02 08:22:14,323 INFO L276 IsEmpty]: Start isEmpty. Operand 21755 states and 28242 transitions. [2024-12-02 08:22:14,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-12-02 08:22:14,329 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:22:14,329 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:22:14,335 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-12-02 08:22:14,530 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2024-12-02 08:22:14,530 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:22:14,530 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:22:14,530 INFO L85 PathProgramCache]: Analyzing trace with hash 1146944991, now seen corresponding path program 1 times [2024-12-02 08:22:14,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:22:14,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760823639] [2024-12-02 08:22:14,530 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:14,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:22:14,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:15,550 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 26 proven. 6 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 08:22:15,550 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:22:15,550 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760823639] [2024-12-02 08:22:15,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1760823639] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:22:15,550 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [979354091] [2024-12-02 08:22:15,551 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:15,551 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:22:15,551 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:22:15,552 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:22:15,553 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 08:22:15,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:15,768 INFO L256 TraceCheckSpWp]: Trace formula consists of 802 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-12-02 08:22:15,771 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:22:15,987 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 58 proven. 26 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 08:22:15,987 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:22:16,144 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 18 proven. 14 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 08:22:16,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [979354091] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:22:16,144 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:22:16,144 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 7] total 20 [2024-12-02 08:22:16,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280572310] [2024-12-02 08:22:16,144 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:22:16,145 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2024-12-02 08:22:16,145 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:22:16,146 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2024-12-02 08:22:16,146 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2024-12-02 08:22:16,146 INFO L87 Difference]: Start difference. First operand 21755 states and 28242 transitions. Second operand has 20 states, 20 states have (on average 12.1) internal successors, (242), 20 states have internal predecessors, (242), 8 states have call successors, (41), 5 states have call predecessors, (41), 6 states have return successors, (40), 8 states have call predecessors, (40), 8 states have call successors, (40) [2024-12-02 08:22:22,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:22:22,053 INFO L93 Difference]: Finished difference Result 46220 states and 59961 transitions. [2024-12-02 08:22:22,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2024-12-02 08:22:22,053 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 12.1) internal successors, (242), 20 states have internal predecessors, (242), 8 states have call successors, (41), 5 states have call predecessors, (41), 6 states have return successors, (40), 8 states have call predecessors, (40), 8 states have call successors, (40) Word has length 168 [2024-12-02 08:22:22,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:22:22,113 INFO L225 Difference]: With dead ends: 46220 [2024-12-02 08:22:22,113 INFO L226 Difference]: Without dead ends: 24731 [2024-12-02 08:22:22,139 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 338 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 448 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=388, Invalid=1964, Unknown=0, NotChecked=0, Total=2352 [2024-12-02 08:22:22,139 INFO L435 NwaCegarLoop]: 539 mSDtfsCounter, 1198 mSDsluCounter, 4950 mSDsCounter, 0 mSdLazyCounter, 2647 mSolverCounterSat, 389 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1198 SdHoareTripleChecker+Valid, 5489 SdHoareTripleChecker+Invalid, 3036 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 389 IncrementalHoareTripleChecker+Valid, 2647 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:22:22,139 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1198 Valid, 5489 Invalid, 3036 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [389 Valid, 2647 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-02 08:22:22,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24731 states. [2024-12-02 08:22:25,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24731 to 21964. [2024-12-02 08:22:25,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21964 states, 16140 states have (on average 1.298636926889715) internal successors, (20960), 16304 states have internal predecessors, (20960), 3745 states have call successors, (3745), 2078 states have call predecessors, (3745), 2078 states have return successors, (3745), 3581 states have call predecessors, (3745), 3745 states have call successors, (3745) [2024-12-02 08:22:26,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21964 states to 21964 states and 28450 transitions. [2024-12-02 08:22:26,028 INFO L78 Accepts]: Start accepts. Automaton has 21964 states and 28450 transitions. Word has length 168 [2024-12-02 08:22:26,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:22:26,029 INFO L471 AbstractCegarLoop]: Abstraction has 21964 states and 28450 transitions. [2024-12-02 08:22:26,029 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 12.1) internal successors, (242), 20 states have internal predecessors, (242), 8 states have call successors, (41), 5 states have call predecessors, (41), 6 states have return successors, (40), 8 states have call predecessors, (40), 8 states have call successors, (40) [2024-12-02 08:22:26,029 INFO L276 IsEmpty]: Start isEmpty. Operand 21964 states and 28450 transitions. [2024-12-02 08:22:26,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-12-02 08:22:26,033 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:22:26,034 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:22:26,040 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-12-02 08:22:26,234 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2024-12-02 08:22:26,234 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:22:26,234 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:22:26,234 INFO L85 PathProgramCache]: Analyzing trace with hash 1445496451, now seen corresponding path program 1 times [2024-12-02 08:22:26,235 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:22:26,235 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386445998] [2024-12-02 08:22:26,235 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:26,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:22:26,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:26,627 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 23 proven. 6 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 08:22:26,627 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:22:26,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [386445998] [2024-12-02 08:22:26,627 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [386445998] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:22:26,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1529359463] [2024-12-02 08:22:26,627 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:26,627 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:22:26,627 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:22:26,629 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:22:26,629 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-12-02 08:22:26,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:26,841 INFO L256 TraceCheckSpWp]: Trace formula consists of 803 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-12-02 08:22:26,843 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:22:27,162 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 71 proven. 10 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-02 08:22:27,162 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:22:27,597 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 23 proven. 6 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 08:22:27,597 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1529359463] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:22:27,597 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:22:27,597 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 10] total 19 [2024-12-02 08:22:27,597 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [29717074] [2024-12-02 08:22:27,597 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:22:27,597 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-12-02 08:22:27,598 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:22:27,598 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-12-02 08:22:27,598 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2024-12-02 08:22:27,598 INFO L87 Difference]: Start difference. First operand 21964 states and 28450 transitions. Second operand has 19 states, 19 states have (on average 11.736842105263158) internal successors, (223), 18 states have internal predecessors, (223), 7 states have call successors, (32), 5 states have call predecessors, (32), 6 states have return successors, (32), 8 states have call predecessors, (32), 7 states have call successors, (32) [2024-12-02 08:22:32,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:22:32,546 INFO L93 Difference]: Finished difference Result 45018 states and 58363 transitions. [2024-12-02 08:22:32,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-12-02 08:22:32,547 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 11.736842105263158) internal successors, (223), 18 states have internal predecessors, (223), 7 states have call successors, (32), 5 states have call predecessors, (32), 6 states have return successors, (32), 8 states have call predecessors, (32), 7 states have call successors, (32) Word has length 168 [2024-12-02 08:22:32,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:22:32,599 INFO L225 Difference]: With dead ends: 45018 [2024-12-02 08:22:32,599 INFO L226 Difference]: Without dead ends: 23373 [2024-12-02 08:22:32,622 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 376 GetRequests, 336 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=334, Invalid=1306, Unknown=0, NotChecked=0, Total=1640 [2024-12-02 08:22:32,622 INFO L435 NwaCegarLoop]: 381 mSDtfsCounter, 1428 mSDsluCounter, 2427 mSDsCounter, 0 mSdLazyCounter, 1291 mSolverCounterSat, 338 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1428 SdHoareTripleChecker+Valid, 2808 SdHoareTripleChecker+Invalid, 1629 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 338 IncrementalHoareTripleChecker+Valid, 1291 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:22:32,622 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1428 Valid, 2808 Invalid, 1629 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [338 Valid, 1291 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 08:22:32,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23373 states. [2024-12-02 08:22:36,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23373 to 23255. [2024-12-02 08:22:36,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23255 states, 17072 states have (on average 1.2974461105904405) internal successors, (22150), 17246 states have internal predecessors, (22150), 3980 states have call successors, (3980), 2202 states have call predecessors, (3980), 2202 states have return successors, (3980), 3806 states have call predecessors, (3980), 3980 states have call successors, (3980) [2024-12-02 08:22:36,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23255 states to 23255 states and 30110 transitions. [2024-12-02 08:22:36,613 INFO L78 Accepts]: Start accepts. Automaton has 23255 states and 30110 transitions. Word has length 168 [2024-12-02 08:22:36,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:22:36,613 INFO L471 AbstractCegarLoop]: Abstraction has 23255 states and 30110 transitions. [2024-12-02 08:22:36,613 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 11.736842105263158) internal successors, (223), 18 states have internal predecessors, (223), 7 states have call successors, (32), 5 states have call predecessors, (32), 6 states have return successors, (32), 8 states have call predecessors, (32), 7 states have call successors, (32) [2024-12-02 08:22:36,613 INFO L276 IsEmpty]: Start isEmpty. Operand 23255 states and 30110 transitions. [2024-12-02 08:22:36,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2024-12-02 08:22:36,621 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:22:36,621 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:22:36,631 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-12-02 08:22:36,821 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:22:36,822 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:22:36,822 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:22:36,822 INFO L85 PathProgramCache]: Analyzing trace with hash -1796723261, now seen corresponding path program 1 times [2024-12-02 08:22:36,822 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:22:36,822 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [295119919] [2024-12-02 08:22:36,822 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:36,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:22:36,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:37,076 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-12-02 08:22:37,077 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:22:37,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [295119919] [2024-12-02 08:22:37,077 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [295119919] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:22:37,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1201360081] [2024-12-02 08:22:37,077 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:37,077 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:22:37,077 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:22:37,079 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:22:37,081 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-12-02 08:22:37,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:37,318 INFO L256 TraceCheckSpWp]: Trace formula consists of 788 conjuncts, 29 conjuncts are in the unsatisfiable core [2024-12-02 08:22:37,321 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:22:37,839 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 59 proven. 27 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-12-02 08:22:37,839 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:22:38,387 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 15 proven. 15 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-02 08:22:38,388 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1201360081] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:22:38,388 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:22:38,388 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 10] total 22 [2024-12-02 08:22:38,388 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1369769636] [2024-12-02 08:22:38,388 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:22:38,389 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-12-02 08:22:38,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:22:38,389 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-12-02 08:22:38,389 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2024-12-02 08:22:38,389 INFO L87 Difference]: Start difference. First operand 23255 states and 30110 transitions. Second operand has 22 states, 22 states have (on average 13.136363636363637) internal successors, (289), 21 states have internal predecessors, (289), 11 states have call successors, (40), 6 states have call predecessors, (40), 7 states have return successors, (39), 12 states have call predecessors, (39), 11 states have call successors, (39) [2024-12-02 08:22:44,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:22:44,554 INFO L93 Difference]: Finished difference Result 47292 states and 61283 transitions. [2024-12-02 08:22:44,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2024-12-02 08:22:44,554 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 13.136363636363637) internal successors, (289), 21 states have internal predecessors, (289), 11 states have call successors, (40), 6 states have call predecessors, (40), 7 states have return successors, (39), 12 states have call predecessors, (39), 11 states have call successors, (39) Word has length 169 [2024-12-02 08:22:44,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:22:44,614 INFO L225 Difference]: With dead ends: 47292 [2024-12-02 08:22:44,614 INFO L226 Difference]: Without dead ends: 24251 [2024-12-02 08:22:44,641 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 392 GetRequests, 334 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 780 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=770, Invalid=2770, Unknown=0, NotChecked=0, Total=3540 [2024-12-02 08:22:44,641 INFO L435 NwaCegarLoop]: 339 mSDtfsCounter, 1959 mSDsluCounter, 3198 mSDsCounter, 0 mSdLazyCounter, 1570 mSolverCounterSat, 684 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1959 SdHoareTripleChecker+Valid, 3537 SdHoareTripleChecker+Invalid, 2254 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 684 IncrementalHoareTripleChecker+Valid, 1570 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:22:44,641 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1959 Valid, 3537 Invalid, 2254 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [684 Valid, 1570 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-12-02 08:22:44,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24251 states. [2024-12-02 08:22:48,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24251 to 23741. [2024-12-02 08:22:48,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23741 states, 17486 states have (on average 1.297209195928171) internal successors, (22683), 17660 states have internal predecessors, (22683), 4016 states have call successors, (4016), 2238 states have call predecessors, (4016), 2238 states have return successors, (4016), 3842 states have call predecessors, (4016), 4016 states have call successors, (4016) [2024-12-02 08:22:48,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23741 states to 23741 states and 30715 transitions. [2024-12-02 08:22:48,834 INFO L78 Accepts]: Start accepts. Automaton has 23741 states and 30715 transitions. Word has length 169 [2024-12-02 08:22:48,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:22:48,835 INFO L471 AbstractCegarLoop]: Abstraction has 23741 states and 30715 transitions. [2024-12-02 08:22:48,835 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 13.136363636363637) internal successors, (289), 21 states have internal predecessors, (289), 11 states have call successors, (40), 6 states have call predecessors, (40), 7 states have return successors, (39), 12 states have call predecessors, (39), 11 states have call successors, (39) [2024-12-02 08:22:48,835 INFO L276 IsEmpty]: Start isEmpty. Operand 23741 states and 30715 transitions. [2024-12-02 08:22:48,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-12-02 08:22:48,840 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:22:48,840 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:22:48,847 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-12-02 08:22:49,040 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2024-12-02 08:22:49,041 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:22:49,041 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:22:49,041 INFO L85 PathProgramCache]: Analyzing trace with hash -1919787642, now seen corresponding path program 1 times [2024-12-02 08:22:49,041 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:22:49,041 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955638307] [2024-12-02 08:22:49,041 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:49,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:22:49,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:49,439 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 20 proven. 9 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 08:22:49,439 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:22:49,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955638307] [2024-12-02 08:22:49,439 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1955638307] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:22:49,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2060605557] [2024-12-02 08:22:49,439 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:22:49,439 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:22:49,439 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:22:49,441 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:22:49,442 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-12-02 08:22:49,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:22:49,674 INFO L256 TraceCheckSpWp]: Trace formula consists of 822 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-12-02 08:22:49,677 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:22:49,989 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 73 proven. 13 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-12-02 08:22:49,989 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:22:50,446 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 20 proven. 9 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 08:22:50,446 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2060605557] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:22:50,446 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:22:50,446 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 9] total 18 [2024-12-02 08:22:50,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [960169043] [2024-12-02 08:22:50,447 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:22:50,447 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2024-12-02 08:22:50,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:22:50,448 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-12-02 08:22:50,448 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2024-12-02 08:22:50,448 INFO L87 Difference]: Start difference. First operand 23741 states and 30715 transitions. Second operand has 18 states, 18 states have (on average 12.833333333333334) internal successors, (231), 18 states have internal predecessors, (231), 7 states have call successors, (34), 5 states have call predecessors, (34), 6 states have return successors, (33), 7 states have call predecessors, (33), 7 states have call successors, (33) [2024-12-02 08:22:56,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:22:56,920 INFO L93 Difference]: Finished difference Result 52763 states and 68405 transitions. [2024-12-02 08:22:56,920 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-12-02 08:22:56,920 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 12.833333333333334) internal successors, (231), 18 states have internal predecessors, (231), 7 states have call successors, (34), 5 states have call predecessors, (34), 6 states have return successors, (33), 7 states have call predecessors, (33), 7 states have call successors, (33) Word has length 177 [2024-12-02 08:22:56,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:22:56,994 INFO L225 Difference]: With dead ends: 52763 [2024-12-02 08:22:56,994 INFO L226 Difference]: Without dead ends: 29341 [2024-12-02 08:22:57,023 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 388 GetRequests, 352 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 316 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=269, Invalid=1063, Unknown=0, NotChecked=0, Total=1332 [2024-12-02 08:22:57,023 INFO L435 NwaCegarLoop]: 380 mSDtfsCounter, 1575 mSDsluCounter, 3209 mSDsCounter, 0 mSdLazyCounter, 2309 mSolverCounterSat, 476 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1575 SdHoareTripleChecker+Valid, 3589 SdHoareTripleChecker+Invalid, 2785 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 476 IncrementalHoareTripleChecker+Valid, 2309 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:22:57,023 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1575 Valid, 3589 Invalid, 2785 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [476 Valid, 2309 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-12-02 08:22:57,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29341 states. [2024-12-02 08:23:02,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29341 to 28906. [2024-12-02 08:23:02,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28906 states, 21282 states have (on average 1.2971995113241237) internal successors, (27607), 21496 states have internal predecessors, (27607), 4904 states have call successors, (4904), 2719 states have call predecessors, (4904), 2719 states have return successors, (4904), 4690 states have call predecessors, (4904), 4904 states have call successors, (4904) [2024-12-02 08:23:02,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28906 states to 28906 states and 37415 transitions. [2024-12-02 08:23:02,515 INFO L78 Accepts]: Start accepts. Automaton has 28906 states and 37415 transitions. Word has length 177 [2024-12-02 08:23:02,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:23:02,515 INFO L471 AbstractCegarLoop]: Abstraction has 28906 states and 37415 transitions. [2024-12-02 08:23:02,515 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 12.833333333333334) internal successors, (231), 18 states have internal predecessors, (231), 7 states have call successors, (34), 5 states have call predecessors, (34), 6 states have return successors, (33), 7 states have call predecessors, (33), 7 states have call successors, (33) [2024-12-02 08:23:02,515 INFO L276 IsEmpty]: Start isEmpty. Operand 28906 states and 37415 transitions. [2024-12-02 08:23:02,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-12-02 08:23:02,519 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:23:02,520 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:23:02,527 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-12-02 08:23:02,720 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:23:02,720 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:23:02,720 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:23:02,720 INFO L85 PathProgramCache]: Analyzing trace with hash 1300152867, now seen corresponding path program 1 times [2024-12-02 08:23:02,720 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:23:02,720 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1470741082] [2024-12-02 08:23:02,721 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:23:02,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:23:02,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:23:03,225 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-12-02 08:23:03,225 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:23:03,225 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1470741082] [2024-12-02 08:23:03,225 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1470741082] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:23:03,225 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [100145817] [2024-12-02 08:23:03,225 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:23:03,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:23:03,225 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:23:03,227 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:23:03,228 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-12-02 08:23:03,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:23:03,438 INFO L256 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-12-02 08:23:03,441 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:23:03,603 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 75 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 08:23:03,603 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:23:03,766 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 29 proven. 8 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-12-02 08:23:03,766 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [100145817] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:23:03,766 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:23:03,767 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 9] total 22 [2024-12-02 08:23:03,767 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [257928161] [2024-12-02 08:23:03,767 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:23:03,767 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-12-02 08:23:03,767 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:23:03,768 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-12-02 08:23:03,768 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2024-12-02 08:23:03,768 INFO L87 Difference]: Start difference. First operand 28906 states and 37415 transitions. Second operand has 22 states, 22 states have (on average 8.045454545454545) internal successors, (177), 17 states have internal predecessors, (177), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) [2024-12-02 08:23:13,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:23:13,581 INFO L93 Difference]: Finished difference Result 76431 states and 101178 transitions. [2024-12-02 08:23:13,581 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-12-02 08:23:13,582 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 8.045454545454545) internal successors, (177), 17 states have internal predecessors, (177), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) Word has length 177 [2024-12-02 08:23:13,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:23:13,709 INFO L225 Difference]: With dead ends: 76431 [2024-12-02 08:23:13,709 INFO L226 Difference]: Without dead ends: 47739 [2024-12-02 08:23:13,747 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 382 GetRequests, 347 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 233 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=210, Invalid=1122, Unknown=0, NotChecked=0, Total=1332 [2024-12-02 08:23:13,747 INFO L435 NwaCegarLoop]: 363 mSDtfsCounter, 900 mSDsluCounter, 3119 mSDsCounter, 0 mSdLazyCounter, 1243 mSolverCounterSat, 279 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 905 SdHoareTripleChecker+Valid, 3482 SdHoareTripleChecker+Invalid, 1522 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 279 IncrementalHoareTripleChecker+Valid, 1243 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:23:13,747 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [905 Valid, 3482 Invalid, 1522 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [279 Valid, 1243 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 08:23:13,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47739 states. [2024-12-02 08:23:20,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47739 to 35330. [2024-12-02 08:23:20,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35330 states, 25887 states have (on average 1.2942789817282807) internal successors, (33505), 26168 states have internal predecessors, (33505), 6072 states have call successors, (6072), 3370 states have call predecessors, (6072), 3370 states have return successors, (6072), 5791 states have call predecessors, (6072), 6072 states have call successors, (6072) [2024-12-02 08:23:21,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35330 states to 35330 states and 45649 transitions. [2024-12-02 08:23:21,070 INFO L78 Accepts]: Start accepts. Automaton has 35330 states and 45649 transitions. Word has length 177 [2024-12-02 08:23:21,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:23:21,070 INFO L471 AbstractCegarLoop]: Abstraction has 35330 states and 45649 transitions. [2024-12-02 08:23:21,070 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 8.045454545454545) internal successors, (177), 17 states have internal predecessors, (177), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) [2024-12-02 08:23:21,070 INFO L276 IsEmpty]: Start isEmpty. Operand 35330 states and 45649 transitions. [2024-12-02 08:23:21,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2024-12-02 08:23:21,075 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:23:21,075 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:23:21,081 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-12-02 08:23:21,275 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:23:21,275 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:23:21,276 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:23:21,276 INFO L85 PathProgramCache]: Analyzing trace with hash -1251424469, now seen corresponding path program 1 times [2024-12-02 08:23:21,276 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:23:21,276 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212003234] [2024-12-02 08:23:21,276 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:23:21,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:23:21,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:23:21,891 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-12-02 08:23:21,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:23:21,891 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212003234] [2024-12-02 08:23:21,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1212003234] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:23:21,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1096822681] [2024-12-02 08:23:21,892 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:23:21,892 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:23:21,892 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:23:21,893 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:23:21,894 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-12-02 08:23:22,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:23:22,148 INFO L256 TraceCheckSpWp]: Trace formula consists of 838 conjuncts, 29 conjuncts are in the unsatisfiable core [2024-12-02 08:23:22,151 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:23:22,323 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 76 proven. 4 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-12-02 08:23:22,323 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:23:22,518 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 26 proven. 6 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2024-12-02 08:23:22,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1096822681] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:23:22,518 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:23:22,518 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 8] total 23 [2024-12-02 08:23:22,518 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1072779846] [2024-12-02 08:23:22,518 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:23:22,519 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-12-02 08:23:22,519 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:23:22,519 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-12-02 08:23:22,519 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=422, Unknown=0, NotChecked=0, Total=506 [2024-12-02 08:23:22,520 INFO L87 Difference]: Start difference. First operand 35330 states and 45649 transitions. Second operand has 23 states, 23 states have (on average 11.391304347826088) internal successors, (262), 20 states have internal predecessors, (262), 7 states have call successors, (46), 4 states have call predecessors, (46), 8 states have return successors, (46), 10 states have call predecessors, (46), 7 states have call successors, (46) [2024-12-02 08:23:31,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:23:31,000 INFO L93 Difference]: Finished difference Result 63269 states and 80739 transitions. [2024-12-02 08:23:31,001 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-12-02 08:23:31,001 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 11.391304347826088) internal successors, (262), 20 states have internal predecessors, (262), 7 states have call successors, (46), 4 states have call predecessors, (46), 8 states have return successors, (46), 10 states have call predecessors, (46), 7 states have call successors, (46) Word has length 184 [2024-12-02 08:23:31,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:23:31,081 INFO L225 Difference]: With dead ends: 63269 [2024-12-02 08:23:31,081 INFO L226 Difference]: Without dead ends: 27626 [2024-12-02 08:23:31,119 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 415 GetRequests, 366 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 488 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=530, Invalid=2020, Unknown=0, NotChecked=0, Total=2550 [2024-12-02 08:23:31,119 INFO L435 NwaCegarLoop]: 493 mSDtfsCounter, 2173 mSDsluCounter, 4869 mSDsCounter, 0 mSdLazyCounter, 2272 mSolverCounterSat, 781 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2173 SdHoareTripleChecker+Valid, 5362 SdHoareTripleChecker+Invalid, 3053 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 781 IncrementalHoareTripleChecker+Valid, 2272 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:23:31,119 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2173 Valid, 5362 Invalid, 3053 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [781 Valid, 2272 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-02 08:23:31,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27626 states. [2024-12-02 08:23:35,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27626 to 20205. [2024-12-02 08:23:35,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20205 states, 14991 states have (on average 1.2739643786271764) internal successors, (19098), 15152 states have internal predecessors, (19098), 3281 states have call successors, (3281), 1932 states have call predecessors, (3281), 1932 states have return successors, (3281), 3120 states have call predecessors, (3281), 3281 states have call successors, (3281) [2024-12-02 08:23:35,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20205 states to 20205 states and 25660 transitions. [2024-12-02 08:23:35,309 INFO L78 Accepts]: Start accepts. Automaton has 20205 states and 25660 transitions. Word has length 184 [2024-12-02 08:23:35,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:23:35,310 INFO L471 AbstractCegarLoop]: Abstraction has 20205 states and 25660 transitions. [2024-12-02 08:23:35,310 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 11.391304347826088) internal successors, (262), 20 states have internal predecessors, (262), 7 states have call successors, (46), 4 states have call predecessors, (46), 8 states have return successors, (46), 10 states have call predecessors, (46), 7 states have call successors, (46) [2024-12-02 08:23:35,310 INFO L276 IsEmpty]: Start isEmpty. Operand 20205 states and 25660 transitions. [2024-12-02 08:23:35,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2024-12-02 08:23:35,313 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:23:35,313 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:23:35,320 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2024-12-02 08:23:35,513 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:23:35,513 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:23:35,514 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:23:35,514 INFO L85 PathProgramCache]: Analyzing trace with hash 760521996, now seen corresponding path program 1 times [2024-12-02 08:23:35,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:23:35,514 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1435021256] [2024-12-02 08:23:35,514 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:23:35,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:23:35,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:23:36,085 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 21 proven. 26 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-12-02 08:23:36,085 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:23:36,085 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1435021256] [2024-12-02 08:23:36,085 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1435021256] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:23:36,085 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1085109535] [2024-12-02 08:23:36,085 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:23:36,085 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:23:36,085 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:23:36,087 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:23:36,088 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-12-02 08:23:36,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:23:36,331 INFO L256 TraceCheckSpWp]: Trace formula consists of 844 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-12-02 08:23:36,334 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:23:36,565 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 62 proven. 60 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-02 08:23:36,565 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:23:36,808 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 21 proven. 26 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-12-02 08:23:36,808 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1085109535] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:23:36,808 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:23:36,808 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 8] total 23 [2024-12-02 08:23:36,808 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [655623681] [2024-12-02 08:23:36,808 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:23:36,809 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-12-02 08:23:36,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:23:36,810 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-12-02 08:23:36,810 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=421, Unknown=0, NotChecked=0, Total=506 [2024-12-02 08:23:36,810 INFO L87 Difference]: Start difference. First operand 20205 states and 25660 transitions. Second operand has 23 states, 23 states have (on average 12.26086956521739) internal successors, (282), 20 states have internal predecessors, (282), 8 states have call successors, (45), 4 states have call predecessors, (45), 8 states have return successors, (44), 11 states have call predecessors, (44), 8 states have call successors, (44) [2024-12-02 08:23:42,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:23:42,730 INFO L93 Difference]: Finished difference Result 41275 states and 52343 transitions. [2024-12-02 08:23:42,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-12-02 08:23:42,730 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 12.26086956521739) internal successors, (282), 20 states have internal predecessors, (282), 8 states have call successors, (45), 4 states have call predecessors, (45), 8 states have return successors, (44), 11 states have call predecessors, (44), 8 states have call successors, (44) Word has length 193 [2024-12-02 08:23:42,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:23:42,800 INFO L225 Difference]: With dead ends: 41275 [2024-12-02 08:23:42,800 INFO L226 Difference]: Without dead ends: 21359 [2024-12-02 08:23:42,826 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 421 GetRequests, 379 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 354 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=361, Invalid=1531, Unknown=0, NotChecked=0, Total=1892 [2024-12-02 08:23:42,827 INFO L435 NwaCegarLoop]: 588 mSDtfsCounter, 1234 mSDsluCounter, 4136 mSDsCounter, 0 mSdLazyCounter, 1077 mSolverCounterSat, 351 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1239 SdHoareTripleChecker+Valid, 4724 SdHoareTripleChecker+Invalid, 1428 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 351 IncrementalHoareTripleChecker+Valid, 1077 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:23:42,827 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1239 Valid, 4724 Invalid, 1428 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [351 Valid, 1077 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 08:23:42,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21359 states. [2024-12-02 08:23:47,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21359 to 20205. [2024-12-02 08:23:47,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20205 states, 14991 states have (on average 1.270095390567674) internal successors, (19040), 15152 states have internal predecessors, (19040), 3281 states have call successors, (3281), 1932 states have call predecessors, (3281), 1932 states have return successors, (3281), 3120 states have call predecessors, (3281), 3281 states have call successors, (3281) [2024-12-02 08:23:47,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20205 states to 20205 states and 25602 transitions. [2024-12-02 08:23:47,270 INFO L78 Accepts]: Start accepts. Automaton has 20205 states and 25602 transitions. Word has length 193 [2024-12-02 08:23:47,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:23:47,270 INFO L471 AbstractCegarLoop]: Abstraction has 20205 states and 25602 transitions. [2024-12-02 08:23:47,270 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 12.26086956521739) internal successors, (282), 20 states have internal predecessors, (282), 8 states have call successors, (45), 4 states have call predecessors, (45), 8 states have return successors, (44), 11 states have call predecessors, (44), 8 states have call successors, (44) [2024-12-02 08:23:47,270 INFO L276 IsEmpty]: Start isEmpty. Operand 20205 states and 25602 transitions. [2024-12-02 08:23:47,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2024-12-02 08:23:47,273 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:23:47,273 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:23:47,280 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2024-12-02 08:23:47,474 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:23:47,474 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:23:47,474 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:23:47,474 INFO L85 PathProgramCache]: Analyzing trace with hash 173138699, now seen corresponding path program 1 times [2024-12-02 08:23:47,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:23:47,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1539516718] [2024-12-02 08:23:47,474 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:23:47,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:23:47,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:23:47,913 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 08:23:47,914 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:23:47,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1539516718] [2024-12-02 08:23:47,914 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1539516718] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:23:47,914 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:23:47,914 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:23:47,914 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531621563] [2024-12-02 08:23:47,914 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:23:47,914 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:23:47,914 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:23:47,915 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:23:47,915 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:23:47,915 INFO L87 Difference]: Start difference. First operand 20205 states and 25602 transitions. Second operand has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 6 states have internal predecessors, (115), 3 states have call successors, (19), 2 states have call predecessors, (19), 2 states have return successors, (18), 3 states have call predecessors, (18), 2 states have call successors, (18) [2024-12-02 08:23:52,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:23:52,788 INFO L93 Difference]: Finished difference Result 40455 states and 51242 transitions. [2024-12-02 08:23:52,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:23:52,788 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 6 states have internal predecessors, (115), 3 states have call successors, (19), 2 states have call predecessors, (19), 2 states have return successors, (18), 3 states have call predecessors, (18), 2 states have call successors, (18) Word has length 193 [2024-12-02 08:23:52,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:23:52,869 INFO L225 Difference]: With dead ends: 40455 [2024-12-02 08:23:52,869 INFO L226 Difference]: Without dead ends: 20539 [2024-12-02 08:23:52,897 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:23:52,898 INFO L435 NwaCegarLoop]: 410 mSDtfsCounter, 446 mSDsluCounter, 1314 mSDsCounter, 0 mSdLazyCounter, 219 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 452 SdHoareTripleChecker+Valid, 1724 SdHoareTripleChecker+Invalid, 234 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 219 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:23:52,899 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [452 Valid, 1724 Invalid, 234 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 219 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:23:52,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20539 states. [2024-12-02 08:23:57,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20539 to 20193. [2024-12-02 08:23:57,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20193 states, 14979 states have (on average 1.2687095266706723) internal successors, (19004), 15140 states have internal predecessors, (19004), 3281 states have call successors, (3281), 1932 states have call predecessors, (3281), 1932 states have return successors, (3281), 3120 states have call predecessors, (3281), 3281 states have call successors, (3281) [2024-12-02 08:23:57,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20193 states to 20193 states and 25566 transitions. [2024-12-02 08:23:57,391 INFO L78 Accepts]: Start accepts. Automaton has 20193 states and 25566 transitions. Word has length 193 [2024-12-02 08:23:57,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:23:57,391 INFO L471 AbstractCegarLoop]: Abstraction has 20193 states and 25566 transitions. [2024-12-02 08:23:57,391 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 6 states have internal predecessors, (115), 3 states have call successors, (19), 2 states have call predecessors, (19), 2 states have return successors, (18), 3 states have call predecessors, (18), 2 states have call successors, (18) [2024-12-02 08:23:57,391 INFO L276 IsEmpty]: Start isEmpty. Operand 20193 states and 25566 transitions. [2024-12-02 08:23:57,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2024-12-02 08:23:57,396 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:23:57,396 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:23:57,396 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-12-02 08:23:57,396 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:23:57,396 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:23:57,396 INFO L85 PathProgramCache]: Analyzing trace with hash -673539533, now seen corresponding path program 1 times [2024-12-02 08:23:57,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:23:57,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784323980] [2024-12-02 08:23:57,397 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:23:57,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:23:57,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:23:57,490 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 08:23:57,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:23:57,612 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 08:23:57,612 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 08:23:57,613 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 08:23:57,614 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-02 08:23:57,616 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:23:57,732 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 08:23:57,734 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 08:23:57 BoogieIcfgContainer [2024-12-02 08:23:57,734 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 08:23:57,735 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 08:23:57,735 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 08:23:57,735 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 08:23:57,736 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:21:07" (3/4) ... [2024-12-02 08:23:57,737 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-12-02 08:23:57,875 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 152. [2024-12-02 08:23:57,969 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/witness.graphml [2024-12-02 08:23:57,970 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/witness.yml [2024-12-02 08:23:57,970 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 08:23:57,970 INFO L158 Benchmark]: Toolchain (without parser) took 171127.07ms. Allocated memory was 142.6MB in the beginning and 5.1GB in the end (delta: 5.0GB). Free memory was 118.1MB in the beginning and 3.8GB in the end (delta: -3.7GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. [2024-12-02 08:23:57,971 INFO L158 Benchmark]: CDTParser took 0.23ms. Allocated memory is still 142.6MB. Free memory is still 82.1MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:23:57,971 INFO L158 Benchmark]: CACSL2BoogieTranslator took 315.01ms. Allocated memory is still 142.6MB. Free memory was 117.9MB in the beginning and 99.7MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-12-02 08:23:57,971 INFO L158 Benchmark]: Boogie Procedure Inliner took 44.39ms. Allocated memory is still 142.6MB. Free memory was 99.7MB in the beginning and 96.5MB in the end (delta: 3.3MB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:23:57,971 INFO L158 Benchmark]: Boogie Preprocessor took 53.24ms. Allocated memory is still 142.6MB. Free memory was 96.5MB in the beginning and 92.4MB in the end (delta: 4.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 08:23:57,971 INFO L158 Benchmark]: RCFGBuilder took 656.92ms. Allocated memory is still 142.6MB. Free memory was 92.4MB in the beginning and 104.4MB in the end (delta: -12.0MB). Peak memory consumption was 39.6MB. Max. memory is 16.1GB. [2024-12-02 08:23:57,971 INFO L158 Benchmark]: TraceAbstraction took 169816.49ms. Allocated memory was 142.6MB in the beginning and 5.1GB in the end (delta: 5.0GB). Free memory was 103.8MB in the beginning and 3.8GB in the end (delta: -3.7GB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2024-12-02 08:23:57,971 INFO L158 Benchmark]: Witness Printer took 234.75ms. Allocated memory is still 5.1GB. Free memory was 3.8GB in the beginning and 3.8GB in the end (delta: 46.1MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. [2024-12-02 08:23:57,972 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23ms. Allocated memory is still 142.6MB. Free memory is still 82.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 315.01ms. Allocated memory is still 142.6MB. Free memory was 117.9MB in the beginning and 99.7MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 44.39ms. Allocated memory is still 142.6MB. Free memory was 99.7MB in the beginning and 96.5MB in the end (delta: 3.3MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 53.24ms. Allocated memory is still 142.6MB. Free memory was 96.5MB in the beginning and 92.4MB in the end (delta: 4.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 656.92ms. Allocated memory is still 142.6MB. Free memory was 92.4MB in the beginning and 104.4MB in the end (delta: -12.0MB). Peak memory consumption was 39.6MB. Max. memory is 16.1GB. * TraceAbstraction took 169816.49ms. Allocated memory was 142.6MB in the beginning and 5.1GB in the end (delta: 5.0GB). Free memory was 103.8MB in the beginning and 3.8GB in the end (delta: -3.7GB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. * Witness Printer took 234.75ms. Allocated memory is still 5.1GB. Free memory was 3.8GB in the beginning and 3.8GB in the end (delta: 46.1MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 618]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L563] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L563] RET, EXPR init() [L563] i2 = init() [L564] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L564] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] RET Console_task_each_pals_period() [L585] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND TRUE \read(side1Failed) [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L585] RET Side1_activestandby_task_each_pals_period() [L586] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L586] RET Side2_activestandby_task_each_pals_period() [L587] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L417] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L417] RET write_active_side_history(active_side) [L587] RET Pendulum_prism_task_each_pals_period() [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L604] CALL, EXPR check() [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L455] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L455] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L456] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L456] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L458] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L458] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L460] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L460] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L486] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L486] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L502] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L502] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L502] tmp___11 = read_side1_failed_history((unsigned char)1) [L503] COND TRUE ! tmp___11 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L504] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L504] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L504] tmp___12 = read_side2_failed_history((unsigned char)1) [L505] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L518] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND FALSE !((int )index == 0) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=2, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L151] COND FALSE !((int )index == 1) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=2, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [\old(index)=2, \result=-2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L518] RET, EXPR read_active_side_history((unsigned char)2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L518] tmp___20 = read_active_side_history((unsigned char)2) [L519] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L537] return (1); VAL [\result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L604] RET, EXPR check() [L604] c1 = check() [L605] CALL assert(c1) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L616] COND FALSE !(! arg) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L605] RET assert(c1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, i2=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] RET Console_task_each_pals_period() [L585] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND TRUE \read(side1Failed) [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L585] RET Side1_activestandby_task_each_pals_period() [L586] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L350] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L351] COND TRUE (int )side2 != (int )nomsg [L352] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L586] RET Side2_activestandby_task_each_pals_period() [L587] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] COND TRUE (int )side2 == 0 [L410] active_side = (int8_t )2 VAL [active_side=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L417] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L417] RET write_active_side_history(active_side) [L587] RET Pendulum_prism_task_each_pals_period() [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L604] CALL, EXPR check() [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L455] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L455] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L456] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=127, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L456] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L486] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L486] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND TRUE \read(tmp___7) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L488] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L488] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L488] tmp___8 = read_side2_failed_history((unsigned char)1) [L489] COND TRUE ! tmp___8 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L490] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=2, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L490] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L490] tmp___5 = read_active_side_history((unsigned char)0) [L491] COND FALSE !(! ((int )tmp___5 == 2)) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] CALL, EXPR read_side2_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L494] RET, EXPR read_side2_failed_history((unsigned char)0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] tmp___6 = read_side2_failed_history((unsigned char)0) [L495] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] COND TRUE ! ((int )side2_written == 1) [L497] return (0); VAL [\result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L604] RET, EXPR check() [L604] c1 = check() [L605] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L616] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L618] reach_error() VAL [\old(arg)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 180 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 169.6s, OverallIterations: 44, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.2s, AutomataDifference: 85.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 26900 SdHoareTripleChecker+Valid, 17.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 26818 mSDsluCounter, 85123 SdHoareTripleChecker+Invalid, 14.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 70587 mSDsCounter, 7371 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 24442 IncrementalHoareTripleChecker+Invalid, 31813 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 7371 mSolverCounterUnsat, 14536 mSDtfsCounter, 24442 mSolverCounterSat, 0.3s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5599 GetRequests, 4797 SyntacticMatches, 3 SemanticMatches, 799 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9153 ImplicationChecksByTransitivity, 12.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=35330occurred in iteration=40, InterpolantAutomatonStates: 602, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 52.1s AutomataMinimizationTime, 43 MinimizatonAttempts, 45283 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.7s SsaConstructionTime, 2.4s SatisfiabilityAnalysisTime, 23.5s InterpolantComputationTime, 7415 NumberOfCodeBlocks, 7415 NumberOfCodeBlocksAsserted, 59 NumberOfCheckSat, 9486 ConstructedInterpolants, 0 QuantifiedInterpolants, 32657 SizeOfPredicates, 56 NumberOfNonLiveVariables, 11541 ConjunctsInSsa, 453 ConjunctsInUnsatCore, 72 InterpolantComputations, 30 PerfectInterpolantSequences, 3968/4518 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-12-02 08:23:57,996 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d1fa847-af67-4e1f-bdbc-6ab3942b438b/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE