./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/eca-rers2012/Problem01_label33.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/config/KojakReach.xml -i ../../sv-benchmarks/c/eca-rers2012/Problem01_label33.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/config/svcomp-Reach-32bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a90366a5085659577cb1c98c7b11041979a96aff31e8f044fed2c2fa31b4a389 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-24 18:14:43,826 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-24 18:14:43,923 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/config/svcomp-Reach-32bit-Kojak_Default.epf [2024-11-24 18:14:43,929 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-24 18:14:43,929 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.Interpolating solver [2024-11-24 18:14:43,963 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-24 18:14:43,964 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-24 18:14:43,964 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ALWAYS [2024-11-24 18:14:43,965 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-24 18:14:43,965 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-24 18:14:43,965 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-24 18:14:43,965 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-24 18:14:43,965 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-24 18:14:43,965 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-24 18:14:43,965 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-24 18:14:43,965 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-24 18:14:43,965 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-24 18:14:43,966 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-24 18:14:43,966 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-24 18:14:43,966 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-24 18:14:43,966 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-24 18:14:43,966 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-24 18:14:43,966 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-24 18:14:43,966 INFO L151 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2024-11-24 18:14:43,966 INFO L153 SettingsManager]: * Timeout in seconds=1000000 [2024-11-24 18:14:43,966 INFO L153 SettingsManager]: * Theory for external solver=ALL [2024-11-24 18:14:43,966 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-24 18:14:43,967 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-11-24 18:14:43,967 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-24 18:14:43,967 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-24 18:14:43,967 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-24 18:14:43,967 INFO L153 SettingsManager]: * Trace refinement strategy=PENGUIN [2024-11-24 18:14:43,967 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-24 18:14:43,967 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a90366a5085659577cb1c98c7b11041979a96aff31e8f044fed2c2fa31b4a389 [2024-11-24 18:14:44,239 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-24 18:14:44,254 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-24 18:14:44,258 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-24 18:14:44,260 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-24 18:14:44,262 INFO L274 PluginConnector]: CDTParser initialized [2024-11-24 18:14:44,263 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/../../sv-benchmarks/c/eca-rers2012/Problem01_label33.c [2024-11-24 18:14:47,309 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/data/0256dfdbe/5de61b6e0db14966b3fd94d95b0f27ac/FLAG9f9e1e848 [2024-11-24 18:14:47,781 INFO L384 CDTParser]: Found 1 translation units. [2024-11-24 18:14:47,787 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/sv-benchmarks/c/eca-rers2012/Problem01_label33.c [2024-11-24 18:14:47,803 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/data/0256dfdbe/5de61b6e0db14966b3fd94d95b0f27ac/FLAG9f9e1e848 [2024-11-24 18:14:47,818 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/data/0256dfdbe/5de61b6e0db14966b3fd94d95b0f27ac [2024-11-24 18:14:47,820 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-24 18:14:47,822 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-24 18:14:47,823 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-24 18:14:47,823 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-24 18:14:47,827 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-24 18:14:47,828 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 06:14:47" (1/1) ... [2024-11-24 18:14:47,829 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3cfe6567 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:47, skipping insertion in model container [2024-11-24 18:14:47,829 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 06:14:47" (1/1) ... [2024-11-24 18:14:47,859 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-24 18:14:48,214 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/sv-benchmarks/c/eca-rers2012/Problem01_label33.c[15127,15140] [2024-11-24 18:14:48,249 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 18:14:48,266 INFO L200 MainTranslator]: Completed pre-run [2024-11-24 18:14:48,372 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/sv-benchmarks/c/eca-rers2012/Problem01_label33.c[15127,15140] [2024-11-24 18:14:48,405 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 18:14:48,428 INFO L204 MainTranslator]: Completed translation [2024-11-24 18:14:48,429 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48 WrapperNode [2024-11-24 18:14:48,429 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-24 18:14:48,430 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-24 18:14:48,430 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-24 18:14:48,431 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-24 18:14:48,444 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,467 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,542 INFO L138 Inliner]: procedures = 14, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 657 [2024-11-24 18:14:48,543 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-24 18:14:48,549 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-24 18:14:48,549 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-24 18:14:48,550 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-24 18:14:48,556 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,556 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,560 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,560 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,599 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,600 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,614 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,621 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,628 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,640 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-24 18:14:48,641 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-24 18:14:48,641 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-24 18:14:48,641 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-24 18:14:48,642 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 06:14:48" (1/1) ... [2024-11-24 18:14:48,649 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-11-24 18:14:48,663 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/z3 [2024-11-24 18:14:48,678 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) [2024-11-24 18:14:48,681 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Waiting until timeout for monitored process [2024-11-24 18:14:48,711 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-24 18:14:48,711 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-11-24 18:14:48,711 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-24 18:14:48,711 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-24 18:14:48,794 INFO L234 CfgBuilder]: Building ICFG [2024-11-24 18:14:48,796 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-24 18:14:50,162 INFO L? ?]: Removed 75 outVars from TransFormulas that were not future-live. [2024-11-24 18:14:50,164 INFO L283 CfgBuilder]: Performing block encoding [2024-11-24 18:14:50,472 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-24 18:14:50,474 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-11-24 18:14:50,474 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 06:14:50 BoogieIcfgContainer [2024-11-24 18:14:50,474 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-24 18:14:50,475 INFO L112 PluginConnector]: ------------------------CodeCheck---------------------------- [2024-11-24 18:14:50,475 INFO L270 PluginConnector]: Initializing CodeCheck... [2024-11-24 18:14:50,487 INFO L274 PluginConnector]: CodeCheck initialized [2024-11-24 18:14:50,487 INFO L184 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 06:14:50" (1/1) ... [2024-11-24 18:14:50,496 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 18:14:50,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:50,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 76 states and 144 transitions. [2024-11-24 18:14:50,565 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 144 transitions. [2024-11-24 18:14:50,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2024-11-24 18:14:50,569 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:50,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:50,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:51,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:51,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:51,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 145 states and 237 transitions. [2024-11-24 18:14:51,850 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 237 transitions. [2024-11-24 18:14:51,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2024-11-24 18:14:51,854 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:51,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:51,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:52,166 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-11-24 18:14:52,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:52,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 146 states and 238 transitions. [2024-11-24 18:14:52,422 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 238 transitions. [2024-11-24 18:14:52,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2024-11-24 18:14:52,427 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:52,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:52,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:52,633 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:52,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:52,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 150 states and 244 transitions. [2024-11-24 18:14:52,747 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 244 transitions. [2024-11-24 18:14:52,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2024-11-24 18:14:52,751 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:52,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:52,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:52,910 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-11-24 18:14:53,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:53,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 245 states to 151 states and 245 transitions. [2024-11-24 18:14:53,103 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 245 transitions. [2024-11-24 18:14:53,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2024-11-24 18:14:53,105 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:53,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:53,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:53,328 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:53,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:53,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 159 states and 258 transitions. [2024-11-24 18:14:53,550 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 258 transitions. [2024-11-24 18:14:53,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2024-11-24 18:14:53,551 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:53,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:53,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:53,714 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:53,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:53,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 160 states and 259 transitions. [2024-11-24 18:14:53,882 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 259 transitions. [2024-11-24 18:14:53,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2024-11-24 18:14:53,889 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:53,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:53,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:54,114 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:54,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:54,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 168 states and 268 transitions. [2024-11-24 18:14:54,289 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 268 transitions. [2024-11-24 18:14:54,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2024-11-24 18:14:54,291 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:54,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:54,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:54,514 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:54,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:54,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 182 states and 286 transitions. [2024-11-24 18:14:54,893 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 286 transitions. [2024-11-24 18:14:54,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2024-11-24 18:14:54,895 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:54,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:54,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:55,044 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:55,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:55,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 306 states to 197 states and 306 transitions. [2024-11-24 18:14:55,598 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 306 transitions. [2024-11-24 18:14:55,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2024-11-24 18:14:55,600 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:55,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:55,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:55,866 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:56,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:56,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 212 states and 327 transitions. [2024-11-24 18:14:56,627 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 327 transitions. [2024-11-24 18:14:56,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2024-11-24 18:14:56,628 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:56,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:56,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:56,802 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:57,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:57,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 230 states and 356 transitions. [2024-11-24 18:14:57,639 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 356 transitions. [2024-11-24 18:14:57,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2024-11-24 18:14:57,640 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:57,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:57,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:57,825 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:58,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:58,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 359 states to 232 states and 359 transitions. [2024-11-24 18:14:58,082 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 359 transitions. [2024-11-24 18:14:58,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2024-11-24 18:14:58,083 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:58,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:58,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:58,171 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:58,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:58,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 237 states and 365 transitions. [2024-11-24 18:14:58,314 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 365 transitions. [2024-11-24 18:14:58,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2024-11-24 18:14:58,319 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:58,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:58,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:58,463 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:14:58,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:58,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 238 states and 366 transitions. [2024-11-24 18:14:58,663 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 366 transitions. [2024-11-24 18:14:58,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-11-24 18:14:58,666 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:58,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:58,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:58,792 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:14:59,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:14:59,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 257 states and 395 transitions. [2024-11-24 18:14:59,781 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 395 transitions. [2024-11-24 18:14:59,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-11-24 18:14:59,783 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:14:59,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:14:59,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:14:59,848 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:00,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:00,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 258 states and 396 transitions. [2024-11-24 18:15:00,036 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 396 transitions. [2024-11-24 18:15:00,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-11-24 18:15:00,037 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:00,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:00,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:00,156 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:00,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:00,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 415 states to 273 states and 415 transitions. [2024-11-24 18:15:00,719 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 415 transitions. [2024-11-24 18:15:00,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2024-11-24 18:15:00,720 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:00,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:00,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:00,794 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-11-24 18:15:01,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:01,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 291 states and 435 transitions. [2024-11-24 18:15:01,565 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 435 transitions. [2024-11-24 18:15:01,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2024-11-24 18:15:01,566 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:01,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:01,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:01,645 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:01,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:01,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 295 states and 439 transitions. [2024-11-24 18:15:01,701 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 439 transitions. [2024-11-24 18:15:01,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2024-11-24 18:15:01,702 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:01,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:01,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:01,844 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:15:02,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:02,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 299 states and 444 transitions. [2024-11-24 18:15:02,273 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 444 transitions. [2024-11-24 18:15:02,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-11-24 18:15:02,275 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:02,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:02,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:02,368 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:15:02,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:02,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 459 states to 307 states and 459 transitions. [2024-11-24 18:15:02,892 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 459 transitions. [2024-11-24 18:15:02,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-11-24 18:15:02,893 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:02,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:02,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:02,960 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:15:03,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:03,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 313 states and 467 transitions. [2024-11-24 18:15:03,439 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 467 transitions. [2024-11-24 18:15:03,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-11-24 18:15:03,440 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:03,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:03,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:03,508 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:15:03,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:03,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 471 states to 316 states and 471 transitions. [2024-11-24 18:15:03,771 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 471 transitions. [2024-11-24 18:15:03,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-11-24 18:15:03,772 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:03,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:03,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:03,850 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:04,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:04,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 491 states to 331 states and 491 transitions. [2024-11-24 18:15:04,413 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 491 transitions. [2024-11-24 18:15:04,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2024-11-24 18:15:04,415 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:04,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:04,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:04,538 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:04,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:04,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 508 states to 345 states and 508 transitions. [2024-11-24 18:15:04,859 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 508 transitions. [2024-11-24 18:15:04,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2024-11-24 18:15:04,860 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:04,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:04,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:05,045 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:05,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:05,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 510 states to 347 states and 510 transitions. [2024-11-24 18:15:05,337 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 510 transitions. [2024-11-24 18:15:05,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-11-24 18:15:05,340 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:05,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:05,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:05,403 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-11-24 18:15:05,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:05,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 516 states to 353 states and 516 transitions. [2024-11-24 18:15:05,756 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 516 transitions. [2024-11-24 18:15:05,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-11-24 18:15:05,757 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:05,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:05,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:05,821 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:15:05,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:05,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 357 states and 519 transitions. [2024-11-24 18:15:05,874 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 519 transitions. [2024-11-24 18:15:05,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-11-24 18:15:05,876 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:05,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:05,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:06,005 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:06,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:06,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 522 states to 359 states and 522 transitions. [2024-11-24 18:15:06,057 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 522 transitions. [2024-11-24 18:15:06,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2024-11-24 18:15:06,059 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:06,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:06,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:06,231 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:06,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:06,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 373 states and 540 transitions. [2024-11-24 18:15:06,795 INFO L276 IsEmpty]: Start isEmpty. Operand 373 states and 540 transitions. [2024-11-24 18:15:06,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2024-11-24 18:15:06,796 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:06,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:06,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:06,927 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:07,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:07,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 377 states and 545 transitions. [2024-11-24 18:15:07,216 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 545 transitions. [2024-11-24 18:15:07,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2024-11-24 18:15:07,217 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:07,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:07,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:07,357 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-11-24 18:15:07,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:07,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 548 states to 379 states and 548 transitions. [2024-11-24 18:15:07,544 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 548 transitions. [2024-11-24 18:15:07,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2024-11-24 18:15:07,546 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:07,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:07,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:07,781 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 35 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:08,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:08,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 386 states and 555 transitions. [2024-11-24 18:15:08,217 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 555 transitions. [2024-11-24 18:15:08,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2024-11-24 18:15:08,219 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:08,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:08,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:08,382 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:15:08,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:08,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 564 states to 395 states and 564 transitions. [2024-11-24 18:15:08,782 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 564 transitions. [2024-11-24 18:15:08,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2024-11-24 18:15:08,784 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:08,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:08,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:08,920 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:15:09,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:09,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 567 states to 399 states and 567 transitions. [2024-11-24 18:15:09,176 INFO L276 IsEmpty]: Start isEmpty. Operand 399 states and 567 transitions. [2024-11-24 18:15:09,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2024-11-24 18:15:09,177 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:09,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:09,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:09,311 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:15:09,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:09,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 569 states to 402 states and 569 transitions. [2024-11-24 18:15:09,568 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 569 transitions. [2024-11-24 18:15:09,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2024-11-24 18:15:09,569 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:09,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:09,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:09,692 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:10,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:10,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 472 states and 647 transitions. [2024-11-24 18:15:10,347 INFO L276 IsEmpty]: Start isEmpty. Operand 472 states and 647 transitions. [2024-11-24 18:15:10,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2024-11-24 18:15:10,348 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:10,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:10,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:10,421 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:10,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:10,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 664 states to 486 states and 664 transitions. [2024-11-24 18:15:10,537 INFO L276 IsEmpty]: Start isEmpty. Operand 486 states and 664 transitions. [2024-11-24 18:15:10,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2024-11-24 18:15:10,538 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:10,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:10,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:10,603 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:10,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:10,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 678 states to 497 states and 678 transitions. [2024-11-24 18:15:10,785 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 678 transitions. [2024-11-24 18:15:10,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2024-11-24 18:15:10,786 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:10,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:10,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:10,892 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 42 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:10,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:10,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 686 states to 504 states and 686 transitions. [2024-11-24 18:15:10,992 INFO L276 IsEmpty]: Start isEmpty. Operand 504 states and 686 transitions. [2024-11-24 18:15:10,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-11-24 18:15:10,994 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:10,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:11,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:11,058 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-11-24 18:15:11,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:11,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 688 states to 506 states and 688 transitions. [2024-11-24 18:15:11,102 INFO L276 IsEmpty]: Start isEmpty. Operand 506 states and 688 transitions. [2024-11-24 18:15:11,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-11-24 18:15:11,103 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:11,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:11,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:11,167 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-11-24 18:15:11,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:11,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 695 states to 513 states and 695 transitions. [2024-11-24 18:15:11,390 INFO L276 IsEmpty]: Start isEmpty. Operand 513 states and 695 transitions. [2024-11-24 18:15:11,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 18:15:11,391 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:11,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:11,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:11,473 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:12,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:12,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 739 states to 551 states and 739 transitions. [2024-11-24 18:15:12,362 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 739 transitions. [2024-11-24 18:15:12,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 18:15:12,364 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:12,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:12,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:12,480 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:12,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:12,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 554 states and 741 transitions. [2024-11-24 18:15:12,761 INFO L276 IsEmpty]: Start isEmpty. Operand 554 states and 741 transitions. [2024-11-24 18:15:12,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 18:15:12,762 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:12,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:12,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:12,842 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:13,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:13,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 743 states to 557 states and 743 transitions. [2024-11-24 18:15:13,133 INFO L276 IsEmpty]: Start isEmpty. Operand 557 states and 743 transitions. [2024-11-24 18:15:13,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 18:15:13,135 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:13,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:13,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:13,205 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:13,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:13,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 758 states to 571 states and 758 transitions. [2024-11-24 18:15:13,323 INFO L276 IsEmpty]: Start isEmpty. Operand 571 states and 758 transitions. [2024-11-24 18:15:13,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-24 18:15:13,324 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:13,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:13,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:13,394 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 18:15:13,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:13,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 766 states to 580 states and 766 transitions. [2024-11-24 18:15:13,474 INFO L276 IsEmpty]: Start isEmpty. Operand 580 states and 766 transitions. [2024-11-24 18:15:13,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2024-11-24 18:15:13,476 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:13,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:13,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:13,640 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:13,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:13,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 775 states to 588 states and 775 transitions. [2024-11-24 18:15:13,906 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 775 transitions. [2024-11-24 18:15:13,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-11-24 18:15:13,907 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:13,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:13,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:14,027 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-11-24 18:15:15,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:15,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 880 states to 685 states and 880 transitions. [2024-11-24 18:15:15,344 INFO L276 IsEmpty]: Start isEmpty. Operand 685 states and 880 transitions. [2024-11-24 18:15:15,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-11-24 18:15:15,345 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:15,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:15,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:15,439 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-11-24 18:15:15,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:15,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 905 states to 710 states and 905 transitions. [2024-11-24 18:15:15,927 INFO L276 IsEmpty]: Start isEmpty. Operand 710 states and 905 transitions. [2024-11-24 18:15:15,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2024-11-24 18:15:15,928 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:15,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:15,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:16,227 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 73 proven. 10 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-24 18:15:16,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:16,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 938 states to 739 states and 938 transitions. [2024-11-24 18:15:16,900 INFO L276 IsEmpty]: Start isEmpty. Operand 739 states and 938 transitions. [2024-11-24 18:15:16,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2024-11-24 18:15:16,901 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:16,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:16,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:16,962 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 79 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-11-24 18:15:17,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:17,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 955 states to 753 states and 955 transitions. [2024-11-24 18:15:17,372 INFO L276 IsEmpty]: Start isEmpty. Operand 753 states and 955 transitions. [2024-11-24 18:15:17,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2024-11-24 18:15:17,373 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:17,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:17,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:17,579 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 66 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:17,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:17,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 975 states to 772 states and 975 transitions. [2024-11-24 18:15:17,821 INFO L276 IsEmpty]: Start isEmpty. Operand 772 states and 975 transitions. [2024-11-24 18:15:17,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2024-11-24 18:15:17,822 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:17,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:17,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:18,364 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 70 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-24 18:15:20,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:20,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1046 states to 823 states and 1046 transitions. [2024-11-24 18:15:20,535 INFO L276 IsEmpty]: Start isEmpty. Operand 823 states and 1046 transitions. [2024-11-24 18:15:20,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2024-11-24 18:15:20,536 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:20,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:20,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:20,791 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 70 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-24 18:15:21,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:21,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1050 states to 827 states and 1050 transitions. [2024-11-24 18:15:21,277 INFO L276 IsEmpty]: Start isEmpty. Operand 827 states and 1050 transitions. [2024-11-24 18:15:21,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2024-11-24 18:15:21,278 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:21,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:21,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:21,396 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 68 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:21,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:21,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1073 states to 850 states and 1073 transitions. [2024-11-24 18:15:21,632 INFO L276 IsEmpty]: Start isEmpty. Operand 850 states and 1073 transitions. [2024-11-24 18:15:21,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2024-11-24 18:15:21,633 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:21,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:21,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:21,698 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-11-24 18:15:21,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:21,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1073 states to 851 states and 1073 transitions. [2024-11-24 18:15:21,748 INFO L276 IsEmpty]: Start isEmpty. Operand 851 states and 1073 transitions. [2024-11-24 18:15:21,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2024-11-24 18:15:21,749 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:21,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:21,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:22,036 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 72 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:23,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:23,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1127 states to 901 states and 1127 transitions. [2024-11-24 18:15:23,746 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1127 transitions. [2024-11-24 18:15:23,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2024-11-24 18:15:23,748 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:23,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:23,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:23,921 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 72 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:24,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:24,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1099 states to 874 states and 1099 transitions. [2024-11-24 18:15:24,229 INFO L276 IsEmpty]: Start isEmpty. Operand 874 states and 1099 transitions. [2024-11-24 18:15:24,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-11-24 18:15:24,230 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:24,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:24,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:24,291 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-11-24 18:15:24,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:24,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1127 states to 901 states and 1127 transitions. [2024-11-24 18:15:24,469 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1127 transitions. [2024-11-24 18:15:24,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2024-11-24 18:15:24,471 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:24,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:24,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:24,531 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-11-24 18:15:25,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:25,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1138 states to 912 states and 1138 transitions. [2024-11-24 18:15:25,174 INFO L276 IsEmpty]: Start isEmpty. Operand 912 states and 1138 transitions. [2024-11-24 18:15:25,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-11-24 18:15:25,175 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:25,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:25,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:25,255 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-11-24 18:15:25,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:25,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1192 states to 957 states and 1192 transitions. [2024-11-24 18:15:25,792 INFO L276 IsEmpty]: Start isEmpty. Operand 957 states and 1192 transitions. [2024-11-24 18:15:25,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-11-24 18:15:25,794 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:25,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:25,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:25,909 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-11-24 18:15:26,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:26,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1192 states to 958 states and 1192 transitions. [2024-11-24 18:15:26,145 INFO L276 IsEmpty]: Start isEmpty. Operand 958 states and 1192 transitions. [2024-11-24 18:15:26,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-11-24 18:15:26,146 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:26,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:26,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:26,248 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-11-24 18:15:26,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:26,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1197 states to 962 states and 1197 transitions. [2024-11-24 18:15:26,675 INFO L276 IsEmpty]: Start isEmpty. Operand 962 states and 1197 transitions. [2024-11-24 18:15:26,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-11-24 18:15:26,677 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:26,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:26,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:26,784 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-11-24 18:15:27,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:27,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1202 states to 967 states and 1202 transitions. [2024-11-24 18:15:27,154 INFO L276 IsEmpty]: Start isEmpty. Operand 967 states and 1202 transitions. [2024-11-24 18:15:27,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-11-24 18:15:27,155 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:27,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:27,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:27,226 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 93 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-24 18:15:28,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:28,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1225 states to 989 states and 1225 transitions. [2024-11-24 18:15:28,033 INFO L276 IsEmpty]: Start isEmpty. Operand 989 states and 1225 transitions. [2024-11-24 18:15:28,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-11-24 18:15:28,035 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:28,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:28,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:28,215 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 89 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-24 18:15:29,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:29,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1256 states to 1013 states and 1256 transitions. [2024-11-24 18:15:29,478 INFO L276 IsEmpty]: Start isEmpty. Operand 1013 states and 1256 transitions. [2024-11-24 18:15:29,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-11-24 18:15:29,479 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:29,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:29,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:29,575 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 89 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-24 18:15:29,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:29,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1260 states to 1017 states and 1260 transitions. [2024-11-24 18:15:29,916 INFO L276 IsEmpty]: Start isEmpty. Operand 1017 states and 1260 transitions. [2024-11-24 18:15:29,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-11-24 18:15:29,917 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:29,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:29,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:30,064 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 89 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-24 18:15:30,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:30,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1265 states to 1022 states and 1265 transitions. [2024-11-24 18:15:30,447 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 1265 transitions. [2024-11-24 18:15:30,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2024-11-24 18:15:30,448 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:30,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:30,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:31,043 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 90 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:34,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:34,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1366 states to 1106 states and 1366 transitions. [2024-11-24 18:15:34,930 INFO L276 IsEmpty]: Start isEmpty. Operand 1106 states and 1366 transitions. [2024-11-24 18:15:34,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2024-11-24 18:15:34,930 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:34,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:34,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:35,354 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 104 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-24 18:15:36,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:36,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1422 states to 1162 states and 1422 transitions. [2024-11-24 18:15:36,949 INFO L276 IsEmpty]: Start isEmpty. Operand 1162 states and 1422 transitions. [2024-11-24 18:15:36,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2024-11-24 18:15:36,950 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:36,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:36,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:37,166 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 104 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-24 18:15:37,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:37,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1437 states to 1177 states and 1437 transitions. [2024-11-24 18:15:37,321 INFO L276 IsEmpty]: Start isEmpty. Operand 1177 states and 1437 transitions. [2024-11-24 18:15:37,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-11-24 18:15:37,322 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:37,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:37,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:38,014 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 94 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:41,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:41,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1502 states to 1223 states and 1502 transitions. [2024-11-24 18:15:41,720 INFO L276 IsEmpty]: Start isEmpty. Operand 1223 states and 1502 transitions. [2024-11-24 18:15:41,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-11-24 18:15:41,721 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:41,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:41,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:41,921 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 94 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:42,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:42,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1510 states to 1228 states and 1510 transitions. [2024-11-24 18:15:42,853 INFO L276 IsEmpty]: Start isEmpty. Operand 1228 states and 1510 transitions. [2024-11-24 18:15:42,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-11-24 18:15:42,854 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:42,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:42,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:43,040 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 94 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:44,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:44,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1533 states to 1246 states and 1533 transitions. [2024-11-24 18:15:44,632 INFO L276 IsEmpty]: Start isEmpty. Operand 1246 states and 1533 transitions. [2024-11-24 18:15:44,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-11-24 18:15:44,633 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:44,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:44,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:44,952 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 98 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:45,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:45,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1540 states to 1252 states and 1540 transitions. [2024-11-24 18:15:45,849 INFO L276 IsEmpty]: Start isEmpty. Operand 1252 states and 1540 transitions. [2024-11-24 18:15:45,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-11-24 18:15:45,850 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:45,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:45,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:45,977 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 156 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-24 18:15:46,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:46,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1566 states to 1277 states and 1566 transitions. [2024-11-24 18:15:46,792 INFO L276 IsEmpty]: Start isEmpty. Operand 1277 states and 1566 transitions. [2024-11-24 18:15:46,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-11-24 18:15:46,794 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:46,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:46,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:47,106 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 156 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-24 18:15:47,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:47,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1569 states to 1281 states and 1569 transitions. [2024-11-24 18:15:47,662 INFO L276 IsEmpty]: Start isEmpty. Operand 1281 states and 1569 transitions. [2024-11-24 18:15:47,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-11-24 18:15:47,663 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:47,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:47,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:48,128 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 103 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:49,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:49,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1581 states to 1286 states and 1581 transitions. [2024-11-24 18:15:49,179 INFO L276 IsEmpty]: Start isEmpty. Operand 1286 states and 1581 transitions. [2024-11-24 18:15:49,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-11-24 18:15:49,180 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:49,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:49,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:49,395 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 103 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:49,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:49,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1581 states to 1287 states and 1581 transitions. [2024-11-24 18:15:49,889 INFO L276 IsEmpty]: Start isEmpty. Operand 1287 states and 1581 transitions. [2024-11-24 18:15:49,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-11-24 18:15:49,891 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:49,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:49,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:50,234 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 103 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:50,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:50,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1581 states to 1288 states and 1581 transitions. [2024-11-24 18:15:50,728 INFO L276 IsEmpty]: Start isEmpty. Operand 1288 states and 1581 transitions. [2024-11-24 18:15:50,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-11-24 18:15:50,730 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:50,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:50,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:51,334 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 105 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-24 18:15:52,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:52,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1665 states to 1357 states and 1665 transitions. [2024-11-24 18:15:52,790 INFO L276 IsEmpty]: Start isEmpty. Operand 1357 states and 1665 transitions. [2024-11-24 18:15:52,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2024-11-24 18:15:52,791 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:52,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:52,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:52,904 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 72 proven. 0 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-11-24 18:15:53,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:53,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1665 states to 1358 states and 1665 transitions. [2024-11-24 18:15:53,037 INFO L276 IsEmpty]: Start isEmpty. Operand 1358 states and 1665 transitions. [2024-11-24 18:15:53,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2024-11-24 18:15:53,039 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:53,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:53,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:53,138 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-24 18:15:53,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:53,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1673 states to 1367 states and 1673 transitions. [2024-11-24 18:15:53,453 INFO L276 IsEmpty]: Start isEmpty. Operand 1367 states and 1673 transitions. [2024-11-24 18:15:53,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2024-11-24 18:15:53,454 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:53,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:53,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:53,524 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 112 proven. 0 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2024-11-24 18:15:53,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:53,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1674 states to 1369 states and 1674 transitions. [2024-11-24 18:15:53,594 INFO L276 IsEmpty]: Start isEmpty. Operand 1369 states and 1674 transitions. [2024-11-24 18:15:53,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2024-11-24 18:15:53,595 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:53,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:53,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:53,660 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2024-11-24 18:15:54,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:54,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1677 states to 1372 states and 1677 transitions. [2024-11-24 18:15:54,399 INFO L276 IsEmpty]: Start isEmpty. Operand 1372 states and 1677 transitions. [2024-11-24 18:15:54,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2024-11-24 18:15:54,401 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:54,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:54,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:55,179 INFO L134 CoverageAnalysis]: Checked inductivity of 214 backedges. 155 proven. 38 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-11-24 18:15:56,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:56,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1727 states to 1419 states and 1727 transitions. [2024-11-24 18:15:56,581 INFO L276 IsEmpty]: Start isEmpty. Operand 1419 states and 1727 transitions. [2024-11-24 18:15:56,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2024-11-24 18:15:56,583 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:56,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:56,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:56,708 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2024-11-24 18:15:56,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:56,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1727 states to 1420 states and 1727 transitions. [2024-11-24 18:15:56,789 INFO L276 IsEmpty]: Start isEmpty. Operand 1420 states and 1727 transitions. [2024-11-24 18:15:56,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2024-11-24 18:15:56,790 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:56,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:56,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:57,396 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 120 proven. 51 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-24 18:15:58,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:58,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1746 states to 1435 states and 1746 transitions. [2024-11-24 18:15:58,053 INFO L276 IsEmpty]: Start isEmpty. Operand 1435 states and 1746 transitions. [2024-11-24 18:15:58,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2024-11-24 18:15:58,055 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:58,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:58,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:58,142 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 126 proven. 0 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2024-11-24 18:15:59,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:15:59,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1798 states to 1484 states and 1798 transitions. [2024-11-24 18:15:59,490 INFO L276 IsEmpty]: Start isEmpty. Operand 1484 states and 1798 transitions. [2024-11-24 18:15:59,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2024-11-24 18:15:59,492 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:15:59,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:15:59,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:15:59,612 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 126 proven. 0 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2024-11-24 18:16:00,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:00,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1802 states to 1488 states and 1802 transitions. [2024-11-24 18:16:00,140 INFO L276 IsEmpty]: Start isEmpty. Operand 1488 states and 1802 transitions. [2024-11-24 18:16:00,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2024-11-24 18:16:00,141 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:00,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:00,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:00,750 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 130 proven. 49 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-11-24 18:16:04,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:04,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1935 states to 1582 states and 1935 transitions. [2024-11-24 18:16:04,705 INFO L276 IsEmpty]: Start isEmpty. Operand 1582 states and 1935 transitions. [2024-11-24 18:16:04,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2024-11-24 18:16:04,707 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:04,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:04,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:05,453 INFO L134 CoverageAnalysis]: Checked inductivity of 218 backedges. 128 proven. 21 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-11-24 18:16:06,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:06,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1952 states to 1597 states and 1952 transitions. [2024-11-24 18:16:06,329 INFO L276 IsEmpty]: Start isEmpty. Operand 1597 states and 1952 transitions. [2024-11-24 18:16:06,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-11-24 18:16:06,330 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:06,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:06,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:06,526 INFO L134 CoverageAnalysis]: Checked inductivity of 232 backedges. 159 proven. 46 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-11-24 18:16:07,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:07,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1972 states to 1616 states and 1972 transitions. [2024-11-24 18:16:07,025 INFO L276 IsEmpty]: Start isEmpty. Operand 1616 states and 1972 transitions. [2024-11-24 18:16:07,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-11-24 18:16:07,026 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:07,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:07,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:07,507 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 186 proven. 65 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-11-24 18:16:09,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:09,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2038 states to 1677 states and 2038 transitions. [2024-11-24 18:16:09,505 INFO L276 IsEmpty]: Start isEmpty. Operand 1677 states and 2038 transitions. [2024-11-24 18:16:09,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-11-24 18:16:09,506 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:09,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:09,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:09,585 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 165 proven. 0 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2024-11-24 18:16:10,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:10,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2058 states to 1696 states and 2058 transitions. [2024-11-24 18:16:10,159 INFO L276 IsEmpty]: Start isEmpty. Operand 1696 states and 2058 transitions. [2024-11-24 18:16:10,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2024-11-24 18:16:10,161 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:10,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:10,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:10,228 INFO L134 CoverageAnalysis]: Checked inductivity of 220 backedges. 140 proven. 0 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-11-24 18:16:10,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:10,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2072 states to 1708 states and 2072 transitions. [2024-11-24 18:16:10,688 INFO L276 IsEmpty]: Start isEmpty. Operand 1708 states and 2072 transitions. [2024-11-24 18:16:10,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-11-24 18:16:10,690 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:10,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:10,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:11,360 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-11-24 18:16:14,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:14,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2157 states to 1772 states and 2157 transitions. [2024-11-24 18:16:14,622 INFO L276 IsEmpty]: Start isEmpty. Operand 1772 states and 2157 transitions. [2024-11-24 18:16:14,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-11-24 18:16:14,624 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:14,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:14,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:14,935 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-11-24 18:16:15,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:15,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2165 states to 1779 states and 2165 transitions. [2024-11-24 18:16:15,910 INFO L276 IsEmpty]: Start isEmpty. Operand 1779 states and 2165 transitions. [2024-11-24 18:16:15,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-11-24 18:16:15,911 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:15,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:15,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:16,262 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-11-24 18:16:16,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:16,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2167 states to 1782 states and 2167 transitions. [2024-11-24 18:16:16,794 INFO L276 IsEmpty]: Start isEmpty. Operand 1782 states and 2167 transitions. [2024-11-24 18:16:16,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-11-24 18:16:16,795 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:16,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:16,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:17,057 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-11-24 18:16:17,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:17,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2170 states to 1786 states and 2170 transitions. [2024-11-24 18:16:17,682 INFO L276 IsEmpty]: Start isEmpty. Operand 1786 states and 2170 transitions. [2024-11-24 18:16:17,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-11-24 18:16:17,683 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:17,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:17,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 18:16:18,010 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 140 proven. 71 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-11-24 18:16:18,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-11-24 18:16:18,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2177 states to 1792 states and 2177 transitions. [2024-11-24 18:16:18,177 INFO L276 IsEmpty]: Start isEmpty. Operand 1792 states and 2177 transitions. [2024-11-24 18:16:18,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-11-24 18:16:18,178 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-11-24 18:16:18,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 18:16:18,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 18:16:18,209 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 18:16:18,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 18:16:18,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 18:16:18,450 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 18:16:18,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 18:16:18,600 WARN L473 CodeCheckObserver]: This program is UNSAFE, Check terminated with 103 iterations. [2024-11-24 18:16:18,752 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck CFG 24.11 06:16:18 ImpRootNode [2024-11-24 18:16:18,753 INFO L131 PluginConnector]: ------------------------ END CodeCheck---------------------------- [2024-11-24 18:16:18,753 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-24 18:16:18,753 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-24 18:16:18,753 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-24 18:16:18,754 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 06:14:50" (3/4) ... [2024-11-24 18:16:18,757 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-24 18:16:18,965 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 217. [2024-11-24 18:16:19,158 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/witness.graphml [2024-11-24 18:16:19,158 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/witness.yml [2024-11-24 18:16:19,159 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-24 18:16:19,160 INFO L158 Benchmark]: Toolchain (without parser) took 91337.56ms. Allocated memory was 117.4MB in the beginning and 1.5GB in the end (delta: 1.4GB). Free memory was 93.2MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 334.4MB. Max. memory is 16.1GB. [2024-11-24 18:16:19,160 INFO L158 Benchmark]: CDTParser took 0.30ms. Allocated memory is still 142.6MB. Free memory is still 79.1MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 18:16:19,160 INFO L158 Benchmark]: CACSL2BoogieTranslator took 606.40ms. Allocated memory is still 117.4MB. Free memory was 93.2MB in the beginning and 66.5MB in the end (delta: 26.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-24 18:16:19,160 INFO L158 Benchmark]: Boogie Procedure Inliner took 118.60ms. Allocated memory is still 117.4MB. Free memory was 66.5MB in the beginning and 60.8MB in the end (delta: 5.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-24 18:16:19,161 INFO L158 Benchmark]: Boogie Preprocessor took 90.94ms. Allocated memory is still 117.4MB. Free memory was 60.8MB in the beginning and 56.7MB in the end (delta: 4.1MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 18:16:19,161 INFO L158 Benchmark]: RCFGBuilder took 1833.59ms. Allocated memory was 117.4MB in the beginning and 343.9MB in the end (delta: 226.5MB). Free memory was 56.7MB in the beginning and 251.0MB in the end (delta: -194.3MB). Peak memory consumption was 40.6MB. Max. memory is 16.1GB. [2024-11-24 18:16:19,161 INFO L158 Benchmark]: CodeCheck took 88277.48ms. Allocated memory was 343.9MB in the beginning and 1.5GB in the end (delta: 1.2GB). Free memory was 251.0MB in the beginning and 1.2GB in the end (delta: -954.4MB). Peak memory consumption was 232.4MB. Max. memory is 16.1GB. [2024-11-24 18:16:19,162 INFO L158 Benchmark]: Witness Printer took 405.55ms. Allocated memory is still 1.5GB. Free memory was 1.2GB in the beginning and 1.2GB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-24 18:16:19,163 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - StatisticsResult: Ultimate CodeCheck benchmark data CFG has 1 procedures, 76 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 88.1s, OverallIterations: 103, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 168447 SdHoareTripleChecker+Valid, 510.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 165212 mSDsluCounter, 25686 SdHoareTripleChecker+Invalid, 433.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 21608 mSDsCounter, 54701 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 377787 IncrementalHoareTripleChecker+Invalid, 432488 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 54701 mSolverCounterUnsat, 4078 mSDtfsCounter, 377787 mSolverCounterSat, 5.9s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 99534 GetRequests, 95665 SyntacticMatches, 3145 SemanticMatches, 724 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 310802 ImplicationChecksByTransitivity, 54.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=-1occurred in iteration=-1, InterpolantAutomatonStates: 0, traceCheckStatistics: 0.6s SsaConstructionTime, 1.1s SatisfiabilityAnalysisTime, 17.8s InterpolantComputationTime, 14301 NumberOfCodeBlocks, 14301 NumberOfCodeBlocksAsserted, 103 NumberOfCheckSat, 13986 ConstructedInterpolants, 0 QuantifiedInterpolants, 64486 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 102 InterpolantComputations, 70 PerfectInterpolantSequences, 8751/9482 InterpolantCoveringCapability, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available - CounterExampleResult [Line: 417]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L17] int a= 1; [L18] int d= 4; [L19] int e= 5; [L20] int f= 6; [L21] int c= 3; [L22] int b= 2; [L25] int u = 21; [L26] int v = 22; [L27] int w = 23; [L28] int x = 24; [L29] int y = 25; [L30] int z = 26; [L32] int a17 = 1; [L33] int a7 = 0; [L34] int a20 = 1; [L35] int a8 = 15; [L36] int a12 = 8; [L37] int a16 = 5; [L38] int a21 = 1; [L590] int output = -1; VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND FALSE !((((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L283] COND FALSE !(((a7==1)&&((a8==13)&&((a12==8)&&(!(a21==1)&&((input==2)&&((((a20==1)&&!(a17==1))&&(a16==6))||(((a17==1)&&!(a20==1))&&(a16==4))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L288] COND FALSE !((((((((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15))&&(a16==6))&&(a21==1))||((((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))&&(a16==4))&&!(a21==1)))&&(input==6))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L296] COND FALSE !(((!(a7==1)&&(!(a17==1)&&(((((input==3)&&(a21==1))&&(a16==4))&&(a8==15))&&(a12==8))))&&!(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L302] COND FALSE !((((((a12==8)&&(((((a17==1)&&!(a20==1))&&(a16==4))||((((a20==1)&&!(a17==1))&&(a16==5))||((!(a17==1)&&(a20==1))&&(a16==6))))&&(input==3)))&&(a8==15))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L309] COND FALSE !((((!(a7==1)&&(((input==5)&&((((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a12==8)))&&(a21==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L316] COND FALSE !(((!(a7==1)&&(((a21==1)&&(((a17==1)&&((a12==8)&&(input==2)))&&!(a20==1)))&&(a16==6)))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L322] COND FALSE !(((!(a17==1)&&((a21==1)&&((!(a20==1)&&((a12==8)&&((input==3)&&!(a7==1))))&&(a8==15))))&&(a16==5))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L326] COND FALSE !((((a16==5)&&(!(a20==1)&&(((((input==6)&&(a21==1))&&(a17==1))&&!(a7==1))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L328] COND FALSE !((!(a7==1)&&((a17==1)&&(((a16==6)&&(!(a20==1)&&(((input==6)&&(a12==8))&&(a21==1))))&&(a8==15))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L334] COND FALSE !(((((a21==1)&&((a8==15)&&((a12==8)&&(!(a7==1)&&(!(a17==1)&&(input==2))))))&&(a16==4))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L339] COND FALSE !(((a8==15)&&(((a16==4)&&((a12==8)&&((!(a20==1)&&(!(a7==1)&&(input==1)))&&!(a17==1))))&&(a21==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L343] COND TRUE ((a21==1)&&(((a12==8)&&((((a17==1)&&((input==3)&&((a16==5)||(a16==6))))&&!(a7==1))&&(a20==1)))&&(a8==15))) [L344] a17 = 0 [L345] a16 = 4 [L346] return 21; VAL [\result=21, a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND TRUE (((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4)) [L279] a20 = 0 [L280] a17 = 1 [L281] a16 = 6 [L282] return 21; VAL [\result=21, a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND TRUE (((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6)) [L73] a17 = 0 [L74] return 26; VAL [\result=26, a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND TRUE ((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))))))) [L83] a7 = 1 [L84] a17 = 1 [L85] a21 = 0 [L86] a20 = 1 [L87] a8 = 13 [L88] a16 = 5 [L89] return 26; VAL [\result=26, a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND TRUE (((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1)) [L113] a20 = 0 [L114] a8 = 15 [L115] a17 = 0 [L116] a21 = 1 [L117] return -1; VAL [\result=-1, a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND FALSE !((((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L283] COND FALSE !(((a7==1)&&((a8==13)&&((a12==8)&&(!(a21==1)&&((input==2)&&((((a20==1)&&!(a17==1))&&(a16==6))||(((a17==1)&&!(a20==1))&&(a16==4))))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L288] COND FALSE !((((((((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15))&&(a16==6))&&(a21==1))||((((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))&&(a16==4))&&!(a21==1)))&&(input==6))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L296] COND FALSE !(((!(a7==1)&&(!(a17==1)&&(((((input==3)&&(a21==1))&&(a16==4))&&(a8==15))&&(a12==8))))&&!(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L302] COND FALSE !((((((a12==8)&&(((((a17==1)&&!(a20==1))&&(a16==4))||((((a20==1)&&!(a17==1))&&(a16==5))||((!(a17==1)&&(a20==1))&&(a16==6))))&&(input==3)))&&(a8==15))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L309] COND FALSE !((((!(a7==1)&&(((input==5)&&((((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a12==8)))&&(a21==1))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L316] COND FALSE !(((!(a7==1)&&(((a21==1)&&(((a17==1)&&((a12==8)&&(input==2)))&&!(a20==1)))&&(a16==6)))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L322] COND FALSE !(((!(a17==1)&&((a21==1)&&((!(a20==1)&&((a12==8)&&((input==3)&&!(a7==1))))&&(a8==15))))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L326] COND FALSE !((((a16==5)&&(!(a20==1)&&(((((input==6)&&(a21==1))&&(a17==1))&&!(a7==1))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L328] COND FALSE !((!(a7==1)&&((a17==1)&&(((a16==6)&&(!(a20==1)&&(((input==6)&&(a12==8))&&(a21==1))))&&(a8==15))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L334] COND FALSE !(((((a21==1)&&((a8==15)&&((a12==8)&&(!(a7==1)&&(!(a17==1)&&(input==2))))))&&(a16==4))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L339] COND FALSE !(((a8==15)&&(((a16==4)&&((a12==8)&&((!(a20==1)&&(!(a7==1)&&(input==1)))&&!(a17==1))))&&(a21==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L343] COND FALSE !(((a21==1)&&(((a12==8)&&((((a17==1)&&((input==3)&&((a16==5)||(a16==6))))&&!(a7==1))&&(a20==1)))&&(a8==15)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L347] COND FALSE !((!(a21==1)&&((a20==1)&&(((a12==8)&&((a8==13)&&((((a16==5)&&!(a17==1))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==2))))&&(a7==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L355] COND FALSE !(((a7==1)&&((a12==8)&&((((a20==1)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||((a16==4)&&!(a17==1))))&&(input==4)))&&(a8==13))&&!(a21==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L363] COND FALSE !(((a21==1)&&((((!(a7==1)&&((a8==15)&&(!(a20==1)&&(input==4))))&&(a17==1))&&(a16==5))&&(a12==8)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L365] COND FALSE !((((!(a7==1)&&((!(a20==1)&&((a21==1)&&((input==3)&&(a17==1))))&&(a8==15)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L371] COND FALSE !(((((!(a17==1)&&(!(a20==1)&&((a8==15)&&((input==1)&&(a16==5)))))&&(a12==8))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L373] COND FALSE !(((((a21==1)&&((a8==15)&&(((a16==5)&&((a12==8)&&(input==1)))&&(a17==1))))&&!(a7==1))&&!(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L375] COND FALSE !(((!(a21==1)&&((a20==1)&&((((a8==13)&&((a7==1)&&(input==5)))&&(a17==1))&&(a12==8))))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L382] COND FALSE !((((!(a7==1)&&((a21==1)&&((((input==6)&&(a20==1))&&(a8==15))&&!(a17==1))))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L387] COND FALSE !(((((a20==1)&&(((!(a21==1)&&((a7==1)&&(input==1)))&&(a8==13))&&(a17==1)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L392] COND FALSE !(((a12==8)&&((input==5)&&((((((!(a17==1)&&!(a7==1))&&!(a20==1))&&(a8==15))&&(a16==6))&&(a21==1))||(!(a21==1)&&((a16==4)&&(((a20==1)&&((a7==1)&&(a17==1)))&&(a8==13)))))))) [L401] COND FALSE !(((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) [L404] COND FALSE !((((((((a17==1)&&!(a7==1))&&(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) [L407] COND FALSE !(((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==15))&&(a12==8))&&(a16==4))&&(a21==1))) [L410] COND FALSE !((((((((a17==1)&&!(a7==1))&&(a20==1))&&(a8==13))&&(a12==8))&&(a16==6))&&(a21==1))) [L413] COND FALSE !(((((((!(a17==1)&&!(a7==1))&&!(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L416] COND TRUE ((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==15))&&(a12==8))&&(a16==5))&&(a21==1)) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L417] reach_error() VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30ms. Allocated memory is still 142.6MB. Free memory is still 79.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 606.40ms. Allocated memory is still 117.4MB. Free memory was 93.2MB in the beginning and 66.5MB in the end (delta: 26.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 118.60ms. Allocated memory is still 117.4MB. Free memory was 66.5MB in the beginning and 60.8MB in the end (delta: 5.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 90.94ms. Allocated memory is still 117.4MB. Free memory was 60.8MB in the beginning and 56.7MB in the end (delta: 4.1MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 1833.59ms. Allocated memory was 117.4MB in the beginning and 343.9MB in the end (delta: 226.5MB). Free memory was 56.7MB in the beginning and 251.0MB in the end (delta: -194.3MB). Peak memory consumption was 40.6MB. Max. memory is 16.1GB. * CodeCheck took 88277.48ms. Allocated memory was 343.9MB in the beginning and 1.5GB in the end (delta: 1.2GB). Free memory was 251.0MB in the beginning and 1.2GB in the end (delta: -954.4MB). Peak memory consumption was 232.4MB. Max. memory is 16.1GB. * Witness Printer took 405.55ms. Allocated memory is still 1.5GB. Free memory was 1.2GB in the beginning and 1.2GB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. RESULT: Ultimate proved your program to be incorrect! [2024-11-24 18:16:19,190 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8542f392-6fdb-4180-9a63-3663897e7203/bin/ukojak-verify-ENZ3QT5qd3/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE