./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/eca-rers2012/Problem01_label21.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/config/KojakReach.xml -i ../../sv-benchmarks/c/eca-rers2012/Problem01_label21.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/config/svcomp-Reach-32bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7fc08bc6eca06c500d742b65350dc2aa3c19e672662fd614514fbc6bd34af0fd --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-06 06:17:51,994 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-06 06:17:52,053 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/config/svcomp-Reach-32bit-Kojak_Default.epf [2024-12-06 06:17:52,057 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-06 06:17:52,058 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.Interpolating solver [2024-12-06 06:17:52,077 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-06 06:17:52,078 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-06 06:17:52,078 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ALWAYS [2024-12-06 06:17:52,079 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-06 06:17:52,079 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-06 06:17:52,079 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-06 06:17:52,079 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-06 06:17:52,079 INFO L153 SettingsManager]: * sizeof long=4 [2024-12-06 06:17:52,079 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * sizeof long double=12 [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-06 06:17:52,080 INFO L151 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2024-12-06 06:17:52,080 INFO L153 SettingsManager]: * Timeout in seconds=1000000 [2024-12-06 06:17:52,081 INFO L153 SettingsManager]: * Theory for external solver=ALL [2024-12-06 06:17:52,081 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-06 06:17:52,081 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-12-06 06:17:52,081 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-06 06:17:52,081 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-06 06:17:52,081 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-06 06:17:52,081 INFO L153 SettingsManager]: * Trace refinement strategy=PENGUIN [2024-12-06 06:17:52,081 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-06 06:17:52,082 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7fc08bc6eca06c500d742b65350dc2aa3c19e672662fd614514fbc6bd34af0fd [2024-12-06 06:17:52,307 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-06 06:17:52,314 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-06 06:17:52,316 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-06 06:17:52,318 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-06 06:17:52,318 INFO L274 PluginConnector]: CDTParser initialized [2024-12-06 06:17:52,319 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/../../sv-benchmarks/c/eca-rers2012/Problem01_label21.c [2024-12-06 06:17:55,123 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/data/7dd23e748/309dd7436df0446488f79e6185b3aa20/FLAG5a8648a0c [2024-12-06 06:17:55,396 INFO L384 CDTParser]: Found 1 translation units. [2024-12-06 06:17:55,396 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/sv-benchmarks/c/eca-rers2012/Problem01_label21.c [2024-12-06 06:17:55,409 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/data/7dd23e748/309dd7436df0446488f79e6185b3aa20/FLAG5a8648a0c [2024-12-06 06:17:55,425 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/data/7dd23e748/309dd7436df0446488f79e6185b3aa20 [2024-12-06 06:17:55,428 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-06 06:17:55,429 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-06 06:17:55,431 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-06 06:17:55,431 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-06 06:17:55,436 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-06 06:17:55,437 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:55,438 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@367b1417 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55, skipping insertion in model container [2024-12-06 06:17:55,438 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:55,470 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-06 06:17:55,749 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/sv-benchmarks/c/eca-rers2012/Problem01_label21.c[15876,15889] [2024-12-06 06:17:55,784 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-06 06:17:55,796 INFO L200 MainTranslator]: Completed pre-run [2024-12-06 06:17:55,874 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/sv-benchmarks/c/eca-rers2012/Problem01_label21.c[15876,15889] [2024-12-06 06:17:55,898 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-06 06:17:55,916 INFO L204 MainTranslator]: Completed translation [2024-12-06 06:17:55,917 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55 WrapperNode [2024-12-06 06:17:55,917 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-06 06:17:55,918 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-06 06:17:55,918 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-06 06:17:55,919 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-06 06:17:55,927 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:55,943 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:55,990 INFO L138 Inliner]: procedures = 14, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 657 [2024-12-06 06:17:55,990 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-06 06:17:55,991 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-06 06:17:55,991 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-06 06:17:55,991 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-06 06:17:56,000 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,000 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,005 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,005 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,026 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,028 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,036 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,039 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,042 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,048 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-06 06:17:56,049 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-06 06:17:56,049 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-06 06:17:56,049 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-06 06:17:56,050 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:17:55" (1/1) ... [2024-12-06 06:17:56,056 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-12-06 06:17:56,069 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/z3 [2024-12-06 06:17:56,083 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) [2024-12-06 06:17:56,086 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Waiting until timeout for monitored process [2024-12-06 06:17:56,114 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-06 06:17:56,115 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-12-06 06:17:56,115 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-06 06:17:56,115 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-06 06:17:56,181 INFO L234 CfgBuilder]: Building ICFG [2024-12-06 06:17:56,184 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-06 06:17:57,185 INFO L? ?]: Removed 75 outVars from TransFormulas that were not future-live. [2024-12-06 06:17:57,186 INFO L283 CfgBuilder]: Performing block encoding [2024-12-06 06:17:57,410 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-06 06:17:57,410 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-12-06 06:17:57,411 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 06:17:57 BoogieIcfgContainer [2024-12-06 06:17:57,411 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-06 06:17:57,412 INFO L112 PluginConnector]: ------------------------CodeCheck---------------------------- [2024-12-06 06:17:57,412 INFO L270 PluginConnector]: Initializing CodeCheck... [2024-12-06 06:17:57,420 INFO L274 PluginConnector]: CodeCheck initialized [2024-12-06 06:17:57,420 INFO L184 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 06:17:57" (1/1) ... [2024-12-06 06:17:57,427 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-06 06:17:57,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:17:57,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 76 states and 144 transitions. [2024-12-06 06:17:57,473 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 144 transitions. [2024-12-06 06:17:57,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2024-12-06 06:17:57,476 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:17:57,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:17:57,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:17:57,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:17:58,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:17:58,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 145 states and 231 transitions. [2024-12-06 06:17:58,511 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 231 transitions. [2024-12-06 06:17:58,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2024-12-06 06:17:58,513 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:17:58,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:17:58,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:17:58,739 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:17:59,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:17:59,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 215 states and 304 transitions. [2024-12-06 06:17:59,527 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 304 transitions. [2024-12-06 06:17:59,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2024-12-06 06:17:59,529 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:17:59,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:17:59,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:17:59,693 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 06:17:59,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:17:59,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 216 states and 305 transitions. [2024-12-06 06:17:59,846 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 305 transitions. [2024-12-06 06:17:59,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2024-12-06 06:17:59,848 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:17:59,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:17:59,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:00,011 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:00,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:00,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 231 states and 323 transitions. [2024-12-06 06:18:00,214 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 323 transitions. [2024-12-06 06:18:00,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2024-12-06 06:18:00,215 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:00,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:00,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:00,409 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:00,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:00,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330 states to 235 states and 330 transitions. [2024-12-06 06:18:00,631 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states and 330 transitions. [2024-12-06 06:18:00,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2024-12-06 06:18:00,633 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:00,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:00,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:00,724 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:00,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:00,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335 states to 240 states and 335 transitions. [2024-12-06 06:18:00,783 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 335 transitions. [2024-12-06 06:18:00,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-12-06 06:18:00,784 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:00,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:00,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:00,902 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:01,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:01,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 256 states and 356 transitions. [2024-12-06 06:18:01,233 INFO L276 IsEmpty]: Start isEmpty. Operand 256 states and 356 transitions. [2024-12-06 06:18:01,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2024-12-06 06:18:01,234 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:01,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:01,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:01,322 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:01,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:01,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 282 states and 386 transitions. [2024-12-06 06:18:01,773 INFO L276 IsEmpty]: Start isEmpty. Operand 282 states and 386 transitions. [2024-12-06 06:18:01,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-12-06 06:18:01,774 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:01,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:01,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:01,913 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-12-06 06:18:02,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:02,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401 states to 293 states and 401 transitions. [2024-12-06 06:18:02,269 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 401 transitions. [2024-12-06 06:18:02,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-12-06 06:18:02,271 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:02,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:02,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:02,332 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 06:18:02,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:02,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 314 states and 426 transitions. [2024-12-06 06:18:02,803 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 426 transitions. [2024-12-06 06:18:02,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-12-06 06:18:02,805 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:02,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:02,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:03,071 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 28 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 06:18:03,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:03,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 317 states and 430 transitions. [2024-12-06 06:18:03,304 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 430 transitions. [2024-12-06 06:18:03,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-12-06 06:18:03,306 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:03,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:03,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:03,489 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 06:18:03,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:03,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 328 states and 442 transitions. [2024-12-06 06:18:03,731 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 442 transitions. [2024-12-06 06:18:03,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2024-12-06 06:18:03,745 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:03,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:03,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:03,938 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 32 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 06:18:03,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:03,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 330 states and 444 transitions. [2024-12-06 06:18:03,986 INFO L276 IsEmpty]: Start isEmpty. Operand 330 states and 444 transitions. [2024-12-06 06:18:03,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2024-12-06 06:18:03,988 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:03,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:04,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:04,055 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 06:18:04,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:04,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 333 states and 449 transitions. [2024-12-06 06:18:04,194 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 449 transitions. [2024-12-06 06:18:04,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2024-12-06 06:18:04,195 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:04,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:04,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:04,450 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 06:18:05,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:05,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 348 states and 467 transitions. [2024-12-06 06:18:05,004 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 467 transitions. [2024-12-06 06:18:05,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2024-12-06 06:18:05,005 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:05,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:05,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:05,134 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-12-06 06:18:05,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:05,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 479 states to 357 states and 479 transitions. [2024-12-06 06:18:05,548 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 479 transitions. [2024-12-06 06:18:05,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2024-12-06 06:18:05,550 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:05,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:05,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:05,699 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-12-06 06:18:06,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:06,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 487 states to 361 states and 487 transitions. [2024-12-06 06:18:06,049 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 487 transitions. [2024-12-06 06:18:06,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2024-12-06 06:18:06,050 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:06,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:06,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:06,097 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:06,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:06,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 501 states to 375 states and 501 transitions. [2024-12-06 06:18:06,210 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 501 transitions. [2024-12-06 06:18:06,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2024-12-06 06:18:06,211 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:06,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:06,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:06,290 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 49 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 06:18:06,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:06,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 511 states to 384 states and 511 transitions. [2024-12-06 06:18:06,498 INFO L276 IsEmpty]: Start isEmpty. Operand 384 states and 511 transitions. [2024-12-06 06:18:06,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-12-06 06:18:06,500 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:06,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:06,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:06,575 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:06,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:06,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 536 states to 408 states and 536 transitions. [2024-12-06 06:18:06,735 INFO L276 IsEmpty]: Start isEmpty. Operand 408 states and 536 transitions. [2024-12-06 06:18:06,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-12-06 06:18:06,737 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:06,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:06,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:06,818 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:07,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:07,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 571 states to 441 states and 571 transitions. [2024-12-06 06:18:07,222 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 571 transitions. [2024-12-06 06:18:07,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-12-06 06:18:07,224 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:07,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:07,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:07,371 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-12-06 06:18:07,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:07,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 595 states to 463 states and 595 transitions. [2024-12-06 06:18:07,755 INFO L276 IsEmpty]: Start isEmpty. Operand 463 states and 595 transitions. [2024-12-06 06:18:07,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-12-06 06:18:07,757 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:07,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:07,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:07,883 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 67 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:08,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:08,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 620 states to 479 states and 620 transitions. [2024-12-06 06:18:08,257 INFO L276 IsEmpty]: Start isEmpty. Operand 479 states and 620 transitions. [2024-12-06 06:18:08,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-12-06 06:18:08,258 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:08,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:08,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:08,352 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:08,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:08,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 651 states to 508 states and 651 transitions. [2024-12-06 06:18:08,589 INFO L276 IsEmpty]: Start isEmpty. Operand 508 states and 651 transitions. [2024-12-06 06:18:08,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-12-06 06:18:08,591 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:08,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:08,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:08,671 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 06:18:09,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:09,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 696 states to 552 states and 696 transitions. [2024-12-06 06:18:09,121 INFO L276 IsEmpty]: Start isEmpty. Operand 552 states and 696 transitions. [2024-12-06 06:18:09,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-12-06 06:18:09,122 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:09,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:09,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:09,311 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 78 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-12-06 06:18:09,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:09,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 706 states to 560 states and 706 transitions. [2024-12-06 06:18:09,540 INFO L276 IsEmpty]: Start isEmpty. Operand 560 states and 706 transitions. [2024-12-06 06:18:09,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-12-06 06:18:09,542 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:09,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:09,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:09,602 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 56 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-12-06 06:18:10,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:10,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 744 states to 593 states and 744 transitions. [2024-12-06 06:18:10,416 INFO L276 IsEmpty]: Start isEmpty. Operand 593 states and 744 transitions. [2024-12-06 06:18:10,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-12-06 06:18:10,418 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:10,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:10,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:10,510 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 68 proven. 0 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-12-06 06:18:10,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:10,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 749 states to 598 states and 749 transitions. [2024-12-06 06:18:10,638 INFO L276 IsEmpty]: Start isEmpty. Operand 598 states and 749 transitions. [2024-12-06 06:18:10,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-12-06 06:18:10,639 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:10,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:10,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:10,685 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 62 proven. 0 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-12-06 06:18:10,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:10,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 753 states to 601 states and 753 transitions. [2024-12-06 06:18:10,978 INFO L276 IsEmpty]: Start isEmpty. Operand 601 states and 753 transitions. [2024-12-06 06:18:10,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2024-12-06 06:18:10,979 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:10,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:11,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:11,084 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 68 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:11,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:11,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 784 states to 629 states and 784 transitions. [2024-12-06 06:18:11,590 INFO L276 IsEmpty]: Start isEmpty. Operand 629 states and 784 transitions. [2024-12-06 06:18:11,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2024-12-06 06:18:11,591 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:11,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:11,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:11,682 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 06:18:11,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:11,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 784 states to 630 states and 784 transitions. [2024-12-06 06:18:11,745 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 784 transitions. [2024-12-06 06:18:11,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2024-12-06 06:18:11,746 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:11,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:11,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:12,142 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 72 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:13,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:13,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 702 states and 873 transitions. [2024-12-06 06:18:13,529 INFO L276 IsEmpty]: Start isEmpty. Operand 702 states and 873 transitions. [2024-12-06 06:18:13,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2024-12-06 06:18:13,530 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:13,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:13,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:13,670 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-06 06:18:14,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:14,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 915 states to 739 states and 915 transitions. [2024-12-06 06:18:14,613 INFO L276 IsEmpty]: Start isEmpty. Operand 739 states and 915 transitions. [2024-12-06 06:18:14,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2024-12-06 06:18:14,614 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:14,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:14,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:14,686 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 76 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-06 06:18:15,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:15,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 936 states to 758 states and 936 transitions. [2024-12-06 06:18:15,228 INFO L276 IsEmpty]: Start isEmpty. Operand 758 states and 936 transitions. [2024-12-06 06:18:15,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2024-12-06 06:18:15,229 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:15,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:15,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:15,287 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-12-06 06:18:15,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:15,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 936 states to 759 states and 936 transitions. [2024-12-06 06:18:15,320 INFO L276 IsEmpty]: Start isEmpty. Operand 759 states and 936 transitions. [2024-12-06 06:18:15,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2024-12-06 06:18:15,320 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:15,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:15,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:15,451 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 81 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:15,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:15,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 981 states to 803 states and 981 transitions. [2024-12-06 06:18:15,851 INFO L276 IsEmpty]: Start isEmpty. Operand 803 states and 981 transitions. [2024-12-06 06:18:15,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2024-12-06 06:18:15,851 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:15,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:15,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:16,031 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 101 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 06:18:16,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:16,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 985 states to 806 states and 985 transitions. [2024-12-06 06:18:16,306 INFO L276 IsEmpty]: Start isEmpty. Operand 806 states and 985 transitions. [2024-12-06 06:18:16,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2024-12-06 06:18:16,307 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:16,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:16,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:16,470 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 06:18:16,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:16,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 987 states to 807 states and 987 transitions. [2024-12-06 06:18:16,748 INFO L276 IsEmpty]: Start isEmpty. Operand 807 states and 987 transitions. [2024-12-06 06:18:16,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2024-12-06 06:18:16,748 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:16,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:16,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:16,965 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 99 proven. 6 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-12-06 06:18:17,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:17,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 989 states to 809 states and 989 transitions. [2024-12-06 06:18:17,128 INFO L276 IsEmpty]: Start isEmpty. Operand 809 states and 989 transitions. [2024-12-06 06:18:17,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2024-12-06 06:18:17,128 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:17,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:17,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:17,327 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 70 proven. 3 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2024-12-06 06:18:17,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:17,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 992 states to 812 states and 992 transitions. [2024-12-06 06:18:17,536 INFO L276 IsEmpty]: Start isEmpty. Operand 812 states and 992 transitions. [2024-12-06 06:18:17,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-06 06:18:17,536 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:17,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:17,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:17,684 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 90 proven. 3 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-12-06 06:18:17,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:17,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 996 states to 815 states and 996 transitions. [2024-12-06 06:18:17,919 INFO L276 IsEmpty]: Start isEmpty. Operand 815 states and 996 transitions. [2024-12-06 06:18:17,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-06 06:18:17,920 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:17,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:17,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:18,371 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:19,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:19,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1097 states to 896 states and 1097 transitions. [2024-12-06 06:18:19,828 INFO L276 IsEmpty]: Start isEmpty. Operand 896 states and 1097 transitions. [2024-12-06 06:18:19,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-06 06:18:19,829 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:19,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:19,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:20,016 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:20,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:20,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1100 states to 899 states and 1100 transitions. [2024-12-06 06:18:20,367 INFO L276 IsEmpty]: Start isEmpty. Operand 899 states and 1100 transitions. [2024-12-06 06:18:20,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-06 06:18:20,368 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:20,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:20,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:20,456 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-12-06 06:18:20,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:20,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1133 states to 926 states and 1133 transitions. [2024-12-06 06:18:20,876 INFO L276 IsEmpty]: Start isEmpty. Operand 926 states and 1133 transitions. [2024-12-06 06:18:20,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-06 06:18:20,877 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:20,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:20,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:20,940 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-12-06 06:18:21,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:21,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1133 states to 927 states and 1133 transitions. [2024-12-06 06:18:21,160 INFO L276 IsEmpty]: Start isEmpty. Operand 927 states and 1133 transitions. [2024-12-06 06:18:21,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2024-12-06 06:18:21,161 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:21,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:21,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:21,629 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 90 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:23,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:23,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1229 states to 1011 states and 1229 transitions. [2024-12-06 06:18:23,170 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1229 transitions. [2024-12-06 06:18:23,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2024-12-06 06:18:23,171 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:23,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:23,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:23,477 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 104 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 06:18:24,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:24,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1300 states to 1082 states and 1300 transitions. [2024-12-06 06:18:24,687 INFO L276 IsEmpty]: Start isEmpty. Operand 1082 states and 1300 transitions. [2024-12-06 06:18:24,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-12-06 06:18:24,688 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:24,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:24,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:24,795 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 127 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-12-06 06:18:25,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:25,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1301 states to 1083 states and 1301 transitions. [2024-12-06 06:18:25,038 INFO L276 IsEmpty]: Start isEmpty. Operand 1083 states and 1301 transitions. [2024-12-06 06:18:25,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2024-12-06 06:18:25,038 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:25,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:25,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:25,095 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 96 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-12-06 06:18:25,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:25,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1302 states to 1084 states and 1302 transitions. [2024-12-06 06:18:25,295 INFO L276 IsEmpty]: Start isEmpty. Operand 1084 states and 1302 transitions. [2024-12-06 06:18:25,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2024-12-06 06:18:25,295 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:25,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:25,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:25,384 INFO L134 CoverageAnalysis]: Checked inductivity of 138 backedges. 108 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-12-06 06:18:25,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:25,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1324 states to 1106 states and 1324 transitions. [2024-12-06 06:18:25,576 INFO L276 IsEmpty]: Start isEmpty. Operand 1106 states and 1324 transitions. [2024-12-06 06:18:25,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-12-06 06:18:25,577 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:25,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:25,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:25,999 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 99 proven. 51 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-12-06 06:18:26,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:26,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1338 states to 1118 states and 1338 transitions. [2024-12-06 06:18:26,628 INFO L276 IsEmpty]: Start isEmpty. Operand 1118 states and 1338 transitions. [2024-12-06 06:18:26,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2024-12-06 06:18:26,629 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:26,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:26,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:26,762 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 145 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-12-06 06:18:27,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:27,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1366 states to 1139 states and 1366 transitions. [2024-12-06 06:18:27,486 INFO L276 IsEmpty]: Start isEmpty. Operand 1139 states and 1366 transitions. [2024-12-06 06:18:27,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-12-06 06:18:27,487 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:27,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:27,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:27,686 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 105 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:28,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:28,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1402 states to 1172 states and 1402 transitions. [2024-12-06 06:18:28,810 INFO L276 IsEmpty]: Start isEmpty. Operand 1172 states and 1402 transitions. [2024-12-06 06:18:28,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2024-12-06 06:18:28,811 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:28,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:28,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:28,863 INFO L134 CoverageAnalysis]: Checked inductivity of 199 backedges. 163 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-12-06 06:18:29,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:29,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1420 states to 1188 states and 1420 transitions. [2024-12-06 06:18:29,295 INFO L276 IsEmpty]: Start isEmpty. Operand 1188 states and 1420 transitions. [2024-12-06 06:18:29,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2024-12-06 06:18:29,296 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:29,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:29,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:29,349 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 106 proven. 0 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2024-12-06 06:18:29,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:29,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1428 states to 1195 states and 1428 transitions. [2024-12-06 06:18:29,705 INFO L276 IsEmpty]: Start isEmpty. Operand 1195 states and 1428 transitions. [2024-12-06 06:18:29,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2024-12-06 06:18:29,706 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:29,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:29,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:29,774 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 135 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-12-06 06:18:30,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:30,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1453 states to 1220 states and 1453 transitions. [2024-12-06 06:18:30,136 INFO L276 IsEmpty]: Start isEmpty. Operand 1220 states and 1453 transitions. [2024-12-06 06:18:30,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2024-12-06 06:18:30,137 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:30,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:30,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:30,500 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 121 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:33,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:33,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1548 states to 1295 states and 1548 transitions. [2024-12-06 06:18:33,121 INFO L276 IsEmpty]: Start isEmpty. Operand 1295 states and 1548 transitions. [2024-12-06 06:18:33,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2024-12-06 06:18:33,122 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:33,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:33,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:33,355 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 121 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:33,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:33,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1557 states to 1303 states and 1557 transitions. [2024-12-06 06:18:33,859 INFO L276 IsEmpty]: Start isEmpty. Operand 1303 states and 1557 transitions. [2024-12-06 06:18:33,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2024-12-06 06:18:33,860 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:33,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:33,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:34,092 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 121 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:34,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:34,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1564 states to 1309 states and 1564 transitions. [2024-12-06 06:18:34,309 INFO L276 IsEmpty]: Start isEmpty. Operand 1309 states and 1564 transitions. [2024-12-06 06:18:34,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2024-12-06 06:18:34,310 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:34,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:34,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:34,525 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 121 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:34,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:34,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1565 states to 1311 states and 1565 transitions. [2024-12-06 06:18:34,843 INFO L276 IsEmpty]: Start isEmpty. Operand 1311 states and 1565 transitions. [2024-12-06 06:18:34,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2024-12-06 06:18:34,844 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:34,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:34,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:35,058 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 121 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:35,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:35,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1574 states to 1320 states and 1574 transitions. [2024-12-06 06:18:35,401 INFO L276 IsEmpty]: Start isEmpty. Operand 1320 states and 1574 transitions. [2024-12-06 06:18:35,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2024-12-06 06:18:35,402 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:35,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:35,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:35,710 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 146 proven. 49 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 06:18:37,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:37,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1620 states to 1359 states and 1620 transitions. [2024-12-06 06:18:37,990 INFO L276 IsEmpty]: Start isEmpty. Operand 1359 states and 1620 transitions. [2024-12-06 06:18:37,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2024-12-06 06:18:37,991 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:37,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:38,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:38,212 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 127 proven. 44 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-12-06 06:18:38,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:38,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1630 states to 1368 states and 1630 transitions. [2024-12-06 06:18:38,637 INFO L276 IsEmpty]: Start isEmpty. Operand 1368 states and 1630 transitions. [2024-12-06 06:18:38,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2024-12-06 06:18:38,638 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:38,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:38,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:39,000 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 127 proven. 58 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:41,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:41,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1718 states to 1442 states and 1718 transitions. [2024-12-06 06:18:41,482 INFO L276 IsEmpty]: Start isEmpty. Operand 1442 states and 1718 transitions. [2024-12-06 06:18:41,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2024-12-06 06:18:41,483 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:41,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:41,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:41,707 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 127 proven. 58 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:42,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:42,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1721 states to 1445 states and 1721 transitions. [2024-12-06 06:18:42,085 INFO L276 IsEmpty]: Start isEmpty. Operand 1445 states and 1721 transitions. [2024-12-06 06:18:42,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2024-12-06 06:18:42,086 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:42,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:42,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:42,607 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 127 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:18:44,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:44,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1777 states to 1489 states and 1777 transitions. [2024-12-06 06:18:44,749 INFO L276 IsEmpty]: Start isEmpty. Operand 1489 states and 1777 transitions. [2024-12-06 06:18:44,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2024-12-06 06:18:44,751 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:44,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:44,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:44,891 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 148 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 06:18:45,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:45,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1785 states to 1496 states and 1785 transitions. [2024-12-06 06:18:45,692 INFO L276 IsEmpty]: Start isEmpty. Operand 1496 states and 1785 transitions. [2024-12-06 06:18:45,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-12-06 06:18:45,693 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:45,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:45,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:45,905 INFO L134 CoverageAnalysis]: Checked inductivity of 202 backedges. 134 proven. 51 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-12-06 06:18:46,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:46,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1792 states to 1503 states and 1792 transitions. [2024-12-06 06:18:46,033 INFO L276 IsEmpty]: Start isEmpty. Operand 1503 states and 1792 transitions. [2024-12-06 06:18:46,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-12-06 06:18:46,034 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:46,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:46,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:46,395 INFO L134 CoverageAnalysis]: Checked inductivity of 227 backedges. 134 proven. 65 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-12-06 06:18:48,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:48,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1843 states to 1547 states and 1843 transitions. [2024-12-06 06:18:48,931 INFO L276 IsEmpty]: Start isEmpty. Operand 1547 states and 1843 transitions. [2024-12-06 06:18:48,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-12-06 06:18:48,932 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:48,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:48,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:49,316 INFO L134 CoverageAnalysis]: Checked inductivity of 227 backedges. 134 proven. 65 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-12-06 06:18:49,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:49,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1848 states to 1553 states and 1848 transitions. [2024-12-06 06:18:49,788 INFO L276 IsEmpty]: Start isEmpty. Operand 1553 states and 1848 transitions. [2024-12-06 06:18:49,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-12-06 06:18:49,789 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:49,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:49,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:50,064 INFO L134 CoverageAnalysis]: Checked inductivity of 290 backedges. 176 proven. 65 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-12-06 06:18:52,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:52,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1885 states to 1580 states and 1885 transitions. [2024-12-06 06:18:52,078 INFO L276 IsEmpty]: Start isEmpty. Operand 1580 states and 1885 transitions. [2024-12-06 06:18:52,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-12-06 06:18:52,079 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:52,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:52,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:52,302 INFO L134 CoverageAnalysis]: Checked inductivity of 290 backedges. 241 proven. 0 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-12-06 06:18:54,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:54,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1925 states to 1614 states and 1925 transitions. [2024-12-06 06:18:54,444 INFO L276 IsEmpty]: Start isEmpty. Operand 1614 states and 1925 transitions. [2024-12-06 06:18:54,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-12-06 06:18:54,445 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:54,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:54,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:54,682 INFO L134 CoverageAnalysis]: Checked inductivity of 290 backedges. 176 proven. 65 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-12-06 06:18:55,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:55,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1942 states to 1626 states and 1942 transitions. [2024-12-06 06:18:55,965 INFO L276 IsEmpty]: Start isEmpty. Operand 1626 states and 1942 transitions. [2024-12-06 06:18:55,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-12-06 06:18:55,966 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:55,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:55,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:56,221 INFO L134 CoverageAnalysis]: Checked inductivity of 290 backedges. 176 proven. 65 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-12-06 06:18:56,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:56,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1943 states to 1628 states and 1943 transitions. [2024-12-06 06:18:56,665 INFO L276 IsEmpty]: Start isEmpty. Operand 1628 states and 1943 transitions. [2024-12-06 06:18:56,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-12-06 06:18:56,667 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:56,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:56,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:56,889 INFO L134 CoverageAnalysis]: Checked inductivity of 290 backedges. 176 proven. 65 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-12-06 06:18:57,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:57,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1946 states to 1630 states and 1946 transitions. [2024-12-06 06:18:57,371 INFO L276 IsEmpty]: Start isEmpty. Operand 1630 states and 1946 transitions. [2024-12-06 06:18:57,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-12-06 06:18:57,372 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:57,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:57,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:57,618 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 137 proven. 54 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-12-06 06:18:57,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:18:57,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1950 states to 1633 states and 1950 transitions. [2024-12-06 06:18:57,736 INFO L276 IsEmpty]: Start isEmpty. Operand 1633 states and 1950 transitions. [2024-12-06 06:18:57,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-12-06 06:18:57,737 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:18:57,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:18:57,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:18:58,092 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 137 proven. 68 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-06 06:19:00,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:00,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2011 states to 1684 states and 2011 transitions. [2024-12-06 06:19:00,758 INFO L276 IsEmpty]: Start isEmpty. Operand 1684 states and 2011 transitions. [2024-12-06 06:19:00,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-12-06 06:19:00,759 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:00,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:00,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:00,988 INFO L134 CoverageAnalysis]: Checked inductivity of 236 backedges. 137 proven. 68 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-06 06:19:01,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:01,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2014 states to 1687 states and 2014 transitions. [2024-12-06 06:19:01,542 INFO L276 IsEmpty]: Start isEmpty. Operand 1687 states and 2014 transitions. [2024-12-06 06:19:01,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 211 [2024-12-06 06:19:01,544 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:01,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:01,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:01,723 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 171 proven. 76 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-06 06:19:02,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:02,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2034 states to 1702 states and 2034 transitions. [2024-12-06 06:19:02,019 INFO L276 IsEmpty]: Start isEmpty. Operand 1702 states and 2034 transitions. [2024-12-06 06:19:02,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-12-06 06:19:02,021 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:02,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:02,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:02,566 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-12-06 06:19:04,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:04,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2077 states to 1737 states and 2077 transitions. [2024-12-06 06:19:04,608 INFO L276 IsEmpty]: Start isEmpty. Operand 1737 states and 2077 transitions. [2024-12-06 06:19:04,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-12-06 06:19:04,609 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:04,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:04,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:04,838 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-12-06 06:19:05,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:05,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2086 states to 1746 states and 2086 transitions. [2024-12-06 06:19:05,397 INFO L276 IsEmpty]: Start isEmpty. Operand 1746 states and 2086 transitions. [2024-12-06 06:19:05,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-12-06 06:19:05,398 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:05,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:05,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:05,632 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-12-06 06:19:06,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:06,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2093 states to 1754 states and 2093 transitions. [2024-12-06 06:19:06,672 INFO L276 IsEmpty]: Start isEmpty. Operand 1754 states and 2093 transitions. [2024-12-06 06:19:06,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-12-06 06:19:06,673 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:06,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:06,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:07,074 INFO L134 CoverageAnalysis]: Checked inductivity of 321 backedges. 190 proven. 58 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-12-06 06:19:08,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:08,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2106 states to 1760 states and 2106 transitions. [2024-12-06 06:19:08,269 INFO L276 IsEmpty]: Start isEmpty. Operand 1760 states and 2106 transitions. [2024-12-06 06:19:08,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-12-06 06:19:08,270 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:08,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:08,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:08,539 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 140 proven. 71 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-12-06 06:19:08,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:08,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2109 states to 1763 states and 2109 transitions. [2024-12-06 06:19:08,993 INFO L276 IsEmpty]: Start isEmpty. Operand 1763 states and 2109 transitions. [2024-12-06 06:19:08,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-06 06:19:08,994 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:08,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:09,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:09,098 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 257 proven. 0 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-12-06 06:19:09,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:09,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2120 states to 1774 states and 2120 transitions. [2024-12-06 06:19:09,980 INFO L276 IsEmpty]: Start isEmpty. Operand 1774 states and 2120 transitions. [2024-12-06 06:19:09,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-06 06:19:09,981 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:09,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:10,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:10,843 INFO L134 CoverageAnalysis]: Checked inductivity of 285 backedges. 119 proven. 137 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-12-06 06:19:15,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:15,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2275 states to 1908 states and 2275 transitions. [2024-12-06 06:19:15,513 INFO L276 IsEmpty]: Start isEmpty. Operand 1908 states and 2275 transitions. [2024-12-06 06:19:15,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-12-06 06:19:15,514 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:15,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:15,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:15,888 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 142 proven. 58 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-12-06 06:19:16,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:16,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2288 states to 1921 states and 2288 transitions. [2024-12-06 06:19:16,740 INFO L276 IsEmpty]: Start isEmpty. Operand 1921 states and 2288 transitions. [2024-12-06 06:19:16,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-12-06 06:19:16,741 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:16,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:16,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:16,876 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 181 proven. 81 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-06 06:19:17,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:17,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2295 states to 1926 states and 2295 transitions. [2024-12-06 06:19:17,286 INFO L276 IsEmpty]: Start isEmpty. Operand 1926 states and 2295 transitions. [2024-12-06 06:19:17,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-12-06 06:19:17,287 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:17,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:17,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:17,401 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 181 proven. 81 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-06 06:19:18,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:18,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2311 states to 1941 states and 2311 transitions. [2024-12-06 06:19:18,023 INFO L276 IsEmpty]: Start isEmpty. Operand 1941 states and 2311 transitions. [2024-12-06 06:19:18,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-12-06 06:19:18,024 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:18,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:18,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:18,360 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 142 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:19:18,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:18,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 1954 states and 2324 transitions. [2024-12-06 06:19:18,987 INFO L276 IsEmpty]: Start isEmpty. Operand 1954 states and 2324 transitions. [2024-12-06 06:19:18,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2024-12-06 06:19:18,988 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:18,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:19,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:19,517 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 129 proven. 142 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-12-06 06:19:20,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:20,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2402 states to 2028 states and 2402 transitions. [2024-12-06 06:19:20,784 INFO L276 IsEmpty]: Start isEmpty. Operand 2028 states and 2402 transitions. [2024-12-06 06:19:20,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2024-12-06 06:19:20,785 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:20,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:20,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:20,861 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 219 proven. 0 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2024-12-06 06:19:21,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:21,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2404 states to 2029 states and 2404 transitions. [2024-12-06 06:19:21,312 INFO L276 IsEmpty]: Start isEmpty. Operand 2029 states and 2404 transitions. [2024-12-06 06:19:21,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2024-12-06 06:19:21,314 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:21,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:21,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:21,390 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 219 proven. 0 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2024-12-06 06:19:21,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:21,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2419 states to 2044 states and 2419 transitions. [2024-12-06 06:19:21,850 INFO L276 IsEmpty]: Start isEmpty. Operand 2044 states and 2419 transitions. [2024-12-06 06:19:21,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-06 06:19:21,851 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:21,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:21,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:22,115 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 152 proven. 83 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-06 06:19:22,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:22,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2431 states to 2056 states and 2431 transitions. [2024-12-06 06:19:22,895 INFO L276 IsEmpty]: Start isEmpty. Operand 2056 states and 2431 transitions. [2024-12-06 06:19:22,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-06 06:19:22,896 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:22,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:22,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:23,447 INFO L134 CoverageAnalysis]: Checked inductivity of 318 backedges. 172 proven. 137 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-06 06:19:24,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:24,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2450 states to 2067 states and 2450 transitions. [2024-12-06 06:19:24,694 INFO L276 IsEmpty]: Start isEmpty. Operand 2067 states and 2450 transitions. [2024-12-06 06:19:24,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-06 06:19:24,695 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:24,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:24,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:25,068 INFO L134 CoverageAnalysis]: Checked inductivity of 318 backedges. 172 proven. 137 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-06 06:19:25,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:25,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2455 states to 2072 states and 2455 transitions. [2024-12-06 06:19:25,682 INFO L276 IsEmpty]: Start isEmpty. Operand 2072 states and 2455 transitions. [2024-12-06 06:19:25,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-06 06:19:25,684 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:25,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:25,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:25,898 INFO L134 CoverageAnalysis]: Checked inductivity of 318 backedges. 225 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-12-06 06:19:26,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:26,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2473 states to 2083 states and 2473 transitions. [2024-12-06 06:19:26,775 INFO L276 IsEmpty]: Start isEmpty. Operand 2083 states and 2473 transitions. [2024-12-06 06:19:26,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-06 06:19:26,776 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:26,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:26,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:27,081 INFO L134 CoverageAnalysis]: Checked inductivity of 318 backedges. 172 proven. 137 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-06 06:19:28,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:28,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2490 states to 2099 states and 2490 transitions. [2024-12-06 06:19:28,100 INFO L276 IsEmpty]: Start isEmpty. Operand 2099 states and 2490 transitions. [2024-12-06 06:19:28,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2024-12-06 06:19:28,101 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:28,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:28,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:28,186 INFO L134 CoverageAnalysis]: Checked inductivity of 326 backedges. 229 proven. 0 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2024-12-06 06:19:29,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:29,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2508 states to 2115 states and 2508 transitions. [2024-12-06 06:19:29,252 INFO L276 IsEmpty]: Start isEmpty. Operand 2115 states and 2508 transitions. [2024-12-06 06:19:29,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-12-06 06:19:29,255 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:29,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:29,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:29,736 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 155 proven. 86 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-12-06 06:19:31,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:31,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2555 states to 2152 states and 2555 transitions. [2024-12-06 06:19:31,913 INFO L276 IsEmpty]: Start isEmpty. Operand 2152 states and 2555 transitions. [2024-12-06 06:19:31,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-12-06 06:19:31,916 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:31,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:31,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:32,016 INFO L134 CoverageAnalysis]: Checked inductivity of 266 backedges. 155 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked. [2024-12-06 06:19:32,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:32,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2559 states to 2155 states and 2559 transitions. [2024-12-06 06:19:32,644 INFO L276 IsEmpty]: Start isEmpty. Operand 2155 states and 2559 transitions. [2024-12-06 06:19:32,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-12-06 06:19:32,646 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:32,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:32,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:32,722 INFO L134 CoverageAnalysis]: Checked inductivity of 266 backedges. 155 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked. [2024-12-06 06:19:33,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:33,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2561 states to 2158 states and 2561 transitions. [2024-12-06 06:19:33,336 INFO L276 IsEmpty]: Start isEmpty. Operand 2158 states and 2561 transitions. [2024-12-06 06:19:33,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-12-06 06:19:33,338 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:33,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:33,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:33,436 INFO L134 CoverageAnalysis]: Checked inductivity of 266 backedges. 155 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked. [2024-12-06 06:19:34,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:34,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2577 states to 2174 states and 2577 transitions. [2024-12-06 06:19:34,025 INFO L276 IsEmpty]: Start isEmpty. Operand 2174 states and 2577 transitions. [2024-12-06 06:19:34,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2024-12-06 06:19:34,026 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:34,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:34,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:34,368 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 211 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 06:19:35,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:35,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2582 states to 2177 states and 2582 transitions. [2024-12-06 06:19:35,133 INFO L276 IsEmpty]: Start isEmpty. Operand 2177 states and 2582 transitions. [2024-12-06 06:19:35,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-12-06 06:19:35,134 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:35,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:35,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:35,612 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 186 proven. 34 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 06:19:36,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:36,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2585 states to 2180 states and 2585 transitions. [2024-12-06 06:19:36,464 INFO L276 IsEmpty]: Start isEmpty. Operand 2180 states and 2585 transitions. [2024-12-06 06:19:36,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 238 [2024-12-06 06:19:36,465 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:36,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:36,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:36,749 INFO L134 CoverageAnalysis]: Checked inductivity of 348 backedges. 192 proven. 59 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2024-12-06 06:19:37,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:37,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2586 states to 2181 states and 2586 transitions. [2024-12-06 06:19:37,454 INFO L276 IsEmpty]: Start isEmpty. Operand 2181 states and 2586 transitions. [2024-12-06 06:19:37,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-06 06:19:37,456 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:37,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:37,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:37,763 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 166 proven. 97 refuted. 0 times theorem prover too weak. 88 trivial. 0 not checked. [2024-12-06 06:19:38,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:38,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2603 states to 2195 states and 2603 transitions. [2024-12-06 06:19:38,777 INFO L276 IsEmpty]: Start isEmpty. Operand 2195 states and 2603 transitions. [2024-12-06 06:19:38,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-06 06:19:38,778 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:38,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:38,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:38,912 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 267 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-12-06 06:19:39,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:39,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2618 states to 2209 states and 2618 transitions. [2024-12-06 06:19:39,676 INFO L276 IsEmpty]: Start isEmpty. Operand 2209 states and 2618 transitions. [2024-12-06 06:19:39,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2024-12-06 06:19:39,678 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:39,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:39,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:39,795 INFO L134 CoverageAnalysis]: Checked inductivity of 359 backedges. 229 proven. 105 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-06 06:19:40,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:40,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2658 states to 2238 states and 2658 transitions. [2024-12-06 06:19:40,599 INFO L276 IsEmpty]: Start isEmpty. Operand 2238 states and 2658 transitions. [2024-12-06 06:19:40,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 242 [2024-12-06 06:19:40,600 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:40,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:40,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:40,871 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 169 proven. 100 refuted. 0 times theorem prover too weak. 82 trivial. 0 not checked. [2024-12-06 06:19:41,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:41,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2672 states to 2252 states and 2672 transitions. [2024-12-06 06:19:41,431 INFO L276 IsEmpty]: Start isEmpty. Operand 2252 states and 2672 transitions. [2024-12-06 06:19:41,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 242 [2024-12-06 06:19:41,432 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:41,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:41,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:41,686 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 200 proven. 63 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2024-12-06 06:19:42,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:42,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2680 states to 2257 states and 2680 transitions. [2024-12-06 06:19:42,789 INFO L276 IsEmpty]: Start isEmpty. Operand 2257 states and 2680 transitions. [2024-12-06 06:19:42,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 242 [2024-12-06 06:19:42,791 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:42,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:42,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:43,149 INFO L134 CoverageAnalysis]: Checked inductivity of 363 backedges. 169 proven. 100 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2024-12-06 06:19:43,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:43,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2684 states to 2260 states and 2684 transitions. [2024-12-06 06:19:43,939 INFO L276 IsEmpty]: Start isEmpty. Operand 2260 states and 2684 transitions. [2024-12-06 06:19:43,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2024-12-06 06:19:43,940 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:43,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:43,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:44,059 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 281 proven. 0 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2024-12-06 06:19:44,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:44,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2712 states to 2289 states and 2712 transitions. [2024-12-06 06:19:44,719 INFO L276 IsEmpty]: Start isEmpty. Operand 2289 states and 2712 transitions. [2024-12-06 06:19:44,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2024-12-06 06:19:44,720 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:44,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:44,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:45,343 INFO L134 CoverageAnalysis]: Checked inductivity of 372 backedges. 83 proven. 244 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-06 06:19:46,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:46,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2784 states to 2359 states and 2784 transitions. [2024-12-06 06:19:46,742 INFO L276 IsEmpty]: Start isEmpty. Operand 2359 states and 2784 transitions. [2024-12-06 06:19:46,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-06 06:19:46,744 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:46,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:46,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:47,001 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 172 proven. 103 refuted. 0 times theorem prover too weak. 85 trivial. 0 not checked. [2024-12-06 06:19:47,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:47,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2788 states to 2362 states and 2788 transitions. [2024-12-06 06:19:47,255 INFO L276 IsEmpty]: Start isEmpty. Operand 2362 states and 2788 transitions. [2024-12-06 06:19:47,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-06 06:19:47,256 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:47,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:47,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:47,681 INFO L134 CoverageAnalysis]: Checked inductivity of 327 backedges. 272 proven. 9 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 06:19:52,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:52,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2862 states to 2423 states and 2862 transitions. [2024-12-06 06:19:52,730 INFO L276 IsEmpty]: Start isEmpty. Operand 2423 states and 2862 transitions. [2024-12-06 06:19:52,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-06 06:19:52,731 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:52,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:52,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:52,913 INFO L134 CoverageAnalysis]: Checked inductivity of 327 backedges. 272 proven. 9 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 06:19:54,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:54,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2878 states to 2438 states and 2878 transitions. [2024-12-06 06:19:54,261 INFO L276 IsEmpty]: Start isEmpty. Operand 2438 states and 2878 transitions. [2024-12-06 06:19:54,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-06 06:19:54,262 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:54,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:54,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:54,446 INFO L134 CoverageAnalysis]: Checked inductivity of 327 backedges. 272 proven. 9 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 06:19:55,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:55,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2886 states to 2446 states and 2886 transitions. [2024-12-06 06:19:55,351 INFO L276 IsEmpty]: Start isEmpty. Operand 2446 states and 2886 transitions. [2024-12-06 06:19:55,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-06 06:19:55,352 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:55,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:55,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:55,614 INFO L134 CoverageAnalysis]: Checked inductivity of 372 backedges. 172 proven. 103 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2024-12-06 06:19:56,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:56,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2889 states to 2449 states and 2889 transitions. [2024-12-06 06:19:56,391 INFO L276 IsEmpty]: Start isEmpty. Operand 2449 states and 2889 transitions. [2024-12-06 06:19:56,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2024-12-06 06:19:56,392 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:56,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:56,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:56,753 INFO L134 CoverageAnalysis]: Checked inductivity of 329 backedges. 179 proven. 104 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 06:19:57,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:57,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2898 states to 2458 states and 2898 transitions. [2024-12-06 06:19:57,397 INFO L276 IsEmpty]: Start isEmpty. Operand 2458 states and 2898 transitions. [2024-12-06 06:19:57,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2024-12-06 06:19:57,398 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:57,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:57,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:19:57,697 INFO L134 CoverageAnalysis]: Checked inductivity of 396 backedges. 173 proven. 104 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2024-12-06 06:19:59,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:19:59,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2925 states to 2482 states and 2925 transitions. [2024-12-06 06:19:59,506 INFO L276 IsEmpty]: Start isEmpty. Operand 2482 states and 2925 transitions. [2024-12-06 06:19:59,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2024-12-06 06:19:59,507 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:19:59,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:19:59,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:00,083 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 174 proven. 105 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 06:20:05,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:05,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2990 states to 2537 states and 2990 transitions. [2024-12-06 06:20:05,209 INFO L276 IsEmpty]: Start isEmpty. Operand 2537 states and 2990 transitions. [2024-12-06 06:20:05,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2024-12-06 06:20:05,210 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:05,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:05,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:05,549 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 174 proven. 105 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 06:20:07,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:07,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3013 states to 2560 states and 3013 transitions. [2024-12-06 06:20:07,562 INFO L276 IsEmpty]: Start isEmpty. Operand 2560 states and 3013 transitions. [2024-12-06 06:20:07,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2024-12-06 06:20:07,563 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:07,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:07,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:07,829 INFO L134 CoverageAnalysis]: Checked inductivity of 369 backedges. 175 proven. 106 refuted. 0 times theorem prover too weak. 88 trivial. 0 not checked. [2024-12-06 06:20:08,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:08,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3016 states to 2563 states and 3016 transitions. [2024-12-06 06:20:08,482 INFO L276 IsEmpty]: Start isEmpty. Operand 2563 states and 3016 transitions. [2024-12-06 06:20:08,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2024-12-06 06:20:08,483 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:08,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:08,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:09,382 INFO L134 CoverageAnalysis]: Checked inductivity of 335 backedges. 228 proven. 38 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 06:20:12,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:12,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3045 states to 2588 states and 3045 transitions. [2024-12-06 06:20:12,055 INFO L276 IsEmpty]: Start isEmpty. Operand 2588 states and 3045 transitions. [2024-12-06 06:20:12,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2024-12-06 06:20:12,056 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:12,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:12,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:12,657 INFO L134 CoverageAnalysis]: Checked inductivity of 316 backedges. 175 proven. 141 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 06:20:18,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:18,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3122 states to 2659 states and 3122 transitions. [2024-12-06 06:20:18,433 INFO L276 IsEmpty]: Start isEmpty. Operand 2659 states and 3122 transitions. [2024-12-06 06:20:18,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2024-12-06 06:20:18,434 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:18,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:18,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:18,728 INFO L134 CoverageAnalysis]: Checked inductivity of 343 backedges. 186 proven. 111 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 06:20:19,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:19,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3129 states to 2666 states and 3129 transitions. [2024-12-06 06:20:19,061 INFO L276 IsEmpty]: Start isEmpty. Operand 2666 states and 3129 transitions. [2024-12-06 06:20:19,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2024-12-06 06:20:19,063 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:19,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:19,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:19,219 INFO L134 CoverageAnalysis]: Checked inductivity of 384 backedges. 251 proven. 64 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 06:20:20,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:20,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3141 states to 2674 states and 3141 transitions. [2024-12-06 06:20:20,607 INFO L276 IsEmpty]: Start isEmpty. Operand 2674 states and 3141 transitions. [2024-12-06 06:20:20,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2024-12-06 06:20:20,608 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:20,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:20,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:20,725 INFO L134 CoverageAnalysis]: Checked inductivity of 384 backedges. 251 proven. 64 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 06:20:21,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:21,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3142 states to 2676 states and 3142 transitions. [2024-12-06 06:20:21,414 INFO L276 IsEmpty]: Start isEmpty. Operand 2676 states and 3142 transitions. [2024-12-06 06:20:21,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2024-12-06 06:20:21,415 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:21,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:21,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:21,692 INFO L134 CoverageAnalysis]: Checked inductivity of 347 backedges. 185 proven. 152 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-12-06 06:20:23,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:23,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3175 states to 2707 states and 3175 transitions. [2024-12-06 06:20:23,845 INFO L276 IsEmpty]: Start isEmpty. Operand 2707 states and 3175 transitions. [2024-12-06 06:20:23,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 256 [2024-12-06 06:20:23,846 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:23,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:23,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 06:20:24,127 INFO L134 CoverageAnalysis]: Checked inductivity of 349 backedges. 189 proven. 114 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 06:20:24,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 06:20:24,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3179 states to 2710 states and 3179 transitions. [2024-12-06 06:20:24,372 INFO L276 IsEmpty]: Start isEmpty. Operand 2710 states and 3179 transitions. [2024-12-06 06:20:24,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 256 [2024-12-06 06:20:24,374 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 06:20:24,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 06:20:24,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 06:20:24,405 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-06 06:20:24,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 06:20:24,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 06:20:24,631 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-06 06:20:24,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 06:20:24,739 WARN L473 CodeCheckObserver]: This program is UNSAFE, Check terminated with 132 iterations. [2024-12-06 06:20:24,938 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck CFG 06.12 06:20:24 ImpRootNode [2024-12-06 06:20:24,938 INFO L131 PluginConnector]: ------------------------ END CodeCheck---------------------------- [2024-12-06 06:20:24,939 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-06 06:20:24,939 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-06 06:20:24,939 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-06 06:20:24,939 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 06:17:57" (3/4) ... [2024-12-06 06:20:24,940 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-12-06 06:20:25,085 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 265. [2024-12-06 06:20:25,216 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/witness.graphml [2024-12-06 06:20:25,217 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/witness.yml [2024-12-06 06:20:25,217 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-06 06:20:25,218 INFO L158 Benchmark]: Toolchain (without parser) took 149788.41ms. Allocated memory was 142.6MB in the beginning and 2.1GB in the end (delta: 2.0GB). Free memory was 115.6MB in the beginning and 1.9GB in the end (delta: -1.8GB). Peak memory consumption was 222.2MB. Max. memory is 16.1GB. [2024-12-06 06:20:25,218 INFO L158 Benchmark]: CDTParser took 0.27ms. Allocated memory is still 142.6MB. Free memory is still 83.6MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-06 06:20:25,218 INFO L158 Benchmark]: CACSL2BoogieTranslator took 486.74ms. Allocated memory is still 142.6MB. Free memory was 115.4MB in the beginning and 88.6MB in the end (delta: 26.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-12-06 06:20:25,218 INFO L158 Benchmark]: Boogie Procedure Inliner took 71.89ms. Allocated memory is still 142.6MB. Free memory was 88.6MB in the beginning and 83.1MB in the end (delta: 5.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-06 06:20:25,219 INFO L158 Benchmark]: Boogie Preprocessor took 57.13ms. Allocated memory is still 142.6MB. Free memory was 83.1MB in the beginning and 79.1MB in the end (delta: 3.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-06 06:20:25,219 INFO L158 Benchmark]: RCFGBuilder took 1362.47ms. Allocated memory is still 142.6MB. Free memory was 79.0MB in the beginning and 64.0MB in the end (delta: 15.0MB). Peak memory consumption was 35.5MB. Max. memory is 16.1GB. [2024-12-06 06:20:25,219 INFO L158 Benchmark]: CodeCheck took 147526.45ms. Allocated memory was 142.6MB in the beginning and 2.1GB in the end (delta: 2.0GB). Free memory was 64.0MB in the beginning and 1.9GB in the end (delta: -1.9GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. [2024-12-06 06:20:25,220 INFO L158 Benchmark]: Witness Printer took 278.22ms. Allocated memory is still 2.1GB. Free memory was 1.9GB in the beginning and 1.9GB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-12-06 06:20:25,221 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - StatisticsResult: Ultimate CodeCheck benchmark data CFG has 1 procedures, 76 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 147.3s, OverallIterations: 132, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 378266 SdHoareTripleChecker+Valid, 881.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 377225 mSDsluCounter, 65052 SdHoareTripleChecker+Invalid, 748.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 56295 mSDsCounter, 93839 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 814881 IncrementalHoareTripleChecker+Invalid, 908720 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 93839 mSolverCounterUnsat, 8757 mSDtfsCounter, 814881 mSolverCounterSat, 6.9s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 158292 GetRequests, 150563 SyntacticMatches, 6667 SemanticMatches, 1062 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 824233 ImplicationChecksByTransitivity, 100.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=-1occurred in iteration=-1, InterpolantAutomatonStates: 0, traceCheckStatistics: 0.7s SsaConstructionTime, 1.2s SatisfiabilityAnalysisTime, 27.2s InterpolantComputationTime, 24367 NumberOfCodeBlocks, 24367 NumberOfCodeBlocksAsserted, 132 NumberOfCheckSat, 23981 ConstructedInterpolants, 0 QuantifiedInterpolants, 148333 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 131 InterpolantComputations, 54 PerfectInterpolantSequences, 21313/26328 InterpolantCoveringCapability, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available - CounterExampleResult [Line: 435]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L17] int a= 1; [L18] int d= 4; [L19] int e= 5; [L20] int f= 6; [L21] int c= 3; [L22] int b= 2; [L25] int u = 21; [L26] int v = 22; [L27] int w = 23; [L28] int x = 24; [L29] int y = 25; [L30] int z = 26; [L32] int a17 = 1; [L33] int a7 = 0; [L34] int a20 = 1; [L35] int a8 = 15; [L36] int a12 = 8; [L37] int a16 = 5; [L38] int a21 = 1; [L590] int output = -1; VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND FALSE !((((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L283] COND FALSE !(((a7==1)&&((a8==13)&&((a12==8)&&(!(a21==1)&&((input==2)&&((((a20==1)&&!(a17==1))&&(a16==6))||(((a17==1)&&!(a20==1))&&(a16==4))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L288] COND FALSE !((((((((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15))&&(a16==6))&&(a21==1))||((((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))&&(a16==4))&&!(a21==1)))&&(input==6))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L296] COND FALSE !(((!(a7==1)&&(!(a17==1)&&(((((input==3)&&(a21==1))&&(a16==4))&&(a8==15))&&(a12==8))))&&!(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L302] COND FALSE !((((((a12==8)&&(((((a17==1)&&!(a20==1))&&(a16==4))||((((a20==1)&&!(a17==1))&&(a16==5))||((!(a17==1)&&(a20==1))&&(a16==6))))&&(input==3)))&&(a8==15))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L309] COND FALSE !((((!(a7==1)&&(((input==5)&&((((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a12==8)))&&(a21==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L316] COND FALSE !(((!(a7==1)&&(((a21==1)&&(((a17==1)&&((a12==8)&&(input==2)))&&!(a20==1)))&&(a16==6)))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L322] COND FALSE !(((!(a17==1)&&((a21==1)&&((!(a20==1)&&((a12==8)&&((input==3)&&!(a7==1))))&&(a8==15))))&&(a16==5))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L326] COND FALSE !((((a16==5)&&(!(a20==1)&&(((((input==6)&&(a21==1))&&(a17==1))&&!(a7==1))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L328] COND FALSE !((!(a7==1)&&((a17==1)&&(((a16==6)&&(!(a20==1)&&(((input==6)&&(a12==8))&&(a21==1))))&&(a8==15))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L334] COND FALSE !(((((a21==1)&&((a8==15)&&((a12==8)&&(!(a7==1)&&(!(a17==1)&&(input==2))))))&&(a16==4))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L339] COND FALSE !(((a8==15)&&(((a16==4)&&((a12==8)&&((!(a20==1)&&(!(a7==1)&&(input==1)))&&!(a17==1))))&&(a21==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L343] COND TRUE ((a21==1)&&(((a12==8)&&((((a17==1)&&((input==3)&&((a16==5)||(a16==6))))&&!(a7==1))&&(a20==1)))&&(a8==15))) [L344] a17 = 0 [L345] a16 = 4 [L346] return 21; VAL [\result=21, a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND TRUE (((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4)) [L279] a20 = 0 [L280] a17 = 1 [L281] a16 = 6 [L282] return 21; VAL [\result=21, a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND TRUE (((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6)) [L73] a17 = 0 [L74] return 26; VAL [\result=26, a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND FALSE !((((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L283] COND FALSE !(((a7==1)&&((a8==13)&&((a12==8)&&(!(a21==1)&&((input==2)&&((((a20==1)&&!(a17==1))&&(a16==6))||(((a17==1)&&!(a20==1))&&(a16==4))))))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L288] COND FALSE !((((((((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15))&&(a16==6))&&(a21==1))||((((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))&&(a16==4))&&!(a21==1)))&&(input==6))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L296] COND FALSE !(((!(a7==1)&&(!(a17==1)&&(((((input==3)&&(a21==1))&&(a16==4))&&(a8==15))&&(a12==8))))&&!(a20==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L302] COND FALSE !((((((a12==8)&&(((((a17==1)&&!(a20==1))&&(a16==4))||((((a20==1)&&!(a17==1))&&(a16==5))||((!(a17==1)&&(a20==1))&&(a16==6))))&&(input==3)))&&(a8==15))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L309] COND FALSE !((((!(a7==1)&&(((input==5)&&((((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a12==8)))&&(a21==1))&&(a8==15))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L316] COND FALSE !(((!(a7==1)&&(((a21==1)&&(((a17==1)&&((a12==8)&&(input==2)))&&!(a20==1)))&&(a16==6)))&&(a8==15))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L322] COND FALSE !(((!(a17==1)&&((a21==1)&&((!(a20==1)&&((a12==8)&&((input==3)&&!(a7==1))))&&(a8==15))))&&(a16==5))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L326] COND FALSE !((((a16==5)&&(!(a20==1)&&(((((input==6)&&(a21==1))&&(a17==1))&&!(a7==1))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L328] COND FALSE !((!(a7==1)&&((a17==1)&&(((a16==6)&&(!(a20==1)&&(((input==6)&&(a12==8))&&(a21==1))))&&(a8==15))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L334] COND FALSE !(((((a21==1)&&((a8==15)&&((a12==8)&&(!(a7==1)&&(!(a17==1)&&(input==2))))))&&(a16==4))&&(a20==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L339] COND FALSE !(((a8==15)&&(((a16==4)&&((a12==8)&&((!(a20==1)&&(!(a7==1)&&(input==1)))&&!(a17==1))))&&(a21==1)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L343] COND FALSE !(((a21==1)&&(((a12==8)&&((((a17==1)&&((input==3)&&((a16==5)||(a16==6))))&&!(a7==1))&&(a20==1)))&&(a8==15)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L347] COND FALSE !((!(a21==1)&&((a20==1)&&(((a12==8)&&((a8==13)&&((((a16==5)&&!(a17==1))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==2))))&&(a7==1))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L355] COND FALSE !(((a7==1)&&((a12==8)&&((((a20==1)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||((a16==4)&&!(a17==1))))&&(input==4)))&&(a8==13))&&!(a21==1))))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L363] COND FALSE !(((a21==1)&&((((!(a7==1)&&((a8==15)&&(!(a20==1)&&(input==4))))&&(a17==1))&&(a16==5))&&(a12==8)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L365] COND FALSE !((((!(a7==1)&&((!(a20==1)&&((a21==1)&&((input==3)&&(a17==1))))&&(a8==15)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L371] COND FALSE !(((((!(a17==1)&&(!(a20==1)&&((a8==15)&&((input==1)&&(a16==5)))))&&(a12==8))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L373] COND FALSE !(((((a21==1)&&((a8==15)&&(((a16==5)&&((a12==8)&&(input==1)))&&(a17==1))))&&!(a7==1))&&!(a20==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L375] COND FALSE !(((!(a21==1)&&((a20==1)&&((((a8==13)&&((a7==1)&&(input==5)))&&(a17==1))&&(a12==8))))&&(a16==5))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L382] COND FALSE !((((!(a7==1)&&((a21==1)&&((((input==6)&&(a20==1))&&(a8==15))&&!(a17==1))))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L387] COND FALSE !(((((a20==1)&&(((!(a21==1)&&((a7==1)&&(input==1)))&&(a8==13))&&(a17==1)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=5, u=21, v=22, w=23, x=24, y=25, z=26] [L392] COND TRUE ((a12==8)&&((input==5)&&((((((!(a17==1)&&!(a7==1))&&!(a20==1))&&(a8==15))&&(a16==6))&&(a21==1))||(!(a21==1)&&((a16==4)&&(((a20==1)&&((a7==1)&&(a17==1)))&&(a8==13))))))) [L393] a20 = 0 [L394] a21 = 1 [L395] a8 = 14 [L396] a17 = 0 [L397] a16 = 5 [L398] a7 = 1 [L399] return -1; VAL [\result=-1, a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND FALSE !((((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L283] COND FALSE !(((a7==1)&&((a8==13)&&((a12==8)&&(!(a21==1)&&((input==2)&&((((a20==1)&&!(a17==1))&&(a16==6))||(((a17==1)&&!(a20==1))&&(a16==4))))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L288] COND FALSE !((((((((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15))&&(a16==6))&&(a21==1))||((((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))&&(a16==4))&&!(a21==1)))&&(input==6))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L296] COND FALSE !(((!(a7==1)&&(!(a17==1)&&(((((input==3)&&(a21==1))&&(a16==4))&&(a8==15))&&(a12==8))))&&!(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L302] COND FALSE !((((((a12==8)&&(((((a17==1)&&!(a20==1))&&(a16==4))||((((a20==1)&&!(a17==1))&&(a16==5))||((!(a17==1)&&(a20==1))&&(a16==6))))&&(input==3)))&&(a8==15))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L309] COND FALSE !((((!(a7==1)&&(((input==5)&&((((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a12==8)))&&(a21==1))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L316] COND FALSE !(((!(a7==1)&&(((a21==1)&&(((a17==1)&&((a12==8)&&(input==2)))&&!(a20==1)))&&(a16==6)))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L322] COND FALSE !(((!(a17==1)&&((a21==1)&&((!(a20==1)&&((a12==8)&&((input==3)&&!(a7==1))))&&(a8==15))))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L326] COND FALSE !((((a16==5)&&(!(a20==1)&&(((((input==6)&&(a21==1))&&(a17==1))&&!(a7==1))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L328] COND FALSE !((!(a7==1)&&((a17==1)&&(((a16==6)&&(!(a20==1)&&(((input==6)&&(a12==8))&&(a21==1))))&&(a8==15))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L334] COND FALSE !(((((a21==1)&&((a8==15)&&((a12==8)&&(!(a7==1)&&(!(a17==1)&&(input==2))))))&&(a16==4))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L339] COND FALSE !(((a8==15)&&(((a16==4)&&((a12==8)&&((!(a20==1)&&(!(a7==1)&&(input==1)))&&!(a17==1))))&&(a21==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L343] COND FALSE !(((a21==1)&&(((a12==8)&&((((a17==1)&&((input==3)&&((a16==5)||(a16==6))))&&!(a7==1))&&(a20==1)))&&(a8==15)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L347] COND FALSE !((!(a21==1)&&((a20==1)&&(((a12==8)&&((a8==13)&&((((a16==5)&&!(a17==1))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==2))))&&(a7==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L355] COND FALSE !(((a7==1)&&((a12==8)&&((((a20==1)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||((a16==4)&&!(a17==1))))&&(input==4)))&&(a8==13))&&!(a21==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L363] COND FALSE !(((a21==1)&&((((!(a7==1)&&((a8==15)&&(!(a20==1)&&(input==4))))&&(a17==1))&&(a16==5))&&(a12==8)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L365] COND FALSE !((((!(a7==1)&&((!(a20==1)&&((a21==1)&&((input==3)&&(a17==1))))&&(a8==15)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L371] COND FALSE !(((((!(a17==1)&&(!(a20==1)&&((a8==15)&&((input==1)&&(a16==5)))))&&(a12==8))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L373] COND FALSE !(((((a21==1)&&((a8==15)&&(((a16==5)&&((a12==8)&&(input==1)))&&(a17==1))))&&!(a7==1))&&!(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L375] COND FALSE !(((!(a21==1)&&((a20==1)&&((((a8==13)&&((a7==1)&&(input==5)))&&(a17==1))&&(a12==8))))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L382] COND FALSE !((((!(a7==1)&&((a21==1)&&((((input==6)&&(a20==1))&&(a8==15))&&!(a17==1))))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L387] COND FALSE !(((((a20==1)&&(((!(a21==1)&&((a7==1)&&(input==1)))&&(a8==13))&&(a17==1)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L392] COND FALSE !(((a12==8)&&((input==5)&&((((((!(a17==1)&&!(a7==1))&&!(a20==1))&&(a8==15))&&(a16==6))&&(a21==1))||(!(a21==1)&&((a16==4)&&(((a20==1)&&((a7==1)&&(a17==1)))&&(a8==13)))))))) [L401] COND FALSE !(((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) [L404] COND FALSE !((((((((a17==1)&&!(a7==1))&&(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) [L407] COND FALSE !(((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==15))&&(a12==8))&&(a16==4))&&(a21==1))) [L410] COND FALSE !((((((((a17==1)&&!(a7==1))&&(a20==1))&&(a8==13))&&(a12==8))&&(a16==6))&&(a21==1))) [L413] COND FALSE !(((((((!(a17==1)&&!(a7==1))&&!(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) [L416] COND FALSE !(((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==15))&&(a12==8))&&(a16==5))&&(a21==1))) [L419] COND FALSE !(((((((!(a17==1)&&!(a7==1))&&!(a20==1))&&(a8==14))&&(a12==8))&&(a16==5))&&(a21==1))) [L422] COND FALSE !(((((((!(a17==1)&&!(a7==1))&&(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) [L425] COND FALSE !((((((((a17==1)&&!(a7==1))&&(a20==1))&&(a8==13))&&(a12==8))&&(a16==4))&&(a21==1))) [L428] COND FALSE !(((((((!(a17==1)&&(a7==1))&&(a20==1))&&(a8==14))&&(a12==8))&&(a16==5))&&(a21==1))) [L431] COND FALSE !(((((((!(a17==1)&&!(a7==1))&&(a20==1))&&(a8==13))&&(a12==8))&&(a16==4))&&(a21==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L434] COND TRUE ((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==14))&&(a12==8))&&(a16==5))&&(a21==1)) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L435] reach_error() VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=14, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27ms. Allocated memory is still 142.6MB. Free memory is still 83.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 486.74ms. Allocated memory is still 142.6MB. Free memory was 115.4MB in the beginning and 88.6MB in the end (delta: 26.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 71.89ms. Allocated memory is still 142.6MB. Free memory was 88.6MB in the beginning and 83.1MB in the end (delta: 5.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 57.13ms. Allocated memory is still 142.6MB. Free memory was 83.1MB in the beginning and 79.1MB in the end (delta: 3.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 1362.47ms. Allocated memory is still 142.6MB. Free memory was 79.0MB in the beginning and 64.0MB in the end (delta: 15.0MB). Peak memory consumption was 35.5MB. Max. memory is 16.1GB. * CodeCheck took 147526.45ms. Allocated memory was 142.6MB in the beginning and 2.1GB in the end (delta: 2.0GB). Free memory was 64.0MB in the beginning and 1.9GB in the end (delta: -1.9GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. * Witness Printer took 278.22ms. Allocated memory is still 2.1GB. Free memory was 1.9GB in the beginning and 1.9GB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. RESULT: Ultimate proved your program to be incorrect! [2024-12-06 06:20:25,243 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1e18acf2-8628-4c16-98f3-4c6b00f6507e/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE