./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/eca-rers2012/Problem01_label32.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/config/KojakReach.xml -i ../../sv-benchmarks/c/eca-rers2012/Problem01_label32.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/config/svcomp-Reach-32bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2b0b2a9797b90f95684a46496de9717e82eef5c31235380fd2859f2748d0f286 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-06 00:35:41,311 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-06 00:35:41,366 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/config/svcomp-Reach-32bit-Kojak_Default.epf [2024-12-06 00:35:41,371 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-06 00:35:41,371 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.Interpolating solver [2024-12-06 00:35:41,390 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-06 00:35:41,391 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-06 00:35:41,391 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ALWAYS [2024-12-06 00:35:41,392 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-06 00:35:41,392 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-06 00:35:41,392 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-06 00:35:41,392 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-06 00:35:41,392 INFO L153 SettingsManager]: * sizeof long=4 [2024-12-06 00:35:41,392 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * sizeof long double=12 [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-06 00:35:41,393 INFO L151 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * Timeout in seconds=1000000 [2024-12-06 00:35:41,393 INFO L153 SettingsManager]: * Theory for external solver=ALL [2024-12-06 00:35:41,394 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-06 00:35:41,394 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-12-06 00:35:41,394 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-06 00:35:41,394 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-06 00:35:41,394 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-06 00:35:41,394 INFO L153 SettingsManager]: * Trace refinement strategy=PENGUIN [2024-12-06 00:35:41,394 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-06 00:35:41,394 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2b0b2a9797b90f95684a46496de9717e82eef5c31235380fd2859f2748d0f286 [2024-12-06 00:35:41,629 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-06 00:35:41,637 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-06 00:35:41,639 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-06 00:35:41,641 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-06 00:35:41,641 INFO L274 PluginConnector]: CDTParser initialized [2024-12-06 00:35:41,642 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/../../sv-benchmarks/c/eca-rers2012/Problem01_label32.c [2024-12-06 00:35:44,271 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/data/ae79ca8ad/2ee90adbae8c4c039f3b4bfc4fdc1480/FLAGa8744d4ac [2024-12-06 00:35:44,530 INFO L384 CDTParser]: Found 1 translation units. [2024-12-06 00:35:44,530 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/sv-benchmarks/c/eca-rers2012/Problem01_label32.c [2024-12-06 00:35:44,542 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/data/ae79ca8ad/2ee90adbae8c4c039f3b4bfc4fdc1480/FLAGa8744d4ac [2024-12-06 00:35:44,555 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/data/ae79ca8ad/2ee90adbae8c4c039f3b4bfc4fdc1480 [2024-12-06 00:35:44,557 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-06 00:35:44,558 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-06 00:35:44,559 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-06 00:35:44,559 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-06 00:35:44,562 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-06 00:35:44,563 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:44,564 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4afb935c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44, skipping insertion in model container [2024-12-06 00:35:44,564 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:44,592 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-06 00:35:44,796 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/sv-benchmarks/c/eca-rers2012/Problem01_label32.c[14752,14765] [2024-12-06 00:35:44,828 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-06 00:35:44,836 INFO L200 MainTranslator]: Completed pre-run [2024-12-06 00:35:44,889 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/sv-benchmarks/c/eca-rers2012/Problem01_label32.c[14752,14765] [2024-12-06 00:35:44,905 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-06 00:35:44,917 INFO L204 MainTranslator]: Completed translation [2024-12-06 00:35:44,917 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44 WrapperNode [2024-12-06 00:35:44,917 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-06 00:35:44,918 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-06 00:35:44,918 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-06 00:35:44,918 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-06 00:35:44,923 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:44,935 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:44,971 INFO L138 Inliner]: procedures = 14, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 657 [2024-12-06 00:35:44,972 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-06 00:35:44,972 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-06 00:35:44,972 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-06 00:35:44,972 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-06 00:35:44,979 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:44,980 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:44,983 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:44,983 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:45,001 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:45,003 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:45,010 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:45,015 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:45,018 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:45,024 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-06 00:35:45,025 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-06 00:35:45,025 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-06 00:35:45,025 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-06 00:35:45,026 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 12:35:44" (1/1) ... [2024-12-06 00:35:45,030 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-12-06 00:35:45,039 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/z3 [2024-12-06 00:35:45,049 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) [2024-12-06 00:35:45,053 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Waiting until timeout for monitored process [2024-12-06 00:35:45,072 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-06 00:35:45,072 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-12-06 00:35:45,072 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-06 00:35:45,072 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-06 00:35:45,122 INFO L234 CfgBuilder]: Building ICFG [2024-12-06 00:35:45,124 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-06 00:35:45,930 INFO L? ?]: Removed 75 outVars from TransFormulas that were not future-live. [2024-12-06 00:35:45,930 INFO L283 CfgBuilder]: Performing block encoding [2024-12-06 00:35:46,109 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-06 00:35:46,109 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-12-06 00:35:46,109 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 12:35:46 BoogieIcfgContainer [2024-12-06 00:35:46,109 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-06 00:35:46,110 INFO L112 PluginConnector]: ------------------------CodeCheck---------------------------- [2024-12-06 00:35:46,110 INFO L270 PluginConnector]: Initializing CodeCheck... [2024-12-06 00:35:46,117 INFO L274 PluginConnector]: CodeCheck initialized [2024-12-06 00:35:46,117 INFO L184 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 12:35:46" (1/1) ... [2024-12-06 00:35:46,123 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-06 00:35:46,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:46,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 76 states and 144 transitions. [2024-12-06 00:35:46,161 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 144 transitions. [2024-12-06 00:35:46,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2024-12-06 00:35:46,163 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:46,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:46,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:46,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:47,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:47,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 145 states and 231 transitions. [2024-12-06 00:35:47,023 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 231 transitions. [2024-12-06 00:35:47,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2024-12-06 00:35:47,025 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:47,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:47,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:47,262 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:47,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:47,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 215 states and 304 transitions. [2024-12-06 00:35:47,970 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 304 transitions. [2024-12-06 00:35:47,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2024-12-06 00:35:47,972 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:47,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:48,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:48,121 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 00:35:48,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:48,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 216 states and 305 transitions. [2024-12-06 00:35:48,275 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 305 transitions. [2024-12-06 00:35:48,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2024-12-06 00:35:48,277 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:48,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:48,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:48,424 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:48,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:48,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 236 states and 328 transitions. [2024-12-06 00:35:48,611 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 328 transitions. [2024-12-06 00:35:48,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2024-12-06 00:35:48,612 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:48,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:48,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:48,726 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 00:35:48,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:48,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330 states to 237 states and 330 transitions. [2024-12-06 00:35:48,885 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 330 transitions. [2024-12-06 00:35:48,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2024-12-06 00:35:48,888 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:48,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:48,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:48,982 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 00:35:49,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:49,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 262 states and 361 transitions. [2024-12-06 00:35:49,361 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 361 transitions. [2024-12-06 00:35:49,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2024-12-06 00:35:49,362 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:49,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:49,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:49,475 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:49,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:49,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 288 states and 392 transitions. [2024-12-06 00:35:49,848 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 392 transitions. [2024-12-06 00:35:49,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-12-06 00:35:49,849 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:49,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:49,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:49,922 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 00:35:50,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:50,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 309 states and 416 transitions. [2024-12-06 00:35:50,249 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 416 transitions. [2024-12-06 00:35:50,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2024-12-06 00:35:50,250 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:50,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:50,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:50,432 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:50,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:50,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 443 states to 334 states and 443 transitions. [2024-12-06 00:35:50,809 INFO L276 IsEmpty]: Start isEmpty. Operand 334 states and 443 transitions. [2024-12-06 00:35:50,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-12-06 00:35:50,811 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:50,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:50,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:50,893 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 00:35:51,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:51,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 335 states and 445 transitions. [2024-12-06 00:35:51,017 INFO L276 IsEmpty]: Start isEmpty. Operand 335 states and 445 transitions. [2024-12-06 00:35:51,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2024-12-06 00:35:51,018 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:51,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:51,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:51,087 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 00:35:51,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:51,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 338 states and 449 transitions. [2024-12-06 00:35:51,157 INFO L276 IsEmpty]: Start isEmpty. Operand 338 states and 449 transitions. [2024-12-06 00:35:51,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2024-12-06 00:35:51,158 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:51,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:51,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:51,259 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-12-06 00:35:51,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:51,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 463 states to 347 states and 463 transitions. [2024-12-06 00:35:51,568 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 463 transitions. [2024-12-06 00:35:51,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2024-12-06 00:35:51,569 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:51,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:51,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:51,709 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:51,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:51,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 469 states to 353 states and 469 transitions. [2024-12-06 00:35:51,774 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 469 transitions. [2024-12-06 00:35:51,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2024-12-06 00:35:51,775 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:51,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:51,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:51,903 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 00:35:52,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:52,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 492 states to 374 states and 492 transitions. [2024-12-06 00:35:52,285 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 492 transitions. [2024-12-06 00:35:52,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2024-12-06 00:35:52,286 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:52,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:52,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:52,355 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:52,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:52,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 512 states to 392 states and 512 transitions. [2024-12-06 00:35:52,513 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 512 transitions. [2024-12-06 00:35:52,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2024-12-06 00:35:52,513 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:52,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:52,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:52,556 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:52,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:52,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 528 states to 406 states and 528 transitions. [2024-12-06 00:35:52,643 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 528 transitions. [2024-12-06 00:35:52,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-12-06 00:35:52,644 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:52,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:52,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:52,696 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:52,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:52,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 412 states and 535 transitions. [2024-12-06 00:35:52,761 INFO L276 IsEmpty]: Start isEmpty. Operand 412 states and 535 transitions. [2024-12-06 00:35:52,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-12-06 00:35:52,762 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:52,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:52,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:52,821 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:53,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:53,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 577 states to 450 states and 577 transitions. [2024-12-06 00:35:53,315 INFO L276 IsEmpty]: Start isEmpty. Operand 450 states and 577 transitions. [2024-12-06 00:35:53,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-12-06 00:35:53,317 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:53,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:53,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:53,384 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 00:35:53,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:53,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 589 states to 462 states and 589 transitions. [2024-12-06 00:35:53,631 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 589 transitions. [2024-12-06 00:35:53,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-12-06 00:35:53,633 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:53,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:53,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:53,744 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:53,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:53,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 604 states to 475 states and 604 transitions. [2024-12-06 00:35:53,879 INFO L276 IsEmpty]: Start isEmpty. Operand 475 states and 604 transitions. [2024-12-06 00:35:53,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-12-06 00:35:53,880 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:53,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:53,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:53,970 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:54,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:54,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 612 states to 481 states and 612 transitions. [2024-12-06 00:35:54,087 INFO L276 IsEmpty]: Start isEmpty. Operand 481 states and 612 transitions. [2024-12-06 00:35:54,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-12-06 00:35:54,088 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:54,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:54,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:54,224 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-06 00:35:54,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:54,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 644 states to 510 states and 644 transitions. [2024-12-06 00:35:54,643 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 644 transitions. [2024-12-06 00:35:54,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-12-06 00:35:54,644 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:54,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:54,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:54,759 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 00:35:54,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:54,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 654 states to 520 states and 654 transitions. [2024-12-06 00:35:54,946 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 654 transitions. [2024-12-06 00:35:54,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2024-12-06 00:35:54,947 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:54,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:54,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:54,988 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 00:35:55,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:55,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 679 states to 544 states and 679 transitions. [2024-12-06 00:35:55,097 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 679 transitions. [2024-12-06 00:35:55,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-12-06 00:35:55,098 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:55,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:55,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:55,201 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 79 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:35:55,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:55,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 706 states to 566 states and 706 transitions. [2024-12-06 00:35:55,532 INFO L276 IsEmpty]: Start isEmpty. Operand 566 states and 706 transitions. [2024-12-06 00:35:55,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2024-12-06 00:35:55,533 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:55,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:55,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:55,577 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 63 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-12-06 00:35:55,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:55,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 708 states to 567 states and 708 transitions. [2024-12-06 00:35:55,725 INFO L276 IsEmpty]: Start isEmpty. Operand 567 states and 708 transitions. [2024-12-06 00:35:55,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2024-12-06 00:35:55,726 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:55,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:55,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:55,828 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 64 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-12-06 00:35:56,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:56,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 816 states to 666 states and 816 transitions. [2024-12-06 00:35:56,886 INFO L276 IsEmpty]: Start isEmpty. Operand 666 states and 816 transitions. [2024-12-06 00:35:56,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2024-12-06 00:35:56,887 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:56,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:56,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:57,094 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 78 proven. 10 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:35:57,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:57,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 861 states to 703 states and 861 transitions. [2024-12-06 00:35:57,516 INFO L276 IsEmpty]: Start isEmpty. Operand 703 states and 861 transitions. [2024-12-06 00:35:57,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2024-12-06 00:35:57,517 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:57,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:57,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:57,582 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 00:35:57,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:57,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 868 states to 704 states and 868 transitions. [2024-12-06 00:35:57,623 INFO L276 IsEmpty]: Start isEmpty. Operand 704 states and 868 transitions. [2024-12-06 00:35:57,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2024-12-06 00:35:57,624 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:57,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:57,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:57,717 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-12-06 00:35:57,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:57,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 868 states to 705 states and 868 transitions. [2024-12-06 00:35:57,816 INFO L276 IsEmpty]: Start isEmpty. Operand 705 states and 868 transitions. [2024-12-06 00:35:57,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2024-12-06 00:35:57,817 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:57,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:57,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:57,877 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 76 proven. 0 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-12-06 00:35:58,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:58,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 887 states to 722 states and 887 transitions. [2024-12-06 00:35:58,119 INFO L276 IsEmpty]: Start isEmpty. Operand 722 states and 887 transitions. [2024-12-06 00:35:58,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-12-06 00:35:58,119 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:58,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:58,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:58,192 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-12-06 00:35:58,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:58,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 896 states to 730 states and 896 transitions. [2024-12-06 00:35:58,390 INFO L276 IsEmpty]: Start isEmpty. Operand 730 states and 896 transitions. [2024-12-06 00:35:58,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-12-06 00:35:58,391 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:58,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:58,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:58,466 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-12-06 00:35:58,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:58,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 900 states to 734 states and 900 transitions. [2024-12-06 00:35:58,575 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 900 transitions. [2024-12-06 00:35:58,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2024-12-06 00:35:58,575 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:58,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:58,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:58,636 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 81 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-12-06 00:35:58,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:35:58,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 914 states to 748 states and 914 transitions. [2024-12-06 00:35:58,821 INFO L276 IsEmpty]: Start isEmpty. Operand 748 states and 914 transitions. [2024-12-06 00:35:58,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-06 00:35:58,822 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:35:58,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:35:58,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:35:59,261 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:00,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:00,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1016 states to 832 states and 1016 transitions. [2024-12-06 00:36:00,762 INFO L276 IsEmpty]: Start isEmpty. Operand 832 states and 1016 transitions. [2024-12-06 00:36:00,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-06 00:36:00,763 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:00,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:00,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:00,822 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:00,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:00,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1039 states to 853 states and 1039 transitions. [2024-12-06 00:36:00,940 INFO L276 IsEmpty]: Start isEmpty. Operand 853 states and 1039 transitions. [2024-12-06 00:36:00,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2024-12-06 00:36:00,941 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:00,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:00,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:01,084 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 80 proven. 3 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2024-12-06 00:36:01,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:01,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1039 states to 854 states and 1039 transitions. [2024-12-06 00:36:01,300 INFO L276 IsEmpty]: Start isEmpty. Operand 854 states and 1039 transitions. [2024-12-06 00:36:01,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2024-12-06 00:36:01,301 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:01,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:01,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:01,371 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 87 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:01,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:01,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1080 states to 885 states and 1080 transitions. [2024-12-06 00:36:01,874 INFO L276 IsEmpty]: Start isEmpty. Operand 885 states and 1080 transitions. [2024-12-06 00:36:01,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2024-12-06 00:36:01,875 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:01,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:01,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:01,996 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:02,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:02,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1112 states to 913 states and 1112 transitions. [2024-12-06 00:36:02,579 INFO L276 IsEmpty]: Start isEmpty. Operand 913 states and 1112 transitions. [2024-12-06 00:36:02,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-12-06 00:36:02,580 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:02,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:02,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:02,630 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2024-12-06 00:36:02,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:02,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1113 states to 915 states and 1113 transitions. [2024-12-06 00:36:02,734 INFO L276 IsEmpty]: Start isEmpty. Operand 915 states and 1113 transitions. [2024-12-06 00:36:02,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2024-12-06 00:36:02,734 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:02,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:02,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:02,834 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 92 proven. 0 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2024-12-06 00:36:03,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:03,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1115 states to 916 states and 1115 transitions. [2024-12-06 00:36:03,144 INFO L276 IsEmpty]: Start isEmpty. Operand 916 states and 1115 transitions. [2024-12-06 00:36:03,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2024-12-06 00:36:03,145 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:03,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:03,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:03,551 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 90 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:05,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:05,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1208 states to 1000 states and 1208 transitions. [2024-12-06 00:36:05,526 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1208 transitions. [2024-12-06 00:36:05,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2024-12-06 00:36:05,527 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:05,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:05,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:05,927 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 96 proven. 3 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:07,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:07,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1290 states to 1069 states and 1290 transitions. [2024-12-06 00:36:07,665 INFO L276 IsEmpty]: Start isEmpty. Operand 1069 states and 1290 transitions. [2024-12-06 00:36:07,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2024-12-06 00:36:07,666 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:07,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:07,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:07,752 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 105 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:07,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:07,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1317 states to 1090 states and 1317 transitions. [2024-12-06 00:36:07,923 INFO L276 IsEmpty]: Start isEmpty. Operand 1090 states and 1317 transitions. [2024-12-06 00:36:07,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2024-12-06 00:36:07,924 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:07,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:07,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:08,006 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 94 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-12-06 00:36:08,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:08,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1354 states to 1127 states and 1354 transitions. [2024-12-06 00:36:08,608 INFO L276 IsEmpty]: Start isEmpty. Operand 1127 states and 1354 transitions. [2024-12-06 00:36:08,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-12-06 00:36:08,609 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:08,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:08,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:09,143 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 94 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:11,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:11,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1447 states to 1202 states and 1447 transitions. [2024-12-06 00:36:11,606 INFO L276 IsEmpty]: Start isEmpty. Operand 1202 states and 1447 transitions. [2024-12-06 00:36:11,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-12-06 00:36:11,607 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:11,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:11,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:11,680 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 107 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:11,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:11,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1451 states to 1204 states and 1451 transitions. [2024-12-06 00:36:11,985 INFO L276 IsEmpty]: Start isEmpty. Operand 1204 states and 1451 transitions. [2024-12-06 00:36:11,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2024-12-06 00:36:11,987 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:11,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:12,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:12,187 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 143 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:12,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:12,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1451 states to 1205 states and 1451 transitions. [2024-12-06 00:36:12,493 INFO L276 IsEmpty]: Start isEmpty. Operand 1205 states and 1451 transitions. [2024-12-06 00:36:12,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2024-12-06 00:36:12,495 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:12,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:12,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:12,823 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 109 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:14,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:14,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1520 states to 1273 states and 1520 transitions. [2024-12-06 00:36:14,143 INFO L276 IsEmpty]: Start isEmpty. Operand 1273 states and 1520 transitions. [2024-12-06 00:36:14,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2024-12-06 00:36:14,144 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:14,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:14,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:14,339 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 109 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:14,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:14,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1522 states to 1276 states and 1522 transitions. [2024-12-06 00:36:14,777 INFO L276 IsEmpty]: Start isEmpty. Operand 1276 states and 1522 transitions. [2024-12-06 00:36:14,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-12-06 00:36:14,777 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:14,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:14,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:15,076 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 99 proven. 51 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-12-06 00:36:15,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:15,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1541 states to 1291 states and 1541 transitions. [2024-12-06 00:36:15,568 INFO L276 IsEmpty]: Start isEmpty. Operand 1291 states and 1541 transitions. [2024-12-06 00:36:15,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-12-06 00:36:15,568 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:15,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:15,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:15,625 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 100 proven. 0 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-12-06 00:36:15,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:15,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1546 states to 1292 states and 1546 transitions. [2024-12-06 00:36:15,903 INFO L276 IsEmpty]: Start isEmpty. Operand 1292 states and 1546 transitions. [2024-12-06 00:36:15,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2024-12-06 00:36:15,904 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:15,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:15,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:15,970 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 103 proven. 0 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2024-12-06 00:36:16,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:16,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1547 states to 1293 states and 1547 transitions. [2024-12-06 00:36:16,172 INFO L276 IsEmpty]: Start isEmpty. Operand 1293 states and 1547 transitions. [2024-12-06 00:36:16,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2024-12-06 00:36:16,173 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:16,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:16,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:16,457 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 119 proven. 6 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-12-06 00:36:16,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:16,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1548 states to 1294 states and 1548 transitions. [2024-12-06 00:36:16,931 INFO L276 IsEmpty]: Start isEmpty. Operand 1294 states and 1548 transitions. [2024-12-06 00:36:16,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2024-12-06 00:36:16,932 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:16,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:16,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:16,985 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 106 proven. 0 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2024-12-06 00:36:17,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:17,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1559 states to 1301 states and 1559 transitions. [2024-12-06 00:36:17,350 INFO L276 IsEmpty]: Start isEmpty. Operand 1301 states and 1559 transitions. [2024-12-06 00:36:17,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2024-12-06 00:36:17,351 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:17,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:17,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:17,568 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 168 proven. 9 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-12-06 00:36:18,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:18,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1571 states to 1312 states and 1571 transitions. [2024-12-06 00:36:18,220 INFO L276 IsEmpty]: Start isEmpty. Operand 1312 states and 1571 transitions. [2024-12-06 00:36:18,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2024-12-06 00:36:18,222 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:18,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:18,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:18,323 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 144 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-12-06 00:36:18,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:18,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1572 states to 1313 states and 1572 transitions. [2024-12-06 00:36:18,619 INFO L276 IsEmpty]: Start isEmpty. Operand 1313 states and 1572 transitions. [2024-12-06 00:36:18,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2024-12-06 00:36:18,620 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:18,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:18,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:18,746 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 202 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-12-06 00:36:20,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:20,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1631 states to 1358 states and 1631 transitions. [2024-12-06 00:36:20,166 INFO L276 IsEmpty]: Start isEmpty. Operand 1358 states and 1631 transitions. [2024-12-06 00:36:20,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2024-12-06 00:36:20,167 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:20,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:20,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:20,295 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 202 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-12-06 00:36:20,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:20,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1638 states to 1366 states and 1638 transitions. [2024-12-06 00:36:20,617 INFO L276 IsEmpty]: Start isEmpty. Operand 1366 states and 1638 transitions. [2024-12-06 00:36:20,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2024-12-06 00:36:20,618 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:20,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:20,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:20,854 INFO L134 CoverageAnalysis]: Checked inductivity of 268 backedges. 198 proven. 0 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-12-06 00:36:21,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:21,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1658 states to 1381 states and 1658 transitions. [2024-12-06 00:36:21,755 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1658 transitions. [2024-12-06 00:36:21,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2024-12-06 00:36:21,756 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:21,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:21,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:21,814 INFO L134 CoverageAnalysis]: Checked inductivity of 202 backedges. 181 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:23,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:23,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1707 states to 1417 states and 1707 transitions. [2024-12-06 00:36:23,644 INFO L276 IsEmpty]: Start isEmpty. Operand 1417 states and 1707 transitions. [2024-12-06 00:36:23,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2024-12-06 00:36:23,645 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:23,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:23,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:23,722 INFO L134 CoverageAnalysis]: Checked inductivity of 202 backedges. 181 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:24,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:24,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1728 states to 1435 states and 1728 transitions. [2024-12-06 00:36:24,083 INFO L276 IsEmpty]: Start isEmpty. Operand 1435 states and 1728 transitions. [2024-12-06 00:36:24,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2024-12-06 00:36:24,084 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:24,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:24,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:24,349 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 188 proven. 6 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2024-12-06 00:36:24,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:24,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1736 states to 1443 states and 1736 transitions. [2024-12-06 00:36:24,773 INFO L276 IsEmpty]: Start isEmpty. Operand 1443 states and 1736 transitions. [2024-12-06 00:36:24,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2024-12-06 00:36:24,775 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:24,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:24,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:25,172 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 127 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:28,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:28,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1786 states to 1482 states and 1786 transitions. [2024-12-06 00:36:28,019 INFO L276 IsEmpty]: Start isEmpty. Operand 1482 states and 1786 transitions. [2024-12-06 00:36:28,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2024-12-06 00:36:28,020 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:28,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:28,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:28,222 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 127 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:28,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:28,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1806 states to 1500 states and 1806 transitions. [2024-12-06 00:36:28,762 INFO L276 IsEmpty]: Start isEmpty. Operand 1500 states and 1806 transitions. [2024-12-06 00:36:28,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2024-12-06 00:36:28,763 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:28,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:28,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:28,967 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 127 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:29,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:29,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1828 states to 1519 states and 1828 transitions. [2024-12-06 00:36:29,766 INFO L276 IsEmpty]: Start isEmpty. Operand 1519 states and 1828 transitions. [2024-12-06 00:36:29,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2024-12-06 00:36:29,767 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:29,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:29,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:29,968 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 127 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:30,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:30,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1829 states to 1521 states and 1829 transitions. [2024-12-06 00:36:30,425 INFO L276 IsEmpty]: Start isEmpty. Operand 1521 states and 1829 transitions. [2024-12-06 00:36:30,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2024-12-06 00:36:30,426 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:30,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:30,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:30,525 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 100 proven. 0 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-12-06 00:36:30,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:30,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1829 states to 1522 states and 1829 transitions. [2024-12-06 00:36:30,611 INFO L276 IsEmpty]: Start isEmpty. Operand 1522 states and 1829 transitions. [2024-12-06 00:36:30,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-06 00:36:30,613 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:30,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:30,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:31,219 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 143 proven. 94 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:33,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:33,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1973 states to 1639 states and 1973 transitions. [2024-12-06 00:36:33,707 INFO L276 IsEmpty]: Start isEmpty. Operand 1639 states and 1973 transitions. [2024-12-06 00:36:33,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-06 00:36:33,708 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:33,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:33,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:33,939 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 143 proven. 94 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:34,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:34,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1987 states to 1654 states and 1987 transitions. [2024-12-06 00:36:34,496 INFO L276 IsEmpty]: Start isEmpty. Operand 1654 states and 1987 transitions. [2024-12-06 00:36:34,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2024-12-06 00:36:34,497 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:34,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:34,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:34,762 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 207 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-12-06 00:36:35,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:35,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2013 states to 1675 states and 2013 transitions. [2024-12-06 00:36:35,876 INFO L276 IsEmpty]: Start isEmpty. Operand 1675 states and 2013 transitions. [2024-12-06 00:36:35,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2024-12-06 00:36:35,878 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:35,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:35,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:35,989 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 225 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:37,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:37,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2036 states to 1694 states and 2036 transitions. [2024-12-06 00:36:37,322 INFO L276 IsEmpty]: Start isEmpty. Operand 1694 states and 2036 transitions. [2024-12-06 00:36:37,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2024-12-06 00:36:37,323 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:37,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:37,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:37,384 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 225 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:36:38,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:38,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2055 states to 1710 states and 2055 transitions. [2024-12-06 00:36:38,102 INFO L276 IsEmpty]: Start isEmpty. Operand 1710 states and 2055 transitions. [2024-12-06 00:36:38,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-06 00:36:38,103 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:38,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:38,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:38,558 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 149 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:41,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:41,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2098 states to 1745 states and 2098 transitions. [2024-12-06 00:36:41,197 INFO L276 IsEmpty]: Start isEmpty. Operand 1745 states and 2098 transitions. [2024-12-06 00:36:41,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-06 00:36:41,198 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:41,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:41,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:41,466 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 149 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:43,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:43,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2141 states to 1781 states and 2141 transitions. [2024-12-06 00:36:43,809 INFO L276 IsEmpty]: Start isEmpty. Operand 1781 states and 2141 transitions. [2024-12-06 00:36:43,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-06 00:36:43,810 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:43,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:43,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:44,057 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 149 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:45,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:45,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2162 states to 1799 states and 2162 transitions. [2024-12-06 00:36:45,387 INFO L276 IsEmpty]: Start isEmpty. Operand 1799 states and 2162 transitions. [2024-12-06 00:36:45,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-06 00:36:45,388 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:45,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:45,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:45,630 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 149 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:46,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:46,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2180 states to 1817 states and 2180 transitions. [2024-12-06 00:36:46,268 INFO L276 IsEmpty]: Start isEmpty. Operand 1817 states and 2180 transitions. [2024-12-06 00:36:46,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-06 00:36:46,269 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:46,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:46,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:46,509 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 149 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:47,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:47,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2198 states to 1835 states and 2198 transitions. [2024-12-06 00:36:47,166 INFO L276 IsEmpty]: Start isEmpty. Operand 1835 states and 2198 transitions. [2024-12-06 00:36:47,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-06 00:36:47,167 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:47,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:47,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:47,381 INFO L134 CoverageAnalysis]: Checked inductivity of 268 backedges. 151 proven. 117 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:49,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:49,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2257 states to 1879 states and 2257 transitions. [2024-12-06 00:36:49,048 INFO L276 IsEmpty]: Start isEmpty. Operand 1879 states and 2257 transitions. [2024-12-06 00:36:49,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-06 00:36:49,049 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:49,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:49,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:49,353 INFO L134 CoverageAnalysis]: Checked inductivity of 268 backedges. 151 proven. 117 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:49,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:49,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2264 states to 1887 states and 2264 transitions. [2024-12-06 00:36:49,943 INFO L276 IsEmpty]: Start isEmpty. Operand 1887 states and 2264 transitions. [2024-12-06 00:36:49,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-06 00:36:49,944 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:49,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:49,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:50,495 INFO L134 CoverageAnalysis]: Checked inductivity of 318 backedges. 172 proven. 137 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-12-06 00:36:53,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:53,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2342 states to 1954 states and 2342 transitions. [2024-12-06 00:36:53,070 INFO L276 IsEmpty]: Start isEmpty. Operand 1954 states and 2342 transitions. [2024-12-06 00:36:53,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-12-06 00:36:53,071 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:53,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:53,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:53,546 INFO L134 CoverageAnalysis]: Checked inductivity of 274 backedges. 154 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:56,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:56,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2382 states to 1988 states and 2382 transitions. [2024-12-06 00:36:56,527 INFO L276 IsEmpty]: Start isEmpty. Operand 1988 states and 2382 transitions. [2024-12-06 00:36:56,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-12-06 00:36:56,528 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:56,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:56,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:56,831 INFO L134 CoverageAnalysis]: Checked inductivity of 274 backedges. 154 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:58,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:58,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2412 states to 2016 states and 2412 transitions. [2024-12-06 00:36:58,464 INFO L276 IsEmpty]: Start isEmpty. Operand 2016 states and 2412 transitions. [2024-12-06 00:36:58,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-12-06 00:36:58,465 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:58,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:58,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:36:58,764 INFO L134 CoverageAnalysis]: Checked inductivity of 274 backedges. 154 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 00:36:59,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:36:59,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2432 states to 2036 states and 2432 transitions. [2024-12-06 00:36:59,958 INFO L276 IsEmpty]: Start isEmpty. Operand 2036 states and 2432 transitions. [2024-12-06 00:36:59,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2024-12-06 00:36:59,960 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:36:59,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:36:59,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:00,067 INFO L134 CoverageAnalysis]: Checked inductivity of 318 backedges. 265 proven. 0 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-12-06 00:37:00,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:00,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2433 states to 2037 states and 2433 transitions. [2024-12-06 00:37:00,496 INFO L276 IsEmpty]: Start isEmpty. Operand 2037 states and 2433 transitions. [2024-12-06 00:37:00,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2024-12-06 00:37:00,497 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:00,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:00,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:00,687 INFO L134 CoverageAnalysis]: Checked inductivity of 266 backedges. 178 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:37:01,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:01,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2485 states to 2085 states and 2485 transitions. [2024-12-06 00:37:01,987 INFO L276 IsEmpty]: Start isEmpty. Operand 2085 states and 2485 transitions. [2024-12-06 00:37:01,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-12-06 00:37:01,988 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:01,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:02,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:02,422 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 159 proven. 130 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-06 00:37:08,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:08,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2595 states to 2173 states and 2595 transitions. [2024-12-06 00:37:08,864 INFO L276 IsEmpty]: Start isEmpty. Operand 2173 states and 2595 transitions. [2024-12-06 00:37:08,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-12-06 00:37:08,866 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:08,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:08,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:09,183 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 159 proven. 130 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-06 00:37:11,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:11,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2616 states to 2189 states and 2616 transitions. [2024-12-06 00:37:11,754 INFO L276 IsEmpty]: Start isEmpty. Operand 2189 states and 2616 transitions. [2024-12-06 00:37:11,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-12-06 00:37:11,755 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:11,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:11,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:12,073 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 159 proven. 130 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-06 00:37:13,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:13,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2636 states to 2209 states and 2636 transitions. [2024-12-06 00:37:13,607 INFO L276 IsEmpty]: Start isEmpty. Operand 2209 states and 2636 transitions. [2024-12-06 00:37:13,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-12-06 00:37:13,609 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:13,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:13,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:13,857 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 159 proven. 130 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-12-06 00:37:14,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:14,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2655 states to 2227 states and 2655 transitions. [2024-12-06 00:37:14,748 INFO L276 IsEmpty]: Start isEmpty. Operand 2227 states and 2655 transitions. [2024-12-06 00:37:14,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-12-06 00:37:14,750 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:14,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:14,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:15,142 INFO L134 CoverageAnalysis]: Checked inductivity of 271 backedges. 160 proven. 104 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-12-06 00:37:19,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:19,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2692 states to 2262 states and 2692 transitions. [2024-12-06 00:37:19,327 INFO L276 IsEmpty]: Start isEmpty. Operand 2262 states and 2692 transitions. [2024-12-06 00:37:19,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-12-06 00:37:19,329 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:19,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:19,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:19,719 INFO L134 CoverageAnalysis]: Checked inductivity of 271 backedges. 160 proven. 104 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-12-06 00:37:22,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:22,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2760 states to 2329 states and 2760 transitions. [2024-12-06 00:37:22,403 INFO L276 IsEmpty]: Start isEmpty. Operand 2329 states and 2760 transitions. [2024-12-06 00:37:22,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-06 00:37:22,404 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:22,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:22,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:22,634 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 164 proven. 101 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:37:25,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:25,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2836 states to 2399 states and 2836 transitions. [2024-12-06 00:37:25,461 INFO L276 IsEmpty]: Start isEmpty. Operand 2399 states and 2836 transitions. [2024-12-06 00:37:25,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-06 00:37:25,463 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:25,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:25,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:25,691 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 164 proven. 101 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 00:37:27,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:27,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2890 states to 2451 states and 2890 transitions. [2024-12-06 00:37:27,395 INFO L276 IsEmpty]: Start isEmpty. Operand 2451 states and 2890 transitions. [2024-12-06 00:37:27,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-06 00:37:27,396 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:27,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:27,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:27,564 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 267 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-12-06 00:37:28,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:28,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2902 states to 2458 states and 2902 transitions. [2024-12-06 00:37:28,649 INFO L276 IsEmpty]: Start isEmpty. Operand 2458 states and 2902 transitions. [2024-12-06 00:37:28,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-06 00:37:28,650 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:28,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:28,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:28,772 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 267 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-12-06 00:37:28,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:28,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2905 states to 2462 states and 2905 transitions. [2024-12-06 00:37:28,888 INFO L276 IsEmpty]: Start isEmpty. Operand 2462 states and 2905 transitions. [2024-12-06 00:37:28,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-06 00:37:28,889 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:28,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:28,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:29,008 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 267 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-12-06 00:37:29,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:29,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2908 states to 2466 states and 2908 transitions. [2024-12-06 00:37:29,282 INFO L276 IsEmpty]: Start isEmpty. Operand 2466 states and 2908 transitions. [2024-12-06 00:37:29,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2024-12-06 00:37:29,283 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:29,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:29,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:29,528 INFO L134 CoverageAnalysis]: Checked inductivity of 316 backedges. 259 proven. 9 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2024-12-06 00:37:30,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:30,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2908 states to 2467 states and 2908 transitions. [2024-12-06 00:37:30,186 INFO L276 IsEmpty]: Start isEmpty. Operand 2467 states and 2908 transitions. [2024-12-06 00:37:30,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2024-12-06 00:37:30,188 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:30,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:30,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 00:37:30,386 INFO L134 CoverageAnalysis]: Checked inductivity of 372 backedges. 132 proven. 166 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-12-06 00:37:31,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 00:37:31,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2996 states to 2550 states and 2996 transitions. [2024-12-06 00:37:31,701 INFO L276 IsEmpty]: Start isEmpty. Operand 2550 states and 2996 transitions. [2024-12-06 00:37:31,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2024-12-06 00:37:31,702 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 00:37:31,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 00:37:31,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 00:37:31,737 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-06 00:37:31,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 00:37:31,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 00:37:31,952 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-06 00:37:32,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 00:37:32,069 WARN L473 CodeCheckObserver]: This program is UNSAFE, Check terminated with 100 iterations. [2024-12-06 00:37:32,189 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck CFG 06.12 12:37:32 ImpRootNode [2024-12-06 00:37:32,189 INFO L131 PluginConnector]: ------------------------ END CodeCheck---------------------------- [2024-12-06 00:37:32,190 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-06 00:37:32,190 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-06 00:37:32,190 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-06 00:37:32,191 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 12:35:46" (3/4) ... [2024-12-06 00:37:32,191 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-12-06 00:37:32,333 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 244. [2024-12-06 00:37:32,472 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/witness.graphml [2024-12-06 00:37:32,472 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/witness.yml [2024-12-06 00:37:32,472 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-06 00:37:32,473 INFO L158 Benchmark]: Toolchain (without parser) took 107914.80ms. Allocated memory was 142.6MB in the beginning and 1.5GB in the end (delta: 1.3GB). Free memory was 116.8MB in the beginning and 600.8MB in the end (delta: -484.0MB). Peak memory consumption was 858.4MB. Max. memory is 16.1GB. [2024-12-06 00:37:32,473 INFO L158 Benchmark]: CDTParser took 0.25ms. Allocated memory is still 142.6MB. Free memory is still 82.1MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-06 00:37:32,474 INFO L158 Benchmark]: CACSL2BoogieTranslator took 358.47ms. Allocated memory is still 142.6MB. Free memory was 116.7MB in the beginning and 89.6MB in the end (delta: 27.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-12-06 00:37:32,474 INFO L158 Benchmark]: Boogie Procedure Inliner took 53.53ms. Allocated memory is still 142.6MB. Free memory was 89.6MB in the beginning and 84.3MB in the end (delta: 5.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-06 00:37:32,474 INFO L158 Benchmark]: Boogie Preprocessor took 51.80ms. Allocated memory is still 142.6MB. Free memory was 84.3MB in the beginning and 80.1MB in the end (delta: 4.1MB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-06 00:37:32,475 INFO L158 Benchmark]: RCFGBuilder took 1084.74ms. Allocated memory is still 142.6MB. Free memory was 80.1MB in the beginning and 65.7MB in the end (delta: 14.5MB). Peak memory consumption was 43.5MB. Max. memory is 16.1GB. [2024-12-06 00:37:32,475 INFO L158 Benchmark]: CodeCheck took 106079.08ms. Allocated memory was 142.6MB in the beginning and 1.5GB in the end (delta: 1.3GB). Free memory was 65.7MB in the beginning and 638.6MB in the end (delta: -572.9MB). Peak memory consumption was 764.6MB. Max. memory is 16.1GB. [2024-12-06 00:37:32,475 INFO L158 Benchmark]: Witness Printer took 282.54ms. Allocated memory is still 1.5GB. Free memory was 638.6MB in the beginning and 600.8MB in the end (delta: 37.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-12-06 00:37:32,477 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - StatisticsResult: Ultimate CodeCheck benchmark data CFG has 1 procedures, 76 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 105.9s, OverallIterations: 100, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 242247 SdHoareTripleChecker+Valid, 536.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 241462 mSDsluCounter, 37877 SdHoareTripleChecker+Invalid, 452.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 33248 mSDsCounter, 62698 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 530206 IncrementalHoareTripleChecker+Invalid, 592904 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 62698 mSolverCounterUnsat, 4629 mSDtfsCounter, 530206 mSolverCounterSat, 4.6s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 115759 GetRequests, 110673 SyntacticMatches, 4214 SemanticMatches, 872 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 504082 ImplicationChecksByTransitivity, 73.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=-1occurred in iteration=-1, InterpolantAutomatonStates: 0, traceCheckStatistics: 0.5s SsaConstructionTime, 0.9s SatisfiabilityAnalysisTime, 15.9s InterpolantComputationTime, 17330 NumberOfCodeBlocks, 17330 NumberOfCodeBlocksAsserted, 100 NumberOfCheckSat, 16988 ConstructedInterpolants, 0 QuantifiedInterpolants, 100133 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 99 InterpolantComputations, 60 PerfectInterpolantSequences, 13344/16415 InterpolantCoveringCapability, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available - CounterExampleResult [Line: 408]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L17] int a= 1; [L18] int d= 4; [L19] int e= 5; [L20] int f= 6; [L21] int c= 3; [L22] int b= 2; [L25] int u = 21; [L26] int v = 22; [L27] int w = 23; [L28] int x = 24; [L29] int y = 25; [L30] int z = 26; [L32] int a17 = 1; [L33] int a7 = 0; [L34] int a20 = 1; [L35] int a8 = 15; [L36] int a12 = 8; [L37] int a16 = 5; [L38] int a21 = 1; [L590] int output = -1; VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND FALSE !((((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L283] COND FALSE !(((a7==1)&&((a8==13)&&((a12==8)&&(!(a21==1)&&((input==2)&&((((a20==1)&&!(a17==1))&&(a16==6))||(((a17==1)&&!(a20==1))&&(a16==4))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L288] COND FALSE !((((((((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15))&&(a16==6))&&(a21==1))||((((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))&&(a16==4))&&!(a21==1)))&&(input==6))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L296] COND FALSE !(((!(a7==1)&&(!(a17==1)&&(((((input==3)&&(a21==1))&&(a16==4))&&(a8==15))&&(a12==8))))&&!(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L302] COND FALSE !((((((a12==8)&&(((((a17==1)&&!(a20==1))&&(a16==4))||((((a20==1)&&!(a17==1))&&(a16==5))||((!(a17==1)&&(a20==1))&&(a16==6))))&&(input==3)))&&(a8==15))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L309] COND FALSE !((((!(a7==1)&&(((input==5)&&((((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a12==8)))&&(a21==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L316] COND FALSE !(((!(a7==1)&&(((a21==1)&&(((a17==1)&&((a12==8)&&(input==2)))&&!(a20==1)))&&(a16==6)))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L322] COND FALSE !(((!(a17==1)&&((a21==1)&&((!(a20==1)&&((a12==8)&&((input==3)&&!(a7==1))))&&(a8==15))))&&(a16==5))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L326] COND FALSE !((((a16==5)&&(!(a20==1)&&(((((input==6)&&(a21==1))&&(a17==1))&&!(a7==1))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L328] COND FALSE !((!(a7==1)&&((a17==1)&&(((a16==6)&&(!(a20==1)&&(((input==6)&&(a12==8))&&(a21==1))))&&(a8==15))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L334] COND FALSE !(((((a21==1)&&((a8==15)&&((a12==8)&&(!(a7==1)&&(!(a17==1)&&(input==2))))))&&(a16==4))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L339] COND FALSE !(((a8==15)&&(((a16==4)&&((a12==8)&&((!(a20==1)&&(!(a7==1)&&(input==1)))&&!(a17==1))))&&(a21==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L343] COND TRUE ((a21==1)&&(((a12==8)&&((((a17==1)&&((input==3)&&((a16==5)||(a16==6))))&&!(a7==1))&&(a20==1)))&&(a8==15))) [L344] a17 = 0 [L345] a16 = 4 [L346] return 21; VAL [\result=21, a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND TRUE (((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4)) [L279] a20 = 0 [L280] a17 = 1 [L281] a16 = 6 [L282] return 21; VAL [\result=21, a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND TRUE (((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6)) [L73] a17 = 0 [L74] return 26; VAL [\result=26, a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND TRUE ((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))))))) [L83] a7 = 1 [L84] a17 = 1 [L85] a21 = 0 [L86] a20 = 1 [L87] a8 = 13 [L88] a16 = 5 [L89] return 26; VAL [\result=26, a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND TRUE ((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1))) [L159] a16 = 4 [L160] a17 = 0 [L161] return 25; VAL [\result=25, a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=6, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND TRUE (((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1)) [L140] a8 = 15 [L141] a17 = 0 [L142] a21 = 1 [L143] a20 = 0 [L144] a16 = 4 [L145] return -1; VAL [\result=-1, a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND FALSE !((((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L283] COND FALSE !(((a7==1)&&((a8==13)&&((a12==8)&&(!(a21==1)&&((input==2)&&((((a20==1)&&!(a17==1))&&(a16==6))||(((a17==1)&&!(a20==1))&&(a16==4))))))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L288] COND FALSE !((((((((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15))&&(a16==6))&&(a21==1))||((((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))&&(a16==4))&&!(a21==1)))&&(input==6))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L296] COND FALSE !(((!(a7==1)&&(!(a17==1)&&(((((input==3)&&(a21==1))&&(a16==4))&&(a8==15))&&(a12==8))))&&!(a20==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L302] COND FALSE !((((((a12==8)&&(((((a17==1)&&!(a20==1))&&(a16==4))||((((a20==1)&&!(a17==1))&&(a16==5))||((!(a17==1)&&(a20==1))&&(a16==6))))&&(input==3)))&&(a8==15))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L309] COND FALSE !((((!(a7==1)&&(((input==5)&&((((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a12==8)))&&(a21==1))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L316] COND FALSE !(((!(a7==1)&&(((a21==1)&&(((a17==1)&&((a12==8)&&(input==2)))&&!(a20==1)))&&(a16==6)))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L322] COND FALSE !(((!(a17==1)&&((a21==1)&&((!(a20==1)&&((a12==8)&&((input==3)&&!(a7==1))))&&(a8==15))))&&(a16==5))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L326] COND FALSE !((((a16==5)&&(!(a20==1)&&(((((input==6)&&(a21==1))&&(a17==1))&&!(a7==1))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L328] COND FALSE !((!(a7==1)&&((a17==1)&&(((a16==6)&&(!(a20==1)&&(((input==6)&&(a12==8))&&(a21==1))))&&(a8==15))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L334] COND FALSE !(((((a21==1)&&((a8==15)&&((a12==8)&&(!(a7==1)&&(!(a17==1)&&(input==2))))))&&(a16==4))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L339] COND FALSE !(((a8==15)&&(((a16==4)&&((a12==8)&&((!(a20==1)&&(!(a7==1)&&(input==1)))&&!(a17==1))))&&(a21==1)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L343] COND FALSE !(((a21==1)&&(((a12==8)&&((((a17==1)&&((input==3)&&((a16==5)||(a16==6))))&&!(a7==1))&&(a20==1)))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L347] COND FALSE !((!(a21==1)&&((a20==1)&&(((a12==8)&&((a8==13)&&((((a16==5)&&!(a17==1))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==2))))&&(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L355] COND FALSE !(((a7==1)&&((a12==8)&&((((a20==1)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||((a16==4)&&!(a17==1))))&&(input==4)))&&(a8==13))&&!(a21==1))))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L363] COND FALSE !(((a21==1)&&((((!(a7==1)&&((a8==15)&&(!(a20==1)&&(input==4))))&&(a17==1))&&(a16==5))&&(a12==8)))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L365] COND FALSE !((((!(a7==1)&&((!(a20==1)&&((a21==1)&&((input==3)&&(a17==1))))&&(a8==15)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L371] COND FALSE !(((((!(a17==1)&&(!(a20==1)&&((a8==15)&&((input==1)&&(a16==5)))))&&(a12==8))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L373] COND FALSE !(((((a21==1)&&((a8==15)&&(((a16==5)&&((a12==8)&&(input==1)))&&(a17==1))))&&!(a7==1))&&!(a20==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L375] COND FALSE !(((!(a21==1)&&((a20==1)&&((((a8==13)&&((a7==1)&&(input==5)))&&(a17==1))&&(a12==8))))&&(a16==5))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L382] COND FALSE !((((!(a7==1)&&((a21==1)&&((((input==6)&&(a20==1))&&(a8==15))&&!(a17==1))))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L387] COND FALSE !(((((a20==1)&&(((!(a21==1)&&((a7==1)&&(input==1)))&&(a8==13))&&(a17==1)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L392] COND FALSE !(((a12==8)&&((input==5)&&((((((!(a17==1)&&!(a7==1))&&!(a20==1))&&(a8==15))&&(a16==6))&&(a21==1))||(!(a21==1)&&((a16==4)&&(((a20==1)&&((a7==1)&&(a17==1)))&&(a8==13)))))))) [L401] COND FALSE !(((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) [L404] COND FALSE !((((((((a17==1)&&!(a7==1))&&(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L407] COND TRUE ((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==15))&&(a12==8))&&(a16==4))&&(a21==1)) VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L408] reach_error() VAL [a12=8, a16=4, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25ms. Allocated memory is still 142.6MB. Free memory is still 82.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 358.47ms. Allocated memory is still 142.6MB. Free memory was 116.7MB in the beginning and 89.6MB in the end (delta: 27.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 53.53ms. Allocated memory is still 142.6MB. Free memory was 89.6MB in the beginning and 84.3MB in the end (delta: 5.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 51.80ms. Allocated memory is still 142.6MB. Free memory was 84.3MB in the beginning and 80.1MB in the end (delta: 4.1MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 1084.74ms. Allocated memory is still 142.6MB. Free memory was 80.1MB in the beginning and 65.7MB in the end (delta: 14.5MB). Peak memory consumption was 43.5MB. Max. memory is 16.1GB. * CodeCheck took 106079.08ms. Allocated memory was 142.6MB in the beginning and 1.5GB in the end (delta: 1.3GB). Free memory was 65.7MB in the beginning and 638.6MB in the end (delta: -572.9MB). Peak memory consumption was 764.6MB. Max. memory is 16.1GB. * Witness Printer took 282.54ms. Allocated memory is still 1.5GB. Free memory was 638.6MB in the beginning and 600.8MB in the end (delta: 37.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. RESULT: Ultimate proved your program to be incorrect! [2024-12-06 00:37:32,502 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_42b0c7f2-d223-40fd-9a3d-f12907c62749/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE