./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/eca-rers2012/Problem01_label33.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/config/KojakReach.xml -i ../../sv-benchmarks/c/eca-rers2012/Problem01_label33.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/config/svcomp-Reach-32bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a90366a5085659577cb1c98c7b11041979a96aff31e8f044fed2c2fa31b4a389 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-06 04:43:16,385 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-06 04:43:16,444 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/config/svcomp-Reach-32bit-Kojak_Default.epf [2024-12-06 04:43:16,449 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-06 04:43:16,449 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.Interpolating solver [2024-12-06 04:43:16,469 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-06 04:43:16,470 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-06 04:43:16,470 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ALWAYS [2024-12-06 04:43:16,471 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-06 04:43:16,471 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-06 04:43:16,471 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-06 04:43:16,471 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-06 04:43:16,471 INFO L153 SettingsManager]: * sizeof long=4 [2024-12-06 04:43:16,471 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-06 04:43:16,471 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-12-06 04:43:16,472 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-06 04:43:16,472 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-06 04:43:16,472 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-06 04:43:16,472 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-06 04:43:16,472 INFO L153 SettingsManager]: * sizeof long double=12 [2024-12-06 04:43:16,472 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-06 04:43:16,472 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-06 04:43:16,472 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-06 04:43:16,472 INFO L151 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2024-12-06 04:43:16,473 INFO L153 SettingsManager]: * Timeout in seconds=1000000 [2024-12-06 04:43:16,473 INFO L153 SettingsManager]: * Theory for external solver=ALL [2024-12-06 04:43:16,473 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-06 04:43:16,473 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-12-06 04:43:16,473 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-06 04:43:16,473 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-06 04:43:16,473 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-06 04:43:16,473 INFO L153 SettingsManager]: * Trace refinement strategy=PENGUIN [2024-12-06 04:43:16,473 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-06 04:43:16,473 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a90366a5085659577cb1c98c7b11041979a96aff31e8f044fed2c2fa31b4a389 [2024-12-06 04:43:16,711 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-06 04:43:16,719 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-06 04:43:16,721 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-06 04:43:16,722 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-06 04:43:16,723 INFO L274 PluginConnector]: CDTParser initialized [2024-12-06 04:43:16,724 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/../../sv-benchmarks/c/eca-rers2012/Problem01_label33.c [2024-12-06 04:43:19,423 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/data/14ea31f55/84880d0cacea4e9d9b2dab165b9ce092/FLAG4ef2f7de6 [2024-12-06 04:43:19,653 INFO L384 CDTParser]: Found 1 translation units. [2024-12-06 04:43:19,654 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/sv-benchmarks/c/eca-rers2012/Problem01_label33.c [2024-12-06 04:43:19,664 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/data/14ea31f55/84880d0cacea4e9d9b2dab165b9ce092/FLAG4ef2f7de6 [2024-12-06 04:43:19,678 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/data/14ea31f55/84880d0cacea4e9d9b2dab165b9ce092 [2024-12-06 04:43:19,681 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-06 04:43:19,682 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-06 04:43:19,683 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-06 04:43:19,684 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-06 04:43:19,688 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-06 04:43:19,688 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 04:43:19" (1/1) ... [2024-12-06 04:43:19,689 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@11ff16cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:19, skipping insertion in model container [2024-12-06 04:43:19,689 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 04:43:19" (1/1) ... [2024-12-06 04:43:19,717 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-06 04:43:19,962 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/sv-benchmarks/c/eca-rers2012/Problem01_label33.c[15127,15140] [2024-12-06 04:43:19,998 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-06 04:43:20,008 INFO L200 MainTranslator]: Completed pre-run [2024-12-06 04:43:20,067 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/sv-benchmarks/c/eca-rers2012/Problem01_label33.c[15127,15140] [2024-12-06 04:43:20,087 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-06 04:43:20,102 INFO L204 MainTranslator]: Completed translation [2024-12-06 04:43:20,103 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20 WrapperNode [2024-12-06 04:43:20,103 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-06 04:43:20,104 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-06 04:43:20,104 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-06 04:43:20,104 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-06 04:43:20,111 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,124 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,160 INFO L138 Inliner]: procedures = 14, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 657 [2024-12-06 04:43:20,161 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-06 04:43:20,161 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-06 04:43:20,161 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-06 04:43:20,161 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-06 04:43:20,171 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,171 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,176 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,176 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,194 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,196 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,203 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,206 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,209 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,214 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-06 04:43:20,215 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-06 04:43:20,215 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-06 04:43:20,215 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-06 04:43:20,216 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 04:43:20" (1/1) ... [2024-12-06 04:43:20,222 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-12-06 04:43:20,234 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/z3 [2024-12-06 04:43:20,246 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) [2024-12-06 04:43:20,249 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Waiting until timeout for monitored process [2024-12-06 04:43:20,276 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-06 04:43:20,277 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-12-06 04:43:20,277 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-06 04:43:20,277 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-06 04:43:20,343 INFO L234 CfgBuilder]: Building ICFG [2024-12-06 04:43:20,345 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-06 04:43:21,218 INFO L? ?]: Removed 75 outVars from TransFormulas that were not future-live. [2024-12-06 04:43:21,218 INFO L283 CfgBuilder]: Performing block encoding [2024-12-06 04:43:21,437 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-06 04:43:21,437 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-12-06 04:43:21,438 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 04:43:21 BoogieIcfgContainer [2024-12-06 04:43:21,438 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-06 04:43:21,438 INFO L112 PluginConnector]: ------------------------CodeCheck---------------------------- [2024-12-06 04:43:21,438 INFO L270 PluginConnector]: Initializing CodeCheck... [2024-12-06 04:43:21,447 INFO L274 PluginConnector]: CodeCheck initialized [2024-12-06 04:43:21,447 INFO L184 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 04:43:21" (1/1) ... [2024-12-06 04:43:21,454 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-06 04:43:21,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:21,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 76 states and 144 transitions. [2024-12-06 04:43:21,498 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 144 transitions. [2024-12-06 04:43:21,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2024-12-06 04:43:21,502 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:21,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:21,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:21,900 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:22,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:22,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 145 states and 237 transitions. [2024-12-06 04:43:22,443 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 237 transitions. [2024-12-06 04:43:22,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2024-12-06 04:43:22,445 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:22,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:22,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:22,602 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 04:43:22,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:22,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 146 states and 238 transitions. [2024-12-06 04:43:22,789 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 238 transitions. [2024-12-06 04:43:22,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2024-12-06 04:43:22,791 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:22,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:22,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:22,872 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:22,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:22,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 150 states and 244 transitions. [2024-12-06 04:43:22,957 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 244 transitions. [2024-12-06 04:43:22,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2024-12-06 04:43:22,958 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:22,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:22,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:23,042 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 04:43:23,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:23,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 245 states to 151 states and 245 transitions. [2024-12-06 04:43:23,186 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 245 transitions. [2024-12-06 04:43:23,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2024-12-06 04:43:23,187 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:23,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:23,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:23,315 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:23,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:23,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 159 states and 258 transitions. [2024-12-06 04:43:23,473 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 258 transitions. [2024-12-06 04:43:23,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2024-12-06 04:43:23,474 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:23,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:23,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:23,577 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:23,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:23,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 160 states and 259 transitions. [2024-12-06 04:43:23,708 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 259 transitions. [2024-12-06 04:43:23,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2024-12-06 04:43:23,711 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:23,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:23,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:23,833 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:23,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:23,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 168 states and 268 transitions. [2024-12-06 04:43:23,959 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 268 transitions. [2024-12-06 04:43:23,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2024-12-06 04:43:23,960 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:23,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:23,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:24,129 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:24,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:24,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 182 states and 286 transitions. [2024-12-06 04:43:24,408 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 286 transitions. [2024-12-06 04:43:24,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2024-12-06 04:43:24,409 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:24,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:24,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:24,520 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:24,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:24,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 306 states to 197 states and 306 transitions. [2024-12-06 04:43:24,936 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 306 transitions. [2024-12-06 04:43:24,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2024-12-06 04:43:24,936 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:24,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:24,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:25,077 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:25,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:25,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 212 states and 327 transitions. [2024-12-06 04:43:25,671 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 327 transitions. [2024-12-06 04:43:25,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2024-12-06 04:43:25,672 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:25,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:25,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:25,774 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:26,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:26,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 230 states and 356 transitions. [2024-12-06 04:43:26,407 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 356 transitions. [2024-12-06 04:43:26,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2024-12-06 04:43:26,408 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:26,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:26,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:26,503 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:26,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:26,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 359 states to 232 states and 359 transitions. [2024-12-06 04:43:26,680 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 359 transitions. [2024-12-06 04:43:26,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2024-12-06 04:43:26,681 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:26,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:26,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:26,740 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:26,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:26,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 237 states and 365 transitions. [2024-12-06 04:43:26,846 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 365 transitions. [2024-12-06 04:43:26,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2024-12-06 04:43:26,847 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:26,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:26,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:26,948 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:27,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:27,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 238 states and 366 transitions. [2024-12-06 04:43:27,094 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 366 transitions. [2024-12-06 04:43:27,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-12-06 04:43:27,095 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:27,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:27,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:27,159 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:27,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:27,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 257 states and 395 transitions. [2024-12-06 04:43:27,880 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 395 transitions. [2024-12-06 04:43:27,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-12-06 04:43:27,881 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:27,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:27,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:27,918 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:28,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:28,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 258 states and 396 transitions. [2024-12-06 04:43:28,060 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 396 transitions. [2024-12-06 04:43:28,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-12-06 04:43:28,061 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:28,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:28,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:28,137 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:28,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:28,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 415 states to 273 states and 415 transitions. [2024-12-06 04:43:28,536 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 415 transitions. [2024-12-06 04:43:28,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2024-12-06 04:43:28,537 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:28,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:28,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:28,582 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 04:43:29,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:29,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 291 states and 435 transitions. [2024-12-06 04:43:29,125 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 435 transitions. [2024-12-06 04:43:29,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2024-12-06 04:43:29,126 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:29,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:29,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:29,178 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:29,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:29,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 295 states and 439 transitions. [2024-12-06 04:43:29,229 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 439 transitions. [2024-12-06 04:43:29,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2024-12-06 04:43:29,230 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:29,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:29,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:29,306 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:29,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:29,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 299 states and 444 transitions. [2024-12-06 04:43:29,614 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 444 transitions. [2024-12-06 04:43:29,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-12-06 04:43:29,615 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:29,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:29,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:29,656 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:30,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:30,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 459 states to 307 states and 459 transitions. [2024-12-06 04:43:30,008 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 459 transitions. [2024-12-06 04:43:30,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-12-06 04:43:30,009 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:30,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:30,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:30,045 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:30,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:30,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 313 states and 467 transitions. [2024-12-06 04:43:30,337 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 467 transitions. [2024-12-06 04:43:30,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-12-06 04:43:30,337 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:30,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:30,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:30,372 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:30,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:30,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 471 states to 316 states and 471 transitions. [2024-12-06 04:43:30,521 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 471 transitions. [2024-12-06 04:43:30,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-12-06 04:43:30,522 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:30,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:30,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:30,561 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:30,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:30,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 491 states to 331 states and 491 transitions. [2024-12-06 04:43:30,906 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 491 transitions. [2024-12-06 04:43:30,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2024-12-06 04:43:30,906 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:30,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:30,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:30,969 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:31,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:31,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 508 states to 345 states and 508 transitions. [2024-12-06 04:43:31,173 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 508 transitions. [2024-12-06 04:43:31,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2024-12-06 04:43:31,174 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:31,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:31,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:31,294 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:31,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:31,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 510 states to 347 states and 510 transitions. [2024-12-06 04:43:31,477 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 510 transitions. [2024-12-06 04:43:31,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-12-06 04:43:31,477 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:31,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:31,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:31,514 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 04:43:31,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:31,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 516 states to 353 states and 516 transitions. [2024-12-06 04:43:31,741 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 516 transitions. [2024-12-06 04:43:31,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-12-06 04:43:31,742 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:31,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:31,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:31,816 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:31,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:31,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 357 states and 519 transitions. [2024-12-06 04:43:31,858 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 519 transitions. [2024-12-06 04:43:31,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2024-12-06 04:43:31,859 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:31,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:31,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:31,954 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:31,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:31,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 522 states to 359 states and 522 transitions. [2024-12-06 04:43:31,988 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 522 transitions. [2024-12-06 04:43:31,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2024-12-06 04:43:31,988 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:31,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:32,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:32,090 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:32,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:32,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 373 states and 540 transitions. [2024-12-06 04:43:32,483 INFO L276 IsEmpty]: Start isEmpty. Operand 373 states and 540 transitions. [2024-12-06 04:43:32,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2024-12-06 04:43:32,484 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:32,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:32,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:32,554 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:32,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:32,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 377 states and 545 transitions. [2024-12-06 04:43:32,758 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 545 transitions. [2024-12-06 04:43:32,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2024-12-06 04:43:32,759 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:32,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:32,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:32,823 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 04:43:32,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:32,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 548 states to 379 states and 548 transitions. [2024-12-06 04:43:32,951 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 548 transitions. [2024-12-06 04:43:32,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2024-12-06 04:43:32,952 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:32,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:32,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:33,151 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 35 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:33,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:33,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 386 states and 555 transitions. [2024-12-06 04:43:33,454 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 555 transitions. [2024-12-06 04:43:33,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2024-12-06 04:43:33,454 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:33,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:33,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:33,519 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:33,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:33,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 564 states to 395 states and 564 transitions. [2024-12-06 04:43:33,795 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 564 transitions. [2024-12-06 04:43:33,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2024-12-06 04:43:33,795 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:33,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:33,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:33,865 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:34,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:34,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 567 states to 399 states and 567 transitions. [2024-12-06 04:43:34,063 INFO L276 IsEmpty]: Start isEmpty. Operand 399 states and 567 transitions. [2024-12-06 04:43:34,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2024-12-06 04:43:34,064 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:34,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:34,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:34,192 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:34,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:34,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 569 states to 402 states and 569 transitions. [2024-12-06 04:43:34,415 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 569 transitions. [2024-12-06 04:43:34,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2024-12-06 04:43:34,416 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:34,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:34,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:34,471 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:34,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:34,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 472 states and 647 transitions. [2024-12-06 04:43:34,953 INFO L276 IsEmpty]: Start isEmpty. Operand 472 states and 647 transitions. [2024-12-06 04:43:34,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2024-12-06 04:43:34,953 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:34,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:34,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:35,006 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:35,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:35,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 664 states to 486 states and 664 transitions. [2024-12-06 04:43:35,076 INFO L276 IsEmpty]: Start isEmpty. Operand 486 states and 664 transitions. [2024-12-06 04:43:35,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2024-12-06 04:43:35,076 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:35,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:35,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:35,112 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:35,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:35,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 678 states to 497 states and 678 transitions. [2024-12-06 04:43:35,252 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 678 transitions. [2024-12-06 04:43:35,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2024-12-06 04:43:35,253 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:35,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:35,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:35,314 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 42 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:35,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:35,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 686 states to 504 states and 686 transitions. [2024-12-06 04:43:35,360 INFO L276 IsEmpty]: Start isEmpty. Operand 504 states and 686 transitions. [2024-12-06 04:43:35,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-12-06 04:43:35,361 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:35,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:35,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:35,396 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 04:43:35,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:35,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 688 states to 506 states and 688 transitions. [2024-12-06 04:43:35,422 INFO L276 IsEmpty]: Start isEmpty. Operand 506 states and 688 transitions. [2024-12-06 04:43:35,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-12-06 04:43:35,422 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:35,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:35,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:35,467 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-12-06 04:43:35,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:35,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 695 states to 513 states and 695 transitions. [2024-12-06 04:43:35,568 INFO L276 IsEmpty]: Start isEmpty. Operand 513 states and 695 transitions. [2024-12-06 04:43:35,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-12-06 04:43:35,568 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:35,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:35,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:35,628 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:36,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:36,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 739 states to 551 states and 739 transitions. [2024-12-06 04:43:36,308 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 739 transitions. [2024-12-06 04:43:36,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-12-06 04:43:36,309 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:36,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:36,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:36,380 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:36,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:36,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 554 states and 741 transitions. [2024-12-06 04:43:36,558 INFO L276 IsEmpty]: Start isEmpty. Operand 554 states and 741 transitions. [2024-12-06 04:43:36,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-12-06 04:43:36,559 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:36,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:36,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:36,603 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:36,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:36,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 743 states to 557 states and 743 transitions. [2024-12-06 04:43:36,786 INFO L276 IsEmpty]: Start isEmpty. Operand 557 states and 743 transitions. [2024-12-06 04:43:36,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-12-06 04:43:36,786 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:36,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:36,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:36,821 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:36,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:36,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 758 states to 571 states and 758 transitions. [2024-12-06 04:43:36,886 INFO L276 IsEmpty]: Start isEmpty. Operand 571 states and 758 transitions. [2024-12-06 04:43:36,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-12-06 04:43:36,887 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:36,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:36,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:36,930 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 04:43:36,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:36,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 766 states to 580 states and 766 transitions. [2024-12-06 04:43:36,986 INFO L276 IsEmpty]: Start isEmpty. Operand 580 states and 766 transitions. [2024-12-06 04:43:36,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2024-12-06 04:43:36,986 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:36,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:37,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:37,058 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:37,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:37,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 775 states to 588 states and 775 transitions. [2024-12-06 04:43:37,215 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 775 transitions. [2024-12-06 04:43:37,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-12-06 04:43:37,215 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:37,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:37,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:37,278 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 04:43:38,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:38,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 880 states to 685 states and 880 transitions. [2024-12-06 04:43:38,247 INFO L276 IsEmpty]: Start isEmpty. Operand 685 states and 880 transitions. [2024-12-06 04:43:38,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-12-06 04:43:38,248 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:38,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:38,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:38,311 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-12-06 04:43:38,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:38,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 905 states to 710 states and 905 transitions. [2024-12-06 04:43:38,675 INFO L276 IsEmpty]: Start isEmpty. Operand 710 states and 905 transitions. [2024-12-06 04:43:38,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2024-12-06 04:43:38,676 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:38,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:38,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:38,889 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 73 proven. 10 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 04:43:39,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:39,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 938 states to 739 states and 938 transitions. [2024-12-06 04:43:39,402 INFO L276 IsEmpty]: Start isEmpty. Operand 739 states and 938 transitions. [2024-12-06 04:43:39,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2024-12-06 04:43:39,403 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:39,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:39,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:39,446 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 79 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-12-06 04:43:39,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:39,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 955 states to 753 states and 955 transitions. [2024-12-06 04:43:39,770 INFO L276 IsEmpty]: Start isEmpty. Operand 753 states and 955 transitions. [2024-12-06 04:43:39,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2024-12-06 04:43:39,771 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:39,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:39,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:39,911 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 66 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:40,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:40,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 975 states to 772 states and 975 transitions. [2024-12-06 04:43:40,137 INFO L276 IsEmpty]: Start isEmpty. Operand 772 states and 975 transitions. [2024-12-06 04:43:40,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2024-12-06 04:43:40,138 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:40,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:40,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:40,509 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 70 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 04:43:42,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:42,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1046 states to 823 states and 1046 transitions. [2024-12-06 04:43:42,213 INFO L276 IsEmpty]: Start isEmpty. Operand 823 states and 1046 transitions. [2024-12-06 04:43:42,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2024-12-06 04:43:42,214 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:42,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:42,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:42,378 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 70 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 04:43:42,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:42,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1050 states to 827 states and 1050 transitions. [2024-12-06 04:43:42,711 INFO L276 IsEmpty]: Start isEmpty. Operand 827 states and 1050 transitions. [2024-12-06 04:43:42,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2024-12-06 04:43:42,711 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:42,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:42,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:42,784 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 68 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:42,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:42,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1073 states to 850 states and 1073 transitions. [2024-12-06 04:43:42,955 INFO L276 IsEmpty]: Start isEmpty. Operand 850 states and 1073 transitions. [2024-12-06 04:43:42,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2024-12-06 04:43:42,956 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:42,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:42,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:43,009 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 04:43:43,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:43,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1073 states to 851 states and 1073 transitions. [2024-12-06 04:43:43,060 INFO L276 IsEmpty]: Start isEmpty. Operand 851 states and 1073 transitions. [2024-12-06 04:43:43,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2024-12-06 04:43:43,061 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:43,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:43,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:43,290 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 72 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:44,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:44,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1127 states to 901 states and 1127 transitions. [2024-12-06 04:43:44,493 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1127 transitions. [2024-12-06 04:43:44,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2024-12-06 04:43:44,493 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:44,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:44,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:44,693 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 72 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:44,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:44,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1099 states to 874 states and 1099 transitions. [2024-12-06 04:43:44,969 INFO L276 IsEmpty]: Start isEmpty. Operand 874 states and 1099 transitions. [2024-12-06 04:43:44,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-12-06 04:43:44,969 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:44,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:44,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:45,018 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-12-06 04:43:45,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:45,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1127 states to 901 states and 1127 transitions. [2024-12-06 04:43:45,167 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1127 transitions. [2024-12-06 04:43:45,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2024-12-06 04:43:45,168 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:45,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:45,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:45,221 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-12-06 04:43:45,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:45,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1138 states to 912 states and 1138 transitions. [2024-12-06 04:43:45,748 INFO L276 IsEmpty]: Start isEmpty. Operand 912 states and 1138 transitions. [2024-12-06 04:43:45,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-06 04:43:45,749 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:45,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:45,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:45,814 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-12-06 04:43:46,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:46,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1176 states to 945 states and 1176 transitions. [2024-12-06 04:43:46,067 INFO L276 IsEmpty]: Start isEmpty. Operand 945 states and 1176 transitions. [2024-12-06 04:43:46,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-06 04:43:46,082 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:46,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:46,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:46,152 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-12-06 04:43:46,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:46,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1188 states to 954 states and 1188 transitions. [2024-12-06 04:43:46,678 INFO L276 IsEmpty]: Start isEmpty. Operand 954 states and 1188 transitions. [2024-12-06 04:43:46,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-06 04:43:46,679 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:46,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:46,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:46,746 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-12-06 04:43:46,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:46,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1193 states to 958 states and 1193 transitions. [2024-12-06 04:43:46,842 INFO L276 IsEmpty]: Start isEmpty. Operand 958 states and 1193 transitions. [2024-12-06 04:43:46,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-06 04:43:46,843 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:46,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:46,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:46,932 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-12-06 04:43:47,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:47,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1199 states to 963 states and 1199 transitions. [2024-12-06 04:43:47,030 INFO L276 IsEmpty]: Start isEmpty. Operand 963 states and 1199 transitions. [2024-12-06 04:43:47,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-06 04:43:47,031 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:47,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:47,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:47,107 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-12-06 04:43:47,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:47,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1202 states to 967 states and 1202 transitions. [2024-12-06 04:43:47,367 INFO L276 IsEmpty]: Start isEmpty. Operand 967 states and 1202 transitions. [2024-12-06 04:43:47,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-12-06 04:43:47,367 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:47,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:47,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:47,415 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 93 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 04:43:48,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:48,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1225 states to 989 states and 1225 transitions. [2024-12-06 04:43:48,057 INFO L276 IsEmpty]: Start isEmpty. Operand 989 states and 1225 transitions. [2024-12-06 04:43:48,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-12-06 04:43:48,058 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:48,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:48,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:48,202 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 89 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 04:43:49,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:49,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1252 states to 1009 states and 1252 transitions. [2024-12-06 04:43:49,178 INFO L276 IsEmpty]: Start isEmpty. Operand 1009 states and 1252 transitions. [2024-12-06 04:43:49,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-12-06 04:43:49,179 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:49,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:49,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:49,294 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 89 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 04:43:49,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:49,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1262 states to 1018 states and 1262 transitions. [2024-12-06 04:43:49,520 INFO L276 IsEmpty]: Start isEmpty. Operand 1018 states and 1262 transitions. [2024-12-06 04:43:49,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-12-06 04:43:49,521 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:49,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:49,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:49,619 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 89 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 04:43:49,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:49,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1265 states to 1022 states and 1265 transitions. [2024-12-06 04:43:49,887 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 1265 transitions. [2024-12-06 04:43:49,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2024-12-06 04:43:49,888 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:49,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:49,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:50,373 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 90 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:53,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:53,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1379 states to 1113 states and 1379 transitions. [2024-12-06 04:43:53,864 INFO L276 IsEmpty]: Start isEmpty. Operand 1113 states and 1379 transitions. [2024-12-06 04:43:53,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2024-12-06 04:43:53,865 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:53,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:53,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:54,213 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 104 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 04:43:55,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:55,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1435 states to 1169 states and 1435 transitions. [2024-12-06 04:43:55,464 INFO L276 IsEmpty]: Start isEmpty. Operand 1169 states and 1435 transitions. [2024-12-06 04:43:55,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2024-12-06 04:43:55,465 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:55,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:55,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:55,637 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 104 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-12-06 04:43:55,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:55,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1450 states to 1184 states and 1450 transitions. [2024-12-06 04:43:55,765 INFO L276 IsEmpty]: Start isEmpty. Operand 1184 states and 1450 transitions. [2024-12-06 04:43:55,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-12-06 04:43:55,766 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:55,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:55,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:56,220 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 94 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:43:59,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:43:59,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1514 states to 1230 states and 1514 transitions. [2024-12-06 04:43:59,434 INFO L276 IsEmpty]: Start isEmpty. Operand 1230 states and 1514 transitions. [2024-12-06 04:43:59,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-12-06 04:43:59,435 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:43:59,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:43:59,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:43:59,629 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 94 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:44:00,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:00,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1526 states to 1238 states and 1526 transitions. [2024-12-06 04:44:00,627 INFO L276 IsEmpty]: Start isEmpty. Operand 1238 states and 1526 transitions. [2024-12-06 04:44:00,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-12-06 04:44:00,628 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:00,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:00,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:00,797 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 94 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:44:01,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:01,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1531 states to 1241 states and 1531 transitions. [2024-12-06 04:44:01,160 INFO L276 IsEmpty]: Start isEmpty. Operand 1241 states and 1531 transitions. [2024-12-06 04:44:01,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-12-06 04:44:01,161 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:01,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:01,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:01,329 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 98 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:44:01,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:01,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1539 states to 1247 states and 1539 transitions. [2024-12-06 04:44:01,944 INFO L276 IsEmpty]: Start isEmpty. Operand 1247 states and 1539 transitions. [2024-12-06 04:44:01,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-12-06 04:44:01,945 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:01,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:01,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:02,166 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 156 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-12-06 04:44:02,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:02,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1565 states to 1271 states and 1565 transitions. [2024-12-06 04:44:02,765 INFO L276 IsEmpty]: Start isEmpty. Operand 1271 states and 1565 transitions. [2024-12-06 04:44:02,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-12-06 04:44:02,765 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:02,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:02,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:02,864 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 156 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-12-06 04:44:03,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:03,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1568 states to 1276 states and 1568 transitions. [2024-12-06 04:44:03,351 INFO L276 IsEmpty]: Start isEmpty. Operand 1276 states and 1568 transitions. [2024-12-06 04:44:03,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-12-06 04:44:03,352 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:03,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:03,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:03,749 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 103 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:44:04,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:04,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1580 states to 1281 states and 1580 transitions. [2024-12-06 04:44:04,673 INFO L276 IsEmpty]: Start isEmpty. Operand 1281 states and 1580 transitions. [2024-12-06 04:44:04,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-12-06 04:44:04,674 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:04,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:04,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:04,997 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 103 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:44:05,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:05,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1580 states to 1282 states and 1580 transitions. [2024-12-06 04:44:05,553 INFO L276 IsEmpty]: Start isEmpty. Operand 1282 states and 1580 transitions. [2024-12-06 04:44:05,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-12-06 04:44:05,555 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:05,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:05,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:05,803 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 103 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:44:06,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:06,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1580 states to 1283 states and 1580 transitions. [2024-12-06 04:44:06,215 INFO L276 IsEmpty]: Start isEmpty. Operand 1283 states and 1580 transitions. [2024-12-06 04:44:06,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-12-06 04:44:06,216 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:06,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:06,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:06,684 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 105 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 04:44:07,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:07,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1664 states to 1352 states and 1664 transitions. [2024-12-06 04:44:07,823 INFO L276 IsEmpty]: Start isEmpty. Operand 1352 states and 1664 transitions. [2024-12-06 04:44:07,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2024-12-06 04:44:07,824 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:07,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:07,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:07,910 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 72 proven. 0 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-12-06 04:44:08,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:08,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1664 states to 1353 states and 1664 transitions. [2024-12-06 04:44:08,030 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 1664 transitions. [2024-12-06 04:44:08,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2024-12-06 04:44:08,031 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:08,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:08,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:08,129 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-12-06 04:44:08,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:08,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1672 states to 1362 states and 1672 transitions. [2024-12-06 04:44:08,323 INFO L276 IsEmpty]: Start isEmpty. Operand 1362 states and 1672 transitions. [2024-12-06 04:44:08,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2024-12-06 04:44:08,324 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:08,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:08,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:08,382 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 112 proven. 0 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2024-12-06 04:44:08,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:08,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1673 states to 1364 states and 1673 transitions. [2024-12-06 04:44:08,427 INFO L276 IsEmpty]: Start isEmpty. Operand 1364 states and 1673 transitions. [2024-12-06 04:44:08,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2024-12-06 04:44:08,428 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:08,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:08,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:08,494 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2024-12-06 04:44:08,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:08,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1676 states to 1367 states and 1676 transitions. [2024-12-06 04:44:08,944 INFO L276 IsEmpty]: Start isEmpty. Operand 1367 states and 1676 transitions. [2024-12-06 04:44:08,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2024-12-06 04:44:08,945 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:08,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:08,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:09,553 INFO L134 CoverageAnalysis]: Checked inductivity of 214 backedges. 155 proven. 38 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-12-06 04:44:10,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:10,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1726 states to 1414 states and 1726 transitions. [2024-12-06 04:44:10,657 INFO L276 IsEmpty]: Start isEmpty. Operand 1414 states and 1726 transitions. [2024-12-06 04:44:10,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2024-12-06 04:44:10,658 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:10,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:10,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:10,735 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2024-12-06 04:44:10,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:10,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1726 states to 1415 states and 1726 transitions. [2024-12-06 04:44:10,786 INFO L276 IsEmpty]: Start isEmpty. Operand 1415 states and 1726 transitions. [2024-12-06 04:44:10,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2024-12-06 04:44:10,787 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:10,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:10,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:11,214 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 120 proven. 51 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-12-06 04:44:11,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:11,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1745 states to 1430 states and 1745 transitions. [2024-12-06 04:44:11,828 INFO L276 IsEmpty]: Start isEmpty. Operand 1430 states and 1745 transitions. [2024-12-06 04:44:11,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2024-12-06 04:44:11,830 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:11,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:11,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:11,907 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 126 proven. 0 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2024-12-06 04:44:12,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:12,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1797 states to 1480 states and 1797 transitions. [2024-12-06 04:44:12,800 INFO L276 IsEmpty]: Start isEmpty. Operand 1480 states and 1797 transitions. [2024-12-06 04:44:12,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2024-12-06 04:44:12,802 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:12,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:12,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:12,881 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 126 proven. 0 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2024-12-06 04:44:13,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:13,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1802 states to 1484 states and 1802 transitions. [2024-12-06 04:44:13,336 INFO L276 IsEmpty]: Start isEmpty. Operand 1484 states and 1802 transitions. [2024-12-06 04:44:13,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2024-12-06 04:44:13,336 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:13,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:13,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:13,750 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 130 proven. 49 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 04:44:17,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:17,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1932 states to 1578 states and 1932 transitions. [2024-12-06 04:44:17,031 INFO L276 IsEmpty]: Start isEmpty. Operand 1578 states and 1932 transitions. [2024-12-06 04:44:17,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2024-12-06 04:44:17,032 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:17,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:17,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:17,247 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 130 proven. 49 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-12-06 04:44:18,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:18,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1943 states to 1584 states and 1943 transitions. [2024-12-06 04:44:18,043 INFO L276 IsEmpty]: Start isEmpty. Operand 1584 states and 1943 transitions. [2024-12-06 04:44:18,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2024-12-06 04:44:18,044 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:18,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:18,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:18,616 INFO L134 CoverageAnalysis]: Checked inductivity of 218 backedges. 128 proven. 21 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-12-06 04:44:19,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:19,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1960 states to 1599 states and 1960 transitions. [2024-12-06 04:44:19,238 INFO L276 IsEmpty]: Start isEmpty. Operand 1599 states and 1960 transitions. [2024-12-06 04:44:19,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-12-06 04:44:19,239 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:19,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:19,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:19,389 INFO L134 CoverageAnalysis]: Checked inductivity of 232 backedges. 159 proven. 46 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-12-06 04:44:19,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:19,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1980 states to 1618 states and 1980 transitions. [2024-12-06 04:44:19,788 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 1980 transitions. [2024-12-06 04:44:19,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-12-06 04:44:19,789 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:19,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:19,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:20,272 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 186 proven. 65 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-12-06 04:44:21,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:21,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2046 states to 1679 states and 2046 transitions. [2024-12-06 04:44:21,762 INFO L276 IsEmpty]: Start isEmpty. Operand 1679 states and 2046 transitions. [2024-12-06 04:44:21,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-12-06 04:44:21,763 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:21,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:21,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:21,829 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 165 proven. 0 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2024-12-06 04:44:22,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:22,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2066 states to 1698 states and 2066 transitions. [2024-12-06 04:44:22,204 INFO L276 IsEmpty]: Start isEmpty. Operand 1698 states and 2066 transitions. [2024-12-06 04:44:22,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2024-12-06 04:44:22,205 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:22,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:22,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:22,280 INFO L134 CoverageAnalysis]: Checked inductivity of 220 backedges. 140 proven. 0 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-12-06 04:44:22,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:22,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 1710 states and 2080 transitions. [2024-12-06 04:44:22,686 INFO L276 IsEmpty]: Start isEmpty. Operand 1710 states and 2080 transitions. [2024-12-06 04:44:22,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-12-06 04:44:22,687 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:22,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:22,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:23,233 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-12-06 04:44:25,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:25,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2165 states to 1774 states and 2165 transitions. [2024-12-06 04:44:25,894 INFO L276 IsEmpty]: Start isEmpty. Operand 1774 states and 2165 transitions. [2024-12-06 04:44:25,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-12-06 04:44:25,895 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:25,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:25,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:26,166 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-12-06 04:44:27,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:27,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2176 states to 1785 states and 2176 transitions. [2024-12-06 04:44:27,021 INFO L276 IsEmpty]: Start isEmpty. Operand 1785 states and 2176 transitions. [2024-12-06 04:44:27,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-12-06 04:44:27,022 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:27,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:27,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:27,256 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 208 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-12-06 04:44:27,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:27,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2178 states to 1788 states and 2178 transitions. [2024-12-06 04:44:27,742 INFO L276 IsEmpty]: Start isEmpty. Operand 1788 states and 2178 transitions. [2024-12-06 04:44:27,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-12-06 04:44:27,743 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:27,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:27,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 04:44:27,973 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 140 proven. 71 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-12-06 04:44:28,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 04:44:28,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2185 states to 1794 states and 2185 transitions. [2024-12-06 04:44:28,130 INFO L276 IsEmpty]: Start isEmpty. Operand 1794 states and 2185 transitions. [2024-12-06 04:44:28,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-06 04:44:28,131 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 04:44:28,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 04:44:28,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 04:44:28,164 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-06 04:44:28,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 04:44:28,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 04:44:28,352 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-06 04:44:28,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-06 04:44:28,453 WARN L473 CodeCheckObserver]: This program is UNSAFE, Check terminated with 104 iterations. [2024-12-06 04:44:28,551 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck CFG 06.12 04:44:28 ImpRootNode [2024-12-06 04:44:28,551 INFO L131 PluginConnector]: ------------------------ END CodeCheck---------------------------- [2024-12-06 04:44:28,551 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-06 04:44:28,552 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-06 04:44:28,552 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-06 04:44:28,552 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 04:43:21" (3/4) ... [2024-12-06 04:44:28,553 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-12-06 04:44:28,661 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 217. [2024-12-06 04:44:28,764 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/witness.graphml [2024-12-06 04:44:28,765 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/witness.yml [2024-12-06 04:44:28,765 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-06 04:44:28,766 INFO L158 Benchmark]: Toolchain (without parser) took 69083.83ms. Allocated memory was 117.4MB in the beginning and 1.3GB in the end (delta: 1.2GB). Free memory was 90.9MB in the beginning and 678.6MB in the end (delta: -587.7MB). Peak memory consumption was 571.6MB. Max. memory is 16.1GB. [2024-12-06 04:44:28,766 INFO L158 Benchmark]: CDTParser took 0.29ms. Allocated memory is still 117.4MB. Free memory was 72.1MB in the beginning and 72.1MB in the end (delta: 83.9kB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-06 04:44:28,767 INFO L158 Benchmark]: CACSL2BoogieTranslator took 420.06ms. Allocated memory is still 117.4MB. Free memory was 90.8MB in the beginning and 63.9MB in the end (delta: 26.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-12-06 04:44:28,767 INFO L158 Benchmark]: Boogie Procedure Inliner took 56.64ms. Allocated memory is still 117.4MB. Free memory was 63.9MB in the beginning and 58.6MB in the end (delta: 5.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-06 04:44:28,767 INFO L158 Benchmark]: Boogie Preprocessor took 53.20ms. Allocated memory is still 117.4MB. Free memory was 58.6MB in the beginning and 54.4MB in the end (delta: 4.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-06 04:44:28,768 INFO L158 Benchmark]: RCFGBuilder took 1222.77ms. Allocated memory was 117.4MB in the beginning and 192.9MB in the end (delta: 75.5MB). Free memory was 54.4MB in the beginning and 98.2MB in the end (delta: -43.7MB). Peak memory consumption was 33.2MB. Max. memory is 16.1GB. [2024-12-06 04:44:28,768 INFO L158 Benchmark]: CodeCheck took 67112.62ms. Allocated memory was 192.9MB in the beginning and 1.3GB in the end (delta: 1.1GB). Free memory was 98.2MB in the beginning and 712.2MB in the end (delta: -614.0MB). Peak memory consumption was 469.0MB. Max. memory is 16.1GB. [2024-12-06 04:44:28,768 INFO L158 Benchmark]: Witness Printer took 213.62ms. Allocated memory is still 1.3GB. Free memory was 712.2MB in the beginning and 678.6MB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-12-06 04:44:28,770 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - StatisticsResult: Ultimate CodeCheck benchmark data CFG has 1 procedures, 76 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 67.0s, OverallIterations: 104, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 169976 SdHoareTripleChecker+Valid, 386.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 166709 mSDsluCounter, 25979 SdHoareTripleChecker+Invalid, 327.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 21856 mSDsCounter, 55563 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 381772 IncrementalHoareTripleChecker+Invalid, 437335 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 55563 mSolverCounterUnsat, 4123 mSDtfsCounter, 381772 mSolverCounterSat, 3.5s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 100487 GetRequests, 96509 SyntacticMatches, 3242 SemanticMatches, 736 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 322381 ImplicationChecksByTransitivity, 42.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=-1occurred in iteration=-1, InterpolantAutomatonStates: 0, traceCheckStatistics: 0.5s SsaConstructionTime, 0.8s SatisfiabilityAnalysisTime, 12.9s InterpolantComputationTime, 14449 NumberOfCodeBlocks, 14449 NumberOfCodeBlocksAsserted, 104 NumberOfCheckSat, 14133 ConstructedInterpolants, 0 QuantifiedInterpolants, 63992 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 103 InterpolantComputations, 71 PerfectInterpolantSequences, 8797/9568 InterpolantCoveringCapability, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available - CounterExampleResult [Line: 417]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L17] int a= 1; [L18] int d= 4; [L19] int e= 5; [L20] int f= 6; [L21] int c= 3; [L22] int b= 2; [L25] int u = 21; [L26] int v = 22; [L27] int w = 23; [L28] int x = 24; [L29] int y = 25; [L30] int z = 26; [L32] int a17 = 1; [L33] int a7 = 0; [L34] int a20 = 1; [L35] int a8 = 15; [L36] int a12 = 8; [L37] int a16 = 5; [L38] int a21 = 1; [L590] int output = -1; VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND FALSE !((((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L283] COND FALSE !(((a7==1)&&((a8==13)&&((a12==8)&&(!(a21==1)&&((input==2)&&((((a20==1)&&!(a17==1))&&(a16==6))||(((a17==1)&&!(a20==1))&&(a16==4))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L288] COND FALSE !((((((((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15))&&(a16==6))&&(a21==1))||((((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))&&(a16==4))&&!(a21==1)))&&(input==6))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L296] COND FALSE !(((!(a7==1)&&(!(a17==1)&&(((((input==3)&&(a21==1))&&(a16==4))&&(a8==15))&&(a12==8))))&&!(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L302] COND FALSE !((((((a12==8)&&(((((a17==1)&&!(a20==1))&&(a16==4))||((((a20==1)&&!(a17==1))&&(a16==5))||((!(a17==1)&&(a20==1))&&(a16==6))))&&(input==3)))&&(a8==15))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L309] COND FALSE !((((!(a7==1)&&(((input==5)&&((((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a12==8)))&&(a21==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L316] COND FALSE !(((!(a7==1)&&(((a21==1)&&(((a17==1)&&((a12==8)&&(input==2)))&&!(a20==1)))&&(a16==6)))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L322] COND FALSE !(((!(a17==1)&&((a21==1)&&((!(a20==1)&&((a12==8)&&((input==3)&&!(a7==1))))&&(a8==15))))&&(a16==5))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L326] COND FALSE !((((a16==5)&&(!(a20==1)&&(((((input==6)&&(a21==1))&&(a17==1))&&!(a7==1))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L328] COND FALSE !((!(a7==1)&&((a17==1)&&(((a16==6)&&(!(a20==1)&&(((input==6)&&(a12==8))&&(a21==1))))&&(a8==15))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L334] COND FALSE !(((((a21==1)&&((a8==15)&&((a12==8)&&(!(a7==1)&&(!(a17==1)&&(input==2))))))&&(a16==4))&&(a20==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L339] COND FALSE !(((a8==15)&&(((a16==4)&&((a12==8)&&((!(a20==1)&&(!(a7==1)&&(input==1)))&&!(a17==1))))&&(a21==1)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L343] COND TRUE ((a21==1)&&(((a12==8)&&((((a17==1)&&((input==3)&&((a16==5)||(a16==6))))&&!(a7==1))&&(a20==1)))&&(a8==15))) [L344] a17 = 0 [L345] a16 = 4 [L346] return 21; VAL [\result=21, a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=4, a17=0, a20=1, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND TRUE (((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4)) [L279] a20 = 0 [L280] a17 = 1 [L281] a16 = 6 [L282] return 21; VAL [\result=21, a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=6, a17=1, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=4, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND TRUE (((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6)) [L73] a17 = 0 [L74] return 26; VAL [\result=26, a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=6, a17=0, a20=0, a21=1, a7=0, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND TRUE ((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))))))) [L83] a7 = 1 [L84] a17 = 1 [L85] a21 = 0 [L86] a20 = 1 [L87] a8 = 13 [L88] a16 = 5 [L89] return 26; VAL [\result=26, a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL, EXPR calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=1, a20=1, a21=0, a7=1, a8=13, a=1, b=2, c=3, d=4, e=5, f=6, input=3, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND TRUE (((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1)) [L113] a20 = 0 [L114] a8 = 15 [L115] a17 = 0 [L116] a21 = 1 [L117] return -1; VAL [\result=-1, a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L601] RET, EXPR calculate_output(input) [L601] output = calculate_output(input) [L596] int input; [L597] input = __VERIFIER_nondet_int() [L598] COND FALSE !((input != 1) && (input != 2) && (input != 3) && (input != 4) && (input != 5) && (input != 6)) [L601] CALL calculate_output(input) [L41] COND FALSE !((((a8==15)&&(((((a21==1)&&(((a16==5)||(a16==6))&&(input==1)))&&(a20==1))&&(a17==1))&&!(a7==1)))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L45] COND FALSE !((((((((input==5)&&((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5))))&&(a20==1))&&(a12==8))&&(a7==1))&&!(a21==1))&&(a8==13))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L53] COND FALSE !(((!(a7==1)&&((((a16==6)&&((a21==1)&&((a17==1)&&(input==3))))&&!(a20==1))&&(a8==15)))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L59] COND FALSE !(((a17==1)&&((!(a7==1)&&(((a21==1)&&((((a16==5)||(a16==6))&&(input==6))&&(a20==1)))&&(a8==15)))&&(a12==8)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L64] COND FALSE !((((input==3)&&((((a16==6)&&((!(a20==1)&&(!(a7==1)&&!(a17==1)))&&(a8==15)))&&(a21==1))||((((a8==13)&&((a20==1)&&((a17==1)&&(a7==1))))&&(a16==4))&&!(a21==1))))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L72] COND FALSE !((((a17==1)&&(((a21==1)&&((!(a7==1)&&((input==4)&&(a8==15)))&&!(a20==1)))&&(a12==8)))&&(a16==6))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L75] COND FALSE !((((a12==8)&&(((a21==1)&&((((input==5)&&!(a7==1))&&(a8==15))&&(a16==5)))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L82] COND FALSE !(((a12==8)&&((input==1)&&(((a21==1)&&(((a8==15)&&((!(a17==1)&&!(a7==1))&&!(a20==1)))&&(a16==6)))||(!(a21==1)&&((a16==4)&&((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1))))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L90] COND FALSE !(((((!(a17==1)&&(!(a7==1)&&((a21==1)&&((a8==15)&&(input==4)))))&&!(a20==1))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L94] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&(((a20==1)&&((a17==1)&&(a7==1)))&&(a8==13)))&&!(a21==1)))&&(input==2))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L102] COND FALSE !(((a8==13)&&(!(a21==1)&&((((input==3)&&((((a20==1)&&!(a17==1))&&(a16==6))||((!(a20==1)&&(a17==1))&&(a16==4))))&&(a12==8))&&(a7==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L107] COND FALSE !(((((a21==1)&&((a12==8)&&((input==1)&&(((!(a20==1)&&(a17==1))&&(a16==4))||(((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&(!(a17==1)&&(a20==1))))))))&&!(a7==1))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L112] COND FALSE !((((a16==5)&&(((a7==1)&&((!(a21==1)&&((a12==8)&&(input==3)))&&(a8==13)))&&(a17==1)))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L118] COND FALSE !(((a17==1)&&(((a8==15)&&(((a12==8)&&((!(a7==1)&&(input==5))&&(a21==1)))&&!(a20==1)))&&(a16==5)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L124] COND FALSE !((!(a7==1)&&(((((a21==1)&&(((a8==15)&&(input==5))&&!(a17==1)))&&(a12==8))&&(a20==1))&&(a16==4)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L129] COND FALSE !(((!(a21==1)&&(((a12==8)&&((((a16==6)&&((a20==1)&&!(a17==1)))||((!(a20==1)&&(a17==1))&&(a16==4)))&&(input==1)))&&(a8==13)))&&(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L134] COND FALSE !(((a17==1)&&(!(a7==1)&&(((a21==1)&&(((a12==8)&&((input==5)&&((a16==5)||(a16==6))))&&(a20==1)))&&(a8==15))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L139] COND FALSE !((((a12==8)&&(!(a21==1)&&((a7==1)&&((a8==13)&&((input==6)&&((((a16==6)&&(a17==1))||((a16==4)&&!(a17==1)))||((a16==5)&&!(a17==1))))))))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L146] COND FALSE !((((a16==5)&&((((a8==15)&&((!(a7==1)&&(input==2))&&(a21==1)))&&(a12==8))&&!(a20==1)))&&!(a17==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L150] COND FALSE !((!(a20==1)&&((a21==1)&&((a16==4)&&((a8==15)&&(((a12==8)&&((input==2)&&!(a7==1)))&&!(a17==1))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L154] COND FALSE !((((a21==1)&&(!(a7==1)&&((!(a20==1)&&(!(a17==1)&&((a12==8)&&(input==6))))&&(a16==4))))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L158] COND FALSE !(((a17==1)&&((((((a12==8)&&((input==4)&&(a8==13)))&&(a20==1))&&!(a21==1))&&(a16==5))&&(a7==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L162] COND FALSE !(((((a8==13)&&((a12==8)&&((((((a16==6)&&(a17==1))||(!(a17==1)&&(a16==4)))||(!(a17==1)&&(a16==5)))&&(input==1))&&!(a21==1))))&&(a20==1))&&(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L170] COND FALSE !(((a8==13)&&(!(a21==1)&&((((((!(a17==1)&&(a20==1))&&(a16==6))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==5))&&(a7==1))&&(a12==8))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L175] COND FALSE !(((!(a21==1)&&((((((a16==6)&&((a20==1)&&!(a17==1)))||(((a17==1)&&!(a20==1))&&(a16==4)))&&(input==4))&&(a7==1))&&(a12==8)))&&(a8==13))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L183] COND FALSE !((((a21==1)&&(!(a7==1)&&((((((a16==5)&&((a20==1)&&!(a17==1)))||((!(a17==1)&&(a20==1))&&(a16==6)))||((a16==4)&&((a17==1)&&!(a20==1))))&&(input==4))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L188] COND FALSE !(((((((a16==6)&&((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15)))&&(a21==1))||(((a16==4)&&((((a7==1)&&(a17==1))&&(a20==1))&&(a8==13)))&&!(a21==1)))&&(input==4))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L196] COND FALSE !((!(a17==1)&&(((a12==8)&&(!(a20==1)&&(((a8==15)&&((a21==1)&&(input==4)))&&!(a7==1))))&&(a16==5)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L199] COND FALSE !((((!(a7==1)&&(((input==2)&&((((a16==5)&&((a20==1)&&!(a17==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a8==15)))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L204] COND FALSE !((!(a20==1)&&(((((((input==6)&&(a16==5))&&(a21==1))&&!(a17==1))&&(a12==8))&&!(a7==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L207] COND FALSE !(((a12==8)&&(((((((a21==1)&&(input==5))&&(a8==15))&&(a17==1))&&!(a7==1))&&!(a20==1))&&(a16==6)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L213] COND FALSE !(((((a8==15)&&(!(a7==1)&&((((!(a20==1)&&(a17==1))&&(a16==4))||(((!(a17==1)&&(a20==1))&&(a16==5))||((a16==6)&&((a20==1)&&!(a17==1)))))&&(input==6))))&&(a12==8))&&(a21==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L218] COND FALSE !(((a8==15)&&((a16==4)&&(!(a20==1)&&((((a21==1)&&(!(a17==1)&&(input==5)))&&!(a7==1))&&(a12==8)))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L224] COND FALSE !(((a17==1)&&((a12==8)&&((a8==15)&&(((!(a7==1)&&(((a16==5)||(a16==6))&&(input==2)))&&(a21==1))&&(a20==1)))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L228] COND FALSE !((!(a7==1)&&(((a8==15)&&((!(a17==1)&&((a12==8)&&((input==3)&&(a21==1))))&&(a16==4)))&&(a20==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L233] COND FALSE !(((a16==5)&&((!(a21==1)&&(((a8==13)&&(((input==2)&&(a20==1))&&(a12==8)))&&(a7==1)))&&(a17==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L241] COND FALSE !(((a20==1)&&(((a12==8)&&((a7==1)&&((a8==13)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==3)))))&&!(a21==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L248] COND FALSE !(((a12==8)&&((a7==1)&&(!(a21==1)&&((a8==13)&&((input==6)&&(((a16==6)&&((a20==1)&&!(a17==1)))||((a16==4)&&((a17==1)&&!(a20==1)))))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L255] COND FALSE !(((!(a7==1)&&(!(a17==1)&&((((a16==4)&&((a8==15)&&(input==1)))&&(a12==8))&&(a21==1))))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L260] COND FALSE !(((a17==1)&&(((a21==1)&&(!(a20==1)&&((a12==8)&&((a8==15)&&(!(a7==1)&&(input==1))))))&&(a16==6)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L266] COND FALSE !(((a20==1)&&((a12==8)&&((((a17==1)&&((((a16==5)||(a16==6))&&(input==4))&&(a8==15)))&&(a21==1))&&!(a7==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L271] COND FALSE !(((((a8==13)&&((((!(a21==1)&&(input==6))&&(a20==1))&&(a12==8))&&(a17==1)))&&(a7==1))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L275] COND FALSE !(((a16==5)&&(((((a12==8)&&(!(a7==1)&&((input==2)&&!(a20==1))))&&(a21==1))&&(a17==1))&&(a8==15)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L278] COND FALSE !((((a12==8)&&(((!(a17==1)&&((a21==1)&&((input==4)&&!(a7==1))))&&(a8==15))&&(a20==1)))&&(a16==4))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L283] COND FALSE !(((a7==1)&&((a8==13)&&((a12==8)&&(!(a21==1)&&((input==2)&&((((a20==1)&&!(a17==1))&&(a16==6))||(((a17==1)&&!(a20==1))&&(a16==4))))))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L288] COND FALSE !((((((((!(a20==1)&&(!(a17==1)&&!(a7==1)))&&(a8==15))&&(a16==6))&&(a21==1))||((((a8==13)&&(((a17==1)&&(a7==1))&&(a20==1)))&&(a16==4))&&!(a21==1)))&&(input==6))&&(a12==8))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L296] COND FALSE !(((!(a7==1)&&(!(a17==1)&&(((((input==3)&&(a21==1))&&(a16==4))&&(a8==15))&&(a12==8))))&&!(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L302] COND FALSE !((((((a12==8)&&(((((a17==1)&&!(a20==1))&&(a16==4))||((((a20==1)&&!(a17==1))&&(a16==5))||((!(a17==1)&&(a20==1))&&(a16==6))))&&(input==3)))&&(a8==15))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L309] COND FALSE !((((!(a7==1)&&(((input==5)&&((((a16==5)&&(!(a17==1)&&(a20==1)))||((a16==6)&&((a20==1)&&!(a17==1))))||((a16==4)&&(!(a20==1)&&(a17==1)))))&&(a12==8)))&&(a21==1))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L316] COND FALSE !(((!(a7==1)&&(((a21==1)&&(((a17==1)&&((a12==8)&&(input==2)))&&!(a20==1)))&&(a16==6)))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L322] COND FALSE !(((!(a17==1)&&((a21==1)&&((!(a20==1)&&((a12==8)&&((input==3)&&!(a7==1))))&&(a8==15))))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L326] COND FALSE !((((a16==5)&&(!(a20==1)&&(((((input==6)&&(a21==1))&&(a17==1))&&!(a7==1))&&(a12==8))))&&(a8==15))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L328] COND FALSE !((!(a7==1)&&((a17==1)&&(((a16==6)&&(!(a20==1)&&(((input==6)&&(a12==8))&&(a21==1))))&&(a8==15))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L334] COND FALSE !(((((a21==1)&&((a8==15)&&((a12==8)&&(!(a7==1)&&(!(a17==1)&&(input==2))))))&&(a16==4))&&(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L339] COND FALSE !(((a8==15)&&(((a16==4)&&((a12==8)&&((!(a20==1)&&(!(a7==1)&&(input==1)))&&!(a17==1))))&&(a21==1)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L343] COND FALSE !(((a21==1)&&(((a12==8)&&((((a17==1)&&((input==3)&&((a16==5)||(a16==6))))&&!(a7==1))&&(a20==1)))&&(a8==15)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L347] COND FALSE !((!(a21==1)&&((a20==1)&&(((a12==8)&&((a8==13)&&((((a16==5)&&!(a17==1))||(((a17==1)&&(a16==6))||(!(a17==1)&&(a16==4))))&&(input==2))))&&(a7==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L355] COND FALSE !(((a7==1)&&((a12==8)&&((((a20==1)&&(((!(a17==1)&&(a16==5))||(((a17==1)&&(a16==6))||((a16==4)&&!(a17==1))))&&(input==4)))&&(a8==13))&&!(a21==1))))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L363] COND FALSE !(((a21==1)&&((((!(a7==1)&&((a8==15)&&(!(a20==1)&&(input==4))))&&(a17==1))&&(a16==5))&&(a12==8)))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L365] COND FALSE !((((!(a7==1)&&((!(a20==1)&&((a21==1)&&((input==3)&&(a17==1))))&&(a8==15)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L371] COND FALSE !(((((!(a17==1)&&(!(a20==1)&&((a8==15)&&((input==1)&&(a16==5)))))&&(a12==8))&&(a21==1))&&!(a7==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L373] COND FALSE !(((((a21==1)&&((a8==15)&&(((a16==5)&&((a12==8)&&(input==1)))&&(a17==1))))&&!(a7==1))&&!(a20==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L375] COND FALSE !(((!(a21==1)&&((a20==1)&&((((a8==13)&&((a7==1)&&(input==5)))&&(a17==1))&&(a12==8))))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L382] COND FALSE !((((!(a7==1)&&((a21==1)&&((((input==6)&&(a20==1))&&(a8==15))&&!(a17==1))))&&(a12==8))&&(a16==4))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L387] COND FALSE !(((((a20==1)&&(((!(a21==1)&&((a7==1)&&(input==1)))&&(a8==13))&&(a17==1)))&&(a12==8))&&(a16==5))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, input=1, u=21, v=22, w=23, x=24, y=25, z=26] [L392] COND FALSE !(((a12==8)&&((input==5)&&((((((!(a17==1)&&!(a7==1))&&!(a20==1))&&(a8==15))&&(a16==6))&&(a21==1))||(!(a21==1)&&((a16==4)&&(((a20==1)&&((a7==1)&&(a17==1)))&&(a8==13)))))))) [L401] COND FALSE !(((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) [L404] COND FALSE !((((((((a17==1)&&!(a7==1))&&(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) [L407] COND FALSE !(((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==15))&&(a12==8))&&(a16==4))&&(a21==1))) [L410] COND FALSE !((((((((a17==1)&&!(a7==1))&&(a20==1))&&(a8==13))&&(a12==8))&&(a16==6))&&(a21==1))) [L413] COND FALSE !(((((((!(a17==1)&&!(a7==1))&&!(a20==1))&&(a8==14))&&(a12==8))&&(a16==4))&&(a21==1))) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L416] COND TRUE ((((((!(a17==1)&&(a7==1))&&!(a20==1))&&(a8==15))&&(a12==8))&&(a16==5))&&(a21==1)) VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] [L417] reach_error() VAL [a12=8, a16=5, a17=0, a20=0, a21=1, a7=1, a8=15, a=1, b=2, c=3, d=4, e=5, f=6, u=21, v=22, w=23, x=24, y=25, z=26] * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29ms. Allocated memory is still 117.4MB. Free memory was 72.1MB in the beginning and 72.1MB in the end (delta: 83.9kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 420.06ms. Allocated memory is still 117.4MB. Free memory was 90.8MB in the beginning and 63.9MB in the end (delta: 26.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 56.64ms. Allocated memory is still 117.4MB. Free memory was 63.9MB in the beginning and 58.6MB in the end (delta: 5.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 53.20ms. Allocated memory is still 117.4MB. Free memory was 58.6MB in the beginning and 54.4MB in the end (delta: 4.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 1222.77ms. Allocated memory was 117.4MB in the beginning and 192.9MB in the end (delta: 75.5MB). Free memory was 54.4MB in the beginning and 98.2MB in the end (delta: -43.7MB). Peak memory consumption was 33.2MB. Max. memory is 16.1GB. * CodeCheck took 67112.62ms. Allocated memory was 192.9MB in the beginning and 1.3GB in the end (delta: 1.1GB). Free memory was 98.2MB in the beginning and 712.2MB in the end (delta: -614.0MB). Peak memory consumption was 469.0MB. Max. memory is 16.1GB. * Witness Printer took 213.62ms. Allocated memory is still 1.3GB. Free memory was 712.2MB in the beginning and 678.6MB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. RESULT: Ultimate proved your program to be incorrect! [2024-12-06 04:44:28,788 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dec32cb8-8052-4b34-b681-8f500681d76f/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE