./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/recursified_nla-digbench/recursified_divbin2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/config/KojakReach.xml -i ../../sv-benchmarks/c/recursified_nla-digbench/recursified_divbin2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/config/svcomp-Reach-32bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 07d2bb25a1c8c4ef92611e8b25e211f661495bf054d1380ec62ffea892b45c2f --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-06 05:03:01,403 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-06 05:03:01,459 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/config/svcomp-Reach-32bit-Kojak_Default.epf [2024-12-06 05:03:01,463 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-06 05:03:01,464 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.Interpolating solver [2024-12-06 05:03:01,484 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-06 05:03:01,485 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-06 05:03:01,485 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ALWAYS [2024-12-06 05:03:01,485 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-06 05:03:01,486 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-06 05:03:01,486 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-06 05:03:01,486 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-06 05:03:01,486 INFO L153 SettingsManager]: * sizeof long=4 [2024-12-06 05:03:01,486 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-06 05:03:01,486 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-12-06 05:03:01,486 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-06 05:03:01,486 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-06 05:03:01,486 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-06 05:03:01,487 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-06 05:03:01,487 INFO L153 SettingsManager]: * sizeof long double=12 [2024-12-06 05:03:01,487 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-06 05:03:01,487 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-06 05:03:01,487 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-06 05:03:01,487 INFO L151 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2024-12-06 05:03:01,487 INFO L153 SettingsManager]: * Timeout in seconds=1000000 [2024-12-06 05:03:01,487 INFO L153 SettingsManager]: * Theory for external solver=ALL [2024-12-06 05:03:01,487 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-06 05:03:01,487 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-12-06 05:03:01,487 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-06 05:03:01,488 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-06 05:03:01,488 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-06 05:03:01,488 INFO L153 SettingsManager]: * Trace refinement strategy=PENGUIN [2024-12-06 05:03:01,488 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-06 05:03:01,488 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 07d2bb25a1c8c4ef92611e8b25e211f661495bf054d1380ec62ffea892b45c2f [2024-12-06 05:03:01,722 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-06 05:03:01,729 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-06 05:03:01,731 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-06 05:03:01,732 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-06 05:03:01,733 INFO L274 PluginConnector]: CDTParser initialized [2024-12-06 05:03:01,734 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/../../sv-benchmarks/c/recursified_nla-digbench/recursified_divbin2.i [2024-12-06 05:03:04,352 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/data/17fbd1ea9/4a42fb8085c143f8ad1ec118418edddd/FLAGd1439b6d6 [2024-12-06 05:03:04,574 INFO L384 CDTParser]: Found 1 translation units. [2024-12-06 05:03:04,574 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/sv-benchmarks/c/recursified_nla-digbench/recursified_divbin2.i [2024-12-06 05:03:04,581 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/data/17fbd1ea9/4a42fb8085c143f8ad1ec118418edddd/FLAGd1439b6d6 [2024-12-06 05:03:04,939 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/data/17fbd1ea9/4a42fb8085c143f8ad1ec118418edddd [2024-12-06 05:03:04,940 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-06 05:03:04,941 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-06 05:03:04,942 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-06 05:03:04,942 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-06 05:03:04,946 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-06 05:03:04,947 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 05:03:04" (1/1) ... [2024-12-06 05:03:04,948 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6138bcdd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:04, skipping insertion in model container [2024-12-06 05:03:04,948 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 05:03:04" (1/1) ... [2024-12-06 05:03:04,962 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-06 05:03:05,061 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/sv-benchmarks/c/recursified_nla-digbench/recursified_divbin2.i[1567,1580] [2024-12-06 05:03:05,072 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-06 05:03:05,078 INFO L200 MainTranslator]: Completed pre-run [2024-12-06 05:03:05,085 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/sv-benchmarks/c/recursified_nla-digbench/recursified_divbin2.i[1567,1580] [2024-12-06 05:03:05,094 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-06 05:03:05,104 INFO L204 MainTranslator]: Completed translation [2024-12-06 05:03:05,104 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05 WrapperNode [2024-12-06 05:03:05,104 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-06 05:03:05,105 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-06 05:03:05,105 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-06 05:03:05,105 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-06 05:03:05,109 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,114 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,125 INFO L138 Inliner]: procedures = 19, calls = 59, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 57 [2024-12-06 05:03:05,125 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-06 05:03:05,125 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-06 05:03:05,125 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-06 05:03:05,126 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-06 05:03:05,130 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,130 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,132 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,132 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,136 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,137 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,139 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,140 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,140 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,141 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-06 05:03:05,142 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-06 05:03:05,142 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-06 05:03:05,142 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-06 05:03:05,143 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,148 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2024-12-06 05:03:05,159 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/z3 [2024-12-06 05:03:05,171 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) [2024-12-06 05:03:05,173 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2ac6f18c-f0f2-40d0-b618-8b339a31158a/bin/ukojak-verify-CZk0znPC7b/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Waiting until timeout for monitored process [2024-12-06 05:03:05,198 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-06 05:03:05,198 INFO L130 BoogieDeclarations]: Found specification of procedure func_to_recursive_line_33_to_35_0 [2024-12-06 05:03:05,199 INFO L138 BoogieDeclarations]: Found implementation of procedure func_to_recursive_line_33_to_35_0 [2024-12-06 05:03:05,199 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-12-06 05:03:05,199 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-12-06 05:03:05,199 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-12-06 05:03:05,199 INFO L130 BoogieDeclarations]: Found specification of procedure func_to_recursive_line_37_to_44_0 [2024-12-06 05:03:05,199 INFO L138 BoogieDeclarations]: Found implementation of procedure func_to_recursive_line_37_to_44_0 [2024-12-06 05:03:05,199 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-06 05:03:05,199 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-06 05:03:05,199 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-12-06 05:03:05,199 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2024-12-06 05:03:05,199 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2024-12-06 05:03:05,199 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-12-06 05:03:05,263 INFO L234 CfgBuilder]: Building ICFG [2024-12-06 05:03:05,265 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-06 05:03:05,428 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2024-12-06 05:03:05,428 INFO L283 CfgBuilder]: Performing block encoding [2024-12-06 05:03:05,466 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-06 05:03:05,467 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-12-06 05:03:05,467 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 05:03:05 BoogieIcfgContainer [2024-12-06 05:03:05,467 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-06 05:03:05,468 INFO L112 PluginConnector]: ------------------------CodeCheck---------------------------- [2024-12-06 05:03:05,468 INFO L270 PluginConnector]: Initializing CodeCheck... [2024-12-06 05:03:05,476 INFO L274 PluginConnector]: CodeCheck initialized [2024-12-06 05:03:05,476 INFO L184 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 05:03:05" (1/1) ... [2024-12-06 05:03:05,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-06 05:03:05,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:05,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 27 states and 34 transitions. [2024-12-06 05:03:05,521 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 34 transitions. [2024-12-06 05:03:05,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2024-12-06 05:03:05,525 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:05,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:05,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:05,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:05,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:05,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 27 states and 31 transitions. [2024-12-06 05:03:05,707 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 31 transitions. [2024-12-06 05:03:05,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2024-12-06 05:03:05,707 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:05,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:05,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-12-06 05:03:05,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:05,884 WARN L254 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 96 conjuncts are in the unsatisfiable core [2024-12-06 05:03:05,894 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-06 05:03:05,972 WARN L560 QuantifierPusher]: no eliminatee completely removed, nonetheless the elimination was considered successful [2024-12-06 05:03:06,002 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,003 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,004 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,004 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,005 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,013 WARN L214 Elim1Store]: Array PQE input equivalent to false [2024-12-06 05:03:06,024 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,025 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,025 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,026 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,031 WARN L214 Elim1Store]: Array PQE input equivalent to false [2024-12-06 05:03:06,062 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,064 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,067 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,074 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,075 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,077 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,078 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,079 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,081 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,082 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,085 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 11 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 323 treesize of output 33 [2024-12-06 05:03:06,122 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,130 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:06,138 INFO L349 Elim1Store]: treesize reduction 40, result has 2.4 percent of original size [2024-12-06 05:03:06,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 57 treesize of output 49 [2024-12-06 05:03:06,203 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,204 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,204 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:06,208 WARN L214 Elim1Store]: Array PQE input equivalent to false [2024-12-06 05:03:06,833 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-12-06 05:03:06,833 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 28 [2024-12-06 05:03:06,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:07,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:07,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 35 states and 49 transitions. [2024-12-06 05:03:07,608 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 49 transitions. [2024-12-06 05:03:07,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2024-12-06 05:03:07,609 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:07,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:07,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-12-06 05:03:07,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:07,791 INFO L256 TraceCheckSpWp]: Trace formula consists of 198 conjuncts, 77 conjuncts are in the unsatisfiable core [2024-12-06 05:03:07,796 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-06 05:03:07,818 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:07,821 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:07,822 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:07,997 INFO L349 Elim1Store]: treesize reduction 165, result has 40.4 percent of original size [2024-12-06 05:03:07,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 3 stores, 0 select indices, 0 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 566 treesize of output 309 [2024-12-06 05:03:08,024 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,025 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,026 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,027 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,031 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,034 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,035 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,092 INFO L349 Elim1Store]: treesize reduction 102, result has 1.0 percent of original size [2024-12-06 05:03:08,093 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 3 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 11 case distinctions, treesize of input 188 treesize of output 230 [2024-12-06 05:03:08,117 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:08,124 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 298 [2024-12-06 05:03:08,141 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,144 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,146 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,151 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,153 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,154 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,155 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,158 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,161 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,162 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,176 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:08,243 INFO L349 Elim1Store]: treesize reduction 107, result has 9.3 percent of original size [2024-12-06 05:03:08,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 3 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 6 new quantified variables, introduced 11 case distinctions, treesize of input 324 treesize of output 404 [2024-12-06 05:03:08,293 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,311 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:08,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-12-06 05:03:08,447 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:08,447 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:08,464 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:08,465 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:08,465 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:08,481 INFO L349 Elim1Store]: treesize reduction 29, result has 12.1 percent of original size [2024-12-06 05:03:08,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 93 treesize of output 61 [2024-12-06 05:03:08,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2024-12-06 05:03:08,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:08,657 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:08,726 INFO L349 Elim1Store]: treesize reduction 106, result has 21.5 percent of original size [2024-12-06 05:03:08,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 16 case distinctions, treesize of input 119 treesize of output 109 [2024-12-06 05:03:08,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:08,897 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:08,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2024-12-06 05:03:08,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:09,036 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:09,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 70 treesize of output 86 [2024-12-06 05:03:09,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:09,661 INFO L349 Elim1Store]: treesize reduction 39, result has 39.1 percent of original size [2024-12-06 05:03:09,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 7 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 7 case distinctions, treesize of input 91 treesize of output 77 [2024-12-06 05:03:09,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:09,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:09,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2024-12-06 05:03:09,804 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:09,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 32 [2024-12-06 05:03:09,864 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:09,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 60 treesize of output 76 [2024-12-06 05:03:10,113 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:10,114 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 188 [2024-12-06 05:03:10,771 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:10,772 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 338 [2024-12-06 05:03:10,961 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:10,963 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 338 [2024-12-06 05:03:11,398 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:11,400 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 208 [2024-12-06 05:03:11,484 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:11,485 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 229 [2024-12-06 05:03:11,520 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:11,520 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 182 [2024-12-06 05:03:11,558 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:11,559 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 251 [2024-12-06 05:03:11,644 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:11,645 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 204 [2024-12-06 05:03:11,678 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:11,679 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 209 [2024-12-06 05:03:11,737 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:11,738 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 256 [2024-12-06 05:03:12,780 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-12-06 05:03:12,780 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 28 [2024-12-06 05:03:12,954 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:12,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-12-06 05:03:12,999 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-12-06 05:03:14,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:14,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 41 states and 66 transitions. [2024-12-06 05:03:14,303 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 66 transitions. [2024-12-06 05:03:14,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2024-12-06 05:03:14,304 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:14,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:14,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-12-06 05:03:14,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:14,444 INFO L256 TraceCheckSpWp]: Trace formula consists of 227 conjuncts, 93 conjuncts are in the unsatisfiable core [2024-12-06 05:03:14,447 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-06 05:03:14,455 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,459 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,461 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,463 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,464 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,499 INFO L349 Elim1Store]: treesize reduction 32, result has 49.2 percent of original size [2024-12-06 05:03:14,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 274 treesize of output 130 [2024-12-06 05:03:14,507 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,508 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,509 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,510 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,511 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,513 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,514 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,515 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,516 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:14,529 INFO L349 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2024-12-06 05:03:14,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 4 select indices, 4 select index equivalence classes, 9 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 3 case distinctions, treesize of input 110 treesize of output 127 [2024-12-06 05:03:14,535 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:14,536 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 205 [2024-12-06 05:03:14,563 INFO L349 Elim1Store]: treesize reduction 24, result has 4.0 percent of original size [2024-12-06 05:03:14,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 52 treesize of output 46 [2024-12-06 05:03:14,655 WARN L560 QuantifierPusher]: no eliminatee completely removed, nonetheless the elimination was considered successful [2024-12-06 05:03:14,657 WARN L560 QuantifierPusher]: no eliminatee completely removed, nonetheless the elimination was considered successful [2024-12-06 05:03:14,658 WARN L560 QuantifierPusher]: no eliminatee completely removed, nonetheless the elimination was considered successful [2024-12-06 05:03:14,685 WARN L560 QuantifierPusher]: no eliminatee completely removed, nonetheless the elimination was considered successful [2024-12-06 05:03:14,687 WARN L560 QuantifierPusher]: no eliminatee completely removed, nonetheless the elimination was considered successful [2024-12-06 05:03:14,688 WARN L560 QuantifierPusher]: no eliminatee completely removed, nonetheless the elimination was considered successful [2024-12-06 05:03:14,745 WARN L560 QuantifierPusher]: no eliminatee completely removed, nonetheless the elimination was considered successful [2024-12-06 05:03:14,797 WARN L560 QuantifierPusher]: no eliminatee completely removed, nonetheless the elimination was considered successful [2024-12-06 05:03:15,137 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,138 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:15,138 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,139 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,140 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,140 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 44 [2024-12-06 05:03:15,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:15,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:15,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:15,176 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,176 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:15,177 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,177 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,178 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,179 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 42 [2024-12-06 05:03:15,201 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,202 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,203 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,203 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,204 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,205 INFO L173 IndexEqualityManager]: detected equality via solver [2024-12-06 05:03:15,205 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 134 treesize of output 114 [2024-12-06 05:03:15,221 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-12-06 05:03:15,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 64 [2024-12-06 05:03:15,814 INFO L159 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:15,814 INFO L164 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 8 [2024-12-06 05:03:15,889 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,890 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,891 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,892 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,892 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-12-06 05:03:15,934 INFO L349 Elim1Store]: treesize reduction 72, result has 27.3 percent of original size [2024-12-06 05:03:15,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 9 case distinctions, treesize of input 348 treesize of output 357 [2024-12-06 05:03:15,960 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 162 treesize of output 160 [2024-12-06 05:03:15,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 160 treesize of output 158 [2024-12-06 05:03:15,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 158 treesize of output 156 [2024-12-06 05:03:15,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 156 treesize of output 154 [2024-12-06 05:03:15,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 154 treesize of output 152 [2024-12-06 05:03:15,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 152 treesize of output 150 [2024-12-06 05:03:16,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2024-12-06 05:03:16,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2024-12-06 05:03:16,467 INFO L209 tifierPushTermWalker]: Run 10 iterations without descend maybe there is a nontermination bug. [2024-12-06 05:03:17,863 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-12-06 05:03:17,864 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 3 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 7 case distinctions, treesize of input 121 treesize of output 149 [2024-12-06 05:03:18,680 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-06 05:03:19,223 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse4 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (= .cse4 .cse6)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse0 0) 0) (not (and .cse1 .cse2 .cse3 (let ((.cse5 (= (select .cse0 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse4 1) .cse5 (= .cse6 1)) (and .cse5 .cse7 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse8 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse4 (select (select .cse8 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse9 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse4 (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse12 .cse13)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse1 .cse2 .cse3 .cse7 .cse11 .cse12 .cse13 (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|) 1)))) is different from false [2024-12-06 05:03:19,543 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse4 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (= .cse4 .cse6)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse0 0) 0) (not (and .cse1 .cse2 .cse3 (let ((.cse5 (= (select .cse0 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse4 1) .cse5 (= .cse6 1)) (and .cse5 .cse7 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse8 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse4 (select (select .cse8 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse9 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse4 (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse12 .cse13)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse1 .cse2 .cse3 .cse7 .cse11 .cse12 .cse13 (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|) 1))))) is different from true [2024-12-06 05:03:20,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:20,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 39 states and 61 transitions. [2024-12-06 05:03:20,500 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 61 transitions. [2024-12-06 05:03:20,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:20,501 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:20,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:20,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:21,763 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:25,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:25,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 45 states and 79 transitions. [2024-12-06 05:03:25,297 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 79 transitions. [2024-12-06 05:03:25,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:25,298 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:25,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:25,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:25,953 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:25,961 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse7 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (= .cse5 .cse7)) (.cse12 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|) .cse0) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse1 0) 0) (not (and .cse2 .cse3 .cse4 (let ((.cse6 (= (select .cse1 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse5 1) .cse6 (= .cse7 1)) (and .cse6 .cse8 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse9 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse5 (select (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse9 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse10 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse5 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse10) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse12 .cse13 .cse14)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse2 .cse3 .cse4 .cse8 .cse12 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse13 .cse14 (= .cse0 1)))) is different from false [2024-12-06 05:03:26,090 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse4 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (= .cse4 .cse6)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse0 0) 0) (not (and .cse1 .cse2 .cse3 (let ((.cse5 (= (select .cse0 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse4 1) .cse5 (= .cse6 1)) (and .cse5 .cse7 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse8 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse4 (select (select .cse8 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse9 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse4 (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse12 .cse13)) (not (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|) .cse14) (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse1 .cse2 .cse3 .cse7 .cse11 .cse12 .cse13 (= .cse14 1)))) is different from false [2024-12-06 05:03:26,104 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse7 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (= .cse5 .cse7)) (.cse12 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|) .cse0) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse1 0) 0) (not (and .cse2 .cse3 .cse4 (let ((.cse6 (= (select .cse1 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse5 1) .cse6 (= .cse7 1)) (and .cse6 .cse8 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse9 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse5 (select (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse9 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse10 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse5 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse10) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse12 .cse13 .cse14)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse2 .cse3 .cse4 .cse8 .cse12 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse13 .cse14 (= .cse0 1))))) is different from true [2024-12-06 05:03:26,115 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse4 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (= .cse4 .cse6)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse0 0) 0) (not (and .cse1 .cse2 .cse3 (let ((.cse5 (= (select .cse0 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse4 1) .cse5 (= .cse6 1)) (and .cse5 .cse7 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse8 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse4 (select (select .cse8 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse9 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse4 (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse12 .cse13)) (not (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|) .cse14) (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse1 .cse2 .cse3 .cse7 .cse11 .cse12 .cse13 (= .cse14 1))))) is different from true [2024-12-06 05:03:26,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:26,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 47 states and 91 transitions. [2024-12-06 05:03:26,842 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 91 transitions. [2024-12-06 05:03:26,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:26,843 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:26,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:26,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:27,835 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:27,846 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 (= .cse0 1) .cse4 .cse5 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse9 .cse13 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse14 .cse15 (= .cse1 1)))) is different from false [2024-12-06 05:03:27,959 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse16 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse17 (= .cse1 1))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 .cse4 .cse5 .cse9 .cse13 .cse16 .cse14 .cse15 .cse17 (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (= .cse0 1) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse16 .cse17))))) is different from false [2024-12-06 05:03:27,973 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 (= .cse0 1) .cse4 .cse5 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse9 .cse13 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse14 .cse15 (= .cse1 1))))) is different from true [2024-12-06 05:03:27,986 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse16 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse17 (= .cse1 1))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 .cse4 .cse5 .cse9 .cse13 .cse16 .cse14 .cse15 .cse17 (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (= .cse0 1) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse16 .cse17)))))) is different from true [2024-12-06 05:03:28,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:28,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 48 states and 100 transitions. [2024-12-06 05:03:28,283 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 100 transitions. [2024-12-06 05:03:28,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:28,284 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:28,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:28,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:28,657 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:28,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:28,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 48 states and 100 transitions. [2024-12-06 05:03:28,701 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 100 transitions. [2024-12-06 05:03:28,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:28,702 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:28,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:28,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:29,184 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:29,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:29,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 48 states and 100 transitions. [2024-12-06 05:03:29,228 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 100 transitions. [2024-12-06 05:03:29,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:29,229 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:29,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:29,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:29,607 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:29,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:29,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 48 states and 100 transitions. [2024-12-06 05:03:29,650 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 100 transitions. [2024-12-06 05:03:29,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:29,651 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:29,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:29,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:30,103 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:30,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:30,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 48 states and 100 transitions. [2024-12-06 05:03:30,147 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 100 transitions. [2024-12-06 05:03:30,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:30,148 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:30,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:30,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:30,709 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:30,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:30,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 48 states and 100 transitions. [2024-12-06 05:03:30,777 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 100 transitions. [2024-12-06 05:03:30,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:30,778 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:30,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:30,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:31,214 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:31,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:31,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 48 states and 100 transitions. [2024-12-06 05:03:31,263 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 100 transitions. [2024-12-06 05:03:31,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:31,264 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:31,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:31,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:32,325 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:32,333 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (= .cse0 1)) (.cse17 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse18 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse19 (= .cse1 1))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 .cse16 .cse4 .cse5 .cse17 .cse9 .cse13 .cse18 .cse14 .cse15 .cse19 (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse16 .cse17 .cse18 .cse19))))) is different from false [2024-12-06 05:03:32,494 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (= .cse0 1)) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse16 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse19 (= .cse1 1))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 .cse4 .cse5 .cse9 .cse13 .cse16 .cse14 (not (and .cse17 .cse18 .cse16 .cse19)) .cse15 .cse19 (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse17 .cse18 .cse16 .cse19))))) is different from false [2024-12-06 05:03:32,508 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (= .cse0 1)) (.cse17 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse18 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse19 (= .cse1 1))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 .cse16 .cse4 .cse5 .cse17 .cse9 .cse13 .cse18 .cse14 .cse15 .cse19 (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse16 .cse17 .cse18 .cse19)))))) is different from true [2024-12-06 05:03:32,519 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (= .cse0 1)) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse16 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse19 (= .cse1 1))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 .cse4 .cse5 .cse9 .cse13 .cse16 .cse14 (not (and .cse17 .cse18 .cse16 .cse19)) .cse15 .cse19 (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse17 .cse18 .cse16 .cse19)))))) is different from true [2024-12-06 05:03:33,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:33,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 50 states and 111 transitions. [2024-12-06 05:03:33,198 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 111 transitions. [2024-12-06 05:03:33,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:33,198 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:33,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:33,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:34,056 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:34,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:34,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 50 states and 111 transitions. [2024-12-06 05:03:34,248 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 111 transitions. [2024-12-06 05:03:34,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:34,249 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:34,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:34,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:35,171 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:35,180 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (= .cse0 1)) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse17 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse19 (= .cse1 1))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 .cse16 .cse4 .cse5 .cse9 .cse13 .cse17 .cse14 (not (and .cse16 .cse18 .cse17 .cse19)) .cse15 .cse19 (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse16 .cse18 .cse17 .cse19))))) is different from false [2024-12-06 05:03:35,320 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse5 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (= .cse6 .cse8)) (.cse13 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (= .cse0 1)) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse17 (or (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse19 (= .cse1 1))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse2 0) 0) (not (and .cse3 .cse4 .cse5 (let ((.cse7 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse6 1) .cse7 (= .cse8 1)) (and .cse7 .cse9 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse6 (select (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse11 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse6 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse11) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse13 .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse3 .cse16 .cse4 .cse5 .cse9 .cse13 .cse17 .cse14 (not (and .cse16 .cse18 .cse17 .cse19)) .cse15 .cse19 (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse16 .cse18 .cse17 .cse19)))))) is different from true [2024-12-06 05:03:35,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:35,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 50 states and 111 transitions. [2024-12-06 05:03:35,571 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 111 transitions. [2024-12-06 05:03:35,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:35,572 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:35,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:35,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:36,056 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:36,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:36,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 50 states and 111 transitions. [2024-12-06 05:03:36,096 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 111 transitions. [2024-12-06 05:03:36,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:36,097 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:36,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:36,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:36,543 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:36,559 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse16 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse4 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (= .cse4 .cse6)) (.cse14 (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|) .cse16)) (.cse15 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse0 0) 0) (not (and .cse1 .cse2 .cse3 (let ((.cse5 (= (select .cse0 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse4 1) .cse5 (= .cse6 1)) (and .cse5 .cse7 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse8 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse4 (select (select .cse8 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse9 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse4 (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse12 .cse13)) (not (and .cse14 (or .cse15 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse1 .cse2 .cse3 .cse7 (not (and .cse14 .cse15)) .cse11 .cse12 .cse13 (= .cse16 1)))) is different from false [2024-12-06 05:03:36,574 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse16 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse4 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (= .cse4 .cse6)) (.cse14 (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|) .cse16)) (.cse15 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse0 0) 0) (not (and .cse1 .cse2 .cse3 (let ((.cse5 (= (select .cse0 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse4 1) .cse5 (= .cse6 1)) (and .cse5 .cse7 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse8 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse4 (select (select .cse8 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse9 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse4 (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse12 .cse13)) (not (and .cse14 (or .cse15 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse1 .cse2 .cse3 .cse7 (not (and .cse14 .cse15)) .cse11 .cse12 .cse13 (= .cse16 1))))) is different from true [2024-12-06 05:03:36,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:36,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 50 states and 111 transitions. [2024-12-06 05:03:36,596 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 111 transitions. [2024-12-06 05:03:36,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:36,596 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:36,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:36,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:36,948 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:36,962 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse16 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse19 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse4 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (= .cse4 .cse6)) (.cse14 (= .cse17 .cse19)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (or .cse16 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (= .cse19 1))) (and (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse0 0) 0) (not (and .cse1 .cse2 .cse3 (let ((.cse5 (= (select .cse0 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse4 1) .cse5 (= .cse6 1)) (and .cse5 .cse7 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse8 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse4 (select (select .cse8 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse9 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse4 (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse12 .cse13)) (not (and .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse1 .cse2 .cse3 .cse7 (not (and .cse14 .cse16)) .cse11 .cse12 (not (and (= .cse17 1) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse15 .cse18)) .cse13 .cse18))) is different from false [2024-12-06 05:03:36,977 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse16 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse19 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse4 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (= .cse4 .cse6)) (.cse14 (= .cse17 .cse19)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (or .cse16 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (= .cse19 1))) (and (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse0 0) 0) (not (and .cse1 .cse2 .cse3 (let ((.cse5 (= (select .cse0 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse4 1) .cse5 (= .cse6 1)) (and .cse5 .cse7 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse8 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse4 (select (select .cse8 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse10 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse9 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse4 (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse10 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse12 .cse13)) (not (and .cse14 .cse15)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse1 .cse2 .cse3 .cse7 (not (and .cse14 .cse16)) .cse11 .cse12 (not (and (= .cse17 1) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse15 .cse18)) .cse13 .cse18)))) is different from true [2024-12-06 05:03:37,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:37,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 50 states and 111 transitions. [2024-12-06 05:03:37,006 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 111 transitions. [2024-12-06 05:03:37,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:37,007 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:37,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:37,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:37,342 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:37,352 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse7 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (= .cse0 1) .cse5 .cse6 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse10 .cse14 (or .cse3 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse15 .cse16 (= .cse1 1)))) is different from false [2024-12-06 05:03:37,362 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse15 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse17 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse7 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (= .cse5 .cse7)) (.cse0 (= .cse15 .cse17)) (.cse12 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (= (select .cse1 0) 0) (not (and .cse2 .cse3 .cse4 (let ((.cse6 (= (select .cse1 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse5 1) .cse6 (= .cse7 1)) (and .cse6 .cse8 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse9 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse5 (select (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse9 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse10 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse5 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse10) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse12 .cse13 .cse14)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse2 (= .cse15 1) .cse3 .cse4 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse8 (not (and .cse0 .cse16)) .cse12 (or .cse16 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse13 .cse14 (= .cse17 1)))) is different from false [2024-12-06 05:03:37,379 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse7 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (= .cse0 1) .cse5 .cse6 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse10 .cse14 (or .cse3 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse15 .cse16 (= .cse1 1))))) is different from true [2024-12-06 05:03:37,389 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse15 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse17 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse7 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse2 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (= .cse5 .cse7)) (.cse0 (= .cse15 .cse17)) (.cse12 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse13 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (= (select .cse1 0) 0) (not (and .cse2 .cse3 .cse4 (let ((.cse6 (= (select .cse1 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse5 1) .cse6 (= .cse7 1)) (and .cse6 .cse8 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse9 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse5 (select (select .cse9 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse9 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse10 (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse5 (select .cse10 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse10) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse12 .cse13 .cse14)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse2 (= .cse15 1) .cse3 .cse4 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse8 (not (and .cse0 .cse16)) .cse12 (or .cse16 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse13 .cse14 (= .cse17 1))))) is different from true [2024-12-06 05:03:37,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:37,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:37,415 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:37,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:37,415 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:37,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:37,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:37,752 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:37,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:37,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:37,783 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:37,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:37,783 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:37,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:37,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:38,133 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:38,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:38,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:38,164 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:38,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:38,165 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:38,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:38,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:38,527 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:38,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:38,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:38,552 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:38,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:38,553 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:38,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:38,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:38,785 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:38,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:38,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:38,810 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:38,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:38,810 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:38,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:38,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:39,062 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:39,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:39,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:39,087 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:39,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:39,087 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:39,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:39,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:39,602 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:39,744 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|))) (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse21 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse5 (= .cse21 .cse20)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse20 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse18 .cse19 .cse4))) is different from false [2024-12-06 05:03:39,758 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|))) (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse21 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse5 (= .cse21 .cse20)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse20 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse18 .cse19 .cse4)))) is different from true [2024-12-06 05:03:39,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:39,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:39,913 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:39,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:39,914 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:39,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:39,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:40,358 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:40,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:40,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:40,488 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:40,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:40,488 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:40,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:40,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:40,873 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:40,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:40,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:40,902 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:40,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:40,903 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:40,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:40,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:41,181 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:41,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:41,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:41,217 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:41,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:41,218 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:41,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:41,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:41,561 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:41,572 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 .cse9 .cse10 .cse3 .cse14 .cse18 .cse21 .cse19 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4))))) is different from false [2024-12-06 05:03:41,587 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 .cse9 .cse10 .cse3 .cse14 .cse18 .cse21 .cse19 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4)))))) is different from true [2024-12-06 05:03:41,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:41,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:41,613 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:41,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:41,613 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:41,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:41,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:41,992 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:42,004 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse11 (= .cse8 .cse10)) (.cse18 (= .cse21 .cse20)) (.cse15 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (= .cse21 1)) (.cse2 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse19 (or .cse0 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse3 (= .cse20 1))) (and (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse0 .cse1 .cse2 .cse3)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse4 0) 0) (not (and .cse5 .cse6 .cse7 (let ((.cse9 (= (select .cse4 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse8 1) .cse9 (= .cse10 1)) (and .cse9 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse8 (select (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse13 (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse8 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse13) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse15 .cse16 .cse17)) (not (and .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse5 .cse6 .cse7 .cse11 (not (and .cse18 .cse0)) .cse15 .cse16 (not (and .cse1 .cse2 .cse19 .cse3)) .cse17 .cse3))) is different from false [2024-12-06 05:03:42,022 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse11 (= .cse8 .cse10)) (.cse18 (= .cse21 .cse20)) (.cse15 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (= .cse21 1)) (.cse2 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse19 (or .cse0 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse3 (= .cse20 1))) (and (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse0 .cse1 .cse2 .cse3)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse4 0) 0) (not (and .cse5 .cse6 .cse7 (let ((.cse9 (= (select .cse4 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse8 1) .cse9 (= .cse10 1)) (and .cse9 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse8 (select (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse13 (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse8 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse13) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse15 .cse16 .cse17)) (not (and .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse5 .cse6 .cse7 .cse11 (not (and .cse18 .cse0)) .cse15 .cse16 (not (and .cse1 .cse2 .cse19 .cse3)) .cse17 .cse3)))) is different from true [2024-12-06 05:03:42,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:42,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:42,058 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:42,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:42,059 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:42,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:42,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:42,411 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:42,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:42,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:42,453 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:42,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:42,454 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:42,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:42,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:42,723 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:42,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:42,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:42,749 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:42,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:42,749 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:42,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:42,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:42,972 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:43,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:43,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:43,012 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:43,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:43,012 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:43,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:43,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:43,225 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:43,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:43,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:43,250 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:43,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:43,250 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:43,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:43,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:43,487 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:43,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:43,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:43,512 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:43,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:43,512 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:43,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:43,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:43,793 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:43,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:43,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:43,832 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:43,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:43,832 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:43,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:43,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:44,232 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:44,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:44,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:44,265 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:44,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:44,266 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:44,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:44,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:44,515 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:44,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:44,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:44,540 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:44,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:44,540 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:44,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:44,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:44,884 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:44,896 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse5 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse6 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse12 (= .cse9 .cse11)) (.cse19 (= .cse21 .cse20)) (.cse16 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (= .cse21 1)) (.cse2 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (or .cse0 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse3 (= .cse20 1))) (and (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse0 .cse1 .cse2 .cse3)) (not (and .cse1 .cse4 .cse3)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse5 0) 0) (not (and .cse6 .cse7 .cse8 (let ((.cse10 (= (select .cse5 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse9 1) .cse10 (= .cse11 1)) (and .cse10 .cse12 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse9 (select (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse14 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse9 (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse14) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse16 .cse17 .cse18)) (not (and .cse19 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse6 .cse7 .cse8 .cse12 (not (and .cse19 .cse0)) .cse16 .cse17 (not (and .cse1 .cse2 .cse4 .cse3)) .cse18 .cse3))) is different from false [2024-12-06 05:03:44,911 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse5 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse6 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse12 (= .cse9 .cse11)) (.cse19 (= .cse21 .cse20)) (.cse16 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (= .cse21 1)) (.cse2 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (or .cse0 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse3 (= .cse20 1))) (and (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse0 .cse1 .cse2 .cse3)) (not (and .cse1 .cse4 .cse3)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse5 0) 0) (not (and .cse6 .cse7 .cse8 (let ((.cse10 (= (select .cse5 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse9 1) .cse10 (= .cse11 1)) (and .cse10 .cse12 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse9 (select (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse14 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse9 (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse14) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse16 .cse17 .cse18)) (not (and .cse19 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse6 .cse7 .cse8 .cse12 (not (and .cse19 .cse0)) .cse16 .cse17 (not (and .cse1 .cse2 .cse4 .cse3)) .cse18 .cse3)))) is different from true [2024-12-06 05:03:44,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:44,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:44,938 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:44,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:44,938 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:44,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:44,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:45,282 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:45,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:45,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:45,317 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:45,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:45,318 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:45,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:45,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:45,697 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:45,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:45,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:45,727 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:45,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:45,727 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:45,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:45,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:45,944 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:45,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:45,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:45,969 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:45,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:45,969 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:45,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:46,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:46,227 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:46,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:46,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:46,252 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:46,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:46,252 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:46,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:46,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:46,596 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:46,606 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 .cse9 .cse10 .cse14 .cse18 .cse21 .cse19 (not (and .cse2 .cse3 .cse21 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4))))) is different from false [2024-12-06 05:03:46,619 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 .cse9 .cse10 .cse14 .cse18 .cse21 .cse19 (not (and .cse2 .cse3 .cse21 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4)))))) is different from true [2024-12-06 05:03:46,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:46,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:46,645 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:46,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:46,645 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:46,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:46,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:46,890 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:46,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:46,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:46,915 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:46,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:46,916 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:46,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:46,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:47,137 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:47,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:47,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:47,179 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:47,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:47,179 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:47,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:47,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:47,465 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:47,473 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 .cse9 .cse10 .cse14 .cse18 .cse21 .cse19 (not (and .cse2 .cse3 .cse21 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4))))) is different from false [2024-12-06 05:03:47,490 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 .cse9 .cse10 .cse14 .cse18 .cse21 .cse19 (not (and .cse2 .cse3 .cse21 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4)))))) is different from true [2024-12-06 05:03:47,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:47,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:47,513 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:47,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:47,513 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:47,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:47,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:47,938 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:47,946 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse21)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 (or (and .cse2 .cse4) .cse21) .cse9 .cse10 .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4)))))) is different from false [2024-12-06 05:03:48,083 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse21)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 (or (and .cse2 .cse4) .cse21) .cse9 .cse10 .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4))))))) is different from true [2024-12-06 05:03:48,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:48,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:48,106 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:48,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:48,106 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:48,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:48,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:48,385 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:48,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:48,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:48,410 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:48,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:48,410 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:48,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:48,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:48,845 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:48,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:48,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:48,877 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:48,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:48,877 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:48,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:48,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:49,110 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:49,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:49,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:49,135 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:49,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:49,135 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:49,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:49,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:49,432 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:49,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:49,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:49,456 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:49,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:49,456 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:49,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:49,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:49,721 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:49,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:49,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:49,746 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:49,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:49,746 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:49,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:49,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:50,004 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:50,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:50,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:50,029 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:50,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:50,030 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:50,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:50,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:50,611 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:50,752 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse0 (not .cse20)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse5 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse6 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse12 (= .cse9 .cse11)) (.cse19 (= .cse22 .cse21)) (.cse16 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (= .cse22 1)) (.cse2 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (or .cse0 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse3 (= .cse21 1))) (and (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse0 .cse1 .cse2 .cse3)) (not (and .cse1 .cse4 .cse3)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse5 0) 0) (not (and .cse6 .cse7 .cse8 (let ((.cse10 (= (select .cse5 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse9 1) .cse10 (= .cse11 1)) (and .cse10 .cse12 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse9 (select (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse14 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse9 (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse14) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse16 .cse17 .cse18)) (not (and .cse19 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse6 .cse7 .cse8 .cse12 (not (and .cse19 .cse0)) .cse16 .cse17 (not (and .cse1 .cse2 .cse4 .cse3)) .cse18 (not (and (or (and .cse1 .cse3) .cse20) .cse2 .cse4)) .cse3)))) is different from false [2024-12-06 05:03:50,767 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse0 (not .cse20)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse5 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse6 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse12 (= .cse9 .cse11)) (.cse19 (= .cse22 .cse21)) (.cse16 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (= .cse22 1)) (.cse2 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse4 (or .cse0 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse3 (= .cse21 1))) (and (not (and (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) .cse0 .cse1 .cse2 .cse3)) (not (and .cse1 .cse4 .cse3)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse5 0) 0) (not (and .cse6 .cse7 .cse8 (let ((.cse10 (= (select .cse5 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse9 1) .cse10 (= .cse11 1)) (and .cse10 .cse12 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse9 (select (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse14 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse9 (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse14) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse16 .cse17 .cse18)) (not (and .cse19 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse6 .cse7 .cse8 .cse12 (not (and .cse19 .cse0)) .cse16 .cse17 (not (and .cse1 .cse2 .cse4 .cse3)) .cse18 (not (and (or (and .cse1 .cse3) .cse20) .cse2 .cse4)) .cse3))))) is different from true [2024-12-06 05:03:50,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:50,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:50,891 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:50,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:50,892 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:50,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:50,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:51,377 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:51,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:51,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:51,514 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:51,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:51,515 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:51,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:51,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:51,757 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:51,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:51,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:51,782 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:51,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:51,783 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:51,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:51,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:52,098 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:52,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:52,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:52,123 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:52,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:52,123 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:52,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:52,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:52,415 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:52,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:52,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:52,439 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:52,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:52,440 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:52,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:52,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:52,793 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:52,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:52,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:52,843 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:52,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:52,843 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:52,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:52,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:53,189 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:53,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:53,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:53,214 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:53,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:53,215 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:53,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:53,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:53,620 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:53,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:53,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:53,646 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:53,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:53,646 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:53,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:53,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:54,911 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:55,043 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse21)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 (or (and .cse2 .cse4) .cse21) (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4)))))) is different from false [2024-12-06 05:03:55,059 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse21)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 (or (and .cse2 .cse4) .cse21) (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4))))))) is different from true [2024-12-06 05:03:55,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:55,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:55,583 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:55,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:55,584 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:55,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:55,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:55,854 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:55,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:55,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:55,880 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:55,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:55,880 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:55,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:55,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:56,159 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:56,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:56,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:56,183 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:56,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:56,184 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:56,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:56,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:57,446 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:57,606 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse22)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse3 .cse21 .cse19 .cse20 .cse4)) .cse8 .cse2 (or (and .cse2 .cse4) .cse22) (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 .cse14 .cse18 .cse21 .cse19 (not (and .cse2 .cse3 .cse21 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4)))))) is different from false [2024-12-06 05:03:57,621 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse22)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse3 .cse21 .cse19 .cse20 .cse4)) .cse8 .cse2 (or (and .cse2 .cse4) .cse22) (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 .cse14 .cse18 .cse21 .cse19 (not (and .cse2 .cse3 .cse21 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4))))))) is different from true [2024-12-06 05:03:58,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:58,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:58,202 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:58,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:58,202 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:58,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:58,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:58,595 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:58,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:58,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:58,625 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:58,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:58,625 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:58,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:58,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:58,845 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:58,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:58,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:58,876 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:58,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:58,876 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:58,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:58,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:59,126 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:59,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:59,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:59,152 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:59,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:59,152 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:59,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:59,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:59,496 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:59,505 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|))) (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse22 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse5 (= .cse22 .cse21)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (not .cse20)) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse21 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) .cse8 .cse9 .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse18 .cse19 .cse4))) is different from false [2024-12-06 05:03:59,521 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|))) (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse22 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse5 (= .cse22 .cse21)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (not .cse20)) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse21 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) .cse8 .cse9 .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse18 .cse19 .cse4)))) is different from true [2024-12-06 05:03:59,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:59,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:59,543 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:59,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:59,543 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:59,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:03:59,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:03:59,937 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:03:59,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:03:59,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:03:59,987 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:03:59,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:03:59,988 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:03:59,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:00,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:00,220 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:00,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:00,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:00,245 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:00,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:00,245 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:00,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:00,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:00,514 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:00,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:00,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:00,545 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:00,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:00,546 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:00,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:00,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:00,896 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:00,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:00,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:00,920 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:00,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:00,920 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:00,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:00,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:01,203 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:01,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:01,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:01,233 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:01,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:01,234 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:01,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:01,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:01,634 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:01,643 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 .cse9 .cse10 .cse3 .cse14 .cse18 .cse21 .cse19 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4))))) is different from false [2024-12-06 05:04:01,659 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 .cse9 .cse10 .cse3 .cse14 .cse18 .cse21 .cse19 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4)))))) is different from true [2024-12-06 05:04:01,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:01,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:01,680 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:01,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:01,681 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:01,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:01,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:01,928 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:01,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:01,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:01,961 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:01,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:01,961 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:01,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:01,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:02,293 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:02,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:02,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:02,323 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:02,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:02,323 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:02,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:02,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:02,527 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:02,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:02,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:02,551 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:02,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:02,551 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:02,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:02,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:02,833 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:02,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:02,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:02,858 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:02,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:02,859 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:02,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:02,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:03,147 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:03,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:03,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:03,172 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:03,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:03,172 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:03,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:03,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:03,996 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:04,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:04,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:04,283 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:04,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:04,283 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:04,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:04,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:04,487 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:04,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:04,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:04,510 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:04,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:04,510 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:04,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:04,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:04,774 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:04,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:04,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:04,816 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:04,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:04,817 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:04,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:04,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:05,052 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:05,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:05,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:05,077 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:05,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:05,078 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:05,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:05,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:05,316 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:05,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:05,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:05,340 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:05,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:05,341 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:05,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:05,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:05,624 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:05,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:05,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:05,651 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:05,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:05,651 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:05,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:05,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:05,937 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:05,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:05,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:05,970 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:05,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:05,970 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:05,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:06,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:06,273 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:06,281 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse21)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 (or (and .cse2 .cse4) .cse21) .cse9 .cse10 .cse3 .cse14 .cse18 .cse22 .cse19 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4)))))) is different from false [2024-12-06 05:04:06,298 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse21)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 (or (and .cse2 .cse4) .cse21) .cse9 .cse10 .cse3 .cse14 .cse18 .cse22 .cse19 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4))))))) is different from true [2024-12-06 05:04:06,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:06,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:06,319 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:06,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:06,319 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:06,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:06,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:06,564 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:06,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:06,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:06,588 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:06,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:06,589 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:06,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:06,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:06,883 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:06,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:06,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:06,908 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:06,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:06,908 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:06,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:06,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:07,168 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:07,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:07,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:07,193 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:07,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:07,193 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:07,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:07,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:07,429 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:07,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:07,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:07,452 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:07,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:07,452 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:07,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:07,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:07,694 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:07,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:07,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:07,725 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:07,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:07,726 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:07,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:07,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:07,988 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:08,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:08,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:08,018 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:08,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:08,018 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:08,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:08,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:08,464 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:08,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:08,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:08,492 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:08,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:08,492 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:08,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:08,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:08,808 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:08,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:08,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:08,838 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:08,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:08,838 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:08,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:08,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:09,148 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:09,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:09,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:09,172 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:09,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:09,173 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:09,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:09,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:09,454 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:09,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:09,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:09,479 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:09,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:09,479 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:09,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:09,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:09,692 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:09,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:09,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:09,715 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:09,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:09,715 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:09,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:09,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:10,152 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:10,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:10,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:10,323 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:10,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:10,323 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:10,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:10,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:10,565 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:10,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:10,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:10,590 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:10,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:10,590 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:10,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:10,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:10,795 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:10,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:10,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:10,819 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:10,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:10,819 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:10,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:10,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:11,067 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:11,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:11,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:11,092 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:11,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:11,093 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:11,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:11,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:11,359 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:11,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:11,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:11,382 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:11,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:11,382 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:11,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:11,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:11,764 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:11,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:11,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:11,794 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:11,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:11,794 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:11,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:11,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:12,009 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:12,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:12,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:12,033 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:12,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:12,033 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:12,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:12,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:12,297 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:12,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:12,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:12,320 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:12,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:12,320 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:12,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:12,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:12,629 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:12,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:12,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:12,654 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:12,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:12,654 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:12,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:12,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:12,905 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:12,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:12,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:12,929 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:12,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:12,929 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:12,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:12,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:13,133 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:13,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:13,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:13,158 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:13,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:13,158 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:13,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:13,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:13,410 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:13,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:13,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:13,434 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:13,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:13,435 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:13,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:13,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:13,820 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:13,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:13,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:13,850 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:13,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:13,850 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:13,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:13,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:14,127 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:14,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:14,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:14,161 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:14,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:14,161 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:14,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:14,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:14,390 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:14,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:14,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:14,413 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:14,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:14,413 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:14,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:14,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:14,623 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:14,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:14,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:14,647 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:14,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:14,647 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:14,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:14,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:14,906 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:14,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:14,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:14,931 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:14,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:14,931 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:14,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:14,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:15,122 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:15,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:15,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:15,145 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:15,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:15,146 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:15,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:15,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:15,393 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:15,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:15,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:15,416 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:15,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:15,416 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:15,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:15,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:15,684 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:15,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:15,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:15,724 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:15,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:15,724 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:15,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:15,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:16,049 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:16,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:16,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:16,072 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:16,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:16,072 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:16,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:16,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:16,412 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:16,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:16,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:16,442 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:16,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:16,443 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:16,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:16,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:16,665 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:16,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:16,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:16,688 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:16,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:16,689 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:16,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:16,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:17,413 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:17,421 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse21)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse11 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse24)) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 (or (and .cse2 .cse4) .cse21) .cse9 .cse10 (or (and .cse2 .cse22 .cse4) (and (= .cse6 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse19)) .cse3 .cse14 .cse18 .cse22 .cse19 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4)))))) is different from false [2024-12-06 05:04:17,575 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse21)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse11 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse24)) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse8 .cse2 (or (and .cse2 .cse4) .cse21) .cse9 .cse10 (or (and .cse2 .cse22 .cse4) (and (= .cse6 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse19)) .cse3 .cse14 .cse18 .cse22 .cse19 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4))))))) is different from true [2024-12-06 05:04:17,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:17,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:17,844 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:17,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:17,844 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:17,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:17,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:18,493 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:18,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:18,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:18,651 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:18,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:18,652 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:18,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:18,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:18,975 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:18,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:18,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:18,999 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:19,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:19,000 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:19,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:19,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:19,287 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:19,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:19,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:19,314 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:19,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:19,314 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:19,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:19,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:19,635 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:19,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:19,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:19,660 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:19,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:19,660 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:19,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:19,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:19,925 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:19,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:19,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:19,950 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:19,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:19,950 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:19,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:19,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:20,231 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:20,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:20,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:20,257 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:20,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:20,258 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:20,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:20,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:20,514 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:20,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:20,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:20,540 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:20,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:20,540 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:20,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:20,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:20,881 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:20,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:20,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:20,911 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:20,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:20,911 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:20,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:20,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:21,323 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:21,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:21,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:21,355 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:21,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:21,355 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:21,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:21,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:22,233 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:22,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:22,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:22,412 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:22,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:22,412 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:22,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:22,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:22,882 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:22,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:22,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:22,910 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:22,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:22,910 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:22,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:22,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:23,135 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:23,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:23,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:23,160 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:23,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:23,160 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:23,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:23,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:23,390 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:23,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:23,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:23,414 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:23,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:23,414 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:23,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:23,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:23,726 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:23,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:23,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:23,750 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:23,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:23,750 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:23,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:23,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:23,987 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:24,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:24,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:24,010 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:24,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:24,010 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:24,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:24,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:24,313 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:24,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:24,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:24,337 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:24,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:24,337 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:24,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:24,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:24,580 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:24,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:24,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:24,605 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:24,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:24,605 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:24,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:24,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:24,925 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:24,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:24,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:24,957 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:24,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:24,957 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:24,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:25,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:25,292 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:25,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:25,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:25,317 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:25,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:25,318 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:25,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:25,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:25,643 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:25,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:25,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:25,676 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:25,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:25,676 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:25,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:25,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:26,022 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:26,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:26,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:26,054 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:26,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:26,054 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:26,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:26,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:26,376 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:26,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:26,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:26,410 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:26,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:26,410 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:26,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:26,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:26,955 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:26,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:26,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:26,987 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:26,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:26,987 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:26,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:27,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:27,208 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:27,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:27,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:27,232 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:27,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:27,233 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:27,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:27,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:27,466 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:27,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:27,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:27,490 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:27,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:27,491 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:27,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:27,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:27,770 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:27,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:27,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:27,795 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:27,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:27,795 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:27,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:27,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:28,050 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:28,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:28,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:28,084 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:28,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:28,084 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:28,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:28,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:28,336 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:28,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:28,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:28,360 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:28,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:28,360 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:28,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:28,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:28,619 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:28,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:28,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:28,643 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:28,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:28,643 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:28,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:28,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:28,905 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:28,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:28,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:28,938 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:28,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:28,938 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:28,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:28,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:29,174 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:29,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:29,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:29,198 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:29,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:29,199 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:29,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:29,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:29,906 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:30,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:30,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:30,177 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:30,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:30,177 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:30,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:30,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:30,409 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:30,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:30,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:30,434 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:30,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:30,434 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:30,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:30,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:30,680 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:30,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:30,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:30,704 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:30,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:30,704 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:30,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:30,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:31,211 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:31,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:31,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:31,242 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:31,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:31,243 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:31,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:31,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:31,560 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:31,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:31,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:31,585 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:31,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:31,585 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:31,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:31,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:31,893 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:31,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:31,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:31,920 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:31,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:31,920 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:31,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:31,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:32,148 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:32,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:32,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:32,176 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:32,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:32,176 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:32,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:32,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:32,484 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:32,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:32,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:32,518 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:32,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:32,518 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:32,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:32,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:32,742 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:32,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:32,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:32,765 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:32,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:32,765 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:32,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:32,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:33,045 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:33,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:33,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:33,068 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:33,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:33,068 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:33,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:33,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:33,340 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:33,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:33,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:33,382 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:33,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:33,382 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:33,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:33,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:33,674 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:33,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:33,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:33,707 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:33,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:33,707 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:33,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:33,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:33,917 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:33,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:33,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:33,940 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:33,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:33,940 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:33,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:33,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:34,167 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:34,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:34,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:34,190 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:34,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:34,191 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:34,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:34,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:34,392 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:34,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:34,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:34,415 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:34,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:34,415 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:34,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:34,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:34,607 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:34,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:34,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:34,631 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:34,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:34,631 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:34,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:34,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:34,848 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:34,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:34,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:34,871 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:34,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:34,871 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:34,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:34,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:35,087 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:35,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:35,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:35,111 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:35,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:35,112 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:35,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:35,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:35,788 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:35,799 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse3 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse2 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse11 (= .cse8 .cse10)) (.cse15 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse16 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse2 (= (select .cse3 0) 0) .cse4 (not (and .cse5 .cse6 .cse7 (let ((.cse9 (= (select .cse3 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse8 1) .cse9 (= .cse10 1)) (and .cse9 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse8 (select (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse13 (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse8 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse13) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse15 .cse16 .cse17)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse5 (= .cse0 1) (or .cse4 (and .cse2 .cse18)) .cse6 .cse7 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse11 .cse15 (or .cse4 .cse18) .cse16 .cse17 (= .cse1 1)))) is different from false [2024-12-06 05:04:35,957 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse8 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse3 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse2 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse11 (= .cse8 .cse10)) (.cse15 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse16 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse1 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (and (= .cse0 .cse1) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse2 (= (select .cse3 0) 0) .cse4 (not (and .cse5 .cse6 .cse7 (let ((.cse9 (= (select .cse3 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse8 1) .cse9 (= .cse10 1)) (and .cse9 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse12 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse8 (select (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse12 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse13 (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse8 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse13) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse15 .cse16 .cse17)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse5 (= .cse0 1) (or .cse4 (and .cse2 .cse18)) .cse6 .cse7 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) .cse11 .cse15 (or .cse4 .cse18) .cse16 .cse17 (= .cse1 1))))) is different from true [2024-12-06 05:04:35,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:35,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:35,984 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:35,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:35,984 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:35,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:36,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:36,229 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:36,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:36,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:36,253 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:36,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:36,254 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:36,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:36,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:36,443 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:36,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:36,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:36,468 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:36,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:36,468 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:36,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:36,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:36,736 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:36,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:36,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:36,760 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:36,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:36,761 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:36,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:36,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:36,960 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:36,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:36,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:36,984 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:36,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:36,984 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:36,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:37,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:37,339 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:37,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:37,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:37,361 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:37,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:37,362 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:37,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:37,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:38,280 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:38,419 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse21)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse0 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse23 .cse22)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse2 (= .cse23 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse22 1))) (and (not (and (not .cse0) .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse0 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) .cse13 (not (and .cse20 .cse1)) .cse17 .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse21) .cse3 .cse5)) .cse4)))) is different from false [2024-12-06 05:04:38,433 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse21)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse0 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse23 .cse22)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse2 (= .cse23 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse22 1))) (and (not (and (not .cse0) .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse0 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) .cse13 (not (and .cse20 .cse1)) .cse17 .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse21) .cse3 .cse5)) .cse4))))) is different from true [2024-12-06 05:04:38,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:38,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:38,844 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:38,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:38,844 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:38,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:38,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:39,174 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:39,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:39,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:39,199 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:39,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:39,199 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:39,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:39,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:39,509 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:39,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:39,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:39,535 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:39,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:39,536 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:39,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:39,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:39,837 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:39,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:39,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:39,862 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:39,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:39,862 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:39,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:39,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:40,287 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:40,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:40,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:40,318 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:40,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:40,318 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:40,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:40,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:40,832 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:40,846 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse21)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse0 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse23 .cse22)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse2 (= .cse23 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse22 1))) (and (not (and (not .cse0) .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse0 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) .cse13 (not (and .cse20 .cse1)) .cse17 .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse21) .cse3 .cse5)) .cse4)))) is different from false [2024-12-06 05:04:40,863 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse21)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse0 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse23 .cse22)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse2 (= .cse23 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse22 1))) (and (not (and (not .cse0) .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse0 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) .cse13 (not (and .cse20 .cse1)) .cse17 .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse21) .cse3 .cse5)) .cse4))))) is different from true [2024-12-06 05:04:41,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:41,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:41,008 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:41,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:41,008 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:41,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:41,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:41,316 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:41,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:41,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:41,343 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:41,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:41,343 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:41,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:41,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:41,641 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:41,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:41,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:41,666 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:41,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:41,666 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:41,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:41,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:42,047 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:42,060 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse22)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse24 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse24 .cse23)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse21)) (.cse2 (= .cse24 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse23 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse21 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) .cse13 (not (and .cse20 .cse1)) .cse17 .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse22) .cse3 .cse5)) .cse4 (not (and .cse0 .cse2 .cse3 .cse5 .cse4)))))) is different from false [2024-12-06 05:04:42,077 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse22)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse24 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse24 .cse23)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse21)) (.cse2 (= .cse24 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse23 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse21 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) .cse13 (not (and .cse20 .cse1)) .cse17 .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse22) .cse3 .cse5)) .cse4 (not (and .cse0 .cse2 .cse3 .cse5 .cse4))))))) is different from true [2024-12-06 05:04:42,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:42,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:42,104 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:42,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:42,104 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:42,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:42,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:42,331 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:42,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:42,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:42,354 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:42,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:42,354 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:42,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:42,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:42,642 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:42,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:42,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:42,667 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:42,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:42,667 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:42,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:42,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:42,909 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:42,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:42,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:42,935 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:42,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:42,935 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:42,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:42,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:43,988 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:44,122 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse22)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse24 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse24 .cse23)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse21)) (.cse2 (= .cse24 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse23 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 (not (and .cse1 .cse2 .cse9 .cse19 .cse4)) .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse21 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) .cse13 (not (and .cse20 .cse1)) .cse17 .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse22) .cse3 .cse5)) .cse4 (not (and .cse0 .cse2 .cse3 .cse5 .cse4)))))) is different from false [2024-12-06 05:04:44,136 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse22)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse24 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse24 .cse23)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse21)) (.cse2 (= .cse24 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse23 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 (not (and .cse1 .cse2 .cse9 .cse19 .cse4)) .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse21 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) .cse13 (not (and .cse20 .cse1)) .cse17 .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse22) .cse3 .cse5)) .cse4 (not (and .cse0 .cse2 .cse3 .cse5 .cse4))))))) is different from true [2024-12-06 05:04:44,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:44,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:44,518 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:44,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:44,519 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:44,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:44,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:44,761 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:44,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:44,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:44,788 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:44,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:44,788 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:44,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:44,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:45,016 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:45,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:45,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:45,042 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:45,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:45,043 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:45,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:45,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:45,442 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:45,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:45,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:45,474 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:45,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:45,474 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:45,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:45,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:45,875 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:45,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:45,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:45,909 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:45,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:45,909 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:45,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:45,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:46,153 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:46,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:46,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:46,179 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:46,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:46,179 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:46,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:46,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:46,457 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:46,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:46,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:46,482 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:46,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:46,483 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:46,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:46,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:47,027 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:47,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:47,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:47,053 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:47,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:47,053 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:47,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:47,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:47,369 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:47,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:47,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:47,394 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:47,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:47,395 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:47,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:47,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:47,733 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:47,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:47,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:47,763 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:47,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:47,763 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:47,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:47,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:47,972 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:47,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:47,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:47,997 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:47,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:47,997 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:47,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:48,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:48,228 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:48,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:48,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:48,254 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:48,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:48,254 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:48,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:48,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:48,587 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:48,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:48,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:48,617 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:48,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:48,617 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:48,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:48,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:48,839 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:48,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:48,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:48,864 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:48,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:48,864 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:48,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:48,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:49,107 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:49,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:49,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:49,131 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:49,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:49,131 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:49,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:49,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:49,384 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:49,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:49,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:49,408 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:49,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:49,408 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:49,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:49,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:49,788 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:49,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:49,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:49,813 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:49,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:49,813 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:49,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:49,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:50,204 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:50,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:50,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:50,237 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:50,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:50,237 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:50,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:50,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:50,491 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:50,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:50,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:50,514 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:50,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:50,515 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:50,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:50,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:50,796 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:50,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:50,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:50,821 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:50,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:50,822 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:50,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:50,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:51,354 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:51,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:51,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:51,387 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:51,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:51,387 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:51,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:51,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:51,665 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:51,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:51,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:51,690 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:51,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:51,690 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:51,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:51,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:51,963 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:51,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:51,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:51,987 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:51,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:51,987 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:51,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:52,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:52,201 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:52,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:52,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:52,227 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:52,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:52,227 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:52,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:52,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:52,579 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:52,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:52,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:52,613 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:52,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:52,613 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:52,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:52,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:53,141 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:53,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:53,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:53,171 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:53,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:53,171 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:53,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:53,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:53,574 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:53,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:53,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:53,605 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:53,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:53,606 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:53,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:53,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:54,580 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:55,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:55,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:55,252 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:55,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:55,253 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:55,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:55,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:55,459 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:55,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:55,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:55,485 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:55,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:55,485 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:55,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:55,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:55,848 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:55,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:55,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:55,874 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:55,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:55,874 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:55,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:55,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:56,443 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:56,456 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse23)) (.cse21 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 .cse21)) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (not (and .cse2 (or .cse1 (and .cse0 .cse21)) .cse3 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse3 .cse22 .cse19 .cse20 .cse4)) .cse8 .cse2 (or (and .cse2 .cse4) .cse23) (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4)))))) is different from false [2024-12-06 05:04:56,471 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse23)) (.cse21 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse2 (= .cse5 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 .cse21)) (.cse4 (= .cse6 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (not (and .cse2 (or .cse1 (and .cse0 .cse21)) .cse3 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse3 .cse22 .cse19 .cse20 .cse4)) .cse8 .cse2 (or (and .cse2 .cse4) .cse23) (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4))))))) is different from true [2024-12-06 05:04:56,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:56,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:56,497 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:56,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:56,498 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:56,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:56,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:56,790 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:56,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:56,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:56,817 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:56,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:56,817 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:56,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:56,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:57,147 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:57,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:57,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:57,173 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:57,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:57,173 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:57,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:57,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:57,489 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:57,501 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse24)) (.cse21 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse4 (= .cse6 1)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse23 (or (and .cse2 .cse4) .cse24)) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 .cse21))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (not (and .cse2 (or .cse1 (and .cse0 .cse21)) .cse3 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse3 .cse22 .cse19 .cse20 .cse4)) .cse8 .cse2 .cse23 (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 (not (and .cse23 .cse3 .cse22)) .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4)))))) is different from false [2024-12-06 05:04:57,516 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse24)) (.cse21 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse4 (= .cse6 1)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse23 (or (and .cse2 .cse4) .cse24)) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 .cse21))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (not (and .cse2 (or .cse1 (and .cse0 .cse21)) .cse3 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse3 .cse22 .cse19 .cse20 .cse4)) .cse8 .cse2 .cse23 (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 (not (and .cse23 .cse3 .cse22)) .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4))))))) is different from true [2024-12-06 05:04:57,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:57,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:57,537 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:57,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:57,537 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:57,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:57,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:57,820 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:57,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:57,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:57,844 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:57,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:57,844 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:57,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:57,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:58,149 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:58,162 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse24)) (.cse21 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse4 (= .cse6 1)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse23 (or (and .cse2 .cse4) .cse24)) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 .cse21))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (not (and .cse2 (or .cse1 (and .cse0 .cse21)) .cse3 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse3 .cse22 .cse19 .cse20 .cse4)) .cse8 .cse2 .cse23 (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 (not (and .cse1 .cse2 .cse3 .cse4)) .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 (not (and .cse23 .cse3 .cse22)) .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4)))))) is different from false [2024-12-06 05:04:58,176 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse24)) (.cse21 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse4 (= .cse6 1)) (.cse11 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse10 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse14 (= .cse11 .cse13)) (.cse18 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse23 (or (and .cse2 .cse4) .cse24)) (.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse22 (or .cse1 .cse21))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) .cse1 (not (and .cse8 .cse9 .cse10 (let ((.cse12 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse11 1) .cse12 (= .cse13 1)) (and .cse12 .cse14 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse15 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse11 (select (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse15 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse11 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse16) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse18 .cse19 .cse20)) (not (and .cse2 (or .cse1 (and .cse0 .cse21)) .cse3 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse3 .cse22 .cse19 .cse20 .cse4)) .cse8 .cse2 .cse23 (not (and .cse0 .cse1 .cse2 .cse10 .cse3 .cse20 .cse4)) .cse9 .cse10 (not (and .cse1 .cse2 .cse3 .cse4)) .cse14 .cse18 .cse22 .cse19 (not (and .cse2 .cse3 .cse22 .cse4)) .cse20 (not (and .cse23 .cse3 .cse22)) .cse4 (not (and .cse0 .cse2 .cse3 .cse22 .cse4))))))) is different from true [2024-12-06 05:04:58,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:58,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:58,202 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:58,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:58,203 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:58,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:58,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:58,430 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:58,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:58,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:58,455 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:58,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:58,456 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:58,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:58,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:58,744 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:58,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:58,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:58,769 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:58,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:58,770 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:58,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:58,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:59,017 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:59,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:59,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:59,046 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:59,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:59,046 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:59,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:59,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:59,282 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:59,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:59,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:59,306 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:59,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:59,307 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:59,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:59,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:59,611 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:59,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:59,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:59,644 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:59,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:59,644 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:59,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:59,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:04:59,923 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:04:59,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:04:59,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:04:59,949 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:04:59,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:04:59,949 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:04:59,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:04:59,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:00,197 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:00,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:00,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:00,222 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:00,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:00,222 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:00,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:00,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:00,457 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:00,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:00,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:00,488 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:00,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:00,488 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:00,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:00,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:00,734 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:00,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:00,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:00,759 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:00,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:00,760 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:00,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:00,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:00,984 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:01,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:01,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:01,010 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:01,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:01,010 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:01,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:01,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:01,271 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:01,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:01,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:01,296 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:01,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:01,296 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:01,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:01,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:01,555 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:01,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:01,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:01,581 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:01,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:01,581 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:01,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:01,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:01,846 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:01,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:01,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:01,874 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:01,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:01,874 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:01,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:01,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:02,244 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:02,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:02,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:02,269 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:02,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:02,269 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:02,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:02,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:02,580 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:02,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:02,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:02,613 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:02,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:02,613 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:02,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:02,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:02,911 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:02,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:02,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:02,937 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:02,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:02,937 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:02,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:02,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:03,187 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:03,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:03,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:03,215 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:03,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:03,215 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:03,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:03,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:03,535 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:03,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:03,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:03,563 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:03,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:03,563 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:03,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:03,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:03,963 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:03,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:03,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:03,996 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:03,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:03,996 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:03,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:04,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:04,363 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:04,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:04,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:04,410 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:04,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:04,410 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:04,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:04,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:04,707 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:04,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:04,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:04,733 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:04,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:04,734 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:04,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:04,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:04,989 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:05,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:05,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:05,019 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:05,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:05,019 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:05,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:05,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:05,258 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:05,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:05,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:05,284 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:05,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:05,284 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:05,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:05,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:05,555 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:05,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:05,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:05,587 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:05,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:05,587 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:05,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:05,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:05,805 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:05,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:05,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:05,829 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:05,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:05,830 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:05,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:05,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:06,176 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:06,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:06,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:06,200 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:06,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:06,201 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:06,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:06,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:06,449 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:06,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:06,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:06,474 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:06,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:06,475 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:06,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:06,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:06,835 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:06,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:06,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:06,867 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:06,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:06,867 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:06,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:06,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:07,159 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:07,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:07,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:07,193 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:07,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:07,193 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:07,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:07,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:07,462 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:07,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:07,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:07,488 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:07,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:07,488 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:07,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:07,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:07,780 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:07,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:07,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:07,805 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:07,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:07,806 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:07,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:07,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:08,018 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:08,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:08,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:08,041 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:08,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:08,041 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:08,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:08,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:08,326 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:08,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:08,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:08,353 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:08,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:08,353 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:08,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:08,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:08,606 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:08,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:08,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:08,631 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:08,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:08,631 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:08,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:08,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:08,887 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:08,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:08,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:08,912 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:08,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:08,912 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:08,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:08,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:09,151 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:09,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:09,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:09,176 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:09,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:09,176 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:09,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:09,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:09,390 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:09,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:09,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:09,415 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:09,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:09,415 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:09,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:09,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:09,623 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:09,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:09,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:09,648 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:09,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:09,648 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:09,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:09,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:09,912 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:09,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:09,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:09,935 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:09,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:09,935 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:09,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:09,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:10,256 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:10,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:10,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:10,281 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:10,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:10,282 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:10,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:10,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:10,543 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:10,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:10,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:10,568 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:10,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:10,569 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:10,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:10,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:10,808 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:10,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:10,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:10,833 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:10,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:10,834 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:10,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:10,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:11,172 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:11,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:11,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:11,210 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:11,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:11,211 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:11,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:11,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:11,575 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:11,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:11,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:11,608 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:11,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:11,608 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:11,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:11,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:11,879 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:11,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:11,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:11,914 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:11,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:11,915 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:11,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:11,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:12,197 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:12,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:12,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:12,223 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:12,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:12,224 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:12,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:12,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:12,656 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:12,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:12,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:12,687 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:12,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:12,688 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:12,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:12,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:12,998 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:13,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:13,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:13,028 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:13,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:13,028 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:13,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:13,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:13,664 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:13,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:13,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:13,696 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:13,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:13,697 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:13,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:13,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:14,122 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:14,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:14,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:14,152 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:14,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:14,152 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:14,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:14,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:14,401 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:14,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:14,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:14,426 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:14,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:14,427 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:14,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:14,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:14,722 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:14,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:14,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:14,746 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:14,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:14,746 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:14,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:14,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:14,981 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:15,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:15,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:15,005 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:15,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:15,006 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:15,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:15,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:15,275 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:15,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:15,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:15,299 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:15,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:15,299 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:15,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:15,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:15,513 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:15,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:15,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:15,536 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:15,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:15,536 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:15,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:15,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:15,794 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:15,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:15,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:15,817 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:15,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:15,818 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:15,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:15,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:16,209 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:16,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:16,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:16,239 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:16,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:16,240 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:16,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:16,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:16,449 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:16,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:16,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:16,474 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:16,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:16,474 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:16,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:16,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:16,892 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:16,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:16,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:16,925 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:16,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:16,925 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:16,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:16,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:17,137 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:17,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:17,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:17,162 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:17,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:17,162 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:17,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:17,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:17,564 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:17,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:17,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:17,596 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:17,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:17,596 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:17,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:17,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:17,827 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:17,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:17,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:17,851 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:17,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:17,852 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:17,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:17,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:18,088 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:18,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:18,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:18,112 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:18,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:18,113 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:18,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:18,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:18,418 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:18,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:18,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:18,442 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:18,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:18,443 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:18,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:18,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:18,724 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:18,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:18,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:18,749 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:18,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:18,749 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:18,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:18,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:21,099 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:21,273 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (= .cse22 .cse21)) (.cse1 (not .cse20)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse22 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse21 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) .cse8 .cse9 .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4))) is different from false [2024-12-06 05:05:21,286 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse21 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (let ((.cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (= .cse22 .cse21)) (.cse1 (not .cse20)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse22 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse21 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) .cse8 .cse9 .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4)))) is different from true [2024-12-06 05:05:22,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:22,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:22,309 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:22,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:22,309 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:22,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:22,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:22,598 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:22,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:22,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:22,641 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:22,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:22,641 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:22,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:22,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:22,904 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:22,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:22,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:22,930 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:22,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:22,930 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:22,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:22,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:23,249 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:23,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:23,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:23,275 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:23,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:23,275 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:23,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:23,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:23,591 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:23,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:23,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:23,622 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:23,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:23,623 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:23,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:23,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:23,849 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:23,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:23,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:23,873 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:23,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:23,874 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:23,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:23,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:24,207 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:24,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:24,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:24,233 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:24,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:24,233 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:24,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:24,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:24,516 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:24,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:24,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:24,548 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:24,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:24,548 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:24,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:24,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:24,921 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:24,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:24,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:24,951 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:24,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:24,952 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:24,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:24,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:25,158 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:25,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:25,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:25,182 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:25,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:25,183 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:25,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:25,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:25,442 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:25,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:25,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:25,468 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:25,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:25,468 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:25,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:25,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:25,975 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:26,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:26,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:26,000 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:26,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:26,000 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:26,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:26,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:26,258 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:26,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:26,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:26,283 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:26,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:26,284 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:26,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:26,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:26,598 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:26,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:26,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:26,628 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:26,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:26,628 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:26,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:26,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:26,893 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:26,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:26,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:26,920 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:26,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:26,921 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:26,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:26,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:27,209 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:27,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:27,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:27,233 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:27,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:27,233 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:27,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:27,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:27,528 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:27,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:27,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:27,553 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:27,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:27,554 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:27,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:27,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:27,786 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:27,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:27,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:27,809 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:27,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:27,809 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:27,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:27,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:28,040 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:28,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:28,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:28,065 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:28,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:28,065 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:28,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:28,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:28,402 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:28,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:28,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:28,434 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:28,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:28,434 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:28,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:28,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:28,649 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:28,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:28,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:28,673 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:28,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:28,674 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:28,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:28,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:28,910 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:28,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:28,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:28,934 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:28,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:28,934 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:28,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:28,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:29,202 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:29,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:29,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:29,227 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:29,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:29,227 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:29,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:29,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:29,529 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:29,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:29,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:29,555 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:29,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:29,555 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:29,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:29,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:29,776 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:29,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:29,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:29,801 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:29,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:29,802 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:29,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:29,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:30,044 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:30,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:30,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:30,068 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:30,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:30,068 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:30,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:30,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:30,303 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:30,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:30,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:30,328 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:30,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:30,328 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:30,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:30,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:30,549 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:30,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:30,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:30,574 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:30,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:30,574 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:30,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:30,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:31,877 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:32,158 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse27 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse27)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse28 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse28 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse29 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse21 (and .cse2 .cse29 .cse4)) (.cse11 (= .cse18 .cse13)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse22)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) (not (let ((.cse8 (or .cse21 .cse22)) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|))) (and (or (and .cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse9 .cse10 (or .cse0 (and .cse11 .cse12 (= .cse13 .cse6) .cse14))) .cse15) (or .cse16 (and .cse8 .cse17 (or .cse0 (let ((.cse19 (select .cse7 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse6) .cse12 .cse14))) .cse20))))) .cse1 (not (and .cse16 .cse9 .cse17 (let ((.cse23 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse23 (= .cse13 1)) (and .cse23 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse24 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse24 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse24 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse24 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse25 (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse25 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse25) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or (and .cse2 .cse4) .cse27) .cse9 .cse17 (or .cse21 (and (= .cse6 (select .cse28 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse22 .cse14)) .cse3 .cse11 .cse10 .cse29 .cse14 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse29 .cse4))))))) is different from false [2024-12-06 05:05:32,174 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse27 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse27)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse28 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse28 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse29 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse6 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse21 (and .cse2 .cse29 .cse4)) (.cse11 (= .cse18 .cse13)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse22)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) (not (let ((.cse8 (or .cse21 .cse22)) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|))) (and (or (and .cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse9 .cse10 (or .cse0 (and .cse11 .cse12 (= .cse13 .cse6) .cse14))) .cse15) (or .cse16 (and .cse8 .cse17 (or .cse0 (let ((.cse19 (select .cse7 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse6) .cse12 .cse14))) .cse20))))) .cse1 (not (and .cse16 .cse9 .cse17 (let ((.cse23 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse23 (= .cse13 1)) (and .cse23 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse24 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse24 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse24 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse24 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse25 (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse25 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse25) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse20)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or (and .cse2 .cse4) .cse27) .cse9 .cse17 (or .cse21 (and (= .cse6 (select .cse28 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse22 .cse14)) .cse3 .cse11 .cse10 .cse29 .cse14 .cse20 .cse4 (not (and .cse0 .cse2 .cse3 .cse29 .cse4)))))))) is different from true [2024-12-06 05:05:32,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:32,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:32,553 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:32,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:32,553 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:32,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:32,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:32,863 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:32,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:32,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:32,894 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:32,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:32,894 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:32,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:32,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:33,148 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:33,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:33,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:33,175 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:33,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:33,175 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:33,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:33,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:33,431 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:33,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:33,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:33,455 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:33,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:33,456 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:33,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:33,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:33,764 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:33,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:33,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:33,790 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:33,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:33,790 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:33,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:33,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:34,322 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:34,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:34,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:34,504 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:34,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:34,504 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:34,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:34,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:34,896 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:34,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:34,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:34,929 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:34,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:34,929 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:34,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:34,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:35,168 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:35,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:35,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:35,192 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:35,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:35,193 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:35,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:35,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:35,459 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:35,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:35,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:35,484 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:35,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:35,484 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:35,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:35,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:35,746 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:35,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:35,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:35,771 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:35,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:35,771 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:35,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:35,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:36,010 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:36,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:36,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:36,034 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:36,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:36,034 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:36,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:36,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:36,293 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:36,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:36,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:36,318 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:36,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:36,318 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:36,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:36,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:36,538 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:36,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:36,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:36,562 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:36,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:36,562 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:36,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:36,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:37,183 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:37,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:37,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:37,385 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:37,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:37,385 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:37,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:37,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:37,639 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:37,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:37,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:37,665 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:37,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:37,665 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:37,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:37,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:37,979 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:38,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:38,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:38,006 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:38,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:38,006 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:38,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:38,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:38,319 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:38,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:38,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:38,352 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:38,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:38,352 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:38,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:38,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:38,667 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:38,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:38,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:38,701 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:38,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:38,701 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:38,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:38,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:38,953 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:38,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:38,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:38,983 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:38,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:38,983 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:38,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:39,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:39,230 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:39,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:39,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:39,258 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:39,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:39,258 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:39,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:39,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:39,598 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:39,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:39,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:39,625 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:39,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:39,625 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:39,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:39,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:39,924 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:39,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:39,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:39,956 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:39,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:39,957 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:39,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:39,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:40,191 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:40,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:40,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:40,216 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:40,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:40,216 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:40,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:40,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:40,514 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:40,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:40,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:40,546 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:40,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:40,546 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:40,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:40,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:40,782 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:40,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:40,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:40,807 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:40,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:40,807 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:40,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:40,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:41,101 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:41,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:41,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:41,127 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:41,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:41,127 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:41,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:41,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:41,428 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:41,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:41,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:41,465 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:41,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:41,465 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:41,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:41,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:41,735 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:41,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:41,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:41,761 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:41,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:41,762 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:41,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:41,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:42,173 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:42,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:42,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:42,206 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:42,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:42,206 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:42,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:42,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:42,481 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:42,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:42,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:42,506 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:42,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:42,506 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:42,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:42,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:43,198 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:43,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:43,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:43,544 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:43,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:43,544 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:43,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:43,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:43,927 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:43,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:43,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:43,956 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:43,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:43,956 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:43,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:43,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:44,216 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:44,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:44,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:44,240 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:44,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:44,240 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:44,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:44,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:44,536 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:44,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:44,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:44,559 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:44,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:44,559 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:44,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:44,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:44,941 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:44,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:44,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:44,973 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:44,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:44,973 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:44,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:44,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:45,202 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:45,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:45,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:45,226 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:45,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:45,226 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:45,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:45,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:45,533 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:45,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:45,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:45,558 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:45,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:45,558 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:45,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:45,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:46,041 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:46,205 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse22)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse24 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse24 .cse23)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse21)) (.cse2 (= .cse24 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse23 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 (not (and .cse1 .cse2 .cse9 .cse19 .cse4)) .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse21 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) .cse13 (not (and .cse20 .cse1)) .cse17 (not (and .cse1 .cse2 .cse4)) .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse22) .cse3 .cse5)) .cse4 (not (and .cse0 .cse2 .cse3 .cse5 .cse4)))))) is different from false [2024-12-06 05:05:46,221 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse1 (not .cse22)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse24 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse23 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse10 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|) |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse20 (= .cse24 .cse23)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse21)) (.cse2 (= .cse24 1)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse5 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse4 (= .cse23 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not (and .cse2 .cse5 .cse4)) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse5)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 (not (and .cse1 .cse2 .cse9 .cse19 .cse4)) .cse8 .cse9 (not (and .cse20 .cse1 .cse3 (or (and .cse21 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) .cse13 (not (and .cse20 .cse1)) .cse17 (not (and .cse1 .cse2 .cse4)) .cse18 (not (and .cse2 .cse3 .cse5 .cse4)) .cse19 (not (and (or (and .cse2 .cse4) .cse22) .cse3 .cse5)) .cse4 (not (and .cse0 .cse2 .cse3 .cse5 .cse4))))))) is different from true [2024-12-06 05:05:46,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:46,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:46,244 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:46,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:46,244 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:46,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:46,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:46,495 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:46,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:46,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:46,527 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:46,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:46,527 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:46,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:46,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:46,789 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:46,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:46,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:46,817 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:46,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:46,817 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:46,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:46,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:47,073 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:47,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:47,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:47,099 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:47,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:47,099 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:47,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:47,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:47,331 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:47,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:47,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:47,357 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:47,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:47,358 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:47,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:47,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:47,648 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:47,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:47,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:47,675 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:47,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:47,675 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:47,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:47,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:47,946 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:47,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:47,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:47,972 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:47,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:47,972 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:47,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:48,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:48,407 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:48,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:48,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:48,439 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:48,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:48,439 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:48,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:48,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:48,866 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:48,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:48,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:48,898 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:48,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:48,898 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:48,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:48,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:49,163 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:49,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:49,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:49,187 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:49,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:49,187 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:49,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:49,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:49,482 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:49,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:49,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:49,506 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:49,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:49,507 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:49,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:49,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:49,718 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:49,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:49,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:49,742 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:49,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:49,742 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:49,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:49,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:49,979 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:50,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:50,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:50,002 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:50,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:50,002 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:50,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:50,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:50,273 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:50,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:50,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:50,296 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:50,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:50,296 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:50,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:50,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:50,615 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:50,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:50,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:50,646 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:50,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:50,647 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:50,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:50,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:51,022 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:51,031 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse0 (not .cse24)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4)))) is different from false [2024-12-06 05:05:51,049 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse0 (not .cse24)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4))))) is different from true [2024-12-06 05:05:51,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:51,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:51,078 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:51,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:51,078 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:51,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:51,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:51,365 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:51,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:51,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:51,388 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:51,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:51,389 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:51,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:51,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:51,648 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:51,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:51,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:51,672 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:51,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:51,672 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:51,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:51,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:52,009 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:52,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:52,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:52,044 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:52,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:52,044 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:52,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:52,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:52,288 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:52,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:52,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:52,311 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:52,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:52,312 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:52,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:52,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:52,557 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:52,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:52,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:52,580 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:52,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:52,580 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:52,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:52,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:52,813 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:52,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:52,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:52,837 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:52,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:52,837 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:52,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:52,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:53,035 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:53,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:53,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:53,068 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:53,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:53,068 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:53,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:53,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:53,294 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:53,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:53,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:53,319 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:53,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:53,319 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:53,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:53,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:53,579 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:53,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:53,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:53,605 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:53,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:53,605 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:53,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:53,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:53,893 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:53,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:53,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:53,919 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:53,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:53,919 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:53,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:53,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:54,398 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:54,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:54,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:54,428 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:54,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:54,428 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:54,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:54,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:54,747 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:54,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:54,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:54,771 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:54,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:54,771 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:54,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:54,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:54,990 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:55,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:55,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:55,014 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:55,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:55,014 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:55,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:55,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:55,386 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:55,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:55,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:55,413 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:55,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:55,413 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:55,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:55,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:55,619 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:55,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:55,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:55,643 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:55,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:55,644 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:55,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:55,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:55,867 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:55,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:55,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:55,892 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:55,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:55,893 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:55,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:55,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:56,283 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:56,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:56,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:56,310 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:56,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:56,310 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:56,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:56,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:56,640 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:56,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:56,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:56,666 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:56,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:56,667 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:56,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:56,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:57,035 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:57,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:57,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:57,066 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:57,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:57,067 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:57,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:57,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:57,349 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:57,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:57,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:57,375 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:57,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:57,376 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:57,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:57,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:57,750 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:57,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:57,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:57,776 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:57,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:57,777 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:57,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:57,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:58,068 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:58,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:58,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:58,095 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:58,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:58,095 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:58,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:58,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:58,426 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:58,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:58,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:58,452 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:58,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:58,452 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:58,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:58,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:58,860 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:58,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:58,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:58,889 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:58,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:58,889 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:58,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:58,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:59,116 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:59,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:59,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:59,140 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:59,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:59,141 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:59,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:59,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:59,426 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:59,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:59,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:59,460 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:59,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:59,460 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:59,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:59,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:59,682 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:59,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:59,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:59,707 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:59,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:59,707 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:59,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:05:59,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:05:59,949 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:05:59,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:05:59,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:05:59,973 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:05:59,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:05:59,974 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:05:59,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:00,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:00,517 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:00,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:00,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:00,550 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:00,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:00,550 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:00,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:00,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:00,818 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:00,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:00,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:00,843 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:00,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:00,843 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:00,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:00,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:01,050 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:01,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:01,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:01,074 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:01,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:01,075 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:01,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:01,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:01,329 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:01,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:01,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:01,355 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:01,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:01,355 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:01,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:01,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:01,580 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:01,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:01,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:01,604 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:01,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:01,604 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:01,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:01,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:01,927 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:01,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:01,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:01,957 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:01,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:01,958 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:01,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:01,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:02,208 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:02,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:02,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:02,233 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:02,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:02,233 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:02,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:02,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:02,605 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:02,617 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse0 (not .cse24)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 (not (and .cse1 .cse2 .cse4)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4)))) is different from false [2024-12-06 05:06:02,631 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse0 (not .cse24)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 (not (and .cse1 .cse2 .cse4)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4))))) is different from true [2024-12-06 05:06:02,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:02,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:02,653 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:02,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:02,653 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:02,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:02,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:03,048 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:03,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:03,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:03,081 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:03,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:03,081 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:03,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:03,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:03,327 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:03,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:03,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:03,352 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:03,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:03,352 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:03,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:03,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:03,603 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:03,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:03,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:03,627 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:03,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:03,627 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:03,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:03,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:04,075 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:04,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:04,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:04,108 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:04,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:04,108 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:04,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:04,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:04,422 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:04,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:04,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:04,449 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:04,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:04,450 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:04,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:04,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:04,748 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:04,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:04,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:04,775 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:04,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:04,775 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:04,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:04,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:05,017 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:05,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:05,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:05,040 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:05,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:05,040 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:05,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:05,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:05,444 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:05,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:05,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:05,474 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:05,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:05,474 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:05,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:05,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:05,686 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:05,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:05,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:05,710 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:05,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:05,710 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:05,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:05,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:06,087 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:06,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:06,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:06,118 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:06,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:06,118 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:06,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:06,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:06,369 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:06,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:06,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:06,394 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:06,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:06,394 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:06,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:06,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:06,670 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:06,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:06,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:06,699 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:06,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:06,699 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:06,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:06,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:07,021 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:07,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:07,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:07,052 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:07,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:07,053 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:07,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:07,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:07,464 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:07,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:07,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:07,500 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:07,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:07,500 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:07,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:07,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:07,748 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:07,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:07,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:07,781 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:07,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:07,781 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:07,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:07,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:08,039 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:08,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:08,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:08,064 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:08,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:08,065 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:08,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:08,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:08,282 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:08,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:08,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:08,306 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:08,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:08,306 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:08,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:08,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:08,631 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:08,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:08,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:08,656 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:08,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:08,656 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:08,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:08,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:09,084 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:09,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:09,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:09,113 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:09,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:09,113 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:09,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:09,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:09,360 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:09,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:09,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:09,386 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:09,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:09,386 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:09,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:09,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:09,719 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:09,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:09,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:09,753 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:09,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:09,753 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:09,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:09,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:10,006 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:10,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:10,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:10,030 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:10,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:10,031 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:10,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:10,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:10,246 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:10,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:10,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:10,272 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:10,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:10,272 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:10,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:10,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:10,500 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:10,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:10,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:10,527 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:10,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:10,528 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:10,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:10,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:10,785 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:10,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:10,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:10,810 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:10,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:10,810 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:10,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:10,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:11,075 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:11,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:11,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:11,101 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:11,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:11,101 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:11,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:11,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:11,418 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:11,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:11,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:11,448 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:11,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:11,449 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:11,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:11,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:12,158 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:12,171 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (not .cse24)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse19 .cse4)) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 (not (and .cse1 .cse2 .cse4)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4)))) is different from false [2024-12-06 05:06:12,185 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (not .cse24)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse19 .cse4)) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 (not (and .cse1 .cse2 .cse4)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4))))) is different from true [2024-12-06 05:06:12,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:12,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:12,563 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:12,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:12,563 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:12,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:12,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:12,894 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:12,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:12,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:12,931 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:12,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:12,931 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:12,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:12,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:13,216 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:13,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:13,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:13,241 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:13,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:13,241 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:13,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:13,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:13,522 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:13,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:13,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:13,548 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:13,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:13,548 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:13,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:13,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:13,917 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:13,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:13,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:13,953 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:13,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:13,953 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:13,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:13,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:14,371 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:14,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:14,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:14,403 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:14,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:14,403 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:14,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:14,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:14,742 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:14,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:14,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:14,771 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:14,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:14,771 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:14,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:14,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:15,061 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:15,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:15,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:15,087 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:15,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:15,088 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:15,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:15,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:15,375 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:15,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:15,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:15,401 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:15,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:15,401 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:15,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:15,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:15,909 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:15,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:15,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:15,960 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:15,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:15,960 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:15,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:15,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:16,350 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:16,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:16,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:16,376 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:16,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:16,376 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:16,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:16,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:16,735 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:16,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:16,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:16,764 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:16,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:16,764 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:16,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:16,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:17,558 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:17,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:17,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:17,785 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:17,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:17,786 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:17,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:17,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:18,322 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:18,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:18,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:18,353 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:18,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:18,353 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:18,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:18,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:18,606 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:18,618 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (not .cse24)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse5 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse19 .cse4)) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 (not (and .cse1 .cse2 .cse4)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4)))) is different from false [2024-12-06 05:06:18,632 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (not .cse24)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse5 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse19 .cse4)) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 (not (and .cse1 .cse2 .cse4)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4))))) is different from true [2024-12-06 05:06:18,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:18,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:18,653 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:18,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:18,653 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:18,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:18,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:19,074 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:19,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:19,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:19,105 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:19,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:19,105 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:19,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:19,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:19,579 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:19,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:19,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:19,610 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:19,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:19,610 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:19,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:19,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:19,864 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:19,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:19,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:19,888 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:19,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:19,888 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:19,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:19,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:20,178 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:20,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:20,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:20,203 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:20,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:20,203 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:20,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:20,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:20,675 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:20,690 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (not .cse24)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse5 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse19 .cse4)) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 (not (and .cse1 .cse2 .cse4)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4)))) is different from false [2024-12-06 05:06:20,706 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse20 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (.cse23 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse10 (select .cse23 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse1 (not .cse20)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse22 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (not .cse24)) (.cse5 (= .cse25 .cse22)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse2 (= .cse25 1)) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse4 (= .cse22 1))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse5 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse7 .cse2 (or (and .cse2 .cse4) .cse20) (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse19 .cse4)) .cse8 .cse9 (or (and .cse2 .cse21 .cse4) (and (= .cse22 (select .cse23 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse24 .cse18)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse3 .cse13 (not (and .cse5 .cse1)) .cse17 .cse21 (not (and .cse1 .cse2 .cse4)) .cse18 .cse19 (not (and .cse1 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) .cse7 .cse2 .cse8 .cse9 .cse3 .cse13 .cse17 .cse18 .cse19 .cse4)) .cse4))))) is different from true [2024-12-06 05:06:20,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:20,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:20,735 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:20,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:20,736 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:20,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:20,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:21,273 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:21,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:21,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:21,305 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:21,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:21,305 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:21,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:21,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:21,520 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:21,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:21,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:21,544 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:21,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:21,544 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:21,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:21,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:21,801 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:21,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:21,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:21,826 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:21,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:21,826 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:21,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:21,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:22,074 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:22,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:22,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:22,098 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:22,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:22,098 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:22,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:22,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:22,348 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:22,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:22,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:22,372 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:22,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:22,372 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:22,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:22,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:22,685 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:22,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:22,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:22,711 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:22,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:22,711 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:22,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:22,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:22,933 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:22,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:22,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:22,959 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:22,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:22,959 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:22,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:22,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:23,376 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:23,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:23,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:23,418 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:23,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:23,419 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:23,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:23,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:23,634 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:23,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:23,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:23,660 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:23,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:23,660 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:23,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:23,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:24,087 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:24,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:24,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:24,118 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:24,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:24,118 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:24,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:24,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:24,365 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:24,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:24,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:24,390 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:24,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:24,390 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:24,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:24,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:24,685 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:24,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:24,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:24,710 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:24,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:24,710 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:24,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:06:24,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:06:25,046 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:06:25,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:06:25,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 51 states and 120 transitions. [2024-12-06 05:06:25,073 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 120 transitions. [2024-12-06 05:06:25,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:06:25,073 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:06:25,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [2024-12-06 05:12:07,745 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:07,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:07,745 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:07,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:07,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:07,958 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:07,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:07,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:07,982 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:07,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:07,983 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:07,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:08,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:08,212 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:08,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:08,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:08,238 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:08,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:08,238 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:08,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:08,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:08,637 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:08,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:08,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:08,670 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:08,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:08,671 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:08,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:08,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:09,317 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:09,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:09,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:09,351 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:09,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:09,351 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:09,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:09,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:09,666 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:09,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:09,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:09,694 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:09,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:09,694 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:09,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:09,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:10,012 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:10,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:10,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:10,037 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:10,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:10,037 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:10,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:10,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:10,328 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:10,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:10,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:10,355 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:10,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:10,355 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:10,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:10,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:10,622 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:10,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:10,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:10,648 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:10,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:10,649 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:10,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:10,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:11,069 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:11,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:11,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:11,102 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:11,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:11,102 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:11,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:11,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:11,338 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:11,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:11,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:11,362 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:11,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:11,363 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:11,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:11,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:11,650 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:11,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:11,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:11,676 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:11,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:11,676 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:11,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:11,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:11,925 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:11,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:11,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:11,951 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:11,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:11,951 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:11,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:11,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:12,232 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:12,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:12,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:12,258 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:12,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:12,258 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:12,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:12,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:12,525 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:12,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:12,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:12,550 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:12,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:12,550 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:12,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:12,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:12,836 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:12,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:12,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:12,870 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:12,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:12,870 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:12,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:12,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:13,125 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:13,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:13,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:13,150 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:13,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:13,150 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:13,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:13,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:13,434 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:13,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:13,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:13,460 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:13,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:13,461 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:13,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:13,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:13,678 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:13,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:13,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:13,702 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:13,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:13,702 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:13,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:13,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:13,938 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:13,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:13,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:13,963 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:13,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:13,963 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:13,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:14,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:14,202 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:14,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:14,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:14,227 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:14,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:14,228 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:14,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:14,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:14,450 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:14,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:14,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:14,477 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:14,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:14,477 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:14,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:14,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:15,028 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:15,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:15,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:15,060 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:15,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:15,061 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:15,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:15,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:15,308 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:15,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:15,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:15,332 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:15,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:15,332 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:15,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:15,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:15,606 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:15,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:15,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:15,633 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:15,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:15,633 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:15,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:15,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:16,063 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:16,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:16,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:16,095 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:16,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:16,095 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:16,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:16,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:16,350 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:16,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:16,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:16,375 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:16,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:16,375 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:16,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:16,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:16,649 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:16,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:16,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:16,675 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:16,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:16,676 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:16,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:16,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:16,943 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:16,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:16,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:16,968 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:16,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:16,968 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:16,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:17,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:17,229 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:17,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:17,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:17,254 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:17,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:17,254 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:17,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:17,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:17,612 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:17,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:17,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:17,637 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:17,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:17,637 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:17,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:17,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:18,088 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:18,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:18,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:18,117 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:18,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:18,117 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:18,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:18,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:18,409 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:18,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:18,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:18,434 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:18,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:18,434 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:18,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:18,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:18,925 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:18,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:18,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:18,956 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:18,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:18,957 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:18,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:18,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:19,225 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:19,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:19,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:19,249 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:19,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:19,249 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:19,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:19,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:19,510 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:19,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:19,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:19,534 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:19,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:19,534 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:19,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:19,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:19,818 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:19,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:19,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:19,842 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:19,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:19,842 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:19,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:19,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:20,094 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:20,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:20,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:20,120 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:20,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:20,120 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:20,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:20,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:20,367 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:20,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:20,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:20,392 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:20,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:20,392 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:20,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:20,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:20,668 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:20,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:20,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:20,694 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:20,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:20,694 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:20,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:20,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:21,002 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:21,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:21,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:21,029 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:21,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:21,029 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:21,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:21,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:21,320 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:21,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:21,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:21,346 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:21,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:21,346 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:21,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:21,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:21,943 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:22,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:22,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:22,156 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:22,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:22,156 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:22,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:22,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:22,452 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:22,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:22,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:22,476 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:22,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:22,476 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:22,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:22,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:22,750 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:22,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:22,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:22,774 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:22,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:22,774 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:22,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:22,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:23,073 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:23,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:23,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:23,103 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:23,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:23,103 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:23,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:23,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:23,360 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:23,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:23,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:23,385 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:23,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:23,385 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:23,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:23,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:23,680 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:23,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:23,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:23,705 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:23,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:23,705 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:23,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:23,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:23,957 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:23,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:23,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:23,980 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:23,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:23,981 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:23,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:24,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:24,239 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:24,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:24,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:24,263 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:24,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:24,264 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:24,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:24,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:24,536 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:24,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:24,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:24,561 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:24,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:24,561 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:24,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:24,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:24,847 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:24,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:24,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:24,871 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:24,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:24,871 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:24,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:24,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:25,227 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:25,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:25,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:25,258 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:25,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:25,258 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:25,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:25,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:25,501 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:25,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:25,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:25,525 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:25,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:25,525 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:25,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:25,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:25,771 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:25,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:25,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:25,795 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:25,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:25,795 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:25,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:25,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:26,147 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:26,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:26,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:26,173 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:26,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:26,173 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:26,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:26,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:26,431 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:26,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:26,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:26,455 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:26,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:26,456 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:26,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:26,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:26,761 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:26,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:26,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:26,786 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:26,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:26,786 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:26,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:26,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:27,536 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:27,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:27,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:27,568 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:27,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:27,568 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:27,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:27,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:27,839 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:27,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:27,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:27,865 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:27,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:27,865 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:27,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:27,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:28,132 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:28,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:28,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:28,158 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:28,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:28,158 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:28,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:28,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:28,569 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:28,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:28,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:28,605 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:28,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:28,605 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:28,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:28,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:28,891 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:28,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:28,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:28,916 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:28,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:28,917 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:28,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:28,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:29,173 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:29,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:29,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:29,199 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:29,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:29,200 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:29,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:29,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:30,286 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:30,298 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse27 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse7 (select .cse27 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (= .cse26 .cse25)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse23 (= .cse25 (select .cse27 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse17 (= .cse26 1)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse24 (or .cse3 .cse19)) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse25 1))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse24 .cse16 .cse20) (and .cse23 .cse22 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse15)) (or (and .cse17 .cse20) .cse21) .cse5 .cse6 .cse18 .cse10 .cse14 .cse24 .cse15 .cse16 .cse20)))) is different from false [2024-12-06 05:12:30,516 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse27 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse7 (select .cse27 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (= .cse26 .cse25)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse23 (= .cse25 (select .cse27 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse17 (= .cse26 1)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse24 (or .cse3 .cse19)) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse25 1))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse24 .cse16 .cse20) (and .cse23 .cse22 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse15)) (or (and .cse17 .cse20) .cse21) .cse5 .cse6 .cse18 .cse10 .cse14 .cse24 .cse15 .cse16 .cse20))))) is different from true [2024-12-06 05:12:30,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:30,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:30,738 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:30,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:30,739 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:30,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:30,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:30,968 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:30,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:30,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:30,992 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:30,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:30,992 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:30,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:31,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:31,246 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:31,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:31,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:31,271 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:31,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:31,271 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:31,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:31,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:31,548 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:31,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:31,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:31,573 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:31,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:31,574 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:31,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:31,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:32,330 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:32,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:32,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:32,545 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:32,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:32,545 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:32,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:32,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:32,817 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:32,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:32,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:32,843 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:32,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:32,844 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:32,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:32,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:33,133 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:33,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:33,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:33,160 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:33,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:33,160 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:33,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:33,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:33,408 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:33,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:33,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:33,435 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:33,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:33,435 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:33,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:33,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:33,657 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:33,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:33,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:33,683 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:33,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:33,683 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:33,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:33,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:34,184 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:34,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:34,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:34,220 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:34,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:34,220 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:34,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:34,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:34,521 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:34,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:34,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:34,548 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:34,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:34,548 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:34,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:34,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:34,866 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:34,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:34,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:34,893 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:34,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:34,893 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:34,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:34,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:35,220 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:35,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:35,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:35,245 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:35,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:35,245 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:35,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:35,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:35,500 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:35,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:35,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:35,525 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:35,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:35,525 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:35,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:35,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:35,797 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:35,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:35,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:35,822 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:35,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:35,822 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:35,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:35,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:36,090 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:36,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:36,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:36,114 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:36,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:36,115 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:36,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:36,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:36,336 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:36,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:36,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:36,361 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:36,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:36,361 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:36,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:36,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:36,740 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:36,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:36,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:36,775 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:36,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:36,775 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:36,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:36,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:37,017 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:37,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:37,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:37,043 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:37,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:37,043 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:37,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:37,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:37,480 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:37,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:37,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:37,514 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:37,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:37,514 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:37,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:37,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:37,867 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:37,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:37,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:37,901 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:37,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:37,901 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:37,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:37,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:38,265 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:38,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:38,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:38,300 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:38,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:38,300 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:38,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:38,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:38,650 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:38,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:38,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:38,679 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:38,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:38,679 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:38,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:38,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:39,174 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:39,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:39,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:39,208 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:39,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:39,208 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:39,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:39,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:39,448 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:39,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:39,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:39,474 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:39,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:39,474 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:39,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:39,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:39,920 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:39,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:39,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:39,952 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:39,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:39,952 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:39,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:40,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:40,290 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:40,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:40,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:40,315 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:40,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:40,316 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:40,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:40,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:40,569 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:40,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:40,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:40,594 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:40,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:40,595 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:40,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:40,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:40,852 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:40,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:40,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:40,877 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:40,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:40,877 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:40,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:40,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:41,221 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:41,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:41,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:41,245 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:41,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:41,245 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:41,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:41,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:41,626 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:41,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:41,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:41,650 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:41,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:41,651 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:41,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:41,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:41,870 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:41,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:41,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:41,899 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:41,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:41,899 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:41,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:41,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:42,308 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:42,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:42,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:42,343 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:42,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:42,343 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:42,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:42,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:42,564 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:42,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:42,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:42,590 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:42,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:42,590 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:42,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:42,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:42,856 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:42,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:42,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:42,882 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:42,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:42,882 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:42,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:42,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:43,175 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:43,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:43,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:43,201 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:43,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:43,202 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:43,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:43,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:43,475 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:43,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:43,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:43,501 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:43,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:43,501 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:43,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:43,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:43,828 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:43,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:43,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:43,862 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:43,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:43,862 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:43,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:43,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:44,301 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:44,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:44,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:44,335 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:44,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:44,335 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:44,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:44,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:44,603 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:44,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:44,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:44,629 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:44,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:44,630 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:44,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:44,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:44,963 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:44,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:44,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:44,989 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:44,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:44,990 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:44,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:45,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:45,271 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:45,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:45,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:45,297 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:45,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:45,297 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:45,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:45,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:45,536 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:45,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:45,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:45,562 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:45,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:45,562 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:45,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:45,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:45,903 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:45,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:45,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:45,929 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:45,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:45,929 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:45,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:45,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:46,196 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:46,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:46,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:46,221 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:46,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:46,222 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:46,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:46,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:46,464 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:46,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:46,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:46,489 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:46,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:46,489 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:46,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:46,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:46,892 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:46,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:46,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:46,921 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:46,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:46,921 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:46,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:46,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:47,232 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:47,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:47,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:47,256 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:47,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:47,256 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:47,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:47,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:47,569 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:47,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:47,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:47,596 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:47,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:47,596 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:47,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:47,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:47,850 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:47,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:47,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:47,875 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:47,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:47,876 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:47,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:47,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:48,178 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:48,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:48,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:48,202 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:48,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:48,202 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:48,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:48,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:48,465 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:48,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:48,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:48,489 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:48,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:48,490 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:48,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:48,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:48,982 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:49,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:49,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:49,018 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:49,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:49,018 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:49,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:49,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:49,295 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:49,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:49,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:49,321 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:49,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:49,321 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:49,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:49,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:49,547 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:49,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:49,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:49,574 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:49,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:49,574 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:49,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:49,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:49,914 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:49,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:49,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:49,941 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:49,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:49,942 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:49,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:49,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:50,235 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:50,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:50,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:50,261 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:50,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:50,261 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:50,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:50,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:50,663 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:50,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:50,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:50,698 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:50,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:50,698 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:50,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:50,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:50,968 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:50,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:50,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:50,994 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:50,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:50,994 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:50,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:51,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:51,264 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:51,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:51,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:51,289 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:51,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:51,289 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:51,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:51,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:51,592 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:51,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:51,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:51,618 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:51,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:51,618 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:51,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:51,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:51,858 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:51,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:51,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:51,886 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:51,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:51,886 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:51,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:51,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:52,122 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:52,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:52,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:52,146 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:52,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:52,146 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:52,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:52,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:52,549 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:52,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:52,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:52,584 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:52,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:52,584 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:52,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:52,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:52,940 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:52,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:52,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:52,967 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:52,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:52,967 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:52,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:53,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:53,256 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:53,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:53,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:53,283 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:53,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:53,283 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:53,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:53,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:53,721 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:53,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:53,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:53,755 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:53,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:53,755 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:53,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:53,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:54,005 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:54,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:54,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:54,030 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:54,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:54,030 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:54,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:54,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:54,279 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:54,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:54,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:54,305 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:54,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:54,306 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:54,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:54,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:54,581 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:54,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:54,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:54,607 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:54,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:54,607 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:54,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:54,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:55,040 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:55,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:55,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:55,075 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:55,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:55,075 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:55,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:55,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:55,365 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:55,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:55,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:55,391 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:55,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:55,391 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:55,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:55,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:55,672 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:55,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:55,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:55,697 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:55,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:55,698 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:55,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:55,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:56,003 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:56,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:56,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:56,028 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:56,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:56,028 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:56,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:56,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:56,275 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:56,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:56,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:56,300 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:56,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:56,300 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:56,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:56,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:56,546 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:56,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:56,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:56,571 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:56,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:56,571 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:56,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:56,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:56,837 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:56,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:56,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:56,862 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:56,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:56,862 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:56,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:56,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:57,348 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:57,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:57,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:57,524 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:57,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:57,524 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:57,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:57,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:57,845 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:57,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:57,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:57,870 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:57,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:57,870 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:57,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:57,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:58,147 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:58,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:58,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:58,171 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:58,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:58,171 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:58,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:58,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:58,467 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:58,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:58,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:58,507 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:58,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:58,507 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:58,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:58,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:58,913 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:58,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:58,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:58,943 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:58,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:58,944 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:58,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:58,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:59,170 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:59,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:59,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:59,194 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:59,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:59,194 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:59,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:59,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:59,440 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:59,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:59,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:59,464 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:59,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:59,464 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:59,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:59,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:12:59,748 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:12:59,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:12:59,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:12:59,773 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:12:59,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:12:59,774 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:12:59,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:12:59,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:00,081 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:00,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:00,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:00,116 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:00,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:00,116 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:00,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:00,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:00,354 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:00,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:00,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:00,378 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:00,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:00,379 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:00,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:00,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:00,638 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:00,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:00,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:00,663 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:00,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:00,663 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:00,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:00,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:01,035 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:01,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:01,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:01,060 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:01,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:01,061 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:01,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:01,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:01,358 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:01,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:01,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:01,391 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:01,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:01,391 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:01,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:01,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:01,641 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:01,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:01,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:01,667 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:01,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:01,667 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:01,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:01,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:01,909 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:01,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:01,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:01,939 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:01,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:01,939 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:01,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:01,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:02,249 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:02,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:02,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:02,275 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:02,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:02,275 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:02,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:02,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:02,547 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:02,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:02,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:02,572 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:02,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:02,573 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:02,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:02,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:02,859 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:02,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:02,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:02,886 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:02,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:02,886 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:02,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:02,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:03,113 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:03,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:03,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:03,137 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:03,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:03,138 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:03,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:03,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:03,591 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:03,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:03,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:03,627 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:03,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:03,627 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:03,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:03,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:03,875 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:03,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:03,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:03,902 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:03,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:03,902 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:03,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:03,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:04,166 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:04,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:04,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:04,193 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:04,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:04,193 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:04,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:04,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:04,427 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:04,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:04,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:04,453 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:04,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:04,453 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:04,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:04,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:04,749 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:04,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:04,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:04,777 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:04,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:04,777 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:04,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:04,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:05,056 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:05,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:05,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:05,088 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:05,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:05,089 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:05,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:05,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:05,413 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:05,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:05,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:05,439 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:05,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:05,439 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:05,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:05,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:05,662 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:05,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:05,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:05,687 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:05,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:05,687 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:05,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:05,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:05,972 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:05,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:05,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:05,998 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:05,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:05,998 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:05,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:06,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:06,300 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:06,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:06,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:06,326 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:06,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:06,326 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:06,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:06,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:06,570 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:06,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:06,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:06,597 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:06,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:06,597 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:06,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:06,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:06,849 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:06,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:06,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:06,874 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:06,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:06,874 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:06,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:06,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:07,124 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:07,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:07,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:07,149 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:07,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:07,150 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:07,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:07,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:07,674 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:07,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:07,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:07,707 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:07,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:07,707 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:07,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:07,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:07,998 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:08,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:08,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:08,025 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:08,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:08,025 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:08,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:08,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:08,684 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:08,697 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse27 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse27)) (.cse23 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse28 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse8 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse13 (select .cse28 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse15 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse24 (or .cse1 .cse23)) (.cse4 (= .cse6 1))) (let ((.cse10 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (and .cse2 .cse24 .cse4)) (.cse25 (= .cse6 (select .cse28 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse16 (= .cse13 .cse15)) (.cse20 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse26 (or (and .cse2 .cse4) .cse27)) (.cse0 (not .cse8)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (or .cse7 .cse8) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse4)) (= (select .cse10 0) 0) .cse1 (not (and .cse11 .cse12 .cse9 (let ((.cse14 (= (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse13 1) .cse14 (= .cse15 1)) (and .cse14 .cse16 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse13 (select (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse19 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse18 (select .cse19 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse13 (select .cse18 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse18) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse19 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse19 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse20 .cse21 .cse22)) (not (and .cse1 .cse2 .cse9 .cse3 .cse22 .cse4)) (not (and .cse2 (or .cse1 (and .cse0 .cse23)) .cse3 .cse4)) (not (and .cse0 .cse1 .cse2 .cse3 .cse21 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse9 .cse3 .cse24 .cse22 .cse4)) (not (and .cse2 .cse3 .cse24 .cse21 .cse22 .cse4)) .cse11 .cse2 (or .cse0 (and .cse25 .cse21)) .cse26 (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse22 .cse4)) .cse12 .cse9 (or .cse7 (and .cse25 .cse8 .cse21)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse16 .cse20 .cse24 .cse21 (not (and .cse2 .cse3 .cse24 .cse4)) .cse22 (not (and .cse26 .cse3 .cse24)) .cse4 (not (and .cse0 .cse2 .cse3 .cse24 .cse4))))))) is different from false [2024-12-06 05:13:08,712 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse27 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse27)) (.cse23 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse28 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse8 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse13 (select .cse28 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse15 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse24 (or .cse1 .cse23)) (.cse4 (= .cse6 1))) (let ((.cse10 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse7 (and .cse2 .cse24 .cse4)) (.cse25 (= .cse6 (select .cse28 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse16 (= .cse13 .cse15)) (.cse20 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse26 (or (and .cse2 .cse4) .cse27)) (.cse0 (not .cse8)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (or .cse7 .cse8) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse4)) (= (select .cse10 0) 0) .cse1 (not (and .cse11 .cse12 .cse9 (let ((.cse14 (= (select .cse10 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse13 1) .cse14 (= .cse15 1)) (and .cse14 .cse16 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse17 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse13 (select (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse17 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse19 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse18 (select .cse19 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse13 (select .cse18 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse18) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse19 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse19 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse20 .cse21 .cse22)) (not (and .cse1 .cse2 .cse9 .cse3 .cse22 .cse4)) (not (and .cse2 (or .cse1 (and .cse0 .cse23)) .cse3 .cse4)) (not (and .cse0 .cse1 .cse2 .cse3 .cse21 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse9 .cse3 .cse24 .cse22 .cse4)) (not (and .cse2 .cse3 .cse24 .cse21 .cse22 .cse4)) .cse11 .cse2 (or .cse0 (and .cse25 .cse21)) .cse26 (not (and .cse0 .cse1 .cse2 .cse9 .cse3 .cse22 .cse4)) .cse12 .cse9 (or .cse7 (and .cse25 .cse8 .cse21)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse16 .cse20 .cse24 .cse21 (not (and .cse2 .cse3 .cse24 .cse4)) .cse22 (not (and .cse26 .cse3 .cse24)) .cse4 (not (and .cse0 .cse2 .cse3 .cse24 .cse4)))))))) is different from true [2024-12-06 05:13:08,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:08,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:08,741 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:08,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:08,742 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:08,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:08,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:08,999 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:09,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:09,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:09,025 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:09,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:09,025 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:09,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:09,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:09,372 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:09,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:09,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:09,407 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:09,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:09,407 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:09,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:09,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:09,828 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:09,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:09,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:09,863 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:09,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:09,863 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:09,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:09,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:10,160 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:10,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:10,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:10,186 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:10,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:10,187 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:10,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:10,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:10,416 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:10,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:10,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:10,442 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:10,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:10,443 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:10,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:10,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:10,660 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:10,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:10,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:10,687 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:10,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:10,687 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:10,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:10,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:10,980 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:11,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:11,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:11,007 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:11,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:11,007 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:11,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:11,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:12,862 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:13,081 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse26 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse26)) (.cse22 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse29 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse7 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse12 (select .cse29 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse27 1)) (.cse23 (or .cse1 .cse22)) (.cse4 (= .cse28 1))) (let ((.cse9 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (and .cse2 .cse23 .cse4)) (.cse24 (= .cse28 (select .cse29 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse5 (= .cse27 .cse28)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse15 (= .cse12 .cse14)) (.cse19 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse25 (or (and .cse2 .cse4) .cse26)) (.cse0 (not .cse7)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (or .cse6 .cse7) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse4)) (= (select .cse9 0) 0) .cse1 (not (and .cse10 .cse11 .cse8 (let ((.cse13 (= (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse12 1) .cse13 (= .cse14 1)) (and .cse13 .cse15 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse12 (select (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse18 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse17 (select .cse18 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse12 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse17) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse18 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse18 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse19 .cse20 .cse21)) (not (and .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) (not (and .cse2 (or .cse1 (and .cse0 .cse22)) .cse3 .cse4)) (not (and .cse0 .cse1 .cse2 .cse3 .cse20 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse8 .cse3 .cse23 .cse21 .cse4)) (not (and .cse2 .cse3 .cse23 .cse20 .cse21 .cse4)) .cse10 .cse2 (or .cse0 (and .cse24 .cse20)) .cse25 (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) .cse11 .cse8 (or .cse6 (and .cse24 .cse7 .cse20)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse15 .cse19 .cse23 (not (and .cse5 .cse1 (or (= |c_ULTIMATE.start_main_~#A~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse11) .cse3 .cse15 .cse19 (or (and .cse7 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4) .cse20)) .cse20 (not (and .cse2 .cse3 .cse23 .cse4)) .cse21 (not (and .cse25 .cse3 .cse23)) .cse4 (not (and .cse0 .cse2 .cse3 .cse23 .cse4))))))) is different from false [2024-12-06 05:13:13,097 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse26 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse26)) (.cse22 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse29 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse7 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse12 (select .cse29 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse27 1)) (.cse23 (or .cse1 .cse22)) (.cse4 (= .cse28 1))) (let ((.cse9 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (and .cse2 .cse23 .cse4)) (.cse24 (= .cse28 (select .cse29 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse5 (= .cse27 .cse28)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse15 (= .cse12 .cse14)) (.cse19 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse25 (or (and .cse2 .cse4) .cse26)) (.cse0 (not .cse7)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (or .cse6 .cse7) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse4)) (= (select .cse9 0) 0) .cse1 (not (and .cse10 .cse11 .cse8 (let ((.cse13 (= (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse12 1) .cse13 (= .cse14 1)) (and .cse13 .cse15 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse12 (select (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse18 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse17 (select .cse18 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse12 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse17) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse18 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse18 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse19 .cse20 .cse21)) (not (and .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) (not (and .cse2 (or .cse1 (and .cse0 .cse22)) .cse3 .cse4)) (not (and .cse0 .cse1 .cse2 .cse3 .cse20 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse8 .cse3 .cse23 .cse21 .cse4)) (not (and .cse2 .cse3 .cse23 .cse20 .cse21 .cse4)) .cse10 .cse2 (or .cse0 (and .cse24 .cse20)) .cse25 (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) .cse11 .cse8 (or .cse6 (and .cse24 .cse7 .cse20)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse15 .cse19 .cse23 (not (and .cse5 .cse1 (or (= |c_ULTIMATE.start_main_~#A~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse11) .cse3 .cse15 .cse19 (or (and .cse7 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4) .cse20)) .cse20 (not (and .cse2 .cse3 .cse23 .cse4)) .cse21 (not (and .cse25 .cse3 .cse23)) .cse4 (not (and .cse0 .cse2 .cse3 .cse23 .cse4)))))))) is different from true [2024-12-06 05:13:13,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:13,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:13,540 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:13,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:13,540 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:13,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:13,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:14,051 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:14,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:14,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:14,087 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:14,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:14,087 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:14,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:14,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:14,343 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:14,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:14,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:14,370 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:14,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:14,371 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:14,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:14,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:14,763 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:14,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:14,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:14,798 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:14,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:14,798 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:14,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:14,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:15,077 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:15,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:15,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:15,105 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:15,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:15,105 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:15,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:15,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:15,390 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:15,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:15,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:15,416 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:15,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:15,416 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:15,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:15,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:15,713 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:15,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:15,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 54 states and 132 transitions. [2024-12-06 05:13:15,740 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 132 transitions. [2024-12-06 05:13:15,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:15,740 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:15,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:15,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:16,989 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:23,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:23,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:23,116 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:23,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:23,116 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:23,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:23,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:23,429 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:23,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:23,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:23,466 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:23,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:23,466 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:23,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:23,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:23,799 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:23,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:23,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:23,855 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:23,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:23,856 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:23,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:23,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:24,096 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:24,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:24,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:24,131 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:24,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:24,131 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:24,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:24,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:24,379 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:24,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:24,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:24,415 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:24,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:24,415 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:24,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:24,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:24,756 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:24,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:24,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:24,798 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:24,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:24,798 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:24,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:24,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:25,119 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:25,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:25,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:25,155 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:25,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:25,155 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:25,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:25,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:25,391 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:25,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:25,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:25,426 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:25,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:25,426 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:25,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:25,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:25,699 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:25,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:25,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:25,734 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:25,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:25,734 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:25,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:25,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:26,059 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:26,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:26,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:26,103 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:26,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:26,103 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:26,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:26,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:26,376 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:26,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:26,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:26,410 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:26,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:26,411 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:26,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:26,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:26,644 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:26,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:26,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:26,679 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:26,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:26,679 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:26,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:26,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:26,930 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:26,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:26,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:26,965 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:26,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:26,966 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:26,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:27,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:27,196 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:27,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:27,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:27,230 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:27,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:27,230 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:27,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:27,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:27,520 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:27,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:27,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:27,555 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:27,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:27,555 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:27,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:27,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:27,901 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:27,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:27,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:27,935 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:27,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:27,935 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:27,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:27,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:28,245 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:28,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:28,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:28,281 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:28,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:28,282 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:28,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:28,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:28,783 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:28,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:28,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:28,827 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:28,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:28,827 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:28,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:28,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:29,302 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:29,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:29,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:29,346 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:29,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:29,346 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:29,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:29,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:29,753 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:29,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:29,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:29,798 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:29,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:29,798 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:29,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:29,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:30,257 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:30,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:30,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:30,321 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:30,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:30,321 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:30,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:30,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:30,807 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:30,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:30,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:30,853 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:30,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:30,853 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:30,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:30,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:31,112 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:31,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:31,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:31,148 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:31,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:31,148 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:31,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:31,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:31,546 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:31,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:31,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:31,600 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:31,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:31,600 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:31,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:31,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:31,871 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:31,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:31,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:31,907 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:31,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:31,907 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:31,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:31,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:32,186 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:32,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:32,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:32,221 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:32,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:32,222 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:32,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:32,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:34,428 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:34,740 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse30 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse30)) (.cse29 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse31 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse19 (select .cse31 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse32 (or .cse1 .cse29)) (.cse4 (= .cse6 1)) (.cse16 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse17 (not .cse16)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse9 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse12 (= .cse19 .cse25)) (.cse13 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (= .cse25 .cse6)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) (not (let ((.cse8 (or .cse22 .cse23))) (and (or (and .cse8 .cse9 .cse10 .cse11 (or .cse0 (and .cse12 .cse13 .cse14 .cse15))) .cse16) (or .cse17 (and .cse8 .cse18 (or .cse0 (let ((.cse20 (select .cse7 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse19 .cse20) (= .cse20 .cse6) .cse13 .cse15))) .cse21))))) .cse1 (not (and .cse17 .cse10 .cse18 (let ((.cse24 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse19 1) .cse24 (= .cse25 1)) (and .cse24 .cse12 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse19 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse19 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse15 .cse21)) .cse9 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse17 .cse2 (or .cse1 (and .cse0 .cse29)) (or (and .cse2 .cse4) .cse30) .cse10 .cse18 (or .cse22 (and (= .cse6 (select .cse31 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse23 .cse15)) .cse3 .cse12 (not (and (or .cse0 (and .cse9 .cse12 .cse13 .cse11 .cse14)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse15 .cse21)) .cse11 .cse32 .cse15 .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4))))))) is different from false [2024-12-06 05:13:34,755 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse30 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse6 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse30)) (.cse29 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse5 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse31 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse19 (select .cse31 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse5 1)) (.cse32 (or .cse1 .cse29)) (.cse4 (= .cse6 1)) (.cse16 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse17 (not .cse16)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse9 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse12 (= .cse19 .cse25)) (.cse13 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (= .cse25 .cse6)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (= .cse5 .cse6) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse7 0) 0) (not (let ((.cse8 (or .cse22 .cse23))) (and (or (and .cse8 .cse9 .cse10 .cse11 (or .cse0 (and .cse12 .cse13 .cse14 .cse15))) .cse16) (or .cse17 (and .cse8 .cse18 (or .cse0 (let ((.cse20 (select .cse7 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse19 .cse20) (= .cse20 .cse6) .cse13 .cse15))) .cse21))))) .cse1 (not (and .cse17 .cse10 .cse18 (let ((.cse24 (= (select .cse7 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse19 1) .cse24 (= .cse25 1)) (and .cse24 .cse12 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse19 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse19 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse11 .cse15 .cse21)) .cse9 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse17 .cse2 (or .cse1 (and .cse0 .cse29)) (or (and .cse2 .cse4) .cse30) .cse10 .cse18 (or .cse22 (and (= .cse6 (select .cse31 |c_ULTIMATE.start_main_~#B~0#1.offset|)) .cse23 .cse15)) .cse3 .cse12 (not (and (or .cse0 (and .cse9 .cse12 .cse13 .cse11 .cse14)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse15 .cse21)) .cse11 .cse32 .cse15 .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4)))))))) is different from true [2024-12-06 05:13:35,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:35,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:35,770 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:35,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:35,770 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:35,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:35,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:36,206 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:36,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:36,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:36,253 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:36,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:36,253 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:36,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:36,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:36,494 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:36,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:36,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:36,531 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:36,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:36,531 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:36,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:36,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:37,006 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:37,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:37,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:37,047 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:37,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:37,048 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:37,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:37,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:37,379 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:37,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:37,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:37,420 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:37,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:37,420 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:37,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:37,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:37,675 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:37,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:37,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:37,710 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:37,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:37,710 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:37,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:37,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:38,127 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:38,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:38,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:38,168 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:38,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:38,168 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:38,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:38,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:38,405 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:38,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:38,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:38,445 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:38,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:38,446 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:38,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:38,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:38,768 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:38,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:38,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:38,804 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:38,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:38,804 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:38,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:38,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:39,063 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:39,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:39,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:39,100 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:39,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:39,100 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:39,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:39,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:39,371 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:39,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:39,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:39,408 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:39,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:39,408 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:39,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:39,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:39,769 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:39,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:39,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:39,814 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:39,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:39,814 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:39,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:39,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:40,089 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:40,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:40,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:40,125 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:40,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:40,125 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:40,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:40,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:40,580 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:40,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:40,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:40,626 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:40,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:40,626 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:40,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:40,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:40,944 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:40,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:40,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:40,989 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:40,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:40,990 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:40,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:41,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:41,520 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:41,529 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse31 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse31)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse34 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse34 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse5 (= .cse34 .cse20)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) (or (and .cse2 .cse4) .cse31) .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 .cse32 .cse14 .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4))))))) is different from false [2024-12-06 05:13:41,771 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse31 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse31)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse34 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse34 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse5 (= .cse34 .cse20)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) (or (and .cse2 .cse4) .cse31) .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 .cse32 .cse14 .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4)))))))) is different from true [2024-12-06 05:13:41,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:41,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:41,804 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:41,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:41,804 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:41,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:41,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:42,443 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:42,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:42,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:42,489 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:42,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:42,489 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:42,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:42,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:42,745 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:42,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:42,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:42,783 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:42,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:42,783 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:42,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:42,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:43,538 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:43,823 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse31 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse31)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse34 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse34 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse5 (= .cse34 .cse20)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) (or (and .cse2 .cse4) .cse31) .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 (not (and (or .cse23 (and .cse1 .cse2 .cse4)) .cse3 (or .cse0 (and .cse29 .cse12 .cse14)))) .cse32 .cse14 .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4))))))) is different from false [2024-12-06 05:13:43,839 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse31 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse31)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse34 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse34 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse5 (= .cse34 .cse20)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) (or (and .cse2 .cse4) .cse31) .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 (not (and (or .cse23 (and .cse1 .cse2 .cse4)) .cse3 (or .cse0 (and .cse29 .cse12 .cse14)))) .cse32 .cse14 .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4)))))))) is different from true [2024-12-06 05:13:43,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:43,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:43,873 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:43,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:43,873 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:43,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:43,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:44,148 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:44,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:44,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:44,184 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:44,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:44,184 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:44,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:44,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:44,484 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:44,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:44,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:44,518 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:44,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:44,519 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:44,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:44,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:44,746 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:44,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:44,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:44,780 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:44,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:44,780 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:44,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:44,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:45,028 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:45,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:45,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:45,062 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:45,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:45,062 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:45,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:45,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:45,377 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:45,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:45,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:45,411 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:45,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:45,412 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:45,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:45,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:45,667 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:45,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:45,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:45,701 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:45,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:45,702 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:45,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:45,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:46,373 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:46,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:46,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:46,614 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:46,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:46,615 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:46,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:46,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:46,920 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:46,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:46,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:46,954 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:46,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:46,955 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:46,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:47,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:47,186 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:47,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:47,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:47,221 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:47,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:47,221 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:47,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:47,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:47,545 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:47,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:47,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:47,584 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:47,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:47,584 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:47,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:47,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:48,102 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:48,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:48,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:48,144 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:48,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:48,144 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:48,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:48,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:48,415 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:48,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:48,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:48,452 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:48,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:48,453 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:48,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:48,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:48,887 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:48,896 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse34 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse34)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse35 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse35 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse5 (= .cse35 .cse20)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse31 (or (and .cse2 .cse4) .cse34)) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) .cse31 .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 (not (and (or .cse23 (and .cse1 .cse2 .cse4)) .cse3 (or .cse0 (and .cse29 .cse12 .cse14)))) .cse32 .cse14 (or (and .cse31 .cse32) (and .cse29 .cse23 .cse12 .cse14)) .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4))))))) is different from false [2024-12-06 05:13:48,916 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse34 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse34)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse35 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse35 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse5 (= .cse35 .cse20)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse31 (or (and .cse2 .cse4) .cse34)) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) .cse31 .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 (not (and (or .cse23 (and .cse1 .cse2 .cse4)) .cse3 (or .cse0 (and .cse29 .cse12 .cse14)))) .cse32 .cse14 (or (and .cse31 .cse32) (and .cse29 .cse23 .cse12 .cse14)) .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4)))))))) is different from true [2024-12-06 05:13:48,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:48,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:48,972 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:48,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:48,972 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:48,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:49,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:49,327 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:49,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:49,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:49,362 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:49,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:49,363 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:49,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:49,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:49,621 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:49,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:49,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:49,655 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:49,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:49,656 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:49,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:49,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:49,925 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:49,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:49,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:49,961 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:49,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:49,962 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:49,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:50,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:50,267 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:50,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:50,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:50,304 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:50,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:50,304 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:50,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:50,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:50,603 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:50,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:50,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:50,647 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:50,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:50,647 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:50,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:50,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:50,897 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:50,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:50,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:50,932 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:50,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:50,933 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:50,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:50,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:51,280 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:51,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:51,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:51,316 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:51,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:51,316 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:51,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:51,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:51,819 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:51,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:51,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:51,863 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:51,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:51,863 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:51,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:51,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:52,174 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:52,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:52,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:52,209 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:52,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:52,209 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:52,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:52,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:52,625 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:52,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:52,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:52,670 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:52,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:52,670 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:52,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:52,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:53,051 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:53,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:53,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:53,094 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:53,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:53,095 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:53,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:53,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:53,363 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:53,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:53,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:53,399 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:53,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:53,399 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:53,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:53,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:53,735 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:53,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:53,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:53,771 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:53,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:53,772 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:53,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:53,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:54,067 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:54,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:54,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:54,103 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:54,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:54,103 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:54,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:54,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:54,339 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:54,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:54,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:54,374 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:54,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:54,375 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:54,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:54,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:54,591 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:54,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:54,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:54,631 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:54,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:54,631 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:54,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:54,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:54,923 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:54,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:54,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:54,959 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:54,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:54,960 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:54,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:55,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:55,256 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:55,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:55,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:55,291 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:55,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:55,291 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:55,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:55,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:55,537 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:55,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:55,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:55,577 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:55,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:55,577 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:55,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:55,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:55,811 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:55,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:55,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:55,846 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:55,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:55,846 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:55,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:55,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:56,336 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:56,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:56,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:56,381 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:56,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:56,381 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:56,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:56,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:56,644 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:56,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:56,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:56,679 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:56,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:56,680 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:56,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:56,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:56,970 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:57,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:57,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:57,005 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:57,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:57,006 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:57,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:57,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:57,392 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:57,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:57,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:57,426 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:57,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:57,426 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:57,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:57,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:57,702 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:57,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:57,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:57,736 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:57,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:57,736 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:57,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:57,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:58,028 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:58,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:58,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:58,062 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:58,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:58,062 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:58,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:58,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:58,323 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:58,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:58,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:58,357 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:58,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:58,358 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:58,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:58,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:58,667 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:58,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:58,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:58,702 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:58,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:58,702 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:58,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:58,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:58,932 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:58,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:58,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:58,966 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:58,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:58,966 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:58,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:59,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:59,255 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:59,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:59,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:59,309 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:59,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:59,309 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:59,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:59,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:59,593 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:59,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:59,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:59,627 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:59,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:59,627 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:59,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:59,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:13:59,878 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:13:59,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:13:59,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:13:59,913 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:13:59,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:13:59,913 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:13:59,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:13:59,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:00,204 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:00,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:00,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:00,238 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:00,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:00,238 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:00,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:00,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:00,586 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:00,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:00,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:00,629 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:00,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:00,629 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:00,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:00,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:00,951 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:00,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:00,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:00,985 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:00,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:00,986 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:00,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:01,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:01,267 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:01,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:01,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:01,304 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:01,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:01,304 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:01,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:01,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:01,576 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:01,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:01,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:01,611 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:01,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:01,611 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:01,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:01,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:01,865 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:01,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:01,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:01,903 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:01,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:01,903 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:01,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:01,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:02,253 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:02,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:02,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:02,298 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:02,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:02,298 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:02,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:02,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:02,661 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:02,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:02,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:02,706 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:02,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:02,706 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:02,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:02,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:02,979 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:03,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:03,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:03,014 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:03,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:03,015 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:03,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:03,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:03,308 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:03,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:03,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:03,343 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:03,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:03,343 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:03,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:03,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:03,621 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:03,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:03,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:03,657 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:03,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:03,657 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:03,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:03,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:03,966 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:04,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:04,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:04,000 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:04,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:04,000 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:04,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:04,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:04,390 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:04,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:04,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:04,435 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:04,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:04,435 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:04,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:04,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:04,752 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:04,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:04,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:04,789 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:04,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:04,789 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:04,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:04,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:05,132 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:05,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:05,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:05,170 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:05,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:05,170 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:05,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:05,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:05,469 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:05,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:05,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:05,505 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:05,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:05,506 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:05,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:05,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:05,834 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:05,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:05,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:05,879 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:05,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:05,880 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:05,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:05,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:06,318 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:06,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:06,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:06,361 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:06,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:06,362 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:06,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:06,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:06,631 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:06,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:06,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:06,668 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:06,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:06,668 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:06,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:06,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:06,892 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:06,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:06,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:06,927 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:06,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:06,927 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:06,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:06,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:07,178 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:07,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:07,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:07,213 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:07,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:07,213 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:07,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:07,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:07,472 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:07,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:07,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:07,507 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:07,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:07,507 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:07,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:07,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:08,558 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:09,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:09,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:09,008 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:09,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:09,008 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:09,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:09,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:09,383 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:09,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:09,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:09,418 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:09,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:09,418 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:09,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:09,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:09,656 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:09,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:09,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:09,690 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:09,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:09,691 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:09,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:09,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:09,962 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:09,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:09,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:09,997 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:09,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:09,997 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:09,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:10,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:10,397 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:10,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:10,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:10,437 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:10,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:10,437 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:10,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:10,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:10,692 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:10,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:10,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:10,729 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:10,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:10,729 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:10,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:10,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:11,325 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:11,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:11,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:11,367 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:11,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:11,367 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:11,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:11,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:11,599 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:11,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:11,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:11,636 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:11,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:11,637 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:11,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:11,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:11,991 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:12,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:12,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:12,027 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:12,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:12,027 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:12,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:12,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:12,305 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:12,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:12,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:12,341 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:12,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:12,341 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:12,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:12,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:12,604 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:12,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:12,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:12,639 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:12,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:12,639 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:12,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:12,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:13,210 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:13,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:13,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:13,253 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:13,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:13,253 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:13,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:13,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:13,556 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:13,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:13,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:13,591 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:13,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:13,591 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:13,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:13,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:13,883 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:13,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:13,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:13,919 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:13,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:13,920 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:13,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:13,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:14,241 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:14,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:14,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:14,278 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:14,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:14,278 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:14,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:14,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:14,606 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:14,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:14,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:14,643 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:14,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:14,643 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:14,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:14,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:14,927 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:14,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:14,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:14,962 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:14,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:14,963 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:14,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:15,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:15,250 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:15,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:15,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:15,287 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:15,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:15,287 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:15,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:15,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:15,818 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:15,830 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse31 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse7 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse33 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse31)) (.cse24 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse32 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse34 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse15 (select .cse34 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse17 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse28 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse2 (= .cse32 1)) (.cse30 (or .cse1 .cse24)) (.cse4 (= .cse33 1)) (.cse29 (= .cse33 (select .cse34 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse0 (not .cse7)) (.cse5 (= .cse32 .cse33)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (let ((.cse8 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse9 (and .cse5 .cse1 .cse3)) (.cse10 (or .cse29 .cse0)) (.cse6 (and .cse2 .cse30 .cse4)) (.cse25 (or (and .cse2 .cse4) .cse31)) (.cse26 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse27 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (not .cse28)) (.cse14 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (= .cse15 .cse17)) (.cse22 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse11 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse23 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (or .cse6 .cse7) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse8 0) 0) (not (and (or .cse7 .cse9) .cse10 .cse11)) (not (and .cse12 .cse13 .cse14 (let ((.cse16 (= (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse15 1) .cse16 (= .cse17 1)) (and .cse16 .cse18 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse19 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse15 (select (select .cse19 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse19 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse19 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse21 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse20 (select .cse21 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse15 (select .cse20 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse20) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse21 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse21 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse22 .cse11 .cse23)) (not (and .cse0 .cse1 .cse2 .cse3 .cse24 .cse4)) (not .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse12 .cse2 (or .cse1 (and .cse0 .cse24)) .cse25 .cse10 (not (and .cse1 .cse2 .cse14 .cse23 .cse4)) (not (and .cse0 .cse1 .cse2 .cse14 .cse3 .cse23 .cse4)) (not (and (or .cse0 .cse26) .cse5 .cse1 (or .cse7 .cse4) (or (= |c_ULTIMATE.start_main_~#A~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse13) .cse3 (or (and .cse27 .cse18 .cse22 .cse23) .cse28) .cse11)) .cse13 .cse14 (or .cse6 (and .cse29 .cse7 .cse11)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse3 .cse18 (not (and .cse5 .cse1)) .cse22 (not (and .cse5 .cse1 .cse11)) .cse30 (not (and .cse1 .cse2 .cse4)) .cse11 (or (and .cse25 .cse30) (and .cse29 .cse7 .cse26 .cse11)) .cse23 (not (and .cse1 .cse27 .cse12 .cse2 .cse13 .cse14 .cse3 .cse18 .cse22 .cse11 .cse23 .cse4)) .cse4))))) is different from false [2024-12-06 05:14:15,845 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse31 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse7 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse33 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse31)) (.cse24 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse32 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse34 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse15 (select .cse34 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse17 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse28 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse2 (= .cse32 1)) (.cse30 (or .cse1 .cse24)) (.cse4 (= .cse33 1)) (.cse29 (= .cse33 (select .cse34 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse0 (not .cse7)) (.cse5 (= .cse32 .cse33)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (let ((.cse8 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse9 (and .cse5 .cse1 .cse3)) (.cse10 (or .cse29 .cse0)) (.cse6 (and .cse2 .cse30 .cse4)) (.cse25 (or (and .cse2 .cse4) .cse31)) (.cse26 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse27 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse12 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse13 (not .cse28)) (.cse14 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (= .cse15 .cse17)) (.cse22 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse11 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse23 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (or .cse6 .cse7) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse0 (= (select .cse8 0) 0) (not (and (or .cse7 .cse9) .cse10 .cse11)) (not (and .cse12 .cse13 .cse14 (let ((.cse16 (= (select .cse8 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse15 1) .cse16 (= .cse17 1)) (and .cse16 .cse18 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse19 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse15 (select (select .cse19 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse19 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse19 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse21 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse20 (select .cse21 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse15 (select .cse20 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse20) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse21 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse21 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse22 .cse11 .cse23)) (not (and .cse0 .cse1 .cse2 .cse3 .cse24 .cse4)) (not .cse9) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse12 .cse2 (or .cse1 (and .cse0 .cse24)) .cse25 .cse10 (not (and .cse1 .cse2 .cse14 .cse23 .cse4)) (not (and .cse0 .cse1 .cse2 .cse14 .cse3 .cse23 .cse4)) (not (and (or .cse0 .cse26) .cse5 .cse1 (or .cse7 .cse4) (or (= |c_ULTIMATE.start_main_~#A~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse13) .cse3 (or (and .cse27 .cse18 .cse22 .cse23) .cse28) .cse11)) .cse13 .cse14 (or .cse6 (and .cse29 .cse7 .cse11)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse3 .cse18 (not (and .cse5 .cse1)) .cse22 (not (and .cse5 .cse1 .cse11)) .cse30 (not (and .cse1 .cse2 .cse4)) .cse11 (or (and .cse25 .cse30) (and .cse29 .cse7 .cse26 .cse11)) .cse23 (not (and .cse1 .cse27 .cse12 .cse2 .cse13 .cse14 .cse3 .cse18 .cse22 .cse11 .cse23 .cse4)) .cse4)))))) is different from true [2024-12-06 05:14:16,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:16,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:16,068 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:16,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:16,068 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:16,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:16,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:16,330 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:16,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:16,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:16,365 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:16,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:16,365 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:16,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:16,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:16,643 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:16,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:16,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:16,678 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:16,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:16,678 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:16,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:16,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:16,952 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:16,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:16,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:16,986 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:16,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:16,986 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:16,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:17,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:17,251 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:17,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:17,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:17,287 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:17,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:17,287 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:17,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:17,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:17,604 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:17,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:17,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:17,638 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:17,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:17,639 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:17,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:17,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:18,021 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:18,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:18,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:18,056 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:18,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:18,056 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:18,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:18,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:18,376 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:18,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:18,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:18,418 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:18,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:18,418 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:18,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:18,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:18,684 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:18,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:18,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:18,719 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:18,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:18,719 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:18,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:18,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:18,994 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:19,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:19,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:19,030 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:19,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:19,030 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:19,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:19,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:19,285 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:19,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:19,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:19,320 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:19,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:19,321 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:19,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:19,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:19,794 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:19,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:19,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:19,837 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:19,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:19,837 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:19,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:19,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:20,306 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:20,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:20,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:20,348 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:20,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:20,348 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:20,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:20,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:20,616 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:20,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:20,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:20,652 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:20,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:20,652 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:20,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:20,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:20,912 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:20,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:20,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:20,949 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:20,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:20,949 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:20,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:20,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:21,315 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:21,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:21,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:21,360 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:21,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:21,360 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:21,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:21,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:21,615 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:21,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:21,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:21,650 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:21,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:21,651 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:21,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:21,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:21,947 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:21,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:21,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:21,985 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:21,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:21,985 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:21,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:22,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:22,248 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:22,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:22,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:22,283 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:22,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:22,284 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:22,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:22,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:22,639 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:22,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:22,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:22,681 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:22,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:22,681 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:22,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:22,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:22,988 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:23,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:23,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:23,024 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:23,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:23,024 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:23,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:23,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:23,364 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:23,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:23,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:23,400 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:23,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:23,401 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:23,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:23,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:23,655 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:23,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:23,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:23,688 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:23,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:23,689 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:23,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:23,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:23,997 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:24,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:24,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:24,046 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:24,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:24,046 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:24,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:24,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:24,418 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:24,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:24,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:24,464 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:24,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:24,464 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:24,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:24,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:24,736 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:24,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:24,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:24,772 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:24,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:24,773 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:24,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:24,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:25,036 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:25,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:25,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:25,072 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:25,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:25,072 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:25,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:25,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:25,359 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:25,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:25,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:25,395 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:25,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:25,395 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:25,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:25,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:25,637 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:25,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:25,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:25,673 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:25,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:25,673 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:25,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:25,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:25,941 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:25,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:25,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:25,977 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:25,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:25,977 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:25,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:26,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:26,564 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:26,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:26,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:26,609 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:26,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:26,609 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:26,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:26,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:26,920 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:26,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:26,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:26,959 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:26,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:26,959 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:26,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:27,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:27,191 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:27,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:27,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:27,225 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:27,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:27,226 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:27,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:27,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:27,800 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:27,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:27,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:27,851 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:27,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:27,851 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:27,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:27,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:28,253 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:28,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:28,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:28,295 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:28,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:28,295 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:28,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:28,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:28,576 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:28,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:28,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:28,612 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:28,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:28,612 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:28,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:28,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:28,871 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:28,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:28,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:28,906 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:28,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:28,906 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:28,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:28,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:29,647 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:29,867 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse28 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse27 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse29 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse1 (not .cse28))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse2 (= .cse29 1)) (.cse4 (= .cse26 1)) (.cse10 (select .cse27 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse29 .cse26)) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (or (and .cse2 .cse4) .cse28)) (.cse5 (and .cse2 .cse21 .cse4)) (.cse25 (= .cse26 (select .cse27 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not .cse5) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse21)) (not (and .cse20 .cse9 .cse21 .cse19)) (not (and .cse22 .cse9 .cse3 .cse21 .cse19)) (not (and .cse20 .cse0 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse20 .cse1 .cse18 .cse19)) .cse7 (not (and .cse1 .cse2 .cse9 .cse19 .cse4)) .cse8 .cse9 (not (and .cse22 .cse21)) (not (and .cse22 .cse9 .cse21 .cse19)) (not (and .cse20 .cse1 .cse3 (or (and .cse23 .cse24) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) (not (and .cse0 .cse2 .cse9 .cse3 .cse21 .cse19 .cse4)) .cse13 (not (or .cse5 (and .cse25 .cse23 .cse24 .cse18))) (not (and .cse20 .cse1)) .cse17 (not (and .cse1 .cse2 .cse4)) (not (and .cse20 .cse1 .cse9)) .cse18 (not (and .cse2 .cse3 .cse21 .cse4)) .cse19 (not (and .cse22 .cse3 .cse21)) (not (or .cse5 (and .cse25 .cse23 .cse18))) .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4))))))) is different from false [2024-12-06 05:14:29,883 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse28 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse27 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse29 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse1 (not .cse28))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse2 (= .cse29 1)) (.cse4 (= .cse26 1)) (.cse10 (select .cse27 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse29 .cse26)) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (or (and .cse2 .cse4) .cse28)) (.cse5 (and .cse2 .cse21 .cse4)) (.cse25 (= .cse26 (select .cse27 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not .cse5) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse21)) (not (and .cse20 .cse9 .cse21 .cse19)) (not (and .cse22 .cse9 .cse3 .cse21 .cse19)) (not (and .cse20 .cse0 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse20 .cse1 .cse18 .cse19)) .cse7 (not (and .cse1 .cse2 .cse9 .cse19 .cse4)) .cse8 .cse9 (not (and .cse22 .cse21)) (not (and .cse22 .cse9 .cse21 .cse19)) (not (and .cse20 .cse1 .cse3 (or (and .cse23 .cse24) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) (not (and .cse0 .cse2 .cse9 .cse3 .cse21 .cse19 .cse4)) .cse13 (not (or .cse5 (and .cse25 .cse23 .cse24 .cse18))) (not (and .cse20 .cse1)) .cse17 (not (and .cse1 .cse2 .cse4)) (not (and .cse20 .cse1 .cse9)) .cse18 (not (and .cse2 .cse3 .cse21 .cse4)) .cse19 (not (and .cse22 .cse3 .cse21)) (not (or .cse5 (and .cse25 .cse23 .cse18))) .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4)))))))) is different from true [2024-12-06 05:14:30,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:30,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:30,087 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:30,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:30,088 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:30,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:30,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:30,362 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:30,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:30,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:30,399 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:30,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:30,399 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:30,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:30,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:30,717 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:30,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:30,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:30,756 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:30,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:30,757 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:30,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:30,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:31,001 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:31,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:31,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:31,037 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:31,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:31,037 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:31,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:31,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:31,288 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:31,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:31,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:31,322 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:31,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:31,322 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:31,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:31,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:31,588 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:31,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:31,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:31,622 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:31,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:31,623 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:31,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:31,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:31,913 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:31,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:31,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:31,950 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:31,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:31,950 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:31,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:32,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:32,273 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:32,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:32,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:32,308 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:32,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:32,309 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:32,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:32,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:32,642 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:32,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:32,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:32,677 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:32,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:32,678 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:32,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:32,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:33,017 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:33,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:33,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:33,059 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:33,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:33,059 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:33,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:33,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:33,328 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:33,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:33,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:33,364 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:33,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:33,364 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:33,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:33,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:33,633 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:33,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:33,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:33,667 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:33,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:33,667 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:33,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:33,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:33,907 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:33,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:33,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:33,943 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:33,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:33,943 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:33,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:33,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:34,170 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:34,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:34,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:34,206 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:34,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:34,206 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:34,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:34,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:34,503 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:34,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:34,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:34,539 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:34,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:34,540 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:34,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:34,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:34,841 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:34,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:34,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:34,876 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:34,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:34,876 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:34,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:34,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:35,181 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:35,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:35,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:35,217 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:35,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:35,217 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:35,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:35,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:36,171 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:36,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:36,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:36,215 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:36,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:36,215 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:36,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:36,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:36,454 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:36,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:36,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:36,490 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:36,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:36,490 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:36,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:36,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:36,741 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:36,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:36,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:36,778 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:36,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:36,778 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:36,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:36,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:37,040 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:37,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:37,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:37,076 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:37,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:37,077 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:37,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:37,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:37,338 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:37,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:37,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:37,375 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:37,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:37,375 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:37,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:37,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:37,618 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:37,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:37,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:37,654 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:37,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:37,654 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:37,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:37,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:37,873 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:37,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:37,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:37,912 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:37,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:37,912 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:37,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:37,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:38,248 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:38,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:38,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:38,283 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:38,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:38,283 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:38,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:38,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:38,590 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:38,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:38,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:38,625 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:38,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:38,625 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:38,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:38,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:39,015 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:39,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:39,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:39,057 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:39,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:39,057 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:39,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:39,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:39,280 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:39,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:39,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:39,313 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:39,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:39,314 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:39,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:39,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:39,559 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:39,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:39,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:39,594 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:39,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:39,594 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:39,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:39,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:39,896 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:39,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:39,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:39,931 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:39,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:39,931 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:39,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:39,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:40,186 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:40,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:40,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:40,219 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:40,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:40,220 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:40,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:40,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:40,538 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:40,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:40,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:40,581 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:40,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:40,581 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:40,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:40,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:40,812 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:40,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:40,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:40,846 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:40,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:40,846 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:40,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:40,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:41,331 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:41,345 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse28 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse27 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse29 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse1 (not .cse28))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse2 (= .cse29 1)) (.cse4 (= .cse26 1)) (.cse10 (select .cse27 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse29 .cse26)) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (or (and .cse2 .cse4) .cse28)) (.cse5 (and .cse2 .cse21 .cse4)) (.cse25 (= .cse26 (select .cse27 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not .cse5) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse21)) (not (and .cse20 .cse9 .cse21 .cse19)) (not (and .cse22 .cse9 .cse3 .cse21 .cse19)) (not (and .cse20 .cse0 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse20 .cse1 .cse18 .cse19)) .cse7 (not (and .cse1 .cse2 .cse9 .cse19 .cse4)) .cse8 .cse9 (not (and .cse22 .cse21)) (not (and .cse22 .cse9 .cse21 .cse19)) (not (and .cse20 .cse1 .cse3 (or (and .cse23 .cse24) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) (not (and .cse0 .cse2 .cse9 .cse3 .cse21 .cse19 .cse4)) .cse13 (not (or .cse5 (and .cse25 .cse23 .cse24 .cse18))) (not (and .cse20 .cse1)) .cse17 (not (and .cse2 .cse3 .cse21 .cse19 .cse4)) (not (and .cse1 .cse2 .cse4)) (not (and .cse20 .cse1 .cse9)) .cse18 (not (and .cse2 .cse3 .cse21 .cse4)) .cse19 (not (and .cse22 .cse3 .cse21)) (not (or .cse5 (and .cse25 .cse23 .cse18))) .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4))))))) is different from false [2024-12-06 05:14:41,361 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse28 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse27 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse29 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse1 (not .cse28))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (or .cse1 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse2 (= .cse29 1)) (.cse4 (= .cse26 1)) (.cse10 (select .cse27 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse12 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse7 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse13 (= .cse10 .cse12)) (.cse24 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse17 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse29 .cse26)) (.cse9 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse19 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (or (and .cse2 .cse4) .cse28)) (.cse5 (and .cse2 .cse21 .cse4)) (.cse25 (= .cse26 (select .cse27 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) (not .cse5) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (and .cse7 .cse8 .cse9 (let ((.cse11 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse10 1) .cse11 (= .cse12 1)) (and .cse11 .cse13 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse14 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse10 (select (select .cse14 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse14 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse15 (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse10 (select .cse15 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse15) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse17 .cse18 .cse19)) (not (and .cse20 .cse21)) (not (and .cse20 .cse9 .cse21 .cse19)) (not (and .cse22 .cse9 .cse3 .cse21 .cse19)) (not (and .cse20 .cse0 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse20 .cse1 .cse18 .cse19)) .cse7 (not (and .cse1 .cse2 .cse9 .cse19 .cse4)) .cse8 .cse9 (not (and .cse22 .cse21)) (not (and .cse22 .cse9 .cse21 .cse19)) (not (and .cse20 .cse1 .cse3 (or (and .cse23 .cse24) .cse4))) (not (and .cse1 .cse2 .cse3 .cse4)) (not (and .cse0 .cse2 .cse9 .cse3 .cse21 .cse19 .cse4)) .cse13 (not (or .cse5 (and .cse25 .cse23 .cse24 .cse18))) (not (and .cse20 .cse1)) .cse17 (not (and .cse2 .cse3 .cse21 .cse19 .cse4)) (not (and .cse1 .cse2 .cse4)) (not (and .cse20 .cse1 .cse9)) .cse18 (not (and .cse2 .cse3 .cse21 .cse4)) .cse19 (not (and .cse22 .cse3 .cse21)) (not (or .cse5 (and .cse25 .cse23 .cse18))) .cse4 (not (and .cse0 .cse2 .cse3 .cse21 .cse4)))))))) is different from true [2024-12-06 05:14:41,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:41,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:41,400 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:41,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:41,401 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:41,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:41,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:41,766 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:41,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:41,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:41,810 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:41,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:41,810 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:41,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:41,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:42,184 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:42,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:42,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:42,226 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:42,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:42,226 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:42,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:42,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:42,468 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:42,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:42,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:42,502 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:42,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:42,503 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:42,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:42,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:42,828 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:42,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:42,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:42,863 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:42,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:42,863 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:42,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:42,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:43,109 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:43,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:43,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:43,145 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:43,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:43,145 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:43,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:43,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:43,379 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:43,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:43,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:43,413 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:43,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:43,414 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:43,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:43,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:43,744 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:43,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:43,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:43,778 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:43,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:43,778 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:43,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:43,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:44,047 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:44,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:44,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:44,081 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:44,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:44,081 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:44,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:44,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:44,356 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:44,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:44,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:44,392 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:44,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:44,392 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:44,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:44,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:44,660 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:44,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:44,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:44,697 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:44,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:44,697 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:44,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:44,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:45,037 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:45,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:45,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:45,072 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:45,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:45,073 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:45,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:45,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:45,432 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:45,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:45,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:45,474 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:45,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:45,474 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:45,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:45,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:45,963 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:46,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:46,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:46,005 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:46,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:46,005 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:46,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:46,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:46,326 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:46,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:46,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:46,361 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:46,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:46,361 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:46,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:46,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:46,611 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:46,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:46,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:46,645 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:46,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:46,646 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:46,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:46,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:46,879 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:46,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:46,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:46,915 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:46,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:46,915 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:46,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:46,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:47,144 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:47,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:47,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:47,179 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:47,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:47,179 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:47,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:47,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:47,454 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:47,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:47,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:47,489 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:47,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:47,489 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:47,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:47,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:47,734 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:47,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:47,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:47,768 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:47,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:47,768 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:47,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:47,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:48,027 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:48,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:48,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:48,060 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:48,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:48,060 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:48,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:48,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:48,305 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:48,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:48,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:48,338 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:48,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:48,339 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:48,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:48,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:48,651 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:48,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:48,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:48,686 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:48,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:48,686 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:48,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:48,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:49,100 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:49,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:49,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:49,135 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:49,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:49,135 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:49,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:49,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:49,475 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:49,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:49,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:49,509 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:49,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:49,510 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:49,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:49,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:49,787 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:49,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:49,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:49,822 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:49,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:49,823 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:49,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:49,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:50,063 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:50,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:50,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:50,097 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:50,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:50,097 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:50,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:50,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:50,362 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:50,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:50,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:50,398 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:50,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:50,398 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:50,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:50,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:50,646 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:50,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:50,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:50,682 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:50,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:50,682 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:50,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:50,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:50,969 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:51,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:51,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:51,006 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:51,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:51,006 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:51,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:51,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:51,388 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:51,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:51,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:51,433 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:51,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:51,433 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:51,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:51,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:51,688 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:51,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:51,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:51,725 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:51,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:51,725 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:51,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:51,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:52,026 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:52,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:52,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:52,063 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:52,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:52,063 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:52,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:52,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:52,954 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:53,173 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse34 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse34)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse35 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse35 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse5 (= .cse35 .cse20)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse31 (or (and .cse2 .cse4) .cse34)) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) .cse31 .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) (not (and .cse0 .cse2 .cse17 .cse32 .cse4)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 (not (and (or .cse23 (and .cse1 .cse2 .cse4)) .cse3 (or .cse0 (and .cse29 .cse12 .cse14)))) .cse32 .cse14 (or (and .cse31 .cse32) (and .cse29 .cse23 .cse12 .cse14)) .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4))))))) is different from false [2024-12-06 05:14:53,190 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse34 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse34)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse35 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse35 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse5 (= .cse35 .cse20)) (.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse31 (or (and .cse2 .cse4) .cse34)) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) .cse31 .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) (not (and .cse0 .cse2 .cse17 .cse32 .cse4)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 (not (and (or .cse23 (and .cse1 .cse2 .cse4)) .cse3 (or .cse0 (and .cse29 .cse12 .cse14)))) .cse32 .cse14 (or (and .cse31 .cse32) (and .cse29 .cse23 .cse12 .cse14)) .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4)))))))) is different from true [2024-12-06 05:14:53,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:53,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:53,424 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:53,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:53,424 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:53,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:53,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:53,676 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:53,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:53,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:53,710 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:53,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:53,711 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:53,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:53,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:53,978 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:54,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:54,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:54,013 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:54,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:54,013 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:54,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:54,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:54,347 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:54,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:54,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:54,382 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:54,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:54,382 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:54,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:54,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:54,644 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:54,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:54,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:54,678 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:54,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:54,679 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:54,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:54,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:55,001 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:55,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:55,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:55,038 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:55,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:55,038 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:55,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:55,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:55,403 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:55,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:55,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:55,439 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:55,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:55,439 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:55,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:55,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:55,747 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:55,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:55,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:55,782 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:55,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:55,782 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:55,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:55,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:56,148 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:56,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:56,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:56,189 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:56,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:56,189 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:56,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:56,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:56,480 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:56,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:56,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:56,517 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:56,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:56,517 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:56,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:56,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:56,915 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:56,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:56,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:56,959 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:56,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:56,959 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:56,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:57,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:57,246 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:57,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:57,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:57,281 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:57,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:57,282 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:57,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:57,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:57,601 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:57,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:57,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:57,638 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:57,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:57,638 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:57,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:57,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:57,908 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:57,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:57,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:57,944 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:57,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:57,944 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:57,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:57,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:58,221 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:58,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:58,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:58,258 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:58,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:58,259 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:58,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:58,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:58,577 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:58,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:58,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:58,616 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:58,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:58,616 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:58,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:58,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:59,016 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:59,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:59,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:59,059 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:59,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:59,060 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:59,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:59,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:59,439 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:59,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:59,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:59,488 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:59,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:59,488 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:59,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:59,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:14:59,852 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:14:59,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:14:59,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:14:59,888 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:14:59,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:14:59,888 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:14:59,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:14:59,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:00,219 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:00,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:00,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:00,263 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:00,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:00,263 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:00,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:00,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:00,497 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:00,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:00,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:00,531 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:00,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:00,531 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:00,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:00,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:00,857 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:00,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:00,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:00,891 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:00,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:00,891 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:00,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:00,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:01,192 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:01,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:01,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:01,226 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:01,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:01,226 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:01,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:01,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:01,529 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:01,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:01,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:01,563 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:01,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:01,563 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:01,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:01,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:02,042 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:02,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:02,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:02,087 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:02,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:02,087 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:02,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:02,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:02,531 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:02,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:02,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:02,573 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:02,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:02,573 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:02,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:02,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:02,835 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:02,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:02,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:02,869 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:02,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:02,869 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:02,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:02,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:03,143 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:03,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:03,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:03,178 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:03,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:03,178 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:03,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:03,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:03,420 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:03,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:03,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:03,454 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:03,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:03,454 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:03,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:03,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:03,711 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:03,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:03,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:03,745 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:03,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:03,745 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:03,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:03,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:04,057 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:04,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:04,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:04,099 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:04,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:04,099 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:04,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:04,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:04,346 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:04,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:04,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:04,378 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:04,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:04,379 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:04,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:04,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:04,692 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:04,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:04,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:04,726 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:04,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:04,726 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:04,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:04,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:04,965 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:04,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:04,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:04,999 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:04,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:04,999 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:04,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:05,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:05,443 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:05,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:05,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:05,485 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:05,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:05,485 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:05,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:05,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:06,127 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:06,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:06,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:06,382 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:06,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:06,383 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:06,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:06,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:06,720 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:06,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:06,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:06,764 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:06,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:06,764 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:06,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:06,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:07,141 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:07,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:07,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:07,183 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:07,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:07,183 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:07,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:07,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:07,439 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:07,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:07,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:07,473 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:07,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:07,474 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:07,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:07,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:07,767 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:07,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:07,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:07,802 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:07,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:07,802 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:07,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:07,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:08,267 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:08,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:08,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:08,309 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:08,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:08,309 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:08,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:08,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:08,713 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:08,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:08,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:08,756 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:08,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:08,756 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:08,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:08,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:08,999 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:09,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:09,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:09,036 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:09,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:09,036 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:09,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:09,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:09,349 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:09,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:09,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:09,385 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:09,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:09,385 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:09,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:09,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:10,346 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:10,360 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse28 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse28)) (.cse22 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse29 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse7 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse12 (select .cse29 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse26 1)) (.cse23 (or .cse1 .cse22)) (.cse4 (= .cse27 1))) (let ((.cse9 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (and .cse2 .cse23 .cse4)) (.cse24 (= .cse27 (select .cse29 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse5 (= .cse26 .cse27)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse15 (= .cse12 .cse14)) (.cse19 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse25 (or (and .cse2 .cse4) .cse28)) (.cse20 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse7)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (or .cse6 .cse7) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse4)) (= (select .cse9 0) 0) .cse1 (not (and .cse10 .cse11 .cse8 (let ((.cse13 (= (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse12 1) .cse13 (= .cse14 1)) (and .cse13 .cse15 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse12 (select (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse18 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse17 (select .cse18 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse12 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse17) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse18 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse18 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse19 .cse20 .cse21)) (not (and .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) (not (and .cse2 (or .cse1 (and .cse0 .cse22)) .cse3 .cse4)) (not (and .cse0 .cse1 .cse2 .cse3 .cse20 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse8 .cse3 .cse23 .cse21 .cse4)) (not (and .cse2 .cse3 .cse23 .cse20 .cse21 .cse4)) .cse10 .cse2 (or .cse0 (and .cse24 .cse20)) .cse25 (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) .cse11 .cse8 (or .cse6 (and .cse24 .cse7 .cse20)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse15 .cse19 .cse23 (not (and .cse5 .cse1 (or (= |c_ULTIMATE.start_main_~#A~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse11) .cse3 .cse15 .cse19 (or (and .cse7 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4) .cse20)) .cse20 (not (and .cse2 .cse3 .cse23 .cse4)) .cse21 (not (and .cse25 .cse3 .cse23)) (not (and .cse0 .cse1 (<= (+ (mod (+ .cse26 4294967295) 4294967296) .cse27) .cse26) (<= (+ .cse27 (mod (+ (* .cse27 4294967295) .cse26) 4294967296)) 1) (<= .cse26 .cse27) (<= 1 .cse27) .cse3 .cse20 .cse21)) .cse4 (not (and .cse0 .cse2 .cse3 .cse23 .cse4))))))) is different from false [2024-12-06 05:15:10,376 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse28 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse28)) (.cse22 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse29 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse7 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse12 (select .cse29 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse26 1)) (.cse23 (or .cse1 .cse22)) (.cse4 (= .cse27 1))) (let ((.cse9 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (and .cse2 .cse23 .cse4)) (.cse24 (= .cse27 (select .cse29 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse5 (= .cse26 .cse27)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse15 (= .cse12 .cse14)) (.cse19 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse25 (or (and .cse2 .cse4) .cse28)) (.cse20 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse7)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (or .cse6 .cse7) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse4)) (= (select .cse9 0) 0) .cse1 (not (and .cse10 .cse11 .cse8 (let ((.cse13 (= (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse12 1) .cse13 (= .cse14 1)) (and .cse13 .cse15 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse12 (select (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse18 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse17 (select .cse18 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse12 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse17) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse18 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse18 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse19 .cse20 .cse21)) (not (and .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) (not (and .cse2 (or .cse1 (and .cse0 .cse22)) .cse3 .cse4)) (not (and .cse0 .cse1 .cse2 .cse3 .cse20 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse8 .cse3 .cse23 .cse21 .cse4)) (not (and .cse2 .cse3 .cse23 .cse20 .cse21 .cse4)) .cse10 .cse2 (or .cse0 (and .cse24 .cse20)) .cse25 (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) .cse11 .cse8 (or .cse6 (and .cse24 .cse7 .cse20)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse15 .cse19 .cse23 (not (and .cse5 .cse1 (or (= |c_ULTIMATE.start_main_~#A~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse11) .cse3 .cse15 .cse19 (or (and .cse7 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) .cse4) .cse20)) .cse20 (not (and .cse2 .cse3 .cse23 .cse4)) .cse21 (not (and .cse25 .cse3 .cse23)) (not (and .cse0 .cse1 (<= (+ (mod (+ .cse26 4294967295) 4294967296) .cse27) .cse26) (<= (+ .cse27 (mod (+ (* .cse27 4294967295) .cse26) 4294967296)) 1) (<= .cse26 .cse27) (<= 1 .cse27) .cse3 .cse20 .cse21)) .cse4 (not (and .cse0 .cse2 .cse3 .cse23 .cse4)))))))) is different from true [2024-12-06 05:15:10,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:10,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:10,616 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:10,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:10,616 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:10,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:10,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:10,920 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:10,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:10,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:10,962 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:10,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:10,962 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:10,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:11,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:11,178 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:11,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:11,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:11,212 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:11,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:11,213 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:11,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:11,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:11,452 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:11,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:11,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:11,486 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:11,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:11,486 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:11,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:11,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:11,790 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:11,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:11,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:11,825 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:11,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:11,826 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:11,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:11,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:12,088 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:12,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:12,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:12,123 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:12,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:12,123 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:12,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:12,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:12,374 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:12,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:12,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:12,409 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:12,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:12,410 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:12,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:12,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:13,312 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:13,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:13,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:13,358 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:13,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:13,358 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:13,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:13,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:13,655 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:13,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:13,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:13,691 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:13,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:13,691 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:13,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:13,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:14,089 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:14,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:14,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:14,135 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:14,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:14,135 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:14,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:14,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:14,364 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:14,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:14,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:14,399 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:14,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:14,399 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:14,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:14,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:14,683 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:14,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:14,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:14,718 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:14,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:14,719 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:14,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:14,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:15,035 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:15,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:15,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:15,072 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:15,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:15,072 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:15,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:15,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:15,404 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:15,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:15,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:15,448 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:15,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:15,448 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:15,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:15,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:15,690 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:15,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:15,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:15,725 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:15,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:15,725 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:15,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:15,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:16,027 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:16,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:16,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:16,081 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:16,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:16,082 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:16,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:16,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:16,697 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:16,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:16,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:16,739 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:16,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:16,739 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:16,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:16,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:17,036 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:17,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:17,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:17,071 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:17,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:17,071 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:17,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:17,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:17,304 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:17,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:17,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:17,338 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:17,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:17,338 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:17,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:17,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:17,622 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:17,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:17,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:17,659 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:17,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:17,659 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:17,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:17,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:17,963 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:18,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:18,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:18,000 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:18,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:18,001 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:18,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:18,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:18,241 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:18,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:18,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:18,279 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:18,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:18,279 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:18,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:18,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:18,574 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:18,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:18,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:18,611 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:18,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:18,611 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:18,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:18,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:18,884 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:18,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:18,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:18,921 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:18,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:18,921 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:18,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:18,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:19,188 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:19,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:19,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:19,223 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:19,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:19,224 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:19,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:19,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:19,480 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:19,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:19,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:19,516 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:19,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:19,517 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:19,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:19,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:19,849 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:19,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:19,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:19,895 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:19,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:19,895 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:19,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:19,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:20,223 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:20,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:20,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:20,259 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:20,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:20,259 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:20,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:20,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:20,507 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:20,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:20,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:20,557 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:20,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:20,558 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:20,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:20,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:20,814 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:20,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:20,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:20,850 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:20,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:20,851 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:20,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:20,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:21,099 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:21,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:21,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:21,133 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:21,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:21,133 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:21,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:21,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:21,393 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:21,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:21,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:21,429 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:21,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:21,430 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:21,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:21,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:21,653 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:21,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:21,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:21,688 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:21,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:21,688 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:21,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:21,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:22,016 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:22,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:22,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:22,054 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:22,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:22,054 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:22,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:22,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:22,313 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:22,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:22,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:22,348 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:22,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:22,349 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:22,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:22,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:22,621 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:22,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:22,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:22,658 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:22,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:22,658 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:22,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:22,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:22,925 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:22,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:22,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:22,960 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:22,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:22,960 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:22,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:22,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:23,169 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:23,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:23,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:23,203 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:23,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:23,203 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:23,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:23,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:23,613 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:23,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:23,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:23,658 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:23,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:23,658 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:23,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:23,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:24,053 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:24,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:24,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:24,089 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:24,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:24,089 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:24,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:24,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:24,357 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:24,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:24,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:24,391 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:24,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:24,391 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:24,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:24,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:24,657 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:24,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:24,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:24,690 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:24,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:24,691 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:24,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:24,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:24,968 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:25,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:25,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:25,003 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:25,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:25,003 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:25,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:25,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:25,305 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:25,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:25,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:25,341 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:25,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:25,341 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:25,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:25,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:25,613 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:25,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:25,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:25,649 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:25,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:25,649 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:25,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:25,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:25,889 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:25,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:25,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:25,925 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:25,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:25,925 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:25,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:25,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:26,246 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:26,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:26,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:26,283 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:26,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:26,283 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:26,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:26,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:26,560 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:26,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:26,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:26,595 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:26,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:26,595 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:26,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:26,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:26,868 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:26,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:26,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:26,904 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:26,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:26,904 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:26,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:26,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:27,248 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:27,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:27,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:27,285 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:27,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:27,285 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:27,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:27,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:27,608 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:27,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:27,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:27,643 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:27,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:27,643 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:27,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:27,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:27,965 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:28,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:28,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:28,002 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:28,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:28,002 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:28,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:28,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:28,286 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:28,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:28,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:28,322 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:28,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:28,322 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:28,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:28,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:28,583 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:28,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:28,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:28,620 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:28,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:28,620 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:28,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:28,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:28,903 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:28,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:28,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:28,939 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:28,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:28,939 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:28,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:29,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:29,201 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:29,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:29,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:29,236 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:29,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:29,236 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:29,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:29,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:29,746 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:29,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:29,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:29,792 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:29,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:29,792 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:29,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:29,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:30,352 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:30,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:30,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:30,397 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:30,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:30,397 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:30,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:30,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:30,700 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:30,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:30,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:30,737 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:30,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:30,737 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:30,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:30,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:31,166 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:31,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:31,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:31,211 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:31,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:31,211 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:31,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:31,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:31,602 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:31,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:31,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:31,648 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:31,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:31,648 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:31,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:31,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:31,880 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:31,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:31,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:31,915 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:31,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:31,916 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:31,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:31,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:32,168 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:32,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:32,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:32,221 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:32,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:32,221 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:32,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:32,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:32,630 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:32,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:32,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:32,676 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:32,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:32,676 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:32,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:32,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:32,948 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:32,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:32,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:32,983 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:32,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:32,983 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:32,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:33,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:33,243 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:33,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:33,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:33,278 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:33,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:33,278 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:33,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:33,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:33,649 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:33,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:33,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:33,691 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:33,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:33,691 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:33,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:33,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:34,044 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:34,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:34,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:34,079 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:34,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:34,079 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:34,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:34,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:34,418 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:34,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:34,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:34,453 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:34,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:34,453 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:34,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:34,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:34,748 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:34,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:34,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:34,790 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:34,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:34,790 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:34,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:34,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:35,203 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:35,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:35,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:35,244 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:35,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:35,244 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:35,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:35,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:35,542 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:35,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:35,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:35,585 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:35,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:35,586 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:35,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:35,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:35,892 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:35,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:35,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:35,928 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:35,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:35,928 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:35,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:35,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:36,143 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:36,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:36,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:36,177 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:36,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:36,177 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:36,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:36,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:36,414 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:36,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:36,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:36,449 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:36,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:36,449 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:36,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:36,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:36,750 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:36,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:36,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:36,787 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:36,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:36,787 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:36,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:36,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:37,030 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:37,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:37,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:37,065 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:37,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:37,066 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:37,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:37,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:37,339 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:37,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:37,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:37,375 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:37,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:37,375 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:37,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:37,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:37,737 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:37,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:37,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:37,780 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:37,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:37,780 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:37,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:37,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:38,020 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:38,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:38,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:38,056 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:38,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:38,056 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:38,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:38,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:38,304 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:38,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:38,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:38,340 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:38,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:38,340 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:38,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:38,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:38,814 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:39,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:39,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:39,047 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:39,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:39,048 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:39,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:39,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:39,340 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:39,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:39,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:39,376 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:39,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:39,376 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:39,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:39,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:39,816 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:39,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:39,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:39,859 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:39,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:39,859 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:39,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:39,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:40,193 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:40,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:40,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:40,236 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:40,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:40,236 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:40,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:40,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:40,473 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:40,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:40,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:40,508 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:40,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:40,508 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:40,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:40,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:40,892 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:40,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:40,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:40,935 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:40,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:40,935 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:40,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:40,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:41,207 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:41,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:41,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:41,241 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:41,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:41,241 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:41,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:41,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:41,490 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:41,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:41,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:41,524 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:41,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:41,524 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:41,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:41,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:41,748 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:41,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:41,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:41,781 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:41,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:41,781 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:41,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:41,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:42,075 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:42,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:42,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:42,111 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:42,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:42,112 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:42,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:42,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:42,383 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:42,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:42,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:42,418 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:42,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:42,418 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:42,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:42,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:43,240 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:43,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:43,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:43,283 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:43,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:43,283 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:43,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:43,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:43,603 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:43,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:43,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:43,637 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:43,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:43,638 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:43,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:43,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:43,898 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:43,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:43,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:43,933 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:43,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:43,933 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:43,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:43,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:44,228 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:44,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:44,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:44,264 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:44,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:44,264 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:44,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:44,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:44,573 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:44,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:44,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:44,608 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:44,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:44,608 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:44,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:44,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:44,859 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:44,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:44,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:44,895 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:44,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:44,895 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:44,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:44,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:45,173 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:45,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:45,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:45,207 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:45,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:45,207 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:45,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:45,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:45,449 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:45,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:45,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:45,484 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:45,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:45,484 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:45,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:45,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:45,818 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:45,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:45,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:45,853 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:45,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:45,853 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:45,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:45,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:46,094 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:46,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:46,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:46,129 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:46,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:46,129 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:46,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:46,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:46,415 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:46,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:46,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:46,448 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:46,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:46,448 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:46,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:46,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:46,708 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:46,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:46,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:46,741 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:46,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:46,741 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:46,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:46,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:47,049 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:47,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:47,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:47,083 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:47,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:47,083 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:47,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:47,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:47,367 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:47,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:47,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:47,403 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:47,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:47,403 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:47,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:47,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:47,687 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:47,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:47,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:47,722 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:47,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:47,723 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:47,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:47,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:48,024 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:48,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:48,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:48,059 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:48,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:48,059 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:48,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:48,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:48,332 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:48,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:48,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:48,367 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:48,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:48,367 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:48,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:48,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:48,684 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:48,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:48,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:48,728 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:48,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:48,728 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:48,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:48,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:49,163 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:49,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:49,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:49,206 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:49,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:49,206 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:49,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:49,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:49,486 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:49,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:49,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:49,522 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:49,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:49,523 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:49,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:49,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:49,782 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:49,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:49,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:49,818 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:49,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:49,818 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:49,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:49,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:50,130 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:50,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:50,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:50,165 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:50,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:50,165 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:50,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:50,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:50,423 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:50,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:50,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:50,459 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:50,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:50,459 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:50,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:50,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:50,688 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:50,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:50,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:50,723 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:50,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:50,723 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:50,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:50,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:51,000 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:51,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:51,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:51,035 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:51,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:51,036 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:51,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:51,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:51,294 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:51,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:51,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:51,329 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:51,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:51,329 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:51,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:51,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:51,737 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:51,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:51,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:51,780 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:51,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:51,781 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:51,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:51,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:52,112 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:52,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:52,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:52,154 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:52,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:52,154 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:52,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:52,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:52,463 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:52,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:52,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:52,498 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:52,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:52,499 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:52,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:52,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:52,781 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:52,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:52,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:52,817 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:52,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:52,817 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:52,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:52,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:53,113 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:53,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:53,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:53,151 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:53,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:53,151 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:53,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:53,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:53,484 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:53,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:53,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:53,531 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:53,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:53,531 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:53,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:53,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:53,780 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:53,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:53,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:53,817 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:53,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:53,817 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:53,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:53,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:54,100 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:54,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:54,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:54,154 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:54,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:54,154 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:54,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:54,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:54,436 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:54,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:54,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:54,473 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:54,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:54,473 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:54,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:54,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:54,756 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:54,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:54,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:54,793 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:54,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:54,793 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:54,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:54,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:55,082 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:55,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:55,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:55,116 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:55,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:55,116 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:55,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:55,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:55,353 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:55,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:55,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:55,387 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:55,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:55,387 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:55,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:55,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:55,638 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:55,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:55,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:55,674 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:55,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:55,674 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:55,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:55,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:55,938 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:55,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:55,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:55,975 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:55,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:55,975 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:55,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:56,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:56,292 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:56,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:56,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:56,328 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:56,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:56,329 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:56,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:56,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:56,620 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:56,635 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse34 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse34)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse35 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse35 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (= .cse35 .cse20)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse31 (or (and .cse2 .cse4) .cse34)) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (not (and .cse5 .cse0 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) .cse31 .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) (not (and .cse0 .cse2 .cse17 .cse32 .cse4)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 (not (and (or .cse23 (and .cse1 .cse2 .cse4)) .cse3 (or .cse0 (and .cse29 .cse12 .cse14)))) .cse32 .cse14 (or (and .cse31 .cse32) (and .cse29 .cse23 .cse12 .cse14)) .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4))))))) is different from false [2024-12-06 05:15:56,652 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse34 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse20 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse34)) (.cse30 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse35 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse33 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse23 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse18 (select .cse33 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse25 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse35 1)) (.cse32 (or .cse1 .cse30)) (.cse4 (= .cse20 1)) (.cse15 (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse5 (= .cse35 .cse20)) (.cse16 (not .cse15)) (.cse9 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse22 (and .cse2 .cse32 .cse4)) (.cse17 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|))) (.cse11 (= .cse18 .cse25)) (.cse13 (= .cse25 .cse20)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse31 (or (and .cse2 .cse4) .cse34)) (.cse29 (= .cse20 (select .cse33 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse12 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse23)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (= (select .cse6 0) 0) (not (let ((.cse7 (or .cse22 .cse23))) (and (or (and .cse7 .cse8 .cse9 .cse10 (or .cse0 (and .cse11 .cse12 .cse13 .cse14))) .cse15) (or .cse16 (and .cse7 .cse17 (or .cse0 (let ((.cse19 (select .cse6 |c_ULTIMATE.start_main_~#A~0#1.offset|))) (and (= .cse18 .cse19) (= .cse19 .cse20) .cse12 .cse14))) .cse21))))) .cse1 (or .cse23 (and .cse5 .cse1 .cse3)) (not (and .cse16 .cse9 .cse17 (let ((.cse24 (= (select .cse6 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse18 1) .cse24 (= .cse25 1)) (and .cse24 .cse11 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse26 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse18 (select (select .cse26 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse26 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse28 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse27 (select .cse28 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse18 (select .cse27 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse27) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse28 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse28 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse10 .cse14 .cse21)) .cse8 (not (and .cse5 .cse0 .cse1 .cse3)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse16 .cse2 (or .cse0 (and .cse29 .cse14)) (or .cse1 (and .cse0 .cse30)) .cse31 .cse9 .cse17 (or .cse22 (and .cse29 .cse23 .cse14)) (not (and .cse0 .cse2 .cse17 .cse32 .cse4)) .cse3 .cse11 (not (and (or .cse0 (and .cse8 .cse11 .cse12 .cse10 .cse13)) (or (and .cse1 .cse2 .cse3 .cse4) .cse23) .cse14 .cse21)) .cse10 (not (and (or .cse23 (and .cse1 .cse2 .cse4)) .cse3 (or .cse0 (and .cse29 .cse12 .cse14)))) .cse32 .cse14 (or (and .cse31 .cse32) (and .cse29 .cse23 .cse12 .cse14)) .cse21 .cse4 (not (and .cse0 .cse2 .cse3 .cse32 .cse4)))))))) is different from true [2024-12-06 05:15:56,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:56,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:56,683 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:56,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:56,683 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:56,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:56,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:56,946 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:56,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:56,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:56,982 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:56,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:56,983 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:56,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:57,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:57,309 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:57,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:57,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:57,346 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:57,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:57,346 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:57,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:57,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:57,596 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:57,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:57,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:57,632 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:57,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:57,633 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:57,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:57,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:57,985 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:58,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:58,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:58,022 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:58,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:58,022 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:58,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:58,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:58,280 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:58,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:58,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:58,317 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:58,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:58,317 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:58,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:58,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:58,640 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:58,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:58,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:58,676 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:58,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:58,677 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:58,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:58,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:58,999 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:59,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:59,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:59,035 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:59,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:59,036 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:59,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:59,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:59,356 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:59,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:59,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:59,393 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:59,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:59,393 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:59,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:59,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:15:59,757 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:15:59,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:15:59,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:15:59,802 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:15:59,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:15:59,802 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:15:59,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:15:59,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:00,131 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:00,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:00,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:00,165 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:00,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:00,165 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:00,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:00,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:00,476 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:00,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:00,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:00,510 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:00,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:00,510 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:00,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:00,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:00,752 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:00,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:00,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:00,786 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:00,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:00,786 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:00,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:00,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:01,610 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:01,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:01,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:01,851 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:01,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:01,851 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:01,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:01,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:02,159 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:02,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:02,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:02,193 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:02,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:02,193 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:02,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:02,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:02,437 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:02,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:02,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:02,472 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:02,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:02,472 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:02,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:02,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:02,703 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:02,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:02,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:02,737 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:02,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:02,738 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:02,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:02,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:03,025 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:03,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:03,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:03,059 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:03,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:03,059 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:03,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:03,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:03,410 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:03,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:03,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:03,451 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:03,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:03,451 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:03,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:03,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:03,714 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:03,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:03,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:03,750 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:03,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:03,750 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:03,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:03,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:04,022 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:04,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:04,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:04,063 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:04,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:04,064 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:04,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:04,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:04,317 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:04,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:04,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:04,352 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:04,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:04,353 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:04,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:04,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:04,653 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:04,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:04,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:04,688 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:04,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:04,689 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:04,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:04,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:05,168 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:05,179 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse28 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse7 (select .cse28 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse23 (= .cse26 (select .cse28 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (= .cse27 .cse26)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse25 (and .cse23 .cse22 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse15)) (.cse17 (= .cse27 1)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse24 (or .cse3 .cse19)) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse26 1))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (or (and .cse17 .cse24 .cse20) .cse25) .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse24 .cse16 .cse20) .cse25) (or (and .cse17 .cse20) .cse21) .cse5 .cse6 .cse18 .cse10 .cse14 .cse24 .cse15 .cse16 .cse20)))) is different from false [2024-12-06 05:16:05,200 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse26 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse28 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse7 (select .cse28 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse23 (= .cse26 (select .cse28 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (= .cse27 .cse26)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse25 (and .cse23 .cse22 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse15)) (.cse17 (= .cse27 1)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse24 (or .cse3 .cse19)) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse26 1))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (or (and .cse17 .cse24 .cse20) .cse25) .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse24 .cse16 .cse20) .cse25) (or (and .cse17 .cse20) .cse21) .cse5 .cse6 .cse18 .cse10 .cse14 .cse24 .cse15 .cse16 .cse20))))) is different from true [2024-12-06 05:16:05,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:05,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:05,240 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:05,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:05,241 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:05,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:05,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:05,544 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:05,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:05,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:05,578 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:05,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:05,579 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:05,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:05,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:05,890 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:05,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:05,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:05,926 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:05,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:05,926 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:05,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:05,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:06,265 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:06,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:06,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:06,306 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:06,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:06,306 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:06,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:06,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:06,529 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:06,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:06,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:06,562 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:06,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:06,563 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:06,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:06,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:06,809 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:06,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:06,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:06,842 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:06,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:06,842 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:06,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:06,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:07,119 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:07,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:07,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:07,153 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:07,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:07,154 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:07,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:07,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:07,487 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:07,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:07,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:07,529 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:07,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:07,530 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:07,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:07,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:07,828 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:07,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:07,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:07,863 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:07,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:07,863 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:07,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:07,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:08,537 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:08,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:08,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:08,576 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:08,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:08,576 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:08,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:08,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:08,817 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:08,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:08,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:08,850 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:08,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:08,850 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:08,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:08,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:09,159 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:09,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:09,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:09,195 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:09,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:09,196 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:09,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:09,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:09,509 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:09,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:09,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:09,551 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:09,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:09,551 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:09,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:09,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:09,886 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:09,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:09,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:09,932 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:09,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:09,932 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:09,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:09,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:10,246 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:10,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:10,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 59 states and 160 transitions. [2024-12-06 05:16:10,286 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 160 transitions. [2024-12-06 05:16:10,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:10,286 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:10,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:10,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:11,391 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:11,404 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse29 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse7 (select .cse29 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse23 (= .cse27 (select .cse29 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse26 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (= .cse28 .cse27)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse25 (and .cse23 .cse22 .cse26 .cse15)) (.cse17 (= .cse28 1)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse24 (or .cse3 .cse19)) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse27 1))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (or (and .cse17 .cse24 .cse20) .cse25) .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse24 .cse16 .cse20) .cse25) (or (and .cse17 .cse20) .cse21) (or (and .cse22 .cse26 (= .cse9 .cse27) .cse15) .cse20) .cse5 .cse6 .cse18 .cse10 .cse14 .cse24 .cse15 .cse16 .cse20)))) is different from false [2024-12-06 05:16:11,703 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse29 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse7 (select .cse29 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse23 (= .cse27 (select .cse29 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse26 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse25 (and .cse23 .cse22 .cse26 .cse15)) (.cse17 (= .cse28 1)) (.cse0 (= .cse28 .cse27)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse24 (or .cse3 .cse19)) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse27 1))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (or (and .cse17 .cse24 .cse20) .cse25) .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse24 .cse16 .cse20) .cse25) (or (and .cse17 .cse20) .cse21) .cse5 (not (and .cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) (or (and .cse22 .cse26 (= .cse9 .cse27) .cse15) .cse20) .cse5 .cse6 .cse14 .cse24 .cse16)) .cse6 .cse18 .cse10 .cse14 .cse24 .cse15 .cse16 .cse20)))) is different from false [2024-12-06 05:16:11,723 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse29 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse7 (select .cse29 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse23 (= .cse27 (select .cse29 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse26 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (= .cse28 .cse27)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse25 (and .cse23 .cse22 .cse26 .cse15)) (.cse17 (= .cse28 1)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse24 (or .cse3 .cse19)) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse27 1))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (or (and .cse17 .cse24 .cse20) .cse25) .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse24 .cse16 .cse20) .cse25) (or (and .cse17 .cse20) .cse21) (or (and .cse22 .cse26 (= .cse9 .cse27) .cse15) .cse20) .cse5 .cse6 .cse18 .cse10 .cse14 .cse24 .cse15 .cse16 .cse20))))) is different from true [2024-12-06 05:16:11,737 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse29 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse7 (select .cse29 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse23 (= .cse27 (select .cse29 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse26 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse25 (and .cse23 .cse22 .cse26 .cse15)) (.cse17 (= .cse28 1)) (.cse0 (= .cse28 .cse27)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse24 (or .cse3 .cse19)) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse20 (= .cse27 1))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (or (and .cse17 .cse24 .cse20) .cse25) .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse24 .cse16 .cse20) .cse25) (or (and .cse17 .cse20) .cse21) .cse5 (not (and .cse0 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) (or (and .cse22 .cse26 (= .cse9 .cse27) .cse15) .cse20) .cse5 .cse6 .cse14 .cse24 .cse16)) .cse6 .cse18 .cse10 .cse14 .cse24 .cse15 .cse16 .cse20))))) is different from true [2024-12-06 05:16:11,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:11,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:11,989 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:11,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:11,989 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:11,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:12,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:12,291 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:12,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:12,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:12,327 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:12,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:12,327 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:12,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:12,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:12,603 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:12,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:12,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:12,638 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:12,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:12,639 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:12,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:12,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:12,988 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:13,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:13,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:13,033 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:13,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:13,033 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:13,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:13,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:13,391 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:13,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:13,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:13,428 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:13,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:13,428 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:13,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:13,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:13,704 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:13,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:13,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:13,740 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:13,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:13,741 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:13,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:13,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:13,988 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:14,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:14,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:14,024 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:14,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:14,024 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:14,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:14,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:14,277 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:14,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:14,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:14,313 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:14,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:14,313 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:14,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:14,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:14,566 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:14,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:14,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:14,604 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:14,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:14,604 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:14,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:14,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:14,922 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:14,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:14,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:14,959 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:14,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:14,959 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:14,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:15,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:15,231 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:15,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:15,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:15,268 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:15,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:15,268 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:15,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:15,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:15,543 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:15,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:15,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:15,579 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:15,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:15,579 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:15,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:15,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:15,852 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:15,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:15,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:15,888 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:15,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:15,888 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:15,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:15,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:16,213 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:16,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:16,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:16,276 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:16,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:16,276 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:16,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:16,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:16,806 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:16,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:16,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:16,852 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:16,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:16,853 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:16,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:16,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:17,233 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:17,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:17,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:17,269 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:17,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:17,269 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:17,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:17,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:17,632 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:17,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:17,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:17,678 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:17,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:17,678 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:17,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:17,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:17,930 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:17,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:17,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:17,966 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:17,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:17,966 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:17,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:18,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:18,554 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:18,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:18,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:18,596 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:18,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:18,597 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:18,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:18,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:18,890 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:18,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:18,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:18,925 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:18,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:18,926 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:18,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:18,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:19,289 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:19,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:19,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:19,330 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:19,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:19,330 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:19,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:19,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:19,594 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:19,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:19,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:19,630 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:19,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:19,630 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:19,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:19,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:19,869 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:19,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:19,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:19,928 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:19,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:19,928 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:19,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:19,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:20,466 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:20,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:20,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:20,515 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:20,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:20,515 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:20,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:20,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:20,886 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:20,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:20,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:20,939 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:20,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:20,939 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:20,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:21,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:21,248 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:21,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:21,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:21,283 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:21,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:21,284 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:21,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:21,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:21,533 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:21,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:21,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:21,571 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:21,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:21,571 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:21,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:21,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:22,063 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:22,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:22,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:22,109 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:22,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:22,109 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:22,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:22,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:22,365 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:22,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:22,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:22,401 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:22,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:22,402 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:22,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:22,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:22,653 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:22,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:22,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:22,690 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:22,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:22,690 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:22,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:22,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:22,988 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:23,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:23,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:23,025 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:23,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:23,026 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:23,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:23,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:23,471 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:23,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:23,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:23,517 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:23,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:23,517 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:23,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:23,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:23,763 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:23,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:23,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:23,800 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:23,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:23,800 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:23,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:23,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:24,044 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:24,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:24,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:24,080 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:24,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:24,081 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:24,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:24,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:24,479 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:24,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:24,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:24,526 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:24,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:24,526 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:24,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:24,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:24,891 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:24,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:24,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:24,936 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:24,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:24,936 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:24,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:24,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:25,726 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:25,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:25,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:25,978 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:25,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:25,979 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:25,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:26,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:26,251 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:26,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:26,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:26,288 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:26,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:26,288 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:26,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:26,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:26,650 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:26,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:26,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:26,686 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:26,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:26,686 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:26,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:26,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:27,009 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:27,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:27,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:27,045 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:27,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:27,045 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:27,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:27,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:27,304 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:27,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:27,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:27,340 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:27,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:27,341 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:27,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:27,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:27,554 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:27,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:27,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:27,590 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:27,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:27,591 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:27,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:27,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:27,845 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:27,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:27,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:27,881 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:27,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:27,881 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:27,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:27,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:28,146 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:28,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:28,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:28,182 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:28,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:28,182 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:28,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:28,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:28,450 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:28,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:28,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:28,487 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:28,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:28,487 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:28,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:28,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:28,752 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:28,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:28,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:28,799 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:28,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:28,799 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:28,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:28,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:29,122 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:29,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:29,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:29,165 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:29,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:29,166 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:29,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:29,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:29,422 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:29,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:29,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:29,458 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:29,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:29,458 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:29,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:29,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:29,729 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:29,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:29,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:29,765 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:29,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:29,765 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:29,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:29,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:30,009 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:30,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:30,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:30,045 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:30,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:30,045 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:30,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:30,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:30,413 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:30,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:30,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:30,450 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:30,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:30,451 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:30,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:30,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:30,764 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:30,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:30,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:30,800 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:30,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:30,801 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:30,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:30,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:31,299 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:31,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:31,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:31,343 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:31,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:31,343 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:31,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:31,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:31,624 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:31,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:31,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:31,660 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:31,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:31,660 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:31,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:31,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:31,908 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:31,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:31,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:31,944 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:31,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:31,944 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:31,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:31,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:32,240 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:32,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:32,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:32,276 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:32,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:32,276 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:32,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:32,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:32,508 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:32,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:32,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:32,543 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:32,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:32,543 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:32,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:32,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:32,959 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:33,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:33,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:33,001 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:33,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:33,001 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:33,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:33,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:33,328 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:33,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:33,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:33,375 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:33,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:33,375 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:33,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:33,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:33,950 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:33,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:33,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:33,996 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:33,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:33,996 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:33,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:34,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:34,283 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:34,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:34,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:34,321 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:34,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:34,322 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:34,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:34,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:34,554 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:34,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:34,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:34,593 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:34,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:34,593 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:34,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:34,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:34,851 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:34,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:34,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:34,889 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:34,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:34,889 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:34,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:34,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:35,228 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:35,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:35,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:35,265 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:35,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:35,265 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:35,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:35,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:35,529 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:35,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:35,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:35,565 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:35,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:35,565 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:35,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:35,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:35,862 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:35,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:35,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:35,899 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:35,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:35,900 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:35,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:35,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:36,312 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:36,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:36,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:36,355 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:36,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:36,355 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:36,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:36,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:36,645 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:36,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:36,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:36,682 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:36,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:36,682 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:36,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:36,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:36,966 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:37,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:37,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:37,003 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:37,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:37,003 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:37,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:37,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:37,713 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:37,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:37,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:37,982 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:37,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:37,983 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:37,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:38,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:38,415 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:38,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:38,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:38,461 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:38,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:38,461 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:38,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:38,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:38,751 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:38,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:38,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:38,786 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:38,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:38,786 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:38,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:38,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:39,096 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:39,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:39,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:39,132 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:39,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:39,132 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:39,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:39,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:39,428 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:39,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:39,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:39,464 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:39,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:39,464 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:39,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:39,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:39,782 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:39,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:39,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:39,818 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:39,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:39,819 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:39,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:39,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:40,173 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:40,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:40,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:40,209 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:40,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:40,209 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:40,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:40,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:40,539 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:40,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:40,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:40,585 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:40,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:40,585 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:40,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:40,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:40,825 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:40,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:40,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:40,863 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:40,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:40,863 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:40,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:40,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:41,279 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:41,290 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse29 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse30 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse7 (select .cse30 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse17 (= .cse29 1)) (.cse26 (or .cse3 .cse19)) (.cse20 (= .cse28 1)) (.cse23 (= .cse28 (select .cse30 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse27 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (= .cse29 .cse28)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse25 (and .cse23 .cse22 .cse27 .cse15)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse24 (and .cse17 .cse26 .cse20)) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (or .cse24 .cse25) .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse26 .cse16 .cse20) .cse25) (or (and .cse17 .cse20) .cse21) (or (and .cse22 .cse27 (= .cse9 .cse28) .cse15) .cse20) .cse5 .cse6 (or .cse24 (and .cse23 .cse22 .cse15)) .cse18 .cse10 .cse14 .cse26 .cse15 .cse16 .cse20))))) is different from false [2024-12-06 05:16:41,313 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse21 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse3 (not .cse21)) (.cse19 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse29 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse30 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse7 (select .cse30 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse9 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse17 (= .cse29 1)) (.cse26 (or .cse3 .cse19)) (.cse20 (= .cse28 1)) (.cse23 (= .cse28 (select .cse30 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse27 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse15 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse22 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse0 (= .cse29 .cse28)) (.cse4 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse1 (not .cse22)) (.cse25 (and .cse23 .cse22 .cse27 .cse15)) (.cse5 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse24 (and .cse17 .cse26 .cse20)) (.cse18 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse10 (= .cse7 .cse9)) (.cse14 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse16 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))) (and .cse0 (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) .cse1 (= (select .cse2 0) 0) .cse3 (not (and .cse4 .cse5 .cse6 (let ((.cse8 (= (select .cse2 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse7 1) .cse8 (= .cse9 1)) (and .cse8 .cse10 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse11 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse7 (select (select .cse11 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse11 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse13 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse12 (select .cse13 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse7 (select .cse12 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse12) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse13 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse13 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse14 .cse15 .cse16)) (not (and .cse1 .cse3 .cse17 .cse18 .cse19 .cse20)) (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)) (or .cse21 (and (or .cse22 (and .cse0 .cse18)) (or .cse23 .cse1))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) .cse4 (or .cse24 .cse25) .cse17 (or .cse3 (and .cse1 .cse19)) (or (and .cse17 .cse6 .cse26 .cse16 .cse20) .cse25) (or (and .cse17 .cse20) .cse21) (or (and .cse22 .cse27 (= .cse9 .cse28) .cse15) .cse20) .cse5 .cse6 (or .cse24 (and .cse23 .cse22 .cse15)) .cse18 .cse10 .cse14 .cse26 .cse15 .cse16 .cse20)))))) is different from true [2024-12-06 05:16:41,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:41,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:41,379 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:41,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:41,379 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:41,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:41,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:41,637 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:41,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:41,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:41,674 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:41,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:41,674 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:41,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:41,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:42,189 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:42,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:42,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:42,388 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:42,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:42,388 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:42,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:42,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:42,695 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:42,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:42,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:42,742 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:42,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:42,742 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:42,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:42,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:43,060 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:43,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:43,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:43,114 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:43,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:43,115 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:43,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:43,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:43,445 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:43,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:43,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:43,483 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:43,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:43,483 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:43,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:43,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:43,935 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:43,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:43,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:43,977 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:43,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:43,977 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:43,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:44,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:44,241 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:44,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:44,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:44,287 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:44,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:44,287 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:44,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:44,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:44,520 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:44,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:44,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:44,558 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:44,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:44,558 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:44,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:44,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:44,902 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:44,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:44,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:44,939 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:44,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:44,939 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:44,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:44,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:45,227 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:45,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:45,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:45,265 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:45,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:45,265 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:45,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:45,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:45,543 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:45,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:45,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:45,580 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:45,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:45,580 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:45,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:45,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:45,894 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:45,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:45,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:45,930 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:45,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:45,930 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:45,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:46,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:46,249 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:46,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:46,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:46,286 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:46,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:46,286 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:46,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:46,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:46,772 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:46,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:46,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:46,820 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:46,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:46,820 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:46,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:46,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:47,315 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:47,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:47,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:47,359 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:47,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:47,359 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:47,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:47,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:47,949 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:47,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:47,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:47,995 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:47,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:47,995 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:47,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:48,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:48,305 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:48,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:48,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:48,343 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:48,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:48,343 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:48,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:48,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:48,809 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:48,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:48,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:48,858 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:48,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:48,858 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:48,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:48,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:49,138 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:49,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:49,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:49,193 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:49,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:49,193 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:49,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:49,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:49,472 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:49,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:49,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:49,508 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:49,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:49,508 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:49,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:49,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:49,771 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:49,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:49,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:49,807 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:49,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:49,808 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:49,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:49,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:50,047 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:50,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:50,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:50,083 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:50,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:50,083 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:50,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:50,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:50,351 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:50,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:50,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:50,388 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:50,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:50,388 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:50,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:50,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:50,639 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:50,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:50,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:50,677 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:50,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:50,677 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:50,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:50,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:51,237 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:51,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:51,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:51,281 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:51,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:51,281 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:51,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:51,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:51,528 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:51,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:51,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:51,567 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:51,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:51,568 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:51,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:51,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:51,863 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:51,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:51,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:51,919 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:51,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:51,919 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:51,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:51,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:52,285 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:52,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:52,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:52,324 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:52,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:52,324 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:52,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:52,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:52,581 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:52,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:52,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:52,620 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:52,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:52,620 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:52,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:52,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:53,003 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:53,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:53,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:53,051 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:53,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:53,051 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:53,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:53,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:53,274 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:53,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:53,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:53,312 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:53,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:53,312 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:53,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:53,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:53,684 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:53,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:53,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:53,731 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:53,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:53,731 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:53,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:53,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:54,088 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:54,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:54,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:54,127 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:54,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:54,128 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:54,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:54,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:54,409 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:54,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:54,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:54,447 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:54,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:54,447 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:54,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:54,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:54,749 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:54,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:54,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:54,787 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:54,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:54,787 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:54,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:54,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:55,106 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:55,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:55,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:55,151 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:55,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:55,151 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:55,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:55,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:55,401 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:55,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:55,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:55,438 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:55,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:55,438 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:55,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:55,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:55,745 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:55,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:55,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:55,785 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:55,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:55,785 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:55,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:55,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:56,054 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:56,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:56,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:56,123 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:56,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:56,123 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:56,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:56,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:56,397 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:56,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:56,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:56,453 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:56,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:56,453 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:56,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:56,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:56,724 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:56,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:56,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:56,762 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:56,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:56,762 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:56,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:56,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:57,026 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:57,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:57,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:57,064 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:57,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:57,064 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:57,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:57,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:57,525 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:57,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:57,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:57,572 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:57,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:57,572 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:57,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:57,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:57,979 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:58,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:58,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:58,024 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:58,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:58,024 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:58,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:58,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:58,293 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:58,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:58,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:58,329 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:58,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:58,329 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:58,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:58,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:58,767 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:58,777 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse29 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse29)) (.cse22 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse30 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse7 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse12 (select .cse30 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse27 1)) (.cse23 (or .cse1 .cse22)) (.cse4 (= .cse28 1))) (let ((.cse9 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (and .cse2 .cse23 .cse4)) (.cse24 (= .cse28 (select .cse30 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse5 (= .cse27 .cse28)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse15 (= .cse12 .cse14)) (.cse19 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse25 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse26 (or (and .cse2 .cse4) .cse29)) (.cse20 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse7)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (or .cse6 .cse7) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse4)) (= (select .cse9 0) 0) .cse1 (not (and .cse10 .cse11 .cse8 (let ((.cse13 (= (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse12 1) .cse13 (= .cse14 1)) (and .cse13 .cse15 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse12 (select (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse18 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse17 (select .cse18 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse12 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse17) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse18 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse18 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse19 .cse20 .cse21)) (not (and .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) (not (and .cse2 (or .cse1 (and .cse0 .cse22)) .cse3 .cse4)) (not (and .cse0 .cse1 .cse2 .cse3 .cse20 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse8 .cse3 .cse23 .cse21 .cse4)) (not (and .cse2 .cse3 .cse23 .cse20 .cse21 .cse4)) .cse10 (or .cse6 (and .cse24 .cse7 .cse25 .cse20)) .cse2 (or .cse0 (and .cse24 .cse20)) .cse26 (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) .cse11 .cse8 (or .cse6 (and .cse24 .cse7 .cse20)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse15 .cse19 .cse23 (not (and .cse5 .cse1 (or (= |c_ULTIMATE.start_main_~#A~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse11) .cse3 .cse15 .cse19 (or (and .cse7 .cse25) .cse4) .cse20)) .cse20 (not (and .cse2 .cse3 .cse23 .cse4)) .cse21 (not (and .cse26 .cse3 .cse23)) (not (and .cse0 .cse1 (<= (+ (mod (+ .cse27 4294967295) 4294967296) .cse28) .cse27) (<= (+ .cse28 (mod (+ (* .cse28 4294967295) .cse27) 4294967296)) 1) (<= .cse27 .cse28) (<= 1 .cse28) .cse3 .cse20 .cse21)) .cse4 (not (and .cse0 .cse2 .cse3 .cse23 .cse4))))))) is different from false [2024-12-06 05:16:58,798 WARN L873 $PredicateComparison]: unable to prove that (not (let ((.cse29 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (let ((.cse28 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base|) |c_ULTIMATE.start_main_~#b~0#1.offset|)) (.cse1 (not .cse29)) (.cse22 (= |c_ULTIMATE.start_main_~#b~0#1.offset| |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse27 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#B~0#1.base|) |c_ULTIMATE.start_main_~#B~0#1.offset|)) (.cse30 (select |c_#memory_int| |c_ULTIMATE.start_main_~#r~0#1.base|))) (let ((.cse7 (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (.cse12 (select .cse30 |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse14 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (.cse2 (= .cse27 1)) (.cse23 (or .cse1 .cse22)) (.cse4 (= .cse28 1))) (let ((.cse9 (select |c_#memory_int| |c_ULTIMATE.start_main_~#q~0#1.base|)) (.cse10 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|))) (.cse8 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse6 (and .cse2 .cse23 .cse4)) (.cse24 (= .cse28 (select .cse30 |c_ULTIMATE.start_main_~#B~0#1.offset|))) (.cse5 (= .cse27 .cse28)) (.cse11 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|))) (.cse15 (= .cse12 .cse14)) (.cse19 (not (= |c_ULTIMATE.start_main_~#A~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse25 (= |c_ULTIMATE.start_main_~#B~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|)) (.cse26 (or (and .cse2 .cse4) .cse29)) (.cse20 (not (= |c_ULTIMATE.start_main_~#r~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse21 (not (= |c_ULTIMATE.start_main_~#q~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|))) (.cse0 (not .cse7)) (.cse3 (not (= |c_ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)))) (and (not (and .cse0 .cse1 .cse2 .cse3 .cse4)) .cse5 (or .cse6 .cse7) (= |c_ULTIMATE.start_main_~#q~0#1.offset| 0) (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse4)) (= (select .cse9 0) 0) .cse1 (not (and .cse10 .cse11 .cse8 (let ((.cse13 (= (select .cse9 |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))) (or (and (= .cse12 1) .cse13 (= .cse14 1)) (and .cse13 .cse15 (or (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int) (v_DerPreprocessor_59 (Array Int Int)) (v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse16 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (= .cse12 (select (select .cse16 |c_ULTIMATE.start_main_~#A~0#1.base|) |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse16 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0)))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (exists ((v_DerPreprocessor_59 (Array Int Int))) (and (= (select v_DerPreprocessor_59 |c_ULTIMATE.start_main_~#r~0#1.offset|) 1) (exists ((v_DerPreprocessor_55 (Array Int Int)) (v_DerPreprocessor_56 (Array Int Int)) (v_DerPreprocessor_57 (Array Int Int)) (v_DerPreprocessor_58 (Array Int Int))) (let ((.cse18 (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#b~0#1.base| v_DerPreprocessor_55) |c_ULTIMATE.start_main_~#A~0#1.base| v_DerPreprocessor_56) |ULTIMATE.start_main_~#B~0#1.base| v_DerPreprocessor_57) |c_ULTIMATE.start_main_~#q~0#1.base| v_DerPreprocessor_58) |c_ULTIMATE.start_main_~#r~0#1.base| v_DerPreprocessor_59))) (let ((.cse17 (select .cse18 |c_ULTIMATE.start_main_~#A~0#1.base|))) (and (= .cse12 (select .cse17 |c_ULTIMATE.start_main_~#A~0#1.offset|)) (= v_DerPreprocessor_56 .cse17) (exists ((|ULTIMATE.start_main_~#B~0#1.offset| Int)) (and (not (= |c_ULTIMATE.start_main_~#A~0#1.offset| |ULTIMATE.start_main_~#B~0#1.offset|)) (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1) (= (select (select .cse18 |ULTIMATE.start_main_~#B~0#1.base|) |ULTIMATE.start_main_~#B~0#1.offset|) 1))) (= (select (select .cse18 |c_ULTIMATE.start_main_~#q~0#1.base|) |c_ULTIMATE.start_main_~#q~0#1.offset|) 0))))))) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#q~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)))))))) .cse19 .cse20 .cse21)) (not (and .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) (not (and .cse2 (or .cse1 (and .cse0 .cse22)) .cse3 .cse4)) (not (and .cse0 .cse1 .cse2 .cse3 .cse20 .cse4)) (exists ((|ULTIMATE.start_main_~#B~0#1.base| Int)) (and (= (select (select |c_#memory_int| |ULTIMATE.start_main_~#B~0#1.base|) 0) 1) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#r~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#b~0#1.base|)) (not (= |ULTIMATE.start_main_~#B~0#1.base| |c_ULTIMATE.start_main_~#A~0#1.base|)))) (not (and .cse2 .cse8 .cse3 .cse23 .cse21 .cse4)) (not (and .cse2 .cse3 .cse23 .cse20 .cse21 .cse4)) .cse10 (or .cse6 (and .cse24 .cse7 .cse25 .cse20)) .cse2 (or .cse0 (and .cse24 .cse20)) .cse26 (not (and .cse0 .cse1 .cse2 .cse8 .cse3 .cse21 .cse4)) .cse11 .cse8 (or .cse6 (and .cse24 .cse7 .cse20)) (not (and .cse1 .cse2 .cse3 .cse4)) .cse15 .cse19 .cse23 (not (and .cse5 .cse1 (or (= |c_ULTIMATE.start_main_~#A~0#1.offset| |c_ULTIMATE.start_main_~#r~0#1.offset|) .cse11) .cse3 .cse15 .cse19 (or (and .cse7 .cse25) .cse4) .cse20)) .cse20 (not (and .cse2 .cse3 .cse23 .cse4)) .cse21 (not (and .cse26 .cse3 .cse23)) (not (and .cse0 .cse1 (<= (+ (mod (+ .cse27 4294967295) 4294967296) .cse28) .cse27) (<= (+ .cse28 (mod (+ (* .cse28 4294967295) .cse27) 4294967296)) 1) (<= .cse27 .cse28) (<= 1 .cse28) .cse3 .cse20 .cse21)) .cse4 (not (and .cse0 .cse2 .cse3 .cse23 .cse4)))))))) is different from true [2024-12-06 05:16:58,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:58,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:58,841 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:58,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:58,841 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:58,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:58,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:59,221 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:59,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:59,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:59,269 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:59,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:59,269 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:59,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:59,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:59,594 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:59,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:59,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:59,635 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:59,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:59,635 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:59,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:59,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:16:59,861 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:16:59,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:16:59,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:16:59,898 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:16:59,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:16:59,898 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:16:59,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:16:59,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:17:00,121 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:17:00,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:17:00,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:17:00,158 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:17:00,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:17:00,158 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:17:00,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-06 05:17:00,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-06 05:17:00,430 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-12-06 05:17:00,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2024-12-06 05:17:00,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 60 states and 171 transitions. [2024-12-06 05:17:00,469 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 171 transitions. [2024-12-06 05:17:00,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-12-06 05:17:00,470 INFO L420 CodeCheckObserver]: Error Path is FOUND. [2024-12-06 05:17:00,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms