./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cb83f5d7087c4b0d43604a15de3bb5b701cd940862e59390412bf16eeaebebc9 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-14 03:38:45,856 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-14 03:38:45,929 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-64bit-Taipan_Default.epf [2024-11-14 03:38:45,942 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-14 03:38:45,942 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-14 03:38:45,977 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-14 03:38:45,978 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-14 03:38:45,978 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-14 03:38:45,979 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-14 03:38:45,979 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-14 03:38:45,979 INFO L153 SettingsManager]: * User list type=DISABLED [2024-11-14 03:38:45,979 INFO L151 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2024-11-14 03:38:45,980 INFO L153 SettingsManager]: * Explicit value domain=true [2024-11-14 03:38:45,980 INFO L153 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2024-11-14 03:38:45,980 INFO L153 SettingsManager]: * Octagon Domain=false [2024-11-14 03:38:45,980 INFO L153 SettingsManager]: * Abstract domain=CompoundDomain [2024-11-14 03:38:45,980 INFO L153 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2024-11-14 03:38:45,980 INFO L153 SettingsManager]: * Use the RCFG-of-the-future interface=true [2024-11-14 03:38:45,981 INFO L153 SettingsManager]: * Interval Domain=false [2024-11-14 03:38:45,981 INFO L151 SettingsManager]: Preferences of Sifa differ from their defaults: [2024-11-14 03:38:45,981 INFO L153 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2024-11-14 03:38:45,981 INFO L153 SettingsManager]: * Simplification Technique=POLY_PAC [2024-11-14 03:38:45,982 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-14 03:38:45,982 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-14 03:38:45,982 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-14 03:38:45,982 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-14 03:38:45,982 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-14 03:38:45,983 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-14 03:38:45,983 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-14 03:38:45,983 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-14 03:38:45,983 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-14 03:38:45,983 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-14 03:38:45,984 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-14 03:38:45,984 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-14 03:38:45,984 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-14 03:38:45,984 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 03:38:45,984 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-14 03:38:45,984 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-14 03:38:45,985 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-14 03:38:45,985 INFO L153 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2024-11-14 03:38:45,985 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-14 03:38:45,985 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-14 03:38:45,985 INFO L153 SettingsManager]: * Trace refinement exception blacklist=NONE [2024-11-14 03:38:45,985 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-14 03:38:45,986 INFO L153 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cb83f5d7087c4b0d43604a15de3bb5b701cd940862e59390412bf16eeaebebc9 [2024-11-14 03:38:46,308 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-14 03:38:46,317 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-14 03:38:46,320 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-14 03:38:46,321 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-14 03:38:46,321 INFO L274 PluginConnector]: CDTParser initialized [2024-11-14 03:38:46,323 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c Unable to find full path for "g++" [2024-11-14 03:38:48,371 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-14 03:38:48,828 INFO L384 CDTParser]: Found 1 translation units. [2024-11-14 03:38:48,829 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c [2024-11-14 03:38:48,859 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/data/6a5cb529d/78c390e6da4a443b9d7c239f0e5788a7/FLAG4c348fcba [2024-11-14 03:38:48,884 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/data/6a5cb529d/78c390e6da4a443b9d7c239f0e5788a7 [2024-11-14 03:38:48,886 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-14 03:38:48,888 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-14 03:38:48,891 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-14 03:38:48,891 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-14 03:38:48,896 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-14 03:38:48,897 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 03:38:48" (1/1) ... [2024-11-14 03:38:48,899 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1cfca91f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:48, skipping insertion in model container [2024-11-14 03:38:48,899 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 03:38:48" (1/1) ... [2024-11-14 03:38:48,954 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-14 03:38:49,188 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c[1270,1283] [2024-11-14 03:38:49,611 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 03:38:49,625 INFO L200 MainTranslator]: Completed pre-run [2024-11-14 03:38:49,643 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c[1270,1283] [2024-11-14 03:38:49,854 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 03:38:49,870 INFO L204 MainTranslator]: Completed translation [2024-11-14 03:38:49,871 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49 WrapperNode [2024-11-14 03:38:49,871 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-14 03:38:49,872 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-14 03:38:49,873 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-14 03:38:49,874 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-14 03:38:49,880 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:49,940 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,377 INFO L138 Inliner]: procedures = 17, calls = 15, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 2958 [2024-11-14 03:38:50,378 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-14 03:38:50,379 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-14 03:38:50,379 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-14 03:38:50,379 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-14 03:38:50,388 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,388 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,450 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,451 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,596 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,675 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,735 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,765 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,909 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-14 03:38:50,910 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-14 03:38:50,914 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-14 03:38:50,914 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-14 03:38:50,915 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (1/1) ... [2024-11-14 03:38:50,925 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 03:38:50,954 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 03:38:50,980 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-11-14 03:38:50,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-11-14 03:38:51,056 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-14 03:38:51,060 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-14 03:38:51,060 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-14 03:38:51,061 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-11-14 03:38:51,061 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-14 03:38:51,061 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-14 03:38:51,600 INFO L238 CfgBuilder]: Building ICFG [2024-11-14 03:38:51,603 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-14 03:38:56,670 INFO L? ?]: Removed 1620 outVars from TransFormulas that were not future-live. [2024-11-14 03:38:56,671 INFO L287 CfgBuilder]: Performing block encoding [2024-11-14 03:39:01,381 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-14 03:39:01,382 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-14 03:39:01,382 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:39:01 BoogieIcfgContainer [2024-11-14 03:39:01,382 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-14 03:39:01,386 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-14 03:39:01,387 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-14 03:39:01,393 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-14 03:39:01,394 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 03:38:48" (1/3) ... [2024-11-14 03:39:01,394 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@206e62cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 03:39:01, skipping insertion in model container [2024-11-14 03:39:01,395 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:38:49" (2/3) ... [2024-11-14 03:39:01,397 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@206e62cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 03:39:01, skipping insertion in model container [2024-11-14 03:39:01,397 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:39:01" (3/3) ... [2024-11-14 03:39:01,398 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c [2024-11-14 03:39:01,420 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-14 03:39:01,422 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c that has 2 procedures, 23 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-14 03:39:01,489 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-14 03:39:01,507 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2c82743e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-14 03:39:01,507 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-14 03:39:01,511 INFO L276 IsEmpty]: Start isEmpty. Operand has 23 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 14 states have internal predecessors, (16), 7 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 7 states have call predecessors, (7), 7 states have call successors, (7) [2024-11-14 03:39:01,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2024-11-14 03:39:01,522 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:39:01,522 INFO L215 NwaCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:39:01,523 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 03:39:01,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:39:01,529 INFO L85 PathProgramCache]: Analyzing trace with hash -1924014959, now seen corresponding path program 1 times [2024-11-14 03:39:01,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 03:39:01,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41362181] [2024-11-14 03:39:01,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:39:01,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 03:39:03,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:39:08,632 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-11-14 03:39:08,632 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 03:39:08,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [41362181] [2024-11-14 03:39:08,637 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [41362181] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:39:08,637 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:39:08,638 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:39:08,639 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166125750] [2024-11-14 03:39:08,640 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:39:08,644 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-14 03:39:08,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 03:39:08,668 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-14 03:39:08,669 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 03:39:08,672 INFO L87 Difference]: Start difference. First operand has 23 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 14 states have internal predecessors, (16), 7 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 7 states have call predecessors, (7), 7 states have call successors, (7) Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 1 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-14 03:39:11,045 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.16s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-14 03:39:13,067 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-14 03:39:14,429 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.34s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-14 03:39:16,609 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.05s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-14 03:39:18,613 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-14 03:39:20,620 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-14 03:39:20,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:39:20,636 INFO L93 Difference]: Finished difference Result 60 states and 84 transitions. [2024-11-14 03:39:20,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-14 03:39:20,640 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 1 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 32 [2024-11-14 03:39:20,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:39:20,651 INFO L225 Difference]: With dead ends: 60 [2024-11-14 03:39:20,651 INFO L226 Difference]: Without dead ends: 38 [2024-11-14 03:39:20,655 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 03:39:20,667 INFO L432 NwaCegarLoop]: 16 mSDtfsCounter, 0 mSDsluCounter, 31 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 0 mSolverCounterUnsat, 5 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 11.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 47 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 5 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 11.9s IncrementalHoareTripleChecker+Time [2024-11-14 03:39:20,668 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 47 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 33 Invalid, 5 Unknown, 0 Unchecked, 11.9s Time] [2024-11-14 03:39:20,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2024-11-14 03:39:20,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2024-11-14 03:39:20,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 22 states have (on average 1.0454545454545454) internal successors, (23), 22 states have internal predecessors, (23), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2024-11-14 03:39:20,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 51 transitions. [2024-11-14 03:39:20,740 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 51 transitions. Word has length 32 [2024-11-14 03:39:20,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:39:20,744 INFO L471 AbstractCegarLoop]: Abstraction has 38 states and 51 transitions. [2024-11-14 03:39:20,744 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 1 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-14 03:39:20,745 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 51 transitions. [2024-11-14 03:39:20,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2024-11-14 03:39:20,750 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:39:20,750 INFO L215 NwaCegarLoop]: trace histogram [14, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2024-11-14 03:39:20,750 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-14 03:39:20,751 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 03:39:20,752 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:39:20,753 INFO L85 PathProgramCache]: Analyzing trace with hash -1461219928, now seen corresponding path program 1 times [2024-11-14 03:39:20,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 03:39:20,753 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382741372] [2024-11-14 03:39:20,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:39:20,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 03:39:55,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 03:39:55,169 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-14 03:40:39,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 03:40:39,785 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2024-11-14 03:40:39,786 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-14 03:40:39,788 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-14 03:40:39,790 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-14 03:40:39,797 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1] [2024-11-14 03:40:40,021 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-14 03:40:40,024 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.11 03:40:40 BoogieIcfgContainer [2024-11-14 03:40:40,025 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-14 03:40:40,026 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-14 03:40:40,026 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-14 03:40:40,026 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-14 03:40:40,027 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:39:01" (3/4) ... [2024-11-14 03:40:40,030 INFO L145 WitnessPrinter]: No result that supports witness generation found [2024-11-14 03:40:40,031 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-14 03:40:40,033 INFO L158 Benchmark]: Toolchain (without parser) took 111143.76ms. Allocated memory was 142.6MB in the beginning and 2.2GB in the end (delta: 2.1GB). Free memory was 117.6MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2024-11-14 03:40:40,033 INFO L158 Benchmark]: CDTParser took 0.43ms. Allocated memory is still 142.6MB. Free memory is still 81.1MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 03:40:40,034 INFO L158 Benchmark]: CACSL2BoogieTranslator took 981.33ms. Allocated memory is still 142.6MB. Free memory was 117.3MB in the beginning and 67.4MB in the end (delta: 49.9MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. [2024-11-14 03:40:40,035 INFO L158 Benchmark]: Boogie Procedure Inliner took 505.95ms. Allocated memory is still 142.6MB. Free memory was 67.1MB in the beginning and 72.5MB in the end (delta: -5.3MB). Peak memory consumption was 74.3MB. Max. memory is 16.1GB. [2024-11-14 03:40:40,037 INFO L158 Benchmark]: Boogie Preprocessor took 529.98ms. Allocated memory is still 142.6MB. Free memory was 72.5MB in the beginning and 53.0MB in the end (delta: 19.5MB). Peak memory consumption was 38.6MB. Max. memory is 16.1GB. [2024-11-14 03:40:40,037 INFO L158 Benchmark]: RCFGBuilder took 10472.86ms. Allocated memory was 142.6MB in the beginning and 520.1MB in the end (delta: 377.5MB). Free memory was 52.9MB in the beginning and 246.1MB in the end (delta: -193.3MB). Peak memory consumption was 356.2MB. Max. memory is 16.1GB. [2024-11-14 03:40:40,037 INFO L158 Benchmark]: TraceAbstraction took 98638.61ms. Allocated memory was 520.1MB in the beginning and 2.2GB in the end (delta: 1.7GB). Free memory was 246.1MB in the beginning and 1.1GB in the end (delta: -875.2MB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2024-11-14 03:40:40,038 INFO L158 Benchmark]: Witness Printer took 5.33ms. Allocated memory is still 2.2GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 195.2kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 03:40:40,041 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.43ms. Allocated memory is still 142.6MB. Free memory is still 81.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 981.33ms. Allocated memory is still 142.6MB. Free memory was 117.3MB in the beginning and 67.4MB in the end (delta: 49.9MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 505.95ms. Allocated memory is still 142.6MB. Free memory was 67.1MB in the beginning and 72.5MB in the end (delta: -5.3MB). Peak memory consumption was 74.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 529.98ms. Allocated memory is still 142.6MB. Free memory was 72.5MB in the beginning and 53.0MB in the end (delta: 19.5MB). Peak memory consumption was 38.6MB. Max. memory is 16.1GB. * RCFGBuilder took 10472.86ms. Allocated memory was 142.6MB in the beginning and 520.1MB in the end (delta: 377.5MB). Free memory was 52.9MB in the beginning and 246.1MB in the end (delta: -193.3MB). Peak memory consumption was 356.2MB. Max. memory is 16.1GB. * TraceAbstraction took 98638.61ms. Allocated memory was 520.1MB in the beginning and 2.2GB in the end (delta: 1.7GB). Free memory was 246.1MB in the beginning and 1.1GB in the end (delta: -875.2MB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. * Witness Printer took 5.33ms. Allocated memory is still 2.2GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 195.2kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 647, overapproximation of bitwiseOr at line 183, overapproximation of bitwiseOr at line 232, overapproximation of bitwiseOr at line 259, overapproximation of bitwiseOr at line 402, overapproximation of bitwiseOr at line 275, overapproximation of bitwiseOr at line 209, overapproximation of bitwiseOr at line 162, overapproximation of bitwiseOr at line 248, overapproximation of bitwiseAnd at line 293, overapproximation of bitwiseAnd at line 196, overapproximation of bitwiseAnd at line 144, overapproximation of bitwiseAnd at line 265, overapproximation of bitwiseAnd at line 249, overapproximation of bitwiseAnd at line 226, overapproximation of bitwiseAnd at line 620, overapproximation of bitwiseAnd at line 281, overapproximation of bitwiseAnd at line 103, overapproximation of bitwiseAnd at line 172. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L30] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L32] const SORT_7 mask_SORT_7 = (SORT_7)-1 >> (sizeof(SORT_7) * 8 - 2); [L33] const SORT_7 msb_SORT_7 = (SORT_7)1 << (2 - 1); [L35] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 16); [L36] const SORT_12 msb_SORT_12 = (SORT_12)1 << (16 - 1); [L38] const SORT_15 mask_SORT_15 = (SORT_15)-1 >> (sizeof(SORT_15) * 8 - 4); [L39] const SORT_15 msb_SORT_15 = (SORT_15)1 << (4 - 1); [L41] const SORT_17 mask_SORT_17 = (SORT_17)-1 >> (sizeof(SORT_17) * 8 - 3); [L42] const SORT_17 msb_SORT_17 = (SORT_17)1 << (3 - 1); [L44] const SORT_57 mask_SORT_57 = (SORT_57)-1 >> (sizeof(SORT_57) * 8 - 5); [L45] const SORT_57 msb_SORT_57 = (SORT_57)1 << (5 - 1); [L47] const SORT_59 mask_SORT_59 = (SORT_59)-1 >> (sizeof(SORT_59) * 8 - 6); [L48] const SORT_59 msb_SORT_59 = (SORT_59)1 << (6 - 1); [L50] const SORT_61 mask_SORT_61 = (SORT_61)-1 >> (sizeof(SORT_61) * 8 - 7); [L51] const SORT_61 msb_SORT_61 = (SORT_61)1 << (7 - 1); [L53] const SORT_63 mask_SORT_63 = (SORT_63)-1 >> (sizeof(SORT_63) * 8 - 8); [L54] const SORT_63 msb_SORT_63 = (SORT_63)1 << (8 - 1); [L56] const SORT_65 mask_SORT_65 = (SORT_65)-1 >> (sizeof(SORT_65) * 8 - 9); [L57] const SORT_65 msb_SORT_65 = (SORT_65)1 << (9 - 1); [L59] const SORT_67 mask_SORT_67 = (SORT_67)-1 >> (sizeof(SORT_67) * 8 - 10); [L60] const SORT_67 msb_SORT_67 = (SORT_67)1 << (10 - 1); [L62] const SORT_69 mask_SORT_69 = (SORT_69)-1 >> (sizeof(SORT_69) * 8 - 11); [L63] const SORT_69 msb_SORT_69 = (SORT_69)1 << (11 - 1); [L65] const SORT_71 mask_SORT_71 = (SORT_71)-1 >> (sizeof(SORT_71) * 8 - 12); [L66] const SORT_71 msb_SORT_71 = (SORT_71)1 << (12 - 1); [L68] const SORT_73 mask_SORT_73 = (SORT_73)-1 >> (sizeof(SORT_73) * 8 - 13); [L69] const SORT_73 msb_SORT_73 = (SORT_73)1 << (13 - 1); [L71] const SORT_75 mask_SORT_75 = (SORT_75)-1 >> (sizeof(SORT_75) * 8 - 14); [L72] const SORT_75 msb_SORT_75 = (SORT_75)1 << (14 - 1); [L74] const SORT_77 mask_SORT_77 = (SORT_77)-1 >> (sizeof(SORT_77) * 8 - 15); [L75] const SORT_77 msb_SORT_77 = (SORT_77)1 << (15 - 1); [L77] const SORT_17 var_19 = 7; [L78] const SORT_17 var_23 = 6; [L79] const SORT_17 var_27 = 5; [L80] const SORT_17 var_31 = 4; [L81] const SORT_7 var_35 = 3; [L82] const SORT_7 var_40 = 2; [L83] const SORT_1 var_45 = 1; [L84] const SORT_57 var_148 = 0; [L85] const SORT_1 var_159 = 0; [L86] const SORT_15 var_200 = 8; [L87] const SORT_12 var_485 = 0; [L88] const SORT_15 var_489 = 0; [L89] const SORT_15 var_556 = 9; [L91] SORT_1 input_2; [L92] SORT_1 input_3; [L93] SORT_4 input_5; [L94] SORT_1 input_6; [L95] SORT_7 input_8; [L96] SORT_1 input_9; [L97] SORT_1 input_10; [L98] SORT_1 input_11; [L99] SORT_12 input_13; [L100] SORT_12 input_81; [L101] SORT_1 input_213; [L103] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L103] SORT_12 state_14 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L104] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 [L104] SORT_15 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L105] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L105] SORT_12 state_22 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L106] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L106] SORT_12 state_26 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L107] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L107] SORT_12 state_30 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L108] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L108] SORT_12 state_34 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L109] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L109] SORT_12 state_39 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L110] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L110] SORT_12 state_44 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L111] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L111] SORT_12 state_49 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L112] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L112] SORT_12 state_82 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L113] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 [L113] SORT_15 state_83 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L114] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L114] SORT_12 state_87 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L115] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L115] SORT_12 state_90 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L116] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L116] SORT_12 state_93 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L117] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L117] SORT_12 state_96 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L118] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L118] SORT_12 state_100 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L119] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L119] SORT_12 state_104 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L120] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L120] SORT_12 state_108 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L121] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L121] SORT_1 state_134 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L122] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L122] SORT_1 state_135 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L123] EXPR __VERIFIER_nondet_uchar() & mask_SORT_57 [L123] SORT_57 state_138 = __VERIFIER_nondet_uchar() & mask_SORT_57; [L124] EXPR __VERIFIER_nondet_ushort() & mask_SORT_12 [L124] SORT_12 state_154 = __VERIFIER_nondet_ushort() & mask_SORT_12; [L125] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 [L125] SORT_15 state_158 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L126] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 [L126] SORT_15 state_167 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L127] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 [L127] SORT_15 state_176 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L128] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 [L128] SORT_15 state_185 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L129] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L129] SORT_1 state_194 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L130] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 [L130] SORT_15 state_257 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 [L131] SORT_15 state_352 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L133] SORT_1 init_195_arg_1 = var_45; [L134] state_194 = init_195_arg_1 VAL [mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_148=0, var_159=0, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L137] input_2 = __VERIFIER_nondet_uchar() [L138] input_3 = __VERIFIER_nondet_uchar() [L139] input_5 = __VERIFIER_nondet_uint() [L140] input_6 = __VERIFIER_nondet_uchar() [L141] input_8 = __VERIFIER_nondet_uchar() [L142] input_9 = __VERIFIER_nondet_uchar() [L143] input_10 = __VERIFIER_nondet_uchar() [L144] EXPR input_10 & mask_SORT_1 [L144] input_10 = input_10 & mask_SORT_1 [L145] input_11 = __VERIFIER_nondet_uchar() [L146] input_13 = __VERIFIER_nondet_ushort() [L147] input_81 = __VERIFIER_nondet_ushort() [L148] input_213 = __VERIFIER_nondet_uchar() [L150] SORT_1 var_160_arg_0 = var_159; [L151] EXPR var_160_arg_0 & mask_SORT_1 [L151] var_160_arg_0 = var_160_arg_0 & mask_SORT_1 [L152] SORT_15 var_160 = var_160_arg_0; [L153] SORT_15 var_161_arg_0 = state_158; [L154] SORT_15 var_161_arg_1 = var_160; [L155] SORT_1 var_161 = var_161_arg_0 > var_161_arg_1; [L156] SORT_7 var_141_arg_0 = input_8; [L157] SORT_1 var_141 = var_141_arg_0 >> 0; [L158] SORT_1 var_162_arg_0 = var_141; [L159] SORT_1 var_162 = ~var_162_arg_0; [L160] SORT_1 var_163_arg_0 = var_161; [L161] SORT_1 var_163_arg_1 = var_162; [L162] EXPR var_163_arg_0 | var_163_arg_1 [L162] SORT_1 var_163 = var_163_arg_0 | var_163_arg_1; [L163] SORT_1 var_164_arg_0 = var_45; [L164] SORT_1 var_164 = ~var_164_arg_0; [L165] SORT_1 var_165_arg_0 = var_163; [L166] SORT_1 var_165_arg_1 = var_164; [L167] EXPR var_165_arg_0 | var_165_arg_1 [L167] SORT_1 var_165 = var_165_arg_0 | var_165_arg_1; [L168] EXPR var_165 & mask_SORT_1 [L168] var_165 = var_165 & mask_SORT_1 [L169] SORT_1 constr_166_arg_0 = var_165; VAL [constr_166_arg_0=1, input_10=0, input_8=3, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_141=3, var_148=0, var_159=0, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L170] CALL assume_abort_if_not(constr_166_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_166_arg_0) VAL [constr_166_arg_0=1, input_10=0, input_8=3, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_141=3, var_148=0, var_159=0, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L171] SORT_1 var_168_arg_0 = var_159; [L172] EXPR var_168_arg_0 & mask_SORT_1 [L172] var_168_arg_0 = var_168_arg_0 & mask_SORT_1 [L173] SORT_15 var_168 = var_168_arg_0; [L174] SORT_15 var_169_arg_0 = state_167; [L175] SORT_15 var_169_arg_1 = var_168; [L176] SORT_1 var_169 = var_169_arg_0 > var_169_arg_1; [L177] SORT_7 var_170_arg_0 = input_8; [L178] SORT_1 var_170 = var_170_arg_0 >> 1; [L179] SORT_1 var_171_arg_0 = var_170; [L180] SORT_1 var_171 = ~var_171_arg_0; [L181] SORT_1 var_172_arg_0 = var_169; [L182] SORT_1 var_172_arg_1 = var_171; [L183] EXPR var_172_arg_0 | var_172_arg_1 [L183] SORT_1 var_172 = var_172_arg_0 | var_172_arg_1; [L184] SORT_1 var_173_arg_0 = var_45; [L185] SORT_1 var_173 = ~var_173_arg_0; [L186] SORT_1 var_174_arg_0 = var_172; [L187] SORT_1 var_174_arg_1 = var_173; [L188] EXPR var_174_arg_0 | var_174_arg_1 [L188] SORT_1 var_174 = var_174_arg_0 | var_174_arg_1; [L189] EXPR var_174 & mask_SORT_1 [L189] var_174 = var_174 & mask_SORT_1 [L190] SORT_1 constr_175_arg_0 = var_174; VAL [constr_166_arg_0=1, constr_175_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L191] CALL assume_abort_if_not(constr_175_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L191] RET assume_abort_if_not(constr_175_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L192] SORT_15 var_177_arg_0 = state_176; [L193] SORT_1 var_177 = var_177_arg_0 != 0; [L194] SORT_1 var_178_arg_0 = var_177; [L195] SORT_1 var_178 = ~var_178_arg_0; [L196] EXPR var_178 & mask_SORT_1 [L196] var_178 = var_178 & mask_SORT_1 [L197] SORT_1 var_179_arg_0 = var_178; [L198] SORT_1 var_179 = ~var_179_arg_0; [L199] SORT_1 var_112_arg_0 = input_6; [L200] SORT_1 var_112 = ~var_112_arg_0; [L201] SORT_1 var_113_arg_0 = input_9; [L202] SORT_1 var_113_arg_1 = var_112; [L203] EXPR var_113_arg_0 & var_113_arg_1 [L203] SORT_1 var_113 = var_113_arg_0 & var_113_arg_1; [L204] EXPR var_113 & mask_SORT_1 [L204] var_113 = var_113 & mask_SORT_1 [L205] SORT_1 var_180_arg_0 = var_113; [L206] SORT_1 var_180 = ~var_180_arg_0; [L207] SORT_1 var_181_arg_0 = var_179; [L208] SORT_1 var_181_arg_1 = var_180; [L209] EXPR var_181_arg_0 | var_181_arg_1 [L209] SORT_1 var_181 = var_181_arg_0 | var_181_arg_1; [L210] SORT_1 var_182_arg_0 = var_45; [L211] SORT_1 var_182 = ~var_182_arg_0; [L212] SORT_1 var_183_arg_0 = var_181; [L213] SORT_1 var_183_arg_1 = var_182; [L214] EXPR var_183_arg_0 | var_183_arg_1 [L214] SORT_1 var_183 = var_183_arg_0 | var_183_arg_1; [L215] EXPR var_183 & mask_SORT_1 [L215] var_183 = var_183 & mask_SORT_1 [L216] SORT_1 constr_184_arg_0 = var_183; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, input_10=0, input_6=255, input_9=1, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L217] CALL assume_abort_if_not(constr_184_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L217] RET assume_abort_if_not(constr_184_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, input_10=0, input_6=255, input_9=1, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L218] SORT_15 var_186_arg_0 = state_185; [L219] SORT_1 var_186 = var_186_arg_0 != 0; [L220] SORT_1 var_187_arg_0 = var_186; [L221] SORT_1 var_187 = ~var_187_arg_0; [L222] SORT_1 var_188_arg_0 = var_187; [L223] SORT_1 var_188 = ~var_188_arg_0; [L224] SORT_1 var_53_arg_0 = input_9; [L225] SORT_1 var_53_arg_1 = input_6; [L226] EXPR var_53_arg_0 & var_53_arg_1 [L226] SORT_1 var_53 = var_53_arg_0 & var_53_arg_1; [L227] EXPR var_53 & mask_SORT_1 [L227] var_53 = var_53 & mask_SORT_1 [L228] SORT_1 var_189_arg_0 = var_53; [L229] SORT_1 var_189 = ~var_189_arg_0; [L230] SORT_1 var_190_arg_0 = var_188; [L231] SORT_1 var_190_arg_1 = var_189; [L232] EXPR var_190_arg_0 | var_190_arg_1 [L232] SORT_1 var_190 = var_190_arg_0 | var_190_arg_1; [L233] SORT_1 var_191_arg_0 = var_45; [L234] SORT_1 var_191 = ~var_191_arg_0; [L235] SORT_1 var_192_arg_0 = var_190; [L236] SORT_1 var_192_arg_1 = var_191; [L237] EXPR var_192_arg_0 | var_192_arg_1 [L237] SORT_1 var_192 = var_192_arg_0 | var_192_arg_1; [L238] EXPR var_192 & mask_SORT_1 [L238] var_192 = var_192 & mask_SORT_1 [L239] SORT_1 constr_193_arg_0 = var_192; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L240] CALL assume_abort_if_not(constr_193_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L240] RET assume_abort_if_not(constr_193_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L241] SORT_1 var_196_arg_0 = input_10; [L242] SORT_1 var_196_arg_1 = state_194; [L243] SORT_1 var_196 = var_196_arg_0 == var_196_arg_1; [L244] SORT_1 var_197_arg_0 = var_45; [L245] SORT_1 var_197 = ~var_197_arg_0; [L246] SORT_1 var_198_arg_0 = var_196; [L247] SORT_1 var_198_arg_1 = var_197; [L248] EXPR var_198_arg_0 | var_198_arg_1 [L248] SORT_1 var_198 = var_198_arg_0 | var_198_arg_1; [L249] EXPR var_198 & mask_SORT_1 [L249] var_198 = var_198 & mask_SORT_1 [L250] SORT_1 constr_199_arg_0 = var_198; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L251] CALL assume_abort_if_not(constr_199_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L251] RET assume_abort_if_not(constr_199_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L252] SORT_15 var_201_arg_0 = state_158; [L253] SORT_15 var_201_arg_1 = var_200; [L254] SORT_1 var_201 = var_201_arg_0 != var_201_arg_1; [L255] SORT_1 var_202_arg_0 = var_113; [L256] SORT_1 var_202 = ~var_202_arg_0; [L257] SORT_1 var_203_arg_0 = var_201; [L258] SORT_1 var_203_arg_1 = var_202; [L259] EXPR var_203_arg_0 | var_203_arg_1 [L259] SORT_1 var_203 = var_203_arg_0 | var_203_arg_1; [L260] SORT_1 var_204_arg_0 = var_45; [L261] SORT_1 var_204 = ~var_204_arg_0; [L262] SORT_1 var_205_arg_0 = var_203; [L263] SORT_1 var_205_arg_1 = var_204; [L264] EXPR var_205_arg_0 | var_205_arg_1 [L264] SORT_1 var_205 = var_205_arg_0 | var_205_arg_1; [L265] EXPR var_205 & mask_SORT_1 [L265] var_205 = var_205 & mask_SORT_1 [L266] SORT_1 constr_206_arg_0 = var_205; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, constr_206_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L267] CALL assume_abort_if_not(constr_206_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L267] RET assume_abort_if_not(constr_206_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, constr_206_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L268] SORT_15 var_207_arg_0 = state_167; [L269] SORT_15 var_207_arg_1 = var_200; [L270] SORT_1 var_207 = var_207_arg_0 != var_207_arg_1; [L271] SORT_1 var_208_arg_0 = var_53; [L272] SORT_1 var_208 = ~var_208_arg_0; [L273] SORT_1 var_209_arg_0 = var_207; [L274] SORT_1 var_209_arg_1 = var_208; [L275] EXPR var_209_arg_0 | var_209_arg_1 [L275] SORT_1 var_209 = var_209_arg_0 | var_209_arg_1; [L276] SORT_1 var_210_arg_0 = var_45; [L277] SORT_1 var_210 = ~var_210_arg_0; [L278] SORT_1 var_211_arg_0 = var_209; [L279] SORT_1 var_211_arg_1 = var_210; [L280] EXPR var_211_arg_0 | var_211_arg_1 [L280] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L281] EXPR var_211 & mask_SORT_1 [L281] var_211 = var_211 & mask_SORT_1 [L282] SORT_1 constr_212_arg_0 = var_211; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, constr_206_arg_0=1, constr_212_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L283] CALL assume_abort_if_not(constr_212_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L283] RET assume_abort_if_not(constr_212_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, constr_206_arg_0=1, constr_212_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=31, state_14=0, state_154=0, state_158=10, state_167=8, state_16=6, state_176=0, state_185=0, state_194=1, state_22=0, state_257=15, state_26=1, state_30=1, state_34=0, state_352=15, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=3, var_148=0, var_159=0, var_170=1, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L285] SORT_1 var_215_arg_0 = state_194; [L286] SORT_1 var_215_arg_1 = var_159; [L287] SORT_1 var_215_arg_2 = var_45; [L288] SORT_1 var_215 = var_215_arg_0 ? var_215_arg_1 : var_215_arg_2; [L289] SORT_1 var_136_arg_0 = state_135; [L290] SORT_1 var_136 = ~var_136_arg_0; [L291] SORT_1 var_137_arg_0 = state_134; [L292] SORT_1 var_137_arg_1 = var_136; [L293] EXPR var_137_arg_0 & var_137_arg_1 [L293] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L294] SORT_57 var_139_arg_0 = state_138; [L295] SORT_1 var_139 = var_139_arg_0 != 0; [L296] SORT_1 var_140_arg_0 = var_137; [L297] SORT_1 var_140_arg_1 = var_139; [L298] EXPR var_140_arg_0 & var_140_arg_1 [L298] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L299] SORT_1 var_142_arg_0 = state_134; [L300] SORT_1 var_142 = ~var_142_arg_0; [L301] SORT_1 var_143_arg_0 = var_141; [L302] SORT_1 var_143_arg_1 = var_142; [L303] EXPR var_143_arg_0 & var_143_arg_1 [L303] SORT_1 var_143 = var_143_arg_0 & var_143_arg_1; [L304] SORT_1 var_144_arg_0 = var_143; [L305] EXPR var_144_arg_0 & mask_SORT_1 [L305] var_144_arg_0 = var_144_arg_0 & mask_SORT_1 [L306] SORT_57 var_144 = var_144_arg_0; [L307] SORT_57 var_145_arg_0 = state_138; [L308] SORT_57 var_145_arg_1 = var_144; [L309] SORT_57 var_145 = var_145_arg_0 + var_145_arg_1; [L310] SORT_1 var_146_arg_0 = var_113; [L311] EXPR var_146_arg_0 & mask_SORT_1 [L311] var_146_arg_0 = var_146_arg_0 & mask_SORT_1 [L312] SORT_57 var_146 = var_146_arg_0; [L313] SORT_57 var_147_arg_0 = var_145; [L314] SORT_57 var_147_arg_1 = var_146; [L315] SORT_57 var_147 = var_147_arg_0 - var_147_arg_1; [L316] SORT_1 var_149_arg_0 = input_10; [L317] SORT_57 var_149_arg_1 = var_148; [L318] SORT_57 var_149_arg_2 = var_147; [L319] SORT_57 var_149 = var_149_arg_0 ? var_149_arg_1 : var_149_arg_2; [L320] EXPR var_149 & mask_SORT_57 [L320] var_149 = var_149 & mask_SORT_57 [L321] SORT_57 var_150_arg_0 = var_149; [L322] SORT_1 var_150 = var_150_arg_0 != 0; [L323] SORT_1 var_151_arg_0 = var_150; [L324] SORT_1 var_151 = ~var_151_arg_0; [L325] SORT_1 var_152_arg_0 = var_140; [L326] SORT_1 var_152_arg_1 = var_151; [L327] EXPR var_152_arg_0 & var_152_arg_1 [L327] SORT_1 var_152 = var_152_arg_0 & var_152_arg_1; [L328] SORT_1 var_153_arg_0 = var_152; [L329] SORT_1 var_153 = ~var_153_arg_0; [L330] SORT_15 var_18_arg_0 = state_16; [L331] SORT_17 var_18 = var_18_arg_0 >> 0; [L332] EXPR var_18 & mask_SORT_17 [L332] var_18 = var_18 & mask_SORT_17 [L333] SORT_17 var_50_arg_0 = var_18; [L334] SORT_1 var_50 = var_50_arg_0 != 0; [L335] SORT_1 var_51_arg_0 = var_50; [L336] SORT_1 var_51 = ~var_51_arg_0; [L337] EXPR var_51 & mask_SORT_1 [L337] var_51 = var_51 & mask_SORT_1 [L338] SORT_1 var_46_arg_0 = var_45; [L339] EXPR var_46_arg_0 & mask_SORT_1 [L339] var_46_arg_0 = var_46_arg_0 & mask_SORT_1 [L340] SORT_17 var_46 = var_46_arg_0; [L341] SORT_17 var_47_arg_0 = var_18; [L342] SORT_17 var_47_arg_1 = var_46; [L343] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L344] SORT_7 var_41_arg_0 = var_40; [L345] EXPR var_41_arg_0 & mask_SORT_7 [L345] var_41_arg_0 = var_41_arg_0 & mask_SORT_7 [L346] SORT_17 var_41 = var_41_arg_0; [L347] SORT_17 var_42_arg_0 = var_18; [L348] SORT_17 var_42_arg_1 = var_41; [L349] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L350] SORT_7 var_36_arg_0 = var_35; [L351] EXPR var_36_arg_0 & mask_SORT_7 [L351] var_36_arg_0 = var_36_arg_0 & mask_SORT_7 [L352] SORT_17 var_36 = var_36_arg_0; [L353] SORT_17 var_37_arg_0 = var_18; [L354] SORT_17 var_37_arg_1 = var_36; [L355] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L356] SORT_17 var_32_arg_0 = var_18; [L357] SORT_17 var_32_arg_1 = var_31; [L358] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L359] SORT_17 var_28_arg_0 = var_18; [L360] SORT_17 var_28_arg_1 = var_27; [L361] SORT_1 var_28 = var_28_arg_0 == var_28_arg_1; [L362] SORT_17 var_24_arg_0 = var_18; [L363] SORT_17 var_24_arg_1 = var_23; [L364] SORT_1 var_24 = var_24_arg_0 == var_24_arg_1; [L365] SORT_17 var_20_arg_0 = var_18; [L366] SORT_17 var_20_arg_1 = var_19; [L367] SORT_1 var_20 = var_20_arg_0 == var_20_arg_1; [L368] SORT_1 var_21_arg_0 = var_20; [L369] SORT_12 var_21_arg_1 = state_14; [L370] SORT_12 var_21_arg_2 = input_13; [L371] SORT_12 var_21 = var_21_arg_0 ? var_21_arg_1 : var_21_arg_2; [L372] SORT_1 var_25_arg_0 = var_24; [L373] SORT_12 var_25_arg_1 = state_22; [L374] SORT_12 var_25_arg_2 = var_21; [L375] SORT_12 var_25 = var_25_arg_0 ? var_25_arg_1 : var_25_arg_2; [L376] SORT_1 var_29_arg_0 = var_28; [L377] SORT_12 var_29_arg_1 = state_26; [L378] SORT_12 var_29_arg_2 = var_25; [L379] SORT_12 var_29 = var_29_arg_0 ? var_29_arg_1 : var_29_arg_2; [L380] SORT_1 var_33_arg_0 = var_32; [L381] SORT_12 var_33_arg_1 = state_30; [L382] SORT_12 var_33_arg_2 = var_29; [L383] SORT_12 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L384] SORT_1 var_38_arg_0 = var_37; [L385] SORT_12 var_38_arg_1 = state_34; [L386] SORT_12 var_38_arg_2 = var_33; [L387] SORT_12 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L388] SORT_1 var_43_arg_0 = var_42; [L389] SORT_12 var_43_arg_1 = state_39; [L390] SORT_12 var_43_arg_2 = var_38; [L391] SORT_12 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L392] SORT_1 var_48_arg_0 = var_47; [L393] SORT_12 var_48_arg_1 = state_44; [L394] SORT_12 var_48_arg_2 = var_43; [L395] SORT_12 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L396] SORT_1 var_52_arg_0 = var_51; [L397] SORT_12 var_52_arg_1 = state_49; [L398] SORT_12 var_52_arg_2 = var_48; [L399] SORT_12 var_52 = var_52_arg_0 ? var_52_arg_1 : var_52_arg_2; [L400] SORT_1 var_54_arg_0 = var_53; [L401] SORT_1 var_54_arg_1 = var_53; [L402] EXPR ((SORT_7)var_54_arg_0 << 1) | var_54_arg_1 [L402] SORT_7 var_54 = ((SORT_7)var_54_arg_0 << 1) | var_54_arg_1; [L403] EXPR var_54 & mask_SORT_7 [L403] var_54 = var_54 & mask_SORT_7 [L404] SORT_1 var_55_arg_0 = var_53; [L405] SORT_7 var_55_arg_1 = var_54; [L406] EXPR ((SORT_17)var_55_arg_0 << 2) | var_55_arg_1 [L406] SORT_17 var_55 = ((SORT_17)var_55_arg_0 << 2) | var_55_arg_1; [L407] EXPR var_55 & mask_SORT_17 [L407] var_55 = var_55 & mask_SORT_17 [L408] SORT_1 var_56_arg_0 = var_53; [L409] SORT_17 var_56_arg_1 = var_55; [L410] EXPR ((SORT_15)var_56_arg_0 << 3) | var_56_arg_1 [L410] SORT_15 var_56 = ((SORT_15)var_56_arg_0 << 3) | var_56_arg_1; [L411] EXPR var_56 & mask_SORT_15 [L411] var_56 = var_56 & mask_SORT_15 [L412] SORT_1 var_58_arg_0 = var_53; [L413] SORT_15 var_58_arg_1 = var_56; [L414] EXPR ((SORT_57)var_58_arg_0 << 4) | var_58_arg_1 [L414] SORT_57 var_58 = ((SORT_57)var_58_arg_0 << 4) | var_58_arg_1; [L415] EXPR var_58 & mask_SORT_57 [L415] var_58 = var_58 & mask_SORT_57 [L416] SORT_1 var_60_arg_0 = var_53; [L417] SORT_57 var_60_arg_1 = var_58; [L418] EXPR ((SORT_59)var_60_arg_0 << 5) | var_60_arg_1 [L418] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 5) | var_60_arg_1; [L419] EXPR var_60 & mask_SORT_59 [L419] var_60 = var_60 & mask_SORT_59 [L420] SORT_1 var_62_arg_0 = var_53; [L421] SORT_59 var_62_arg_1 = var_60; [L422] EXPR ((SORT_61)var_62_arg_0 << 6) | var_62_arg_1 [L422] SORT_61 var_62 = ((SORT_61)var_62_arg_0 << 6) | var_62_arg_1; [L423] EXPR var_62 & mask_SORT_61 [L423] var_62 = var_62 & mask_SORT_61 [L424] SORT_1 var_64_arg_0 = var_53; [L425] SORT_61 var_64_arg_1 = var_62; [L426] EXPR ((SORT_63)var_64_arg_0 << 7) | var_64_arg_1 [L426] SORT_63 var_64 = ((SORT_63)var_64_arg_0 << 7) | var_64_arg_1; [L427] EXPR var_64 & mask_SORT_63 [L427] var_64 = var_64 & mask_SORT_63 [L428] SORT_1 var_66_arg_0 = var_53; [L429] SORT_63 var_66_arg_1 = var_64; [L430] EXPR ((SORT_65)var_66_arg_0 << 8) | var_66_arg_1 [L430] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 8) | var_66_arg_1; [L431] EXPR var_66 & mask_SORT_65 [L431] var_66 = var_66 & mask_SORT_65 [L432] SORT_1 var_68_arg_0 = var_53; [L433] SORT_65 var_68_arg_1 = var_66; [L434] EXPR ((SORT_67)var_68_arg_0 << 9) | var_68_arg_1 [L434] SORT_67 var_68 = ((SORT_67)var_68_arg_0 << 9) | var_68_arg_1; [L435] EXPR var_68 & mask_SORT_67 [L435] var_68 = var_68 & mask_SORT_67 [L436] SORT_1 var_70_arg_0 = var_53; [L437] SORT_67 var_70_arg_1 = var_68; [L438] EXPR ((SORT_69)var_70_arg_0 << 10) | var_70_arg_1 [L438] SORT_69 var_70 = ((SORT_69)var_70_arg_0 << 10) | var_70_arg_1; [L439] EXPR var_70 & mask_SORT_69 [L439] var_70 = var_70 & mask_SORT_69 [L440] SORT_1 var_72_arg_0 = var_53; [L441] SORT_69 var_72_arg_1 = var_70; [L442] EXPR ((SORT_71)var_72_arg_0 << 11) | var_72_arg_1 [L442] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 11) | var_72_arg_1; [L443] EXPR var_72 & mask_SORT_71 [L443] var_72 = var_72 & mask_SORT_71 [L444] SORT_1 var_74_arg_0 = var_53; [L445] SORT_71 var_74_arg_1 = var_72; [L446] EXPR ((SORT_73)var_74_arg_0 << 12) | var_74_arg_1 [L446] SORT_73 var_74 = ((SORT_73)var_74_arg_0 << 12) | var_74_arg_1; [L447] EXPR var_74 & mask_SORT_73 [L447] var_74 = var_74 & mask_SORT_73 [L448] SORT_1 var_76_arg_0 = var_53; [L449] SORT_73 var_76_arg_1 = var_74; [L450] EXPR ((SORT_75)var_76_arg_0 << 13) | var_76_arg_1 [L450] SORT_75 var_76 = ((SORT_75)var_76_arg_0 << 13) | var_76_arg_1; [L451] EXPR var_76 & mask_SORT_75 [L451] var_76 = var_76 & mask_SORT_75 [L452] SORT_1 var_78_arg_0 = var_53; [L453] SORT_75 var_78_arg_1 = var_76; [L454] EXPR ((SORT_77)var_78_arg_0 << 14) | var_78_arg_1 [L454] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 14) | var_78_arg_1; [L455] EXPR var_78 & mask_SORT_77 [L455] var_78 = var_78 & mask_SORT_77 [L456] SORT_1 var_79_arg_0 = var_53; [L457] SORT_77 var_79_arg_1 = var_78; [L458] EXPR ((SORT_12)var_79_arg_0 << 15) | var_79_arg_1 [L458] SORT_12 var_79 = ((SORT_12)var_79_arg_0 << 15) | var_79_arg_1; [L459] SORT_12 var_80_arg_0 = var_52; [L460] SORT_12 var_80_arg_1 = var_79; [L461] EXPR var_80_arg_0 & var_80_arg_1 [L461] SORT_12 var_80 = var_80_arg_0 & var_80_arg_1; [L462] SORT_15 var_84_arg_0 = state_83; [L463] SORT_17 var_84 = var_84_arg_0 >> 0; [L464] EXPR var_84 & mask_SORT_17 [L464] var_84 = var_84 & mask_SORT_17 [L465] SORT_17 var_109_arg_0 = var_84; [L466] SORT_1 var_109 = var_109_arg_0 != 0; [L467] SORT_1 var_110_arg_0 = var_109; [L468] SORT_1 var_110 = ~var_110_arg_0; [L469] EXPR var_110 & mask_SORT_1 [L469] var_110 = var_110 & mask_SORT_1 [L470] SORT_1 var_105_arg_0 = var_45; [L471] EXPR var_105_arg_0 & mask_SORT_1 [L471] var_105_arg_0 = var_105_arg_0 & mask_SORT_1 [L472] SORT_17 var_105 = var_105_arg_0; [L473] SORT_17 var_106_arg_0 = var_84; [L474] SORT_17 var_106_arg_1 = var_105; [L475] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L476] SORT_7 var_101_arg_0 = var_40; [L477] EXPR var_101_arg_0 & mask_SORT_7 [L477] var_101_arg_0 = var_101_arg_0 & mask_SORT_7 [L478] SORT_17 var_101 = var_101_arg_0; [L479] SORT_17 var_102_arg_0 = var_84; [L480] SORT_17 var_102_arg_1 = var_101; [L481] SORT_1 var_102 = var_102_arg_0 == var_102_arg_1; [L482] SORT_7 var_97_arg_0 = var_35; [L483] EXPR var_97_arg_0 & mask_SORT_7 [L483] var_97_arg_0 = var_97_arg_0 & mask_SORT_7 [L484] SORT_17 var_97 = var_97_arg_0; [L485] SORT_17 var_98_arg_0 = var_84; [L486] SORT_17 var_98_arg_1 = var_97; [L487] SORT_1 var_98 = var_98_arg_0 == var_98_arg_1; [L488] SORT_17 var_94_arg_0 = var_84; [L489] SORT_17 var_94_arg_1 = var_31; [L490] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L491] SORT_17 var_91_arg_0 = var_84; [L492] SORT_17 var_91_arg_1 = var_27; [L493] SORT_1 var_91 = var_91_arg_0 == var_91_arg_1; [L494] SORT_17 var_88_arg_0 = var_84; [L495] SORT_17 var_88_arg_1 = var_23; [L496] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L497] SORT_17 var_85_arg_0 = var_84; [L498] SORT_17 var_85_arg_1 = var_19; [L499] SORT_1 var_85 = var_85_arg_0 == var_85_arg_1; [L500] SORT_1 var_86_arg_0 = var_85; [L501] SORT_12 var_86_arg_1 = state_82; [L502] SORT_12 var_86_arg_2 = input_81; [L503] SORT_12 var_86 = var_86_arg_0 ? var_86_arg_1 : var_86_arg_2; [L504] SORT_1 var_89_arg_0 = var_88; [L505] SORT_12 var_89_arg_1 = state_87; [L506] SORT_12 var_89_arg_2 = var_86; [L507] SORT_12 var_89 = var_89_arg_0 ? var_89_arg_1 : var_89_arg_2; [L508] SORT_1 var_92_arg_0 = var_91; [L509] SORT_12 var_92_arg_1 = state_90; [L510] SORT_12 var_92_arg_2 = var_89; [L511] SORT_12 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L512] SORT_1 var_95_arg_0 = var_94; [L513] SORT_12 var_95_arg_1 = state_93; [L514] SORT_12 var_95_arg_2 = var_92; [L515] SORT_12 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L516] SORT_1 var_99_arg_0 = var_98; [L517] SORT_12 var_99_arg_1 = state_96; [L518] SORT_12 var_99_arg_2 = var_95; [L519] SORT_12 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; [L520] SORT_1 var_103_arg_0 = var_102; [L521] SORT_12 var_103_arg_1 = state_100; [L522] SORT_12 var_103_arg_2 = var_99; [L523] SORT_12 var_103 = var_103_arg_0 ? var_103_arg_1 : var_103_arg_2; [L524] SORT_1 var_107_arg_0 = var_106; [L525] SORT_12 var_107_arg_1 = state_104; [L526] SORT_12 var_107_arg_2 = var_103; [L527] SORT_12 var_107 = var_107_arg_0 ? var_107_arg_1 : var_107_arg_2; [L528] SORT_1 var_111_arg_0 = var_110; [L529] SORT_12 var_111_arg_1 = state_108; [L530] SORT_12 var_111_arg_2 = var_107; [L531] SORT_12 var_111 = var_111_arg_0 ? var_111_arg_1 : var_111_arg_2; [L532] EXPR var_111 & mask_SORT_12 [L532] var_111 = var_111 & mask_SORT_12 [L533] SORT_1 var_114_arg_0 = var_113; [L534] SORT_1 var_114_arg_1 = var_113; [L535] EXPR ((SORT_7)var_114_arg_0 << 1) | var_114_arg_1 [L535] SORT_7 var_114 = ((SORT_7)var_114_arg_0 << 1) | var_114_arg_1; [L536] EXPR var_114 & mask_SORT_7 [L536] var_114 = var_114 & mask_SORT_7 [L537] SORT_1 var_115_arg_0 = var_113; [L538] SORT_7 var_115_arg_1 = var_114; [L539] EXPR ((SORT_17)var_115_arg_0 << 2) | var_115_arg_1 [L539] SORT_17 var_115 = ((SORT_17)var_115_arg_0 << 2) | var_115_arg_1; [L540] EXPR var_115 & mask_SORT_17 [L540] var_115 = var_115 & mask_SORT_17 [L541] SORT_1 var_116_arg_0 = var_113; [L542] SORT_17 var_116_arg_1 = var_115; [L543] EXPR ((SORT_15)var_116_arg_0 << 3) | var_116_arg_1 [L543] SORT_15 var_116 = ((SORT_15)var_116_arg_0 << 3) | var_116_arg_1; [L544] EXPR var_116 & mask_SORT_15 [L544] var_116 = var_116 & mask_SORT_15 [L545] SORT_1 var_117_arg_0 = var_113; [L546] SORT_15 var_117_arg_1 = var_116; [L547] EXPR ((SORT_57)var_117_arg_0 << 4) | var_117_arg_1 [L547] SORT_57 var_117 = ((SORT_57)var_117_arg_0 << 4) | var_117_arg_1; [L548] EXPR var_117 & mask_SORT_57 [L548] var_117 = var_117 & mask_SORT_57 [L549] SORT_1 var_118_arg_0 = var_113; [L550] SORT_57 var_118_arg_1 = var_117; [L551] EXPR ((SORT_59)var_118_arg_0 << 5) | var_118_arg_1 [L551] SORT_59 var_118 = ((SORT_59)var_118_arg_0 << 5) | var_118_arg_1; [L552] EXPR var_118 & mask_SORT_59 [L552] var_118 = var_118 & mask_SORT_59 [L553] SORT_1 var_119_arg_0 = var_113; [L554] SORT_59 var_119_arg_1 = var_118; [L555] EXPR ((SORT_61)var_119_arg_0 << 6) | var_119_arg_1 [L555] SORT_61 var_119 = ((SORT_61)var_119_arg_0 << 6) | var_119_arg_1; [L556] EXPR var_119 & mask_SORT_61 [L556] var_119 = var_119 & mask_SORT_61 [L557] SORT_1 var_120_arg_0 = var_113; [L558] SORT_61 var_120_arg_1 = var_119; [L559] EXPR ((SORT_63)var_120_arg_0 << 7) | var_120_arg_1 [L559] SORT_63 var_120 = ((SORT_63)var_120_arg_0 << 7) | var_120_arg_1; [L560] EXPR var_120 & mask_SORT_63 [L560] var_120 = var_120 & mask_SORT_63 [L561] SORT_1 var_121_arg_0 = var_113; [L562] SORT_63 var_121_arg_1 = var_120; [L563] EXPR ((SORT_65)var_121_arg_0 << 8) | var_121_arg_1 [L563] SORT_65 var_121 = ((SORT_65)var_121_arg_0 << 8) | var_121_arg_1; [L564] EXPR var_121 & mask_SORT_65 [L564] var_121 = var_121 & mask_SORT_65 [L565] SORT_1 var_122_arg_0 = var_113; [L566] SORT_65 var_122_arg_1 = var_121; [L567] EXPR ((SORT_67)var_122_arg_0 << 9) | var_122_arg_1 [L567] SORT_67 var_122 = ((SORT_67)var_122_arg_0 << 9) | var_122_arg_1; [L568] EXPR var_122 & mask_SORT_67 [L568] var_122 = var_122 & mask_SORT_67 [L569] SORT_1 var_123_arg_0 = var_113; [L570] SORT_67 var_123_arg_1 = var_122; [L571] EXPR ((SORT_69)var_123_arg_0 << 10) | var_123_arg_1 [L571] SORT_69 var_123 = ((SORT_69)var_123_arg_0 << 10) | var_123_arg_1; [L572] EXPR var_123 & mask_SORT_69 [L572] var_123 = var_123 & mask_SORT_69 [L573] SORT_1 var_124_arg_0 = var_113; [L574] SORT_69 var_124_arg_1 = var_123; [L575] EXPR ((SORT_71)var_124_arg_0 << 11) | var_124_arg_1 [L575] SORT_71 var_124 = ((SORT_71)var_124_arg_0 << 11) | var_124_arg_1; [L576] EXPR var_124 & mask_SORT_71 [L576] var_124 = var_124 & mask_SORT_71 [L577] SORT_1 var_125_arg_0 = var_113; [L578] SORT_71 var_125_arg_1 = var_124; [L579] EXPR ((SORT_73)var_125_arg_0 << 12) | var_125_arg_1 [L579] SORT_73 var_125 = ((SORT_73)var_125_arg_0 << 12) | var_125_arg_1; [L580] EXPR var_125 & mask_SORT_73 [L580] var_125 = var_125 & mask_SORT_73 [L581] SORT_1 var_126_arg_0 = var_113; [L582] SORT_73 var_126_arg_1 = var_125; [L583] EXPR ((SORT_75)var_126_arg_0 << 13) | var_126_arg_1 [L583] SORT_75 var_126 = ((SORT_75)var_126_arg_0 << 13) | var_126_arg_1; [L584] EXPR var_126 & mask_SORT_75 [L584] var_126 = var_126 & mask_SORT_75 [L585] SORT_1 var_127_arg_0 = var_113; [L586] SORT_75 var_127_arg_1 = var_126; [L587] EXPR ((SORT_77)var_127_arg_0 << 14) | var_127_arg_1 [L587] SORT_77 var_127 = ((SORT_77)var_127_arg_0 << 14) | var_127_arg_1; [L588] EXPR var_127 & mask_SORT_77 [L588] var_127 = var_127 & mask_SORT_77 [L589] SORT_1 var_128_arg_0 = var_113; [L590] SORT_77 var_128_arg_1 = var_127; [L591] EXPR ((SORT_12)var_128_arg_0 << 15) | var_128_arg_1 [L591] SORT_12 var_128 = ((SORT_12)var_128_arg_0 << 15) | var_128_arg_1; [L592] SORT_12 var_129_arg_0 = var_111; [L593] SORT_12 var_129_arg_1 = var_128; [L594] EXPR var_129_arg_0 & var_129_arg_1 [L594] SORT_12 var_129 = var_129_arg_0 & var_129_arg_1; [L595] SORT_12 var_130_arg_0 = var_80; [L596] SORT_12 var_130_arg_1 = var_129; [L597] EXPR var_130_arg_0 | var_130_arg_1 [L597] SORT_12 var_130 = var_130_arg_0 | var_130_arg_1; [L598] EXPR var_130 & mask_SORT_12 [L598] var_130 = var_130 & mask_SORT_12 [L599] SORT_12 var_155_arg_0 = state_154; [L600] SORT_12 var_155_arg_1 = var_130; [L601] SORT_1 var_155 = var_155_arg_0 == var_155_arg_1; [L602] SORT_1 var_156_arg_0 = var_153; [L603] SORT_1 var_156_arg_1 = var_155; [L604] EXPR var_156_arg_0 | var_156_arg_1 [L604] SORT_1 var_156 = var_156_arg_0 | var_156_arg_1; [L605] SORT_1 var_214_arg_0 = state_194; [L606] SORT_1 var_214_arg_1 = input_213; [L607] SORT_1 var_214_arg_2 = var_156; [L608] SORT_1 var_214 = var_214_arg_0 ? var_214_arg_1 : var_214_arg_2; [L609] SORT_1 var_216_arg_0 = var_214; [L610] SORT_1 var_216 = ~var_216_arg_0; [L611] SORT_1 var_217_arg_0 = var_215; [L612] SORT_1 var_217_arg_1 = var_216; [L613] EXPR var_217_arg_0 & var_217_arg_1 [L613] SORT_1 var_217 = var_217_arg_0 & var_217_arg_1; [L614] EXPR var_217 & mask_SORT_1 [L614] var_217 = var_217 & mask_SORT_1 [L615] SORT_1 bad_218_arg_0 = var_217; [L616] CALL __VERIFIER_assert(!(bad_218_arg_0)) [L21] COND FALSE !(!(cond)) [L616] RET __VERIFIER_assert(!(bad_218_arg_0)) [L618] SORT_15 var_353_arg_0 = state_352; [L619] SORT_17 var_353 = var_353_arg_0 >> 0; [L620] EXPR var_353 & mask_SORT_17 [L620] var_353 = var_353 & mask_SORT_17 [L621] SORT_17 var_400_arg_0 = var_353; [L622] SORT_17 var_400_arg_1 = var_19; [L623] SORT_1 var_400 = var_400_arg_0 == var_400_arg_1; [L624] SORT_1 var_401_arg_0 = var_170; [L625] SORT_1 var_401_arg_1 = var_400; [L626] EXPR var_401_arg_0 & var_401_arg_1 [L626] SORT_1 var_401 = var_401_arg_0 & var_401_arg_1; [L627] EXPR var_401 & mask_SORT_1 [L627] var_401 = var_401 & mask_SORT_1 [L628] SORT_1 var_223_arg_0 = input_2; [L629] EXPR var_223_arg_0 & mask_SORT_1 [L629] var_223_arg_0 = var_223_arg_0 & mask_SORT_1 [L630] SORT_12 var_223 = var_223_arg_0; [L631] SORT_4 var_224_arg_0 = input_5; [L632] SORT_12 var_224 = var_224_arg_0 >> 16; [L633] SORT_12 var_225_arg_0 = var_223; [L634] SORT_12 var_225_arg_1 = var_224; [L635] EXPR var_225_arg_0 & var_225_arg_1 [L635] SORT_12 var_225 = var_225_arg_0 & var_225_arg_1; [L636] SORT_1 var_484_arg_0 = var_401; [L637] SORT_12 var_484_arg_1 = var_225; [L638] SORT_12 var_484_arg_2 = state_14; [L639] SORT_12 var_484 = var_484_arg_0 ? var_484_arg_1 : var_484_arg_2; [L640] SORT_1 var_486_arg_0 = input_10; [L641] SORT_12 var_486_arg_1 = var_485; [L642] SORT_12 var_486_arg_2 = var_484; [L643] SORT_12 var_486 = var_486_arg_0 ? var_486_arg_1 : var_486_arg_2; [L644] SORT_12 next_487_arg_1 = var_486; [L645] SORT_1 var_336_arg_0 = var_170; [L646] SORT_1 var_336_arg_1 = var_53; [L647] EXPR var_336_arg_0 | var_336_arg_1 [L647] SORT_1 var_336 = var_336_arg_0 | var_336_arg_1; [L648] SORT_1 var_337_arg_0 = var_336; [L649] SORT_1 var_337_arg_1 = input_10; [L650] EXPR var_337_arg_0 | var_337_arg_1 [L650] SORT_1 var_337 = var_337_arg_0 | var_337_arg_1; [L651] EXPR var_337 & mask_SORT_1 [L651] var_337 = var_337 & mask_SORT_1 [L652] SORT_1 var_404_arg_0 = var_53; [L653] EXPR var_404_arg_0 & mask_SORT_1 [L653] var_404_arg_0 = var_404_arg_0 & mask_SORT_1 [L654] SORT_15 var_404 = var_404_arg_0; [L655] SORT_15 var_405_arg_0 = state_16; [L656] SORT_15 var_405_arg_1 = var_404; [L657] SORT_15 var_405 = var_405_arg_0 + var_405_arg_1; [L658] SORT_1 var_488_arg_0 = var_337; [L659] SORT_15 var_488_arg_1 = var_405; [L660] SORT_15 var_488_arg_2 = state_16; [L661] SORT_15 var_488 = var_488_arg_0 ? var_488_arg_1 : var_488_arg_2; [L662] SORT_1 var_490_arg_0 = input_10; [L663] SORT_15 var_490_arg_1 = var_489; [L664] SORT_15 var_490_arg_2 = var_488; [L665] SORT_15 var_490 = var_490_arg_0 ? var_490_arg_1 : var_490_arg_2; [L666] SORT_15 next_491_arg_1 = var_490; [L667] SORT_17 var_394_arg_0 = var_353; [L668] SORT_17 var_394_arg_1 = var_23; [L669] SORT_1 var_394 = var_394_arg_0 == var_394_arg_1; [L670] SORT_1 var_395_arg_0 = var_170; [L671] SORT_1 var_395_arg_1 = var_394; [L672] EXPR var_395_arg_0 & var_395_arg_1 [L672] SORT_1 var_395 = var_395_arg_0 & var_395_arg_1; [L673] EXPR var_395 & mask_SORT_1 [L673] var_395 = var_395 & mask_SORT_1 [L674] SORT_1 var_492_arg_0 = var_395; [L675] SORT_12 var_492_arg_1 = var_225; [L676] SORT_12 var_492_arg_2 = state_22; [L677] SORT_12 var_492 = var_492_arg_0 ? var_492_arg_1 : var_492_arg_2; [L678] SORT_1 var_493_arg_0 = input_10; [L679] SORT_12 var_493_arg_1 = var_485; [L680] SORT_12 var_493_arg_2 = var_492; [L681] SORT_12 var_493 = var_493_arg_0 ? var_493_arg_1 : var_493_arg_2; [L682] SORT_12 next_494_arg_1 = var_493; [L683] SORT_17 var_388_arg_0 = var_353; [L684] SORT_17 var_388_arg_1 = var_27; [L685] SORT_1 var_388 = var_388_arg_0 == var_388_arg_1; [L686] SORT_1 var_389_arg_0 = var_170; [L687] SORT_1 var_389_arg_1 = var_388; [L688] EXPR var_389_arg_0 & var_389_arg_1 [L688] SORT_1 var_389 = var_389_arg_0 & var_389_arg_1; [L689] EXPR var_389 & mask_SORT_1 [L689] var_389 = var_389 & mask_SORT_1 [L690] SORT_1 var_495_arg_0 = var_389; [L691] SORT_12 var_495_arg_1 = var_225; [L692] SORT_12 var_495_arg_2 = state_26; [L693] SORT_12 var_495 = var_495_arg_0 ? var_495_arg_1 : var_495_arg_2; [L694] SORT_1 var_496_arg_0 = input_10; [L695] SORT_12 var_496_arg_1 = var_485; [L696] SORT_12 var_496_arg_2 = var_495; [L697] SORT_12 var_496 = var_496_arg_0 ? var_496_arg_1 : var_496_arg_2; [L698] SORT_12 next_497_arg_1 = var_496; [L699] SORT_17 var_382_arg_0 = var_353; [L700] SORT_17 var_382_arg_1 = var_31; [L701] SORT_1 var_382 = var_382_arg_0 == var_382_arg_1; [L702] SORT_1 var_383_arg_0 = var_170; [L703] SORT_1 var_383_arg_1 = var_382; [L704] EXPR var_383_arg_0 & var_383_arg_1 [L704] SORT_1 var_383 = var_383_arg_0 & var_383_arg_1; [L705] EXPR var_383 & mask_SORT_1 [L705] var_383 = var_383 & mask_SORT_1 [L706] SORT_1 var_498_arg_0 = var_383; [L707] SORT_12 var_498_arg_1 = var_225; [L708] SORT_12 var_498_arg_2 = state_30; [L709] SORT_12 var_498 = var_498_arg_0 ? var_498_arg_1 : var_498_arg_2; [L710] SORT_1 var_499_arg_0 = input_10; [L711] SORT_12 var_499_arg_1 = var_485; [L712] SORT_12 var_499_arg_2 = var_498; [L713] SORT_12 var_499 = var_499_arg_0 ? var_499_arg_1 : var_499_arg_2; [L714] SORT_12 next_500_arg_1 = var_499; [L715] SORT_7 var_375_arg_0 = var_35; [L716] EXPR var_375_arg_0 & mask_SORT_7 [L716] var_375_arg_0 = var_375_arg_0 & mask_SORT_7 [L717] SORT_17 var_375 = var_375_arg_0; [L718] SORT_17 var_376_arg_0 = var_353; [L719] SORT_17 var_376_arg_1 = var_375; [L720] SORT_1 var_376 = var_376_arg_0 == var_376_arg_1; [L721] SORT_1 var_377_arg_0 = var_170; [L722] SORT_1 var_377_arg_1 = var_376; [L723] EXPR var_377_arg_0 & var_377_arg_1 [L723] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L724] EXPR var_377 & mask_SORT_1 [L724] var_377 = var_377 & mask_SORT_1 [L725] SORT_1 var_501_arg_0 = var_377; [L726] SORT_12 var_501_arg_1 = var_225; [L727] SORT_12 var_501_arg_2 = state_34; [L728] SORT_12 var_501 = var_501_arg_0 ? var_501_arg_1 : var_501_arg_2; [L729] SORT_1 var_502_arg_0 = input_10; [L730] SORT_12 var_502_arg_1 = var_485; [L731] SORT_12 var_502_arg_2 = var_501; [L732] SORT_12 var_502 = var_502_arg_0 ? var_502_arg_1 : var_502_arg_2; [L733] SORT_12 next_503_arg_1 = var_502; [L734] SORT_7 var_368_arg_0 = var_40; [L735] EXPR var_368_arg_0 & mask_SORT_7 [L735] var_368_arg_0 = var_368_arg_0 & mask_SORT_7 [L736] SORT_17 var_368 = var_368_arg_0; [L737] SORT_17 var_369_arg_0 = var_353; [L738] SORT_17 var_369_arg_1 = var_368; [L739] SORT_1 var_369 = var_369_arg_0 == var_369_arg_1; [L740] SORT_1 var_370_arg_0 = var_170; [L741] SORT_1 var_370_arg_1 = var_369; [L742] EXPR var_370_arg_0 & var_370_arg_1 [L742] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L743] EXPR var_370 & mask_SORT_1 [L743] var_370 = var_370 & mask_SORT_1 [L744] SORT_1 var_504_arg_0 = var_370; [L745] SORT_12 var_504_arg_1 = var_225; [L746] SORT_12 var_504_arg_2 = state_39; [L747] SORT_12 var_504 = var_504_arg_0 ? var_504_arg_1 : var_504_arg_2; [L748] SORT_1 var_505_arg_0 = input_10; [L749] SORT_12 var_505_arg_1 = var_485; [L750] SORT_12 var_505_arg_2 = var_504; [L751] SORT_12 var_505 = var_505_arg_0 ? var_505_arg_1 : var_505_arg_2; [L752] SORT_12 next_506_arg_1 = var_505; [L753] SORT_1 var_361_arg_0 = var_45; [L754] EXPR var_361_arg_0 & mask_SORT_1 [L754] var_361_arg_0 = var_361_arg_0 & mask_SORT_1 [L755] SORT_17 var_361 = var_361_arg_0; [L756] SORT_17 var_362_arg_0 = var_353; [L757] SORT_17 var_362_arg_1 = var_361; [L758] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L759] SORT_1 var_363_arg_0 = var_170; [L760] SORT_1 var_363_arg_1 = var_362; [L761] EXPR var_363_arg_0 & var_363_arg_1 [L761] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L762] EXPR var_363 & mask_SORT_1 [L762] var_363 = var_363 & mask_SORT_1 [L763] SORT_1 var_507_arg_0 = var_363; [L764] SORT_12 var_507_arg_1 = var_225; [L765] SORT_12 var_507_arg_2 = state_44; [L766] SORT_12 var_507 = var_507_arg_0 ? var_507_arg_1 : var_507_arg_2; [L767] SORT_1 var_508_arg_0 = input_10; [L768] SORT_12 var_508_arg_1 = var_485; [L769] SORT_12 var_508_arg_2 = var_507; [L770] SORT_12 var_508 = var_508_arg_0 ? var_508_arg_1 : var_508_arg_2; [L771] SORT_12 next_509_arg_1 = var_508; [L772] SORT_17 var_354_arg_0 = var_353; [L773] SORT_1 var_354 = var_354_arg_0 != 0; [L774] SORT_1 var_355_arg_0 = var_354; [L775] SORT_1 var_355 = ~var_355_arg_0; [L776] SORT_1 var_356_arg_0 = var_170; [L777] SORT_1 var_356_arg_1 = var_355; [L778] EXPR var_356_arg_0 & var_356_arg_1 [L778] SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; [L779] EXPR var_356 & mask_SORT_1 [L779] var_356 = var_356 & mask_SORT_1 [L780] SORT_1 var_510_arg_0 = var_356; [L781] SORT_12 var_510_arg_1 = var_225; [L782] SORT_12 var_510_arg_2 = state_49; [L783] SORT_12 var_510 = var_510_arg_0 ? var_510_arg_1 : var_510_arg_2; [L784] SORT_1 var_511_arg_0 = input_10; [L785] SORT_12 var_511_arg_1 = var_485; [L786] SORT_12 var_511_arg_2 = var_510; [L787] SORT_12 var_511 = var_511_arg_0 ? var_511_arg_1 : var_511_arg_2; [L788] SORT_12 next_512_arg_1 = var_511; [L789] SORT_15 var_258_arg_0 = state_257; [L790] SORT_17 var_258 = var_258_arg_0 >> 0; [L791] EXPR var_258 & mask_SORT_17 [L791] var_258 = var_258 & mask_SORT_17 [L792] SORT_17 var_305_arg_0 = var_258; [L793] SORT_17 var_305_arg_1 = var_19; [L794] SORT_1 var_305 = var_305_arg_0 == var_305_arg_1; [L795] SORT_1 var_306_arg_0 = var_141; [L796] SORT_1 var_306_arg_1 = var_305; [L797] EXPR var_306_arg_0 & var_306_arg_1 [L797] SORT_1 var_306 = var_306_arg_0 & var_306_arg_1; [L798] EXPR var_306 & mask_SORT_1 [L798] var_306 = var_306 & mask_SORT_1 [L799] SORT_1 var_219_arg_0 = input_2; [L800] EXPR var_219_arg_0 & mask_SORT_1 [L800] var_219_arg_0 = var_219_arg_0 & mask_SORT_1 [L801] SORT_12 var_219 = var_219_arg_0; [L802] SORT_4 var_220_arg_0 = input_5; [L803] SORT_12 var_220 = var_220_arg_0 >> 0; [L804] SORT_12 var_221_arg_0 = var_219; [L805] SORT_12 var_221_arg_1 = var_220; [L806] EXPR var_221_arg_0 & var_221_arg_1 [L806] SORT_12 var_221 = var_221_arg_0 & var_221_arg_1; [L807] SORT_1 var_513_arg_0 = var_306; [L808] SORT_12 var_513_arg_1 = var_221; [L809] SORT_12 var_513_arg_2 = state_82; [L810] SORT_12 var_513 = var_513_arg_0 ? var_513_arg_1 : var_513_arg_2; [L811] SORT_1 var_514_arg_0 = input_10; [L812] SORT_12 var_514_arg_1 = var_485; [L813] SORT_12 var_514_arg_2 = var_513; [L814] SORT_12 var_514 = var_514_arg_0 ? var_514_arg_1 : var_514_arg_2; [L815] SORT_12 next_515_arg_1 = var_514; [L816] SORT_1 var_241_arg_0 = var_141; [L817] SORT_1 var_241_arg_1 = var_113; [L818] EXPR var_241_arg_0 | var_241_arg_1 [L818] SORT_1 var_241 = var_241_arg_0 | var_241_arg_1; [L819] SORT_1 var_242_arg_0 = var_241; [L820] SORT_1 var_242_arg_1 = input_10; [L821] EXPR var_242_arg_0 | var_242_arg_1 [L821] SORT_1 var_242 = var_242_arg_0 | var_242_arg_1; [L822] EXPR var_242 & mask_SORT_1 [L822] var_242 = var_242 & mask_SORT_1 [L823] SORT_1 var_309_arg_0 = var_113; [L824] EXPR var_309_arg_0 & mask_SORT_1 [L824] var_309_arg_0 = var_309_arg_0 & mask_SORT_1 [L825] SORT_15 var_309 = var_309_arg_0; [L826] SORT_15 var_310_arg_0 = state_83; [L827] SORT_15 var_310_arg_1 = var_309; [L828] SORT_15 var_310 = var_310_arg_0 + var_310_arg_1; [L829] SORT_1 var_516_arg_0 = var_242; [L830] SORT_15 var_516_arg_1 = var_310; [L831] SORT_15 var_516_arg_2 = state_83; [L832] SORT_15 var_516 = var_516_arg_0 ? var_516_arg_1 : var_516_arg_2; [L833] SORT_1 var_517_arg_0 = input_10; [L834] SORT_15 var_517_arg_1 = var_489; [L835] SORT_15 var_517_arg_2 = var_516; [L836] SORT_15 var_517 = var_517_arg_0 ? var_517_arg_1 : var_517_arg_2; [L837] SORT_15 next_518_arg_1 = var_517; [L838] SORT_17 var_299_arg_0 = var_258; [L839] SORT_17 var_299_arg_1 = var_23; [L840] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L841] SORT_1 var_300_arg_0 = var_141; [L842] SORT_1 var_300_arg_1 = var_299; [L843] EXPR var_300_arg_0 & var_300_arg_1 [L843] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L844] EXPR var_300 & mask_SORT_1 [L844] var_300 = var_300 & mask_SORT_1 [L845] SORT_1 var_519_arg_0 = var_300; [L846] SORT_12 var_519_arg_1 = var_221; [L847] SORT_12 var_519_arg_2 = state_87; [L848] SORT_12 var_519 = var_519_arg_0 ? var_519_arg_1 : var_519_arg_2; [L849] SORT_1 var_520_arg_0 = input_10; [L850] SORT_12 var_520_arg_1 = var_485; [L851] SORT_12 var_520_arg_2 = var_519; [L852] SORT_12 var_520 = var_520_arg_0 ? var_520_arg_1 : var_520_arg_2; [L853] SORT_12 next_521_arg_1 = var_520; [L854] SORT_17 var_293_arg_0 = var_258; [L855] SORT_17 var_293_arg_1 = var_27; [L856] SORT_1 var_293 = var_293_arg_0 == var_293_arg_1; [L857] SORT_1 var_294_arg_0 = var_141; [L858] SORT_1 var_294_arg_1 = var_293; [L859] EXPR var_294_arg_0 & var_294_arg_1 [L859] SORT_1 var_294 = var_294_arg_0 & var_294_arg_1; [L860] EXPR var_294 & mask_SORT_1 [L860] var_294 = var_294 & mask_SORT_1 [L861] SORT_1 var_522_arg_0 = var_294; [L862] SORT_12 var_522_arg_1 = var_221; [L863] SORT_12 var_522_arg_2 = state_90; [L864] SORT_12 var_522 = var_522_arg_0 ? var_522_arg_1 : var_522_arg_2; [L865] SORT_1 var_523_arg_0 = input_10; [L866] SORT_12 var_523_arg_1 = var_485; [L867] SORT_12 var_523_arg_2 = var_522; [L868] SORT_12 var_523 = var_523_arg_0 ? var_523_arg_1 : var_523_arg_2; [L869] SORT_12 next_524_arg_1 = var_523; [L870] SORT_17 var_287_arg_0 = var_258; [L871] SORT_17 var_287_arg_1 = var_31; [L872] SORT_1 var_287 = var_287_arg_0 == var_287_arg_1; [L873] SORT_1 var_288_arg_0 = var_141; [L874] SORT_1 var_288_arg_1 = var_287; [L875] EXPR var_288_arg_0 & var_288_arg_1 [L875] SORT_1 var_288 = var_288_arg_0 & var_288_arg_1; [L876] EXPR var_288 & mask_SORT_1 [L876] var_288 = var_288 & mask_SORT_1 [L877] SORT_1 var_525_arg_0 = var_288; [L878] SORT_12 var_525_arg_1 = var_221; [L879] SORT_12 var_525_arg_2 = state_93; [L880] SORT_12 var_525 = var_525_arg_0 ? var_525_arg_1 : var_525_arg_2; [L881] SORT_1 var_526_arg_0 = input_10; [L882] SORT_12 var_526_arg_1 = var_485; [L883] SORT_12 var_526_arg_2 = var_525; [L884] SORT_12 var_526 = var_526_arg_0 ? var_526_arg_1 : var_526_arg_2; [L885] SORT_12 next_527_arg_1 = var_526; [L886] SORT_7 var_280_arg_0 = var_35; [L887] EXPR var_280_arg_0 & mask_SORT_7 [L887] var_280_arg_0 = var_280_arg_0 & mask_SORT_7 [L888] SORT_17 var_280 = var_280_arg_0; [L889] SORT_17 var_281_arg_0 = var_258; [L890] SORT_17 var_281_arg_1 = var_280; [L891] SORT_1 var_281 = var_281_arg_0 == var_281_arg_1; [L892] SORT_1 var_282_arg_0 = var_141; [L893] SORT_1 var_282_arg_1 = var_281; [L894] EXPR var_282_arg_0 & var_282_arg_1 [L894] SORT_1 var_282 = var_282_arg_0 & var_282_arg_1; [L895] EXPR var_282 & mask_SORT_1 [L895] var_282 = var_282 & mask_SORT_1 [L896] SORT_1 var_528_arg_0 = var_282; [L897] SORT_12 var_528_arg_1 = var_221; [L898] SORT_12 var_528_arg_2 = state_96; [L899] SORT_12 var_528 = var_528_arg_0 ? var_528_arg_1 : var_528_arg_2; [L900] SORT_1 var_529_arg_0 = input_10; [L901] SORT_12 var_529_arg_1 = var_485; [L902] SORT_12 var_529_arg_2 = var_528; [L903] SORT_12 var_529 = var_529_arg_0 ? var_529_arg_1 : var_529_arg_2; [L904] SORT_12 next_530_arg_1 = var_529; [L905] SORT_7 var_273_arg_0 = var_40; [L906] EXPR var_273_arg_0 & mask_SORT_7 [L906] var_273_arg_0 = var_273_arg_0 & mask_SORT_7 [L907] SORT_17 var_273 = var_273_arg_0; [L908] SORT_17 var_274_arg_0 = var_258; [L909] SORT_17 var_274_arg_1 = var_273; [L910] SORT_1 var_274 = var_274_arg_0 == var_274_arg_1; [L911] SORT_1 var_275_arg_0 = var_141; [L912] SORT_1 var_275_arg_1 = var_274; [L913] EXPR var_275_arg_0 & var_275_arg_1 [L913] SORT_1 var_275 = var_275_arg_0 & var_275_arg_1; [L914] EXPR var_275 & mask_SORT_1 [L914] var_275 = var_275 & mask_SORT_1 [L915] SORT_1 var_531_arg_0 = var_275; [L916] SORT_12 var_531_arg_1 = var_221; [L917] SORT_12 var_531_arg_2 = state_100; [L918] SORT_12 var_531 = var_531_arg_0 ? var_531_arg_1 : var_531_arg_2; [L919] SORT_1 var_532_arg_0 = input_10; [L920] SORT_12 var_532_arg_1 = var_485; [L921] SORT_12 var_532_arg_2 = var_531; [L922] SORT_12 var_532 = var_532_arg_0 ? var_532_arg_1 : var_532_arg_2; [L923] SORT_12 next_533_arg_1 = var_532; [L924] SORT_1 var_266_arg_0 = var_45; [L925] EXPR var_266_arg_0 & mask_SORT_1 [L925] var_266_arg_0 = var_266_arg_0 & mask_SORT_1 [L926] SORT_17 var_266 = var_266_arg_0; [L927] SORT_17 var_267_arg_0 = var_258; [L928] SORT_17 var_267_arg_1 = var_266; [L929] SORT_1 var_267 = var_267_arg_0 == var_267_arg_1; [L930] SORT_1 var_268_arg_0 = var_141; [L931] SORT_1 var_268_arg_1 = var_267; [L932] EXPR var_268_arg_0 & var_268_arg_1 [L932] SORT_1 var_268 = var_268_arg_0 & var_268_arg_1; [L933] EXPR var_268 & mask_SORT_1 [L933] var_268 = var_268 & mask_SORT_1 [L934] SORT_1 var_534_arg_0 = var_268; [L935] SORT_12 var_534_arg_1 = var_221; [L936] SORT_12 var_534_arg_2 = state_104; [L937] SORT_12 var_534 = var_534_arg_0 ? var_534_arg_1 : var_534_arg_2; [L938] SORT_1 var_535_arg_0 = input_10; [L939] SORT_12 var_535_arg_1 = var_485; [L940] SORT_12 var_535_arg_2 = var_534; [L941] SORT_12 var_535 = var_535_arg_0 ? var_535_arg_1 : var_535_arg_2; [L942] SORT_12 next_536_arg_1 = var_535; [L943] SORT_17 var_259_arg_0 = var_258; [L944] SORT_1 var_259 = var_259_arg_0 != 0; [L945] SORT_1 var_260_arg_0 = var_259; [L946] SORT_1 var_260 = ~var_260_arg_0; [L947] SORT_1 var_261_arg_0 = var_141; [L948] SORT_1 var_261_arg_1 = var_260; [L949] EXPR var_261_arg_0 & var_261_arg_1 [L949] SORT_1 var_261 = var_261_arg_0 & var_261_arg_1; [L950] EXPR var_261 & mask_SORT_1 [L950] var_261 = var_261 & mask_SORT_1 [L951] SORT_1 var_537_arg_0 = var_261; [L952] SORT_12 var_537_arg_1 = var_221; [L953] SORT_12 var_537_arg_2 = state_108; [L954] SORT_12 var_537 = var_537_arg_0 ? var_537_arg_1 : var_537_arg_2; [L955] SORT_1 var_538_arg_0 = input_10; [L956] SORT_12 var_538_arg_1 = var_485; [L957] SORT_12 var_538_arg_2 = var_537; [L958] SORT_12 var_538 = var_538_arg_0 ? var_538_arg_1 : var_538_arg_2; [L959] SORT_12 next_539_arg_1 = var_538; [L960] SORT_1 var_445_arg_0 = state_134; [L961] SORT_1 var_445 = ~var_445_arg_0; [L962] EXPR var_445 & mask_SORT_1 [L962] var_445 = var_445 & mask_SORT_1 [L963] SORT_1 var_440_arg_0 = input_11; [L964] SORT_1 var_440_arg_1 = var_141; [L965] EXPR var_440_arg_0 & var_440_arg_1 [L965] SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; [L966] SORT_1 var_441_arg_0 = var_440; [L967] SORT_1 var_441_arg_1 = var_141; [L968] EXPR var_441_arg_0 & var_441_arg_1 [L968] SORT_1 var_441 = var_441_arg_0 & var_441_arg_1; [L969] SORT_1 var_442_arg_0 = state_134; [L970] SORT_1 var_442_arg_1 = var_441; [L971] EXPR var_442_arg_0 | var_442_arg_1 [L971] SORT_1 var_442 = var_442_arg_0 | var_442_arg_1; [L972] SORT_1 var_540_arg_0 = var_445; [L973] SORT_1 var_540_arg_1 = var_442; [L974] SORT_1 var_540_arg_2 = state_134; [L975] SORT_1 var_540 = var_540_arg_0 ? var_540_arg_1 : var_540_arg_2; [L976] SORT_1 var_541_arg_0 = input_10; [L977] SORT_1 var_541_arg_1 = var_159; [L978] SORT_1 var_541_arg_2 = var_540; [L979] SORT_1 var_541 = var_541_arg_0 ? var_541_arg_1 : var_541_arg_2; [L980] SORT_1 next_542_arg_1 = var_541; [L981] SORT_1 var_453_arg_0 = var_152; [L982] SORT_1 var_453_arg_1 = state_135; [L983] EXPR var_453_arg_0 | var_453_arg_1 [L983] SORT_1 var_453 = var_453_arg_0 | var_453_arg_1; [L984] SORT_1 var_543_arg_0 = var_45; [L985] SORT_1 var_543_arg_1 = var_453; [L986] SORT_1 var_543_arg_2 = state_135; [L987] SORT_1 var_543 = var_543_arg_0 ? var_543_arg_1 : var_543_arg_2; [L988] SORT_1 var_544_arg_0 = input_10; [L989] SORT_1 var_544_arg_1 = var_159; [L990] SORT_1 var_544_arg_2 = var_543; [L991] SORT_1 var_544 = var_544_arg_0 ? var_544_arg_1 : var_544_arg_2; [L992] SORT_1 next_545_arg_1 = var_544; [L993] SORT_1 var_465_arg_0 = var_141; [L994] SORT_1 var_465_arg_1 = var_113; [L995] EXPR var_465_arg_0 | var_465_arg_1 [L995] SORT_1 var_465 = var_465_arg_0 | var_465_arg_1; [L996] SORT_1 var_466_arg_0 = var_465; [L997] SORT_1 var_466_arg_1 = input_10; [L998] EXPR var_466_arg_0 | var_466_arg_1 [L998] SORT_1 var_466 = var_466_arg_0 | var_466_arg_1; [L999] SORT_1 var_467_arg_0 = var_466; [L1000] SORT_1 var_467_arg_1 = state_134; [L1001] EXPR var_467_arg_0 | var_467_arg_1 [L1001] SORT_1 var_467 = var_467_arg_0 | var_467_arg_1; [L1002] EXPR var_467 & mask_SORT_1 [L1002] var_467 = var_467 & mask_SORT_1 [L1003] SORT_1 var_546_arg_0 = var_467; [L1004] SORT_57 var_546_arg_1 = var_149; [L1005] SORT_57 var_546_arg_2 = state_138; [L1006] SORT_57 var_546 = var_546_arg_0 ? var_546_arg_1 : var_546_arg_2; [L1007] SORT_1 var_547_arg_0 = input_10; [L1008] SORT_57 var_547_arg_1 = var_148; [L1009] SORT_57 var_547_arg_2 = var_546; [L1010] SORT_57 var_547 = var_547_arg_0 ? var_547_arg_1 : var_547_arg_2; [L1011] EXPR var_547 & mask_SORT_57 [L1011] var_547 = var_547 & mask_SORT_57 [L1012] SORT_57 next_548_arg_1 = var_547; [L1013] SORT_1 var_450_arg_0 = var_441; [L1014] SORT_1 var_450_arg_1 = var_445; [L1015] EXPR var_450_arg_0 & var_450_arg_1 [L1015] SORT_1 var_450 = var_450_arg_0 & var_450_arg_1; [L1016] EXPR var_450 & mask_SORT_1 [L1016] var_450 = var_450 & mask_SORT_1 [L1017] SORT_1 var_549_arg_0 = var_450; [L1018] SORT_12 var_549_arg_1 = var_221; [L1019] SORT_12 var_549_arg_2 = state_154; [L1020] SORT_12 var_549 = var_549_arg_0 ? var_549_arg_1 : var_549_arg_2; [L1021] SORT_1 var_550_arg_0 = input_10; [L1022] SORT_12 var_550_arg_1 = var_485; [L1023] SORT_12 var_550_arg_2 = var_549; [L1024] SORT_12 var_550 = var_550_arg_0 ? var_550_arg_1 : var_550_arg_2; [L1025] EXPR var_550 & mask_SORT_12 [L1025] var_550 = var_550 & mask_SORT_12 [L1026] SORT_12 next_551_arg_1 = var_550; [L1027] SORT_1 var_552_arg_0 = var_113; [L1028] EXPR var_552_arg_0 & mask_SORT_1 [L1028] var_552_arg_0 = var_552_arg_0 & mask_SORT_1 [L1029] SORT_15 var_552 = var_552_arg_0; [L1030] SORT_15 var_553_arg_0 = state_158; [L1031] SORT_15 var_553_arg_1 = var_552; [L1032] SORT_15 var_553 = var_553_arg_0 + var_553_arg_1; [L1033] SORT_1 var_554_arg_0 = var_141; [L1034] EXPR var_554_arg_0 & mask_SORT_1 [L1034] var_554_arg_0 = var_554_arg_0 & mask_SORT_1 [L1035] SORT_15 var_554 = var_554_arg_0; [L1036] SORT_15 var_555_arg_0 = var_553; [L1037] SORT_15 var_555_arg_1 = var_554; [L1038] SORT_15 var_555 = var_555_arg_0 - var_555_arg_1; [L1039] SORT_1 var_557_arg_0 = input_10; [L1040] SORT_15 var_557_arg_1 = var_556; [L1041] SORT_15 var_557_arg_2 = var_555; [L1042] SORT_15 var_557 = var_557_arg_0 ? var_557_arg_1 : var_557_arg_2; [L1043] EXPR var_557 & mask_SORT_15 [L1043] var_557 = var_557 & mask_SORT_15 [L1044] SORT_15 next_558_arg_1 = var_557; [L1045] SORT_1 var_559_arg_0 = var_53; [L1046] EXPR var_559_arg_0 & mask_SORT_1 [L1046] var_559_arg_0 = var_559_arg_0 & mask_SORT_1 [L1047] SORT_15 var_559 = var_559_arg_0; [L1048] SORT_15 var_560_arg_0 = state_167; [L1049] SORT_15 var_560_arg_1 = var_559; [L1050] SORT_15 var_560 = var_560_arg_0 + var_560_arg_1; [L1051] SORT_1 var_561_arg_0 = var_170; [L1052] EXPR var_561_arg_0 & mask_SORT_1 [L1052] var_561_arg_0 = var_561_arg_0 & mask_SORT_1 [L1053] SORT_15 var_561 = var_561_arg_0; [L1054] SORT_15 var_562_arg_0 = var_560; [L1055] SORT_15 var_562_arg_1 = var_561; [L1056] SORT_15 var_562 = var_562_arg_0 - var_562_arg_1; [L1057] SORT_1 var_563_arg_0 = input_10; [L1058] SORT_15 var_563_arg_1 = var_556; [L1059] SORT_15 var_563_arg_2 = var_562; [L1060] SORT_15 var_563 = var_563_arg_0 ? var_563_arg_1 : var_563_arg_2; [L1061] EXPR var_563 & mask_SORT_15 [L1061] var_563 = var_563 & mask_SORT_15 [L1062] SORT_15 next_564_arg_1 = var_563; [L1063] SORT_1 var_565_arg_0 = var_141; [L1064] EXPR var_565_arg_0 & mask_SORT_1 [L1064] var_565_arg_0 = var_565_arg_0 & mask_SORT_1 [L1065] SORT_15 var_565 = var_565_arg_0; [L1066] SORT_15 var_566_arg_0 = state_176; [L1067] SORT_15 var_566_arg_1 = var_565; [L1068] SORT_15 var_566 = var_566_arg_0 + var_566_arg_1; [L1069] SORT_1 var_567_arg_0 = var_113; [L1070] EXPR var_567_arg_0 & mask_SORT_1 [L1070] var_567_arg_0 = var_567_arg_0 & mask_SORT_1 [L1071] SORT_15 var_567 = var_567_arg_0; [L1072] SORT_15 var_568_arg_0 = var_566; [L1073] SORT_15 var_568_arg_1 = var_567; [L1074] SORT_15 var_568 = var_568_arg_0 - var_568_arg_1; [L1075] SORT_1 var_569_arg_0 = input_10; [L1076] SORT_15 var_569_arg_1 = var_489; [L1077] SORT_15 var_569_arg_2 = var_568; [L1078] SORT_15 var_569 = var_569_arg_0 ? var_569_arg_1 : var_569_arg_2; [L1079] EXPR var_569 & mask_SORT_15 [L1079] var_569 = var_569 & mask_SORT_15 [L1080] SORT_15 next_570_arg_1 = var_569; [L1081] SORT_1 var_571_arg_0 = var_170; [L1082] EXPR var_571_arg_0 & mask_SORT_1 [L1082] var_571_arg_0 = var_571_arg_0 & mask_SORT_1 [L1083] SORT_15 var_571 = var_571_arg_0; [L1084] SORT_15 var_572_arg_0 = state_185; [L1085] SORT_15 var_572_arg_1 = var_571; [L1086] SORT_15 var_572 = var_572_arg_0 + var_572_arg_1; [L1087] SORT_1 var_573_arg_0 = var_53; [L1088] EXPR var_573_arg_0 & mask_SORT_1 [L1088] var_573_arg_0 = var_573_arg_0 & mask_SORT_1 [L1089] SORT_15 var_573 = var_573_arg_0; [L1090] SORT_15 var_574_arg_0 = var_572; [L1091] SORT_15 var_574_arg_1 = var_573; [L1092] SORT_15 var_574 = var_574_arg_0 - var_574_arg_1; [L1093] SORT_1 var_575_arg_0 = input_10; [L1094] SORT_15 var_575_arg_1 = var_489; [L1095] SORT_15 var_575_arg_2 = var_574; [L1096] SORT_15 var_575 = var_575_arg_0 ? var_575_arg_1 : var_575_arg_2; [L1097] EXPR var_575 & mask_SORT_15 [L1097] var_575 = var_575 & mask_SORT_15 [L1098] SORT_15 next_576_arg_1 = var_575; [L1099] SORT_1 next_577_arg_1 = var_159; [L1100] SORT_1 var_315_arg_0 = var_141; [L1101] EXPR var_315_arg_0 & mask_SORT_1 [L1101] var_315_arg_0 = var_315_arg_0 & mask_SORT_1 [L1102] SORT_15 var_315 = var_315_arg_0; [L1103] SORT_15 var_316_arg_0 = state_257; [L1104] SORT_15 var_316_arg_1 = var_315; [L1105] SORT_15 var_316 = var_316_arg_0 + var_316_arg_1; [L1106] SORT_1 var_578_arg_0 = var_242; [L1107] SORT_15 var_578_arg_1 = var_316; [L1108] SORT_15 var_578_arg_2 = state_257; [L1109] SORT_15 var_578 = var_578_arg_0 ? var_578_arg_1 : var_578_arg_2; [L1110] SORT_1 var_579_arg_0 = input_10; [L1111] SORT_15 var_579_arg_1 = var_489; [L1112] SORT_15 var_579_arg_2 = var_578; [L1113] SORT_15 var_579 = var_579_arg_0 ? var_579_arg_1 : var_579_arg_2; [L1114] SORT_15 next_580_arg_1 = var_579; [L1115] SORT_1 var_410_arg_0 = var_170; [L1116] EXPR var_410_arg_0 & mask_SORT_1 [L1116] var_410_arg_0 = var_410_arg_0 & mask_SORT_1 [L1117] SORT_15 var_410 = var_410_arg_0; [L1118] SORT_15 var_411_arg_0 = state_352; [L1119] SORT_15 var_411_arg_1 = var_410; [L1120] SORT_15 var_411 = var_411_arg_0 + var_411_arg_1; [L1121] SORT_1 var_581_arg_0 = var_337; [L1122] SORT_15 var_581_arg_1 = var_411; [L1123] SORT_15 var_581_arg_2 = state_352; [L1124] SORT_15 var_581 = var_581_arg_0 ? var_581_arg_1 : var_581_arg_2; [L1125] SORT_1 var_582_arg_0 = input_10; [L1126] SORT_15 var_582_arg_1 = var_489; [L1127] SORT_15 var_582_arg_2 = var_581; [L1128] SORT_15 var_582 = var_582_arg_0 ? var_582_arg_1 : var_582_arg_2; [L1129] SORT_15 next_583_arg_1 = var_582; [L1131] state_14 = next_487_arg_1 [L1132] state_16 = next_491_arg_1 [L1133] state_22 = next_494_arg_1 [L1134] state_26 = next_497_arg_1 [L1135] state_30 = next_500_arg_1 [L1136] state_34 = next_503_arg_1 [L1137] state_39 = next_506_arg_1 [L1138] state_44 = next_509_arg_1 [L1139] state_49 = next_512_arg_1 [L1140] state_82 = next_515_arg_1 [L1141] state_83 = next_518_arg_1 [L1142] state_87 = next_521_arg_1 [L1143] state_90 = next_524_arg_1 [L1144] state_93 = next_527_arg_1 [L1145] state_96 = next_530_arg_1 [L1146] state_100 = next_533_arg_1 [L1147] state_104 = next_536_arg_1 [L1148] state_108 = next_539_arg_1 [L1149] state_134 = next_542_arg_1 [L1150] state_135 = next_545_arg_1 [L1151] state_138 = next_548_arg_1 [L1152] state_154 = next_551_arg_1 [L1153] state_158 = next_558_arg_1 [L1154] state_167 = next_564_arg_1 [L1155] state_176 = next_570_arg_1 [L1156] state_185 = next_576_arg_1 [L1157] state_194 = next_577_arg_1 [L1158] state_257 = next_580_arg_1 [L1159] state_352 = next_583_arg_1 [L137] input_2 = __VERIFIER_nondet_uchar() [L138] input_3 = __VERIFIER_nondet_uchar() [L139] input_5 = __VERIFIER_nondet_uint() [L140] input_6 = __VERIFIER_nondet_uchar() [L141] input_8 = __VERIFIER_nondet_uchar() [L142] input_9 = __VERIFIER_nondet_uchar() [L143] input_10 = __VERIFIER_nondet_uchar() [L144] EXPR input_10 & mask_SORT_1 [L144] input_10 = input_10 & mask_SORT_1 [L145] input_11 = __VERIFIER_nondet_uchar() [L146] input_13 = __VERIFIER_nondet_ushort() [L147] input_81 = __VERIFIER_nondet_ushort() [L148] input_213 = __VERIFIER_nondet_uchar() [L150] SORT_1 var_160_arg_0 = var_159; [L151] EXPR var_160_arg_0 & mask_SORT_1 [L151] var_160_arg_0 = var_160_arg_0 & mask_SORT_1 [L152] SORT_15 var_160 = var_160_arg_0; [L153] SORT_15 var_161_arg_0 = state_158; [L154] SORT_15 var_161_arg_1 = var_160; [L155] SORT_1 var_161 = var_161_arg_0 > var_161_arg_1; [L156] SORT_7 var_141_arg_0 = input_8; [L157] SORT_1 var_141 = var_141_arg_0 >> 0; [L158] SORT_1 var_162_arg_0 = var_141; [L159] SORT_1 var_162 = ~var_162_arg_0; [L160] SORT_1 var_163_arg_0 = var_161; [L161] SORT_1 var_163_arg_1 = var_162; [L162] EXPR var_163_arg_0 | var_163_arg_1 [L162] SORT_1 var_163 = var_163_arg_0 | var_163_arg_1; [L163] SORT_1 var_164_arg_0 = var_45; [L164] SORT_1 var_164 = ~var_164_arg_0; [L165] SORT_1 var_165_arg_0 = var_163; [L166] SORT_1 var_165_arg_1 = var_164; [L167] EXPR var_165_arg_0 | var_165_arg_1 [L167] SORT_1 var_165 = var_165_arg_0 | var_165_arg_1; [L168] EXPR var_165 & mask_SORT_1 [L168] var_165 = var_165 & mask_SORT_1 [L169] SORT_1 constr_166_arg_0 = var_165; VAL [constr_166_arg_0=1, input_10=0, input_8=254, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_141=254, var_148=0, var_159=0, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L170] CALL assume_abort_if_not(constr_166_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L170] RET assume_abort_if_not(constr_166_arg_0) VAL [constr_166_arg_0=1, input_10=0, input_8=254, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_141=254, var_148=0, var_159=0, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L171] SORT_1 var_168_arg_0 = var_159; [L172] EXPR var_168_arg_0 & mask_SORT_1 [L172] var_168_arg_0 = var_168_arg_0 & mask_SORT_1 [L173] SORT_15 var_168 = var_168_arg_0; [L174] SORT_15 var_169_arg_0 = state_167; [L175] SORT_15 var_169_arg_1 = var_168; [L176] SORT_1 var_169 = var_169_arg_0 > var_169_arg_1; [L177] SORT_7 var_170_arg_0 = input_8; [L178] SORT_1 var_170 = var_170_arg_0 >> 1; [L179] SORT_1 var_171_arg_0 = var_170; [L180] SORT_1 var_171 = ~var_171_arg_0; [L181] SORT_1 var_172_arg_0 = var_169; [L182] SORT_1 var_172_arg_1 = var_171; [L183] EXPR var_172_arg_0 | var_172_arg_1 [L183] SORT_1 var_172 = var_172_arg_0 | var_172_arg_1; [L184] SORT_1 var_173_arg_0 = var_45; [L185] SORT_1 var_173 = ~var_173_arg_0; [L186] SORT_1 var_174_arg_0 = var_172; [L187] SORT_1 var_174_arg_1 = var_173; [L188] EXPR var_174_arg_0 | var_174_arg_1 [L188] SORT_1 var_174 = var_174_arg_0 | var_174_arg_1; [L189] EXPR var_174 & mask_SORT_1 [L189] var_174 = var_174 & mask_SORT_1 [L190] SORT_1 constr_175_arg_0 = var_174; VAL [constr_166_arg_0=1, constr_175_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L191] CALL assume_abort_if_not(constr_175_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L191] RET assume_abort_if_not(constr_175_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L192] SORT_15 var_177_arg_0 = state_176; [L193] SORT_1 var_177 = var_177_arg_0 != 0; [L194] SORT_1 var_178_arg_0 = var_177; [L195] SORT_1 var_178 = ~var_178_arg_0; [L196] EXPR var_178 & mask_SORT_1 [L196] var_178 = var_178 & mask_SORT_1 [L197] SORT_1 var_179_arg_0 = var_178; [L198] SORT_1 var_179 = ~var_179_arg_0; [L199] SORT_1 var_112_arg_0 = input_6; [L200] SORT_1 var_112 = ~var_112_arg_0; [L201] SORT_1 var_113_arg_0 = input_9; [L202] SORT_1 var_113_arg_1 = var_112; [L203] EXPR var_113_arg_0 & var_113_arg_1 [L203] SORT_1 var_113 = var_113_arg_0 & var_113_arg_1; [L204] EXPR var_113 & mask_SORT_1 [L204] var_113 = var_113 & mask_SORT_1 [L205] SORT_1 var_180_arg_0 = var_113; [L206] SORT_1 var_180 = ~var_180_arg_0; [L207] SORT_1 var_181_arg_0 = var_179; [L208] SORT_1 var_181_arg_1 = var_180; [L209] EXPR var_181_arg_0 | var_181_arg_1 [L209] SORT_1 var_181 = var_181_arg_0 | var_181_arg_1; [L210] SORT_1 var_182_arg_0 = var_45; [L211] SORT_1 var_182 = ~var_182_arg_0; [L212] SORT_1 var_183_arg_0 = var_181; [L213] SORT_1 var_183_arg_1 = var_182; [L214] EXPR var_183_arg_0 | var_183_arg_1 [L214] SORT_1 var_183 = var_183_arg_0 | var_183_arg_1; [L215] EXPR var_183 & mask_SORT_1 [L215] var_183 = var_183 & mask_SORT_1 [L216] SORT_1 constr_184_arg_0 = var_183; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, input_10=0, input_6=249, input_9=249, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L217] CALL assume_abort_if_not(constr_184_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L217] RET assume_abort_if_not(constr_184_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, input_10=0, input_6=249, input_9=249, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_556=9] [L218] SORT_15 var_186_arg_0 = state_185; [L219] SORT_1 var_186 = var_186_arg_0 != 0; [L220] SORT_1 var_187_arg_0 = var_186; [L221] SORT_1 var_187 = ~var_187_arg_0; [L222] SORT_1 var_188_arg_0 = var_187; [L223] SORT_1 var_188 = ~var_188_arg_0; [L224] SORT_1 var_53_arg_0 = input_9; [L225] SORT_1 var_53_arg_1 = input_6; [L226] EXPR var_53_arg_0 & var_53_arg_1 [L226] SORT_1 var_53 = var_53_arg_0 & var_53_arg_1; [L227] EXPR var_53 & mask_SORT_1 [L227] var_53 = var_53 & mask_SORT_1 [L228] SORT_1 var_189_arg_0 = var_53; [L229] SORT_1 var_189 = ~var_189_arg_0; [L230] SORT_1 var_190_arg_0 = var_188; [L231] SORT_1 var_190_arg_1 = var_189; [L232] EXPR var_190_arg_0 | var_190_arg_1 [L232] SORT_1 var_190 = var_190_arg_0 | var_190_arg_1; [L233] SORT_1 var_191_arg_0 = var_45; [L234] SORT_1 var_191 = ~var_191_arg_0; [L235] SORT_1 var_192_arg_0 = var_190; [L236] SORT_1 var_192_arg_1 = var_191; [L237] EXPR var_192_arg_0 | var_192_arg_1 [L237] SORT_1 var_192 = var_192_arg_0 | var_192_arg_1; [L238] EXPR var_192 & mask_SORT_1 [L238] var_192 = var_192 & mask_SORT_1 [L239] SORT_1 constr_193_arg_0 = var_192; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L240] CALL assume_abort_if_not(constr_193_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L240] RET assume_abort_if_not(constr_193_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L241] SORT_1 var_196_arg_0 = input_10; [L242] SORT_1 var_196_arg_1 = state_194; [L243] SORT_1 var_196 = var_196_arg_0 == var_196_arg_1; [L244] SORT_1 var_197_arg_0 = var_45; [L245] SORT_1 var_197 = ~var_197_arg_0; [L246] SORT_1 var_198_arg_0 = var_196; [L247] SORT_1 var_198_arg_1 = var_197; [L248] EXPR var_198_arg_0 | var_198_arg_1 [L248] SORT_1 var_198 = var_198_arg_0 | var_198_arg_1; [L249] EXPR var_198 & mask_SORT_1 [L249] var_198 = var_198 & mask_SORT_1 [L250] SORT_1 constr_199_arg_0 = var_198; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L251] CALL assume_abort_if_not(constr_199_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L251] RET assume_abort_if_not(constr_199_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L252] SORT_15 var_201_arg_0 = state_158; [L253] SORT_15 var_201_arg_1 = var_200; [L254] SORT_1 var_201 = var_201_arg_0 != var_201_arg_1; [L255] SORT_1 var_202_arg_0 = var_113; [L256] SORT_1 var_202 = ~var_202_arg_0; [L257] SORT_1 var_203_arg_0 = var_201; [L258] SORT_1 var_203_arg_1 = var_202; [L259] EXPR var_203_arg_0 | var_203_arg_1 [L259] SORT_1 var_203 = var_203_arg_0 | var_203_arg_1; [L260] SORT_1 var_204_arg_0 = var_45; [L261] SORT_1 var_204 = ~var_204_arg_0; [L262] SORT_1 var_205_arg_0 = var_203; [L263] SORT_1 var_205_arg_1 = var_204; [L264] EXPR var_205_arg_0 | var_205_arg_1 [L264] SORT_1 var_205 = var_205_arg_0 | var_205_arg_1; [L265] EXPR var_205 & mask_SORT_1 [L265] var_205 = var_205 & mask_SORT_1 [L266] SORT_1 constr_206_arg_0 = var_205; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, constr_206_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L267] CALL assume_abort_if_not(constr_206_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L267] RET assume_abort_if_not(constr_206_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, constr_206_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L268] SORT_15 var_207_arg_0 = state_167; [L269] SORT_15 var_207_arg_1 = var_200; [L270] SORT_1 var_207 = var_207_arg_0 != var_207_arg_1; [L271] SORT_1 var_208_arg_0 = var_53; [L272] SORT_1 var_208 = ~var_208_arg_0; [L273] SORT_1 var_209_arg_0 = var_207; [L274] SORT_1 var_209_arg_1 = var_208; [L275] EXPR var_209_arg_0 | var_209_arg_1 [L275] SORT_1 var_209 = var_209_arg_0 | var_209_arg_1; [L276] SORT_1 var_210_arg_0 = var_45; [L277] SORT_1 var_210 = ~var_210_arg_0; [L278] SORT_1 var_211_arg_0 = var_209; [L279] SORT_1 var_211_arg_1 = var_210; [L280] EXPR var_211_arg_0 | var_211_arg_1 [L280] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L281] EXPR var_211 & mask_SORT_1 [L281] var_211 = var_211 & mask_SORT_1 [L282] SORT_1 constr_212_arg_0 = var_211; VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, constr_206_arg_0=1, constr_212_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L283] CALL assume_abort_if_not(constr_212_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) [L283] RET assume_abort_if_not(constr_212_arg_0) VAL [constr_166_arg_0=1, constr_175_arg_0=1, constr_184_arg_0=1, constr_193_arg_0=1, constr_199_arg_0=1, constr_206_arg_0=1, constr_212_arg_0=1, input_10=0, mask_SORT_12=65535, mask_SORT_15=15, mask_SORT_17=7, mask_SORT_1=1, mask_SORT_57=31, mask_SORT_59=63, mask_SORT_61=127, mask_SORT_63=255, mask_SORT_65=511, mask_SORT_67=1023, mask_SORT_69=2047, mask_SORT_71=4095, mask_SORT_73=8191, mask_SORT_75=16383, mask_SORT_77=32767, mask_SORT_7=3, state_100=1, state_104=1, state_108=0, state_134=1, state_135=0, state_138=0, state_14=1, state_154=0, state_158=7, state_167=0, state_16=7, state_176=0, state_185=0, state_194=0, state_22=0, state_257=16, state_26=1, state_30=1, state_34=0, state_352=16, state_39=0, state_44=1, state_49=0, state_82=65534, state_83=0, state_87=0, state_90=0, state_93=1, state_96=0, var_113=0, var_141=254, var_148=0, var_159=0, var_170=127, var_19=7, var_200=8, var_23=6, var_27=5, var_31=4, var_35=3, var_40=2, var_45=1, var_485=0, var_489=0, var_53=1, var_556=9] [L285] SORT_1 var_215_arg_0 = state_194; [L286] SORT_1 var_215_arg_1 = var_159; [L287] SORT_1 var_215_arg_2 = var_45; [L288] SORT_1 var_215 = var_215_arg_0 ? var_215_arg_1 : var_215_arg_2; [L289] SORT_1 var_136_arg_0 = state_135; [L290] SORT_1 var_136 = ~var_136_arg_0; [L291] SORT_1 var_137_arg_0 = state_134; [L292] SORT_1 var_137_arg_1 = var_136; [L293] EXPR var_137_arg_0 & var_137_arg_1 [L293] SORT_1 var_137 = var_137_arg_0 & var_137_arg_1; [L294] SORT_57 var_139_arg_0 = state_138; [L295] SORT_1 var_139 = var_139_arg_0 != 0; [L296] SORT_1 var_140_arg_0 = var_137; [L297] SORT_1 var_140_arg_1 = var_139; [L298] EXPR var_140_arg_0 & var_140_arg_1 [L298] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L299] SORT_1 var_142_arg_0 = state_134; [L300] SORT_1 var_142 = ~var_142_arg_0; [L301] SORT_1 var_143_arg_0 = var_141; [L302] SORT_1 var_143_arg_1 = var_142; [L303] EXPR var_143_arg_0 & var_143_arg_1 [L303] SORT_1 var_143 = var_143_arg_0 & var_143_arg_1; [L304] SORT_1 var_144_arg_0 = var_143; [L305] EXPR var_144_arg_0 & mask_SORT_1 [L305] var_144_arg_0 = var_144_arg_0 & mask_SORT_1 [L306] SORT_57 var_144 = var_144_arg_0; [L307] SORT_57 var_145_arg_0 = state_138; [L308] SORT_57 var_145_arg_1 = var_144; [L309] SORT_57 var_145 = var_145_arg_0 + var_145_arg_1; [L310] SORT_1 var_146_arg_0 = var_113; [L311] EXPR var_146_arg_0 & mask_SORT_1 [L311] var_146_arg_0 = var_146_arg_0 & mask_SORT_1 [L312] SORT_57 var_146 = var_146_arg_0; [L313] SORT_57 var_147_arg_0 = var_145; [L314] SORT_57 var_147_arg_1 = var_146; [L315] SORT_57 var_147 = var_147_arg_0 - var_147_arg_1; [L316] SORT_1 var_149_arg_0 = input_10; [L317] SORT_57 var_149_arg_1 = var_148; [L318] SORT_57 var_149_arg_2 = var_147; [L319] SORT_57 var_149 = var_149_arg_0 ? var_149_arg_1 : var_149_arg_2; [L320] EXPR var_149 & mask_SORT_57 [L320] var_149 = var_149 & mask_SORT_57 [L321] SORT_57 var_150_arg_0 = var_149; [L322] SORT_1 var_150 = var_150_arg_0 != 0; [L323] SORT_1 var_151_arg_0 = var_150; [L324] SORT_1 var_151 = ~var_151_arg_0; [L325] SORT_1 var_152_arg_0 = var_140; [L326] SORT_1 var_152_arg_1 = var_151; [L327] EXPR var_152_arg_0 & var_152_arg_1 [L327] SORT_1 var_152 = var_152_arg_0 & var_152_arg_1; [L328] SORT_1 var_153_arg_0 = var_152; [L329] SORT_1 var_153 = ~var_153_arg_0; [L330] SORT_15 var_18_arg_0 = state_16; [L331] SORT_17 var_18 = var_18_arg_0 >> 0; [L332] EXPR var_18 & mask_SORT_17 [L332] var_18 = var_18 & mask_SORT_17 [L333] SORT_17 var_50_arg_0 = var_18; [L334] SORT_1 var_50 = var_50_arg_0 != 0; [L335] SORT_1 var_51_arg_0 = var_50; [L336] SORT_1 var_51 = ~var_51_arg_0; [L337] EXPR var_51 & mask_SORT_1 [L337] var_51 = var_51 & mask_SORT_1 [L338] SORT_1 var_46_arg_0 = var_45; [L339] EXPR var_46_arg_0 & mask_SORT_1 [L339] var_46_arg_0 = var_46_arg_0 & mask_SORT_1 [L340] SORT_17 var_46 = var_46_arg_0; [L341] SORT_17 var_47_arg_0 = var_18; [L342] SORT_17 var_47_arg_1 = var_46; [L343] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L344] SORT_7 var_41_arg_0 = var_40; [L345] EXPR var_41_arg_0 & mask_SORT_7 [L345] var_41_arg_0 = var_41_arg_0 & mask_SORT_7 [L346] SORT_17 var_41 = var_41_arg_0; [L347] SORT_17 var_42_arg_0 = var_18; [L348] SORT_17 var_42_arg_1 = var_41; [L349] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L350] SORT_7 var_36_arg_0 = var_35; [L351] EXPR var_36_arg_0 & mask_SORT_7 [L351] var_36_arg_0 = var_36_arg_0 & mask_SORT_7 [L352] SORT_17 var_36 = var_36_arg_0; [L353] SORT_17 var_37_arg_0 = var_18; [L354] SORT_17 var_37_arg_1 = var_36; [L355] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L356] SORT_17 var_32_arg_0 = var_18; [L357] SORT_17 var_32_arg_1 = var_31; [L358] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L359] SORT_17 var_28_arg_0 = var_18; [L360] SORT_17 var_28_arg_1 = var_27; [L361] SORT_1 var_28 = var_28_arg_0 == var_28_arg_1; [L362] SORT_17 var_24_arg_0 = var_18; [L363] SORT_17 var_24_arg_1 = var_23; [L364] SORT_1 var_24 = var_24_arg_0 == var_24_arg_1; [L365] SORT_17 var_20_arg_0 = var_18; [L366] SORT_17 var_20_arg_1 = var_19; [L367] SORT_1 var_20 = var_20_arg_0 == var_20_arg_1; [L368] SORT_1 var_21_arg_0 = var_20; [L369] SORT_12 var_21_arg_1 = state_14; [L370] SORT_12 var_21_arg_2 = input_13; [L371] SORT_12 var_21 = var_21_arg_0 ? var_21_arg_1 : var_21_arg_2; [L372] SORT_1 var_25_arg_0 = var_24; [L373] SORT_12 var_25_arg_1 = state_22; [L374] SORT_12 var_25_arg_2 = var_21; [L375] SORT_12 var_25 = var_25_arg_0 ? var_25_arg_1 : var_25_arg_2; [L376] SORT_1 var_29_arg_0 = var_28; [L377] SORT_12 var_29_arg_1 = state_26; [L378] SORT_12 var_29_arg_2 = var_25; [L379] SORT_12 var_29 = var_29_arg_0 ? var_29_arg_1 : var_29_arg_2; [L380] SORT_1 var_33_arg_0 = var_32; [L381] SORT_12 var_33_arg_1 = state_30; [L382] SORT_12 var_33_arg_2 = var_29; [L383] SORT_12 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L384] SORT_1 var_38_arg_0 = var_37; [L385] SORT_12 var_38_arg_1 = state_34; [L386] SORT_12 var_38_arg_2 = var_33; [L387] SORT_12 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L388] SORT_1 var_43_arg_0 = var_42; [L389] SORT_12 var_43_arg_1 = state_39; [L390] SORT_12 var_43_arg_2 = var_38; [L391] SORT_12 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L392] SORT_1 var_48_arg_0 = var_47; [L393] SORT_12 var_48_arg_1 = state_44; [L394] SORT_12 var_48_arg_2 = var_43; [L395] SORT_12 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L396] SORT_1 var_52_arg_0 = var_51; [L397] SORT_12 var_52_arg_1 = state_49; [L398] SORT_12 var_52_arg_2 = var_48; [L399] SORT_12 var_52 = var_52_arg_0 ? var_52_arg_1 : var_52_arg_2; [L400] SORT_1 var_54_arg_0 = var_53; [L401] SORT_1 var_54_arg_1 = var_53; [L402] EXPR ((SORT_7)var_54_arg_0 << 1) | var_54_arg_1 [L402] SORT_7 var_54 = ((SORT_7)var_54_arg_0 << 1) | var_54_arg_1; [L403] EXPR var_54 & mask_SORT_7 [L403] var_54 = var_54 & mask_SORT_7 [L404] SORT_1 var_55_arg_0 = var_53; [L405] SORT_7 var_55_arg_1 = var_54; [L406] EXPR ((SORT_17)var_55_arg_0 << 2) | var_55_arg_1 [L406] SORT_17 var_55 = ((SORT_17)var_55_arg_0 << 2) | var_55_arg_1; [L407] EXPR var_55 & mask_SORT_17 [L407] var_55 = var_55 & mask_SORT_17 [L408] SORT_1 var_56_arg_0 = var_53; [L409] SORT_17 var_56_arg_1 = var_55; [L410] EXPR ((SORT_15)var_56_arg_0 << 3) | var_56_arg_1 [L410] SORT_15 var_56 = ((SORT_15)var_56_arg_0 << 3) | var_56_arg_1; [L411] EXPR var_56 & mask_SORT_15 [L411] var_56 = var_56 & mask_SORT_15 [L412] SORT_1 var_58_arg_0 = var_53; [L413] SORT_15 var_58_arg_1 = var_56; [L414] EXPR ((SORT_57)var_58_arg_0 << 4) | var_58_arg_1 [L414] SORT_57 var_58 = ((SORT_57)var_58_arg_0 << 4) | var_58_arg_1; [L415] EXPR var_58 & mask_SORT_57 [L415] var_58 = var_58 & mask_SORT_57 [L416] SORT_1 var_60_arg_0 = var_53; [L417] SORT_57 var_60_arg_1 = var_58; [L418] EXPR ((SORT_59)var_60_arg_0 << 5) | var_60_arg_1 [L418] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 5) | var_60_arg_1; [L419] EXPR var_60 & mask_SORT_59 [L419] var_60 = var_60 & mask_SORT_59 [L420] SORT_1 var_62_arg_0 = var_53; [L421] SORT_59 var_62_arg_1 = var_60; [L422] EXPR ((SORT_61)var_62_arg_0 << 6) | var_62_arg_1 [L422] SORT_61 var_62 = ((SORT_61)var_62_arg_0 << 6) | var_62_arg_1; [L423] EXPR var_62 & mask_SORT_61 [L423] var_62 = var_62 & mask_SORT_61 [L424] SORT_1 var_64_arg_0 = var_53; [L425] SORT_61 var_64_arg_1 = var_62; [L426] EXPR ((SORT_63)var_64_arg_0 << 7) | var_64_arg_1 [L426] SORT_63 var_64 = ((SORT_63)var_64_arg_0 << 7) | var_64_arg_1; [L427] EXPR var_64 & mask_SORT_63 [L427] var_64 = var_64 & mask_SORT_63 [L428] SORT_1 var_66_arg_0 = var_53; [L429] SORT_63 var_66_arg_1 = var_64; [L430] EXPR ((SORT_65)var_66_arg_0 << 8) | var_66_arg_1 [L430] SORT_65 var_66 = ((SORT_65)var_66_arg_0 << 8) | var_66_arg_1; [L431] EXPR var_66 & mask_SORT_65 [L431] var_66 = var_66 & mask_SORT_65 [L432] SORT_1 var_68_arg_0 = var_53; [L433] SORT_65 var_68_arg_1 = var_66; [L434] EXPR ((SORT_67)var_68_arg_0 << 9) | var_68_arg_1 [L434] SORT_67 var_68 = ((SORT_67)var_68_arg_0 << 9) | var_68_arg_1; [L435] EXPR var_68 & mask_SORT_67 [L435] var_68 = var_68 & mask_SORT_67 [L436] SORT_1 var_70_arg_0 = var_53; [L437] SORT_67 var_70_arg_1 = var_68; [L438] EXPR ((SORT_69)var_70_arg_0 << 10) | var_70_arg_1 [L438] SORT_69 var_70 = ((SORT_69)var_70_arg_0 << 10) | var_70_arg_1; [L439] EXPR var_70 & mask_SORT_69 [L439] var_70 = var_70 & mask_SORT_69 [L440] SORT_1 var_72_arg_0 = var_53; [L441] SORT_69 var_72_arg_1 = var_70; [L442] EXPR ((SORT_71)var_72_arg_0 << 11) | var_72_arg_1 [L442] SORT_71 var_72 = ((SORT_71)var_72_arg_0 << 11) | var_72_arg_1; [L443] EXPR var_72 & mask_SORT_71 [L443] var_72 = var_72 & mask_SORT_71 [L444] SORT_1 var_74_arg_0 = var_53; [L445] SORT_71 var_74_arg_1 = var_72; [L446] EXPR ((SORT_73)var_74_arg_0 << 12) | var_74_arg_1 [L446] SORT_73 var_74 = ((SORT_73)var_74_arg_0 << 12) | var_74_arg_1; [L447] EXPR var_74 & mask_SORT_73 [L447] var_74 = var_74 & mask_SORT_73 [L448] SORT_1 var_76_arg_0 = var_53; [L449] SORT_73 var_76_arg_1 = var_74; [L450] EXPR ((SORT_75)var_76_arg_0 << 13) | var_76_arg_1 [L450] SORT_75 var_76 = ((SORT_75)var_76_arg_0 << 13) | var_76_arg_1; [L451] EXPR var_76 & mask_SORT_75 [L451] var_76 = var_76 & mask_SORT_75 [L452] SORT_1 var_78_arg_0 = var_53; [L453] SORT_75 var_78_arg_1 = var_76; [L454] EXPR ((SORT_77)var_78_arg_0 << 14) | var_78_arg_1 [L454] SORT_77 var_78 = ((SORT_77)var_78_arg_0 << 14) | var_78_arg_1; [L455] EXPR var_78 & mask_SORT_77 [L455] var_78 = var_78 & mask_SORT_77 [L456] SORT_1 var_79_arg_0 = var_53; [L457] SORT_77 var_79_arg_1 = var_78; [L458] EXPR ((SORT_12)var_79_arg_0 << 15) | var_79_arg_1 [L458] SORT_12 var_79 = ((SORT_12)var_79_arg_0 << 15) | var_79_arg_1; [L459] SORT_12 var_80_arg_0 = var_52; [L460] SORT_12 var_80_arg_1 = var_79; [L461] EXPR var_80_arg_0 & var_80_arg_1 [L461] SORT_12 var_80 = var_80_arg_0 & var_80_arg_1; [L462] SORT_15 var_84_arg_0 = state_83; [L463] SORT_17 var_84 = var_84_arg_0 >> 0; [L464] EXPR var_84 & mask_SORT_17 [L464] var_84 = var_84 & mask_SORT_17 [L465] SORT_17 var_109_arg_0 = var_84; [L466] SORT_1 var_109 = var_109_arg_0 != 0; [L467] SORT_1 var_110_arg_0 = var_109; [L468] SORT_1 var_110 = ~var_110_arg_0; [L469] EXPR var_110 & mask_SORT_1 [L469] var_110 = var_110 & mask_SORT_1 [L470] SORT_1 var_105_arg_0 = var_45; [L471] EXPR var_105_arg_0 & mask_SORT_1 [L471] var_105_arg_0 = var_105_arg_0 & mask_SORT_1 [L472] SORT_17 var_105 = var_105_arg_0; [L473] SORT_17 var_106_arg_0 = var_84; [L474] SORT_17 var_106_arg_1 = var_105; [L475] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L476] SORT_7 var_101_arg_0 = var_40; [L477] EXPR var_101_arg_0 & mask_SORT_7 [L477] var_101_arg_0 = var_101_arg_0 & mask_SORT_7 [L478] SORT_17 var_101 = var_101_arg_0; [L479] SORT_17 var_102_arg_0 = var_84; [L480] SORT_17 var_102_arg_1 = var_101; [L481] SORT_1 var_102 = var_102_arg_0 == var_102_arg_1; [L482] SORT_7 var_97_arg_0 = var_35; [L483] EXPR var_97_arg_0 & mask_SORT_7 [L483] var_97_arg_0 = var_97_arg_0 & mask_SORT_7 [L484] SORT_17 var_97 = var_97_arg_0; [L485] SORT_17 var_98_arg_0 = var_84; [L486] SORT_17 var_98_arg_1 = var_97; [L487] SORT_1 var_98 = var_98_arg_0 == var_98_arg_1; [L488] SORT_17 var_94_arg_0 = var_84; [L489] SORT_17 var_94_arg_1 = var_31; [L490] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L491] SORT_17 var_91_arg_0 = var_84; [L492] SORT_17 var_91_arg_1 = var_27; [L493] SORT_1 var_91 = var_91_arg_0 == var_91_arg_1; [L494] SORT_17 var_88_arg_0 = var_84; [L495] SORT_17 var_88_arg_1 = var_23; [L496] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L497] SORT_17 var_85_arg_0 = var_84; [L498] SORT_17 var_85_arg_1 = var_19; [L499] SORT_1 var_85 = var_85_arg_0 == var_85_arg_1; [L500] SORT_1 var_86_arg_0 = var_85; [L501] SORT_12 var_86_arg_1 = state_82; [L502] SORT_12 var_86_arg_2 = input_81; [L503] SORT_12 var_86 = var_86_arg_0 ? var_86_arg_1 : var_86_arg_2; [L504] SORT_1 var_89_arg_0 = var_88; [L505] SORT_12 var_89_arg_1 = state_87; [L506] SORT_12 var_89_arg_2 = var_86; [L507] SORT_12 var_89 = var_89_arg_0 ? var_89_arg_1 : var_89_arg_2; [L508] SORT_1 var_92_arg_0 = var_91; [L509] SORT_12 var_92_arg_1 = state_90; [L510] SORT_12 var_92_arg_2 = var_89; [L511] SORT_12 var_92 = var_92_arg_0 ? var_92_arg_1 : var_92_arg_2; [L512] SORT_1 var_95_arg_0 = var_94; [L513] SORT_12 var_95_arg_1 = state_93; [L514] SORT_12 var_95_arg_2 = var_92; [L515] SORT_12 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L516] SORT_1 var_99_arg_0 = var_98; [L517] SORT_12 var_99_arg_1 = state_96; [L518] SORT_12 var_99_arg_2 = var_95; [L519] SORT_12 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; [L520] SORT_1 var_103_arg_0 = var_102; [L521] SORT_12 var_103_arg_1 = state_100; [L522] SORT_12 var_103_arg_2 = var_99; [L523] SORT_12 var_103 = var_103_arg_0 ? var_103_arg_1 : var_103_arg_2; [L524] SORT_1 var_107_arg_0 = var_106; [L525] SORT_12 var_107_arg_1 = state_104; [L526] SORT_12 var_107_arg_2 = var_103; [L527] SORT_12 var_107 = var_107_arg_0 ? var_107_arg_1 : var_107_arg_2; [L528] SORT_1 var_111_arg_0 = var_110; [L529] SORT_12 var_111_arg_1 = state_108; [L530] SORT_12 var_111_arg_2 = var_107; [L531] SORT_12 var_111 = var_111_arg_0 ? var_111_arg_1 : var_111_arg_2; [L532] EXPR var_111 & mask_SORT_12 [L532] var_111 = var_111 & mask_SORT_12 [L533] SORT_1 var_114_arg_0 = var_113; [L534] SORT_1 var_114_arg_1 = var_113; [L535] EXPR ((SORT_7)var_114_arg_0 << 1) | var_114_arg_1 [L535] SORT_7 var_114 = ((SORT_7)var_114_arg_0 << 1) | var_114_arg_1; [L536] EXPR var_114 & mask_SORT_7 [L536] var_114 = var_114 & mask_SORT_7 [L537] SORT_1 var_115_arg_0 = var_113; [L538] SORT_7 var_115_arg_1 = var_114; [L539] EXPR ((SORT_17)var_115_arg_0 << 2) | var_115_arg_1 [L539] SORT_17 var_115 = ((SORT_17)var_115_arg_0 << 2) | var_115_arg_1; [L540] EXPR var_115 & mask_SORT_17 [L540] var_115 = var_115 & mask_SORT_17 [L541] SORT_1 var_116_arg_0 = var_113; [L542] SORT_17 var_116_arg_1 = var_115; [L543] EXPR ((SORT_15)var_116_arg_0 << 3) | var_116_arg_1 [L543] SORT_15 var_116 = ((SORT_15)var_116_arg_0 << 3) | var_116_arg_1; [L544] EXPR var_116 & mask_SORT_15 [L544] var_116 = var_116 & mask_SORT_15 [L545] SORT_1 var_117_arg_0 = var_113; [L546] SORT_15 var_117_arg_1 = var_116; [L547] EXPR ((SORT_57)var_117_arg_0 << 4) | var_117_arg_1 [L547] SORT_57 var_117 = ((SORT_57)var_117_arg_0 << 4) | var_117_arg_1; [L548] EXPR var_117 & mask_SORT_57 [L548] var_117 = var_117 & mask_SORT_57 [L549] SORT_1 var_118_arg_0 = var_113; [L550] SORT_57 var_118_arg_1 = var_117; [L551] EXPR ((SORT_59)var_118_arg_0 << 5) | var_118_arg_1 [L551] SORT_59 var_118 = ((SORT_59)var_118_arg_0 << 5) | var_118_arg_1; [L552] EXPR var_118 & mask_SORT_59 [L552] var_118 = var_118 & mask_SORT_59 [L553] SORT_1 var_119_arg_0 = var_113; [L554] SORT_59 var_119_arg_1 = var_118; [L555] EXPR ((SORT_61)var_119_arg_0 << 6) | var_119_arg_1 [L555] SORT_61 var_119 = ((SORT_61)var_119_arg_0 << 6) | var_119_arg_1; [L556] EXPR var_119 & mask_SORT_61 [L556] var_119 = var_119 & mask_SORT_61 [L557] SORT_1 var_120_arg_0 = var_113; [L558] SORT_61 var_120_arg_1 = var_119; [L559] EXPR ((SORT_63)var_120_arg_0 << 7) | var_120_arg_1 [L559] SORT_63 var_120 = ((SORT_63)var_120_arg_0 << 7) | var_120_arg_1; [L560] EXPR var_120 & mask_SORT_63 [L560] var_120 = var_120 & mask_SORT_63 [L561] SORT_1 var_121_arg_0 = var_113; [L562] SORT_63 var_121_arg_1 = var_120; [L563] EXPR ((SORT_65)var_121_arg_0 << 8) | var_121_arg_1 [L563] SORT_65 var_121 = ((SORT_65)var_121_arg_0 << 8) | var_121_arg_1; [L564] EXPR var_121 & mask_SORT_65 [L564] var_121 = var_121 & mask_SORT_65 [L565] SORT_1 var_122_arg_0 = var_113; [L566] SORT_65 var_122_arg_1 = var_121; [L567] EXPR ((SORT_67)var_122_arg_0 << 9) | var_122_arg_1 [L567] SORT_67 var_122 = ((SORT_67)var_122_arg_0 << 9) | var_122_arg_1; [L568] EXPR var_122 & mask_SORT_67 [L568] var_122 = var_122 & mask_SORT_67 [L569] SORT_1 var_123_arg_0 = var_113; [L570] SORT_67 var_123_arg_1 = var_122; [L571] EXPR ((SORT_69)var_123_arg_0 << 10) | var_123_arg_1 [L571] SORT_69 var_123 = ((SORT_69)var_123_arg_0 << 10) | var_123_arg_1; [L572] EXPR var_123 & mask_SORT_69 [L572] var_123 = var_123 & mask_SORT_69 [L573] SORT_1 var_124_arg_0 = var_113; [L574] SORT_69 var_124_arg_1 = var_123; [L575] EXPR ((SORT_71)var_124_arg_0 << 11) | var_124_arg_1 [L575] SORT_71 var_124 = ((SORT_71)var_124_arg_0 << 11) | var_124_arg_1; [L576] EXPR var_124 & mask_SORT_71 [L576] var_124 = var_124 & mask_SORT_71 [L577] SORT_1 var_125_arg_0 = var_113; [L578] SORT_71 var_125_arg_1 = var_124; [L579] EXPR ((SORT_73)var_125_arg_0 << 12) | var_125_arg_1 [L579] SORT_73 var_125 = ((SORT_73)var_125_arg_0 << 12) | var_125_arg_1; [L580] EXPR var_125 & mask_SORT_73 [L580] var_125 = var_125 & mask_SORT_73 [L581] SORT_1 var_126_arg_0 = var_113; [L582] SORT_73 var_126_arg_1 = var_125; [L583] EXPR ((SORT_75)var_126_arg_0 << 13) | var_126_arg_1 [L583] SORT_75 var_126 = ((SORT_75)var_126_arg_0 << 13) | var_126_arg_1; [L584] EXPR var_126 & mask_SORT_75 [L584] var_126 = var_126 & mask_SORT_75 [L585] SORT_1 var_127_arg_0 = var_113; [L586] SORT_75 var_127_arg_1 = var_126; [L587] EXPR ((SORT_77)var_127_arg_0 << 14) | var_127_arg_1 [L587] SORT_77 var_127 = ((SORT_77)var_127_arg_0 << 14) | var_127_arg_1; [L588] EXPR var_127 & mask_SORT_77 [L588] var_127 = var_127 & mask_SORT_77 [L589] SORT_1 var_128_arg_0 = var_113; [L590] SORT_77 var_128_arg_1 = var_127; [L591] EXPR ((SORT_12)var_128_arg_0 << 15) | var_128_arg_1 [L591] SORT_12 var_128 = ((SORT_12)var_128_arg_0 << 15) | var_128_arg_1; [L592] SORT_12 var_129_arg_0 = var_111; [L593] SORT_12 var_129_arg_1 = var_128; [L594] EXPR var_129_arg_0 & var_129_arg_1 [L594] SORT_12 var_129 = var_129_arg_0 & var_129_arg_1; [L595] SORT_12 var_130_arg_0 = var_80; [L596] SORT_12 var_130_arg_1 = var_129; [L597] EXPR var_130_arg_0 | var_130_arg_1 [L597] SORT_12 var_130 = var_130_arg_0 | var_130_arg_1; [L598] EXPR var_130 & mask_SORT_12 [L598] var_130 = var_130 & mask_SORT_12 [L599] SORT_12 var_155_arg_0 = state_154; [L600] SORT_12 var_155_arg_1 = var_130; [L601] SORT_1 var_155 = var_155_arg_0 == var_155_arg_1; [L602] SORT_1 var_156_arg_0 = var_153; [L603] SORT_1 var_156_arg_1 = var_155; [L604] EXPR var_156_arg_0 | var_156_arg_1 [L604] SORT_1 var_156 = var_156_arg_0 | var_156_arg_1; [L605] SORT_1 var_214_arg_0 = state_194; [L606] SORT_1 var_214_arg_1 = input_213; [L607] SORT_1 var_214_arg_2 = var_156; [L608] SORT_1 var_214 = var_214_arg_0 ? var_214_arg_1 : var_214_arg_2; [L609] SORT_1 var_216_arg_0 = var_214; [L610] SORT_1 var_216 = ~var_216_arg_0; [L611] SORT_1 var_217_arg_0 = var_215; [L612] SORT_1 var_217_arg_1 = var_216; [L613] EXPR var_217_arg_0 & var_217_arg_1 [L613] SORT_1 var_217 = var_217_arg_0 & var_217_arg_1; [L614] EXPR var_217 & mask_SORT_1 [L614] var_217 = var_217 & mask_SORT_1 [L615] SORT_1 bad_218_arg_0 = var_217; [L616] CALL __VERIFIER_assert(!(bad_218_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 23 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 98.3s, OverallIterations: 2, TraceHistogramMax: 14, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 12.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 5 mSolverCounterUnknown, 0 SdHoareTripleChecker+Valid, 11.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 0 mSDsluCounter, 47 SdHoareTripleChecker+Invalid, 11.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 31 mSDsCounter, 0 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 33 IncrementalHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 0 mSolverCounterUnsat, 16 mSDtfsCounter, 33 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=38occurred in iteration=1, InterpolantAutomatonStates: 4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 36.2s SatisfiabilityAnalysisTime, 4.9s InterpolantComputationTime, 95 NumberOfCodeBlocks, 95 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 31 ConstructedInterpolants, 0 QuantifiedInterpolants, 289 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 42/42 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-14 03:40:40,110 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cb83f5d7087c4b0d43604a15de3bb5b701cd940862e59390412bf16eeaebebc9 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-14 03:40:43,340 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-14 03:40:43,492 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2024-11-14 03:40:43,503 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-14 03:40:43,503 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-14 03:40:43,551 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-14 03:40:43,552 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-14 03:40:43,552 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-14 03:40:43,552 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-14 03:40:43,552 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-14 03:40:43,553 INFO L153 SettingsManager]: * User list type=DISABLED [2024-11-14 03:40:43,553 INFO L151 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2024-11-14 03:40:43,553 INFO L153 SettingsManager]: * Explicit value domain=true [2024-11-14 03:40:43,553 INFO L153 SettingsManager]: * Octagon Domain=false [2024-11-14 03:40:43,553 INFO L153 SettingsManager]: * Abstract domain=CompoundDomain [2024-11-14 03:40:43,553 INFO L153 SettingsManager]: * Interval Domain=false [2024-11-14 03:40:43,554 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-14 03:40:43,554 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-14 03:40:43,554 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-14 03:40:43,554 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-14 03:40:43,554 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-14 03:40:43,554 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-14 03:40:43,558 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-14 03:40:43,558 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-14 03:40:43,559 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-14 03:40:43,559 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-14 03:40:43,559 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-14 03:40:43,559 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-14 03:40:43,559 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-14 03:40:43,559 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-14 03:40:43,559 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-14 03:40:43,560 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-14 03:40:43,560 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 03:40:43,560 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-14 03:40:43,560 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-14 03:40:43,560 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-14 03:40:43,560 INFO L153 SettingsManager]: * Trace refinement strategy=WALRUS [2024-11-14 03:40:43,560 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-14 03:40:43,560 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-14 03:40:43,561 INFO L153 SettingsManager]: * Trace refinement exception blacklist=NONE [2024-11-14 03:40:43,561 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cb83f5d7087c4b0d43604a15de3bb5b701cd940862e59390412bf16eeaebebc9 [2024-11-14 03:40:43,959 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-14 03:40:43,974 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-14 03:40:43,977 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-14 03:40:43,979 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-14 03:40:43,979 INFO L274 PluginConnector]: CDTParser initialized [2024-11-14 03:40:43,984 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c Unable to find full path for "g++" [2024-11-14 03:40:46,118 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-14 03:40:46,467 INFO L384 CDTParser]: Found 1 translation units. [2024-11-14 03:40:46,468 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c [2024-11-14 03:40:46,486 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/data/153a5a675/fed50bb9c04d4017bba27a016acafb3c/FLAG7d848f2f1 [2024-11-14 03:40:46,505 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/data/153a5a675/fed50bb9c04d4017bba27a016acafb3c [2024-11-14 03:40:46,508 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-14 03:40:46,510 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-14 03:40:46,512 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-14 03:40:46,512 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-14 03:40:46,521 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-14 03:40:46,523 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 03:40:46" (1/1) ... [2024-11-14 03:40:46,526 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@74254607 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:46, skipping insertion in model container [2024-11-14 03:40:46,527 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 03:40:46" (1/1) ... [2024-11-14 03:40:46,608 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-14 03:40:46,879 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c[1270,1283] [2024-11-14 03:40:47,322 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 03:40:47,337 INFO L200 MainTranslator]: Completed pre-run [2024-11-14 03:40:47,352 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c[1270,1283] [2024-11-14 03:40:47,560 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 03:40:47,582 INFO L204 MainTranslator]: Completed translation [2024-11-14 03:40:47,583 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47 WrapperNode [2024-11-14 03:40:47,583 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-14 03:40:47,585 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-14 03:40:47,585 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-14 03:40:47,585 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-14 03:40:47,595 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,637 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,767 INFO L138 Inliner]: procedures = 17, calls = 15, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1206 [2024-11-14 03:40:47,767 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-14 03:40:47,772 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-14 03:40:47,772 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-14 03:40:47,772 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-14 03:40:47,786 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,786 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,811 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,811 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,902 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,911 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,925 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,933 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,951 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-14 03:40:47,952 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-14 03:40:47,952 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-14 03:40:47,952 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-14 03:40:47,957 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (1/1) ... [2024-11-14 03:40:47,968 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 03:40:47,985 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 03:40:48,000 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-11-14 03:40:48,005 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-11-14 03:40:48,038 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-14 03:40:48,038 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2024-11-14 03:40:48,038 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-14 03:40:48,039 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-14 03:40:48,039 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-14 03:40:48,039 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-14 03:40:48,509 INFO L238 CfgBuilder]: Building ICFG [2024-11-14 03:40:48,512 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-14 03:40:50,096 INFO L? ?]: Removed 425 outVars from TransFormulas that were not future-live. [2024-11-14 03:40:50,096 INFO L287 CfgBuilder]: Performing block encoding [2024-11-14 03:40:50,111 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-14 03:40:50,111 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-14 03:40:50,112 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:40:50 BoogieIcfgContainer [2024-11-14 03:40:50,112 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-14 03:40:50,116 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-14 03:40:50,116 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-14 03:40:50,126 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-14 03:40:50,127 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 03:40:46" (1/3) ... [2024-11-14 03:40:50,128 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50d3fc64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 03:40:50, skipping insertion in model container [2024-11-14 03:40:50,128 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:40:47" (2/3) ... [2024-11-14 03:40:50,128 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50d3fc64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 03:40:50, skipping insertion in model container [2024-11-14 03:40:50,128 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:40:50" (3/3) ... [2024-11-14 03:40:50,130 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c [2024-11-14 03:40:50,149 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-14 03:40:50,151 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.arbitrated_top_n2_w16_d8_e0.c that has 2 procedures, 28 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-14 03:40:50,225 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-14 03:40:50,242 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@53fac658, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-14 03:40:50,243 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-14 03:40:50,249 INFO L276 IsEmpty]: Start isEmpty. Operand has 28 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 19 states have internal predecessors, (22), 7 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 7 states have call predecessors, (7), 7 states have call successors, (7) [2024-11-14 03:40:50,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2024-11-14 03:40:50,259 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:40:50,260 INFO L215 NwaCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:40:50,260 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 03:40:50,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:40:50,270 INFO L85 PathProgramCache]: Analyzing trace with hash -700506436, now seen corresponding path program 1 times [2024-11-14 03:40:50,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:40:50,288 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1852066533] [2024-11-14 03:40:50,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:40:50,289 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:40:50,289 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:40:50,292 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:40:50,296 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2024-11-14 03:40:51,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:40:51,107 INFO L255 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-14 03:40:51,122 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:40:51,166 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-14 03:40:51,167 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:40:51,167 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:40:51,168 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1852066533] [2024-11-14 03:40:51,168 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1852066533] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:40:51,168 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:40:51,169 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-14 03:40:51,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [886723728] [2024-11-14 03:40:51,176 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:40:51,182 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-14 03:40:51,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:40:51,209 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-14 03:40:51,210 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-14 03:40:51,212 INFO L87 Difference]: Start difference. First operand has 28 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 19 states have internal predecessors, (22), 7 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 7 states have call predecessors, (7), 7 states have call successors, (7) Second operand has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-14 03:40:51,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:40:51,239 INFO L93 Difference]: Finished difference Result 51 states and 75 transitions. [2024-11-14 03:40:51,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-14 03:40:51,242 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 47 [2024-11-14 03:40:51,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:40:51,249 INFO L225 Difference]: With dead ends: 51 [2024-11-14 03:40:51,250 INFO L226 Difference]: Without dead ends: 25 [2024-11-14 03:40:51,254 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-14 03:40:51,258 INFO L432 NwaCegarLoop]: 31 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-14 03:40:51,259 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-14 03:40:51,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-14 03:40:51,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-14 03:40:51,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 7 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 7 states have call predecessors, (7), 7 states have call successors, (7) [2024-11-14 03:40:51,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 31 transitions. [2024-11-14 03:40:51,312 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 31 transitions. Word has length 47 [2024-11-14 03:40:51,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:40:51,313 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 31 transitions. [2024-11-14 03:40:51,313 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-14 03:40:51,313 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 31 transitions. [2024-11-14 03:40:51,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2024-11-14 03:40:51,316 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:40:51,317 INFO L215 NwaCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:40:51,326 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Ended with exit code 0 [2024-11-14 03:40:51,521 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:40:51,522 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 03:40:51,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:40:51,522 INFO L85 PathProgramCache]: Analyzing trace with hash 1658138350, now seen corresponding path program 1 times [2024-11-14 03:40:51,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:40:51,524 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1471445259] [2024-11-14 03:40:51,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:40:51,524 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:40:51,525 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:40:51,527 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:40:51,532 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2024-11-14 03:40:52,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:40:52,411 INFO L255 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-14 03:40:52,419 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:40:52,776 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-11-14 03:40:52,776 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:40:52,777 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:40:52,777 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1471445259] [2024-11-14 03:40:52,777 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1471445259] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:40:52,777 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:40:52,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:40:52,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1676087056] [2024-11-14 03:40:52,778 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:40:52,779 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-14 03:40:52,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:40:52,780 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-14 03:40:52,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 03:40:52,780 INFO L87 Difference]: Start difference. First operand 25 states and 31 transitions. Second operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 1 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-14 03:40:53,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:40:53,016 INFO L93 Difference]: Finished difference Result 43 states and 56 transitions. [2024-11-14 03:40:53,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-14 03:40:53,017 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 1 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 47 [2024-11-14 03:40:53,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:40:53,018 INFO L225 Difference]: With dead ends: 43 [2024-11-14 03:40:53,019 INFO L226 Difference]: Without dead ends: 41 [2024-11-14 03:40:53,019 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 03:40:53,020 INFO L432 NwaCegarLoop]: 22 mSDtfsCounter, 0 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-14 03:40:53,021 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 62 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-14 03:40:53,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2024-11-14 03:40:53,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2024-11-14 03:40:53,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 25 states have (on average 1.04) internal successors, (26), 25 states have internal predecessors, (26), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2024-11-14 03:40:53,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 54 transitions. [2024-11-14 03:40:53,034 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 54 transitions. Word has length 47 [2024-11-14 03:40:53,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:40:53,035 INFO L471 AbstractCegarLoop]: Abstraction has 41 states and 54 transitions. [2024-11-14 03:40:53,035 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 1 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-14 03:40:53,036 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 54 transitions. [2024-11-14 03:40:53,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2024-11-14 03:40:53,039 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:40:53,039 INFO L215 NwaCegarLoop]: trace histogram [14, 14, 14, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-14 03:40:53,045 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2024-11-14 03:40:53,239 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:40:53,241 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 03:40:53,241 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:40:53,241 INFO L85 PathProgramCache]: Analyzing trace with hash 1018638595, now seen corresponding path program 1 times [2024-11-14 03:40:53,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:40:53,248 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2106987468] [2024-11-14 03:40:53,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:40:53,248 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:40:53,249 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:40:53,252 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:40:53,255 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2024-11-14 03:40:55,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:40:55,354 INFO L255 TraceCheckSpWp]: Trace formula consists of 1029 conjuncts, 42 conjuncts are in the unsatisfiable core [2024-11-14 03:40:55,384 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:40:56,845 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 12 proven. 43 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2024-11-14 03:40:56,846 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:40:57,229 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:40:57,230 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2106987468] [2024-11-14 03:40:57,230 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2106987468] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 03:40:57,230 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1637886406] [2024-11-14 03:40:57,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:40:57,230 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-14 03:40:57,230 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 [2024-11-14 03:40:57,246 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-14 03:40:57,248 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-11-14 03:40:59,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:40:59,191 INFO L255 TraceCheckSpWp]: Trace formula consists of 1029 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-14 03:40:59,208 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:41:00,136 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 12 proven. 43 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2024-11-14 03:41:00,137 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:41:00,367 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1637886406] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 03:41:00,367 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1753451632] [2024-11-14 03:41:00,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:41:00,368 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 03:41:00,368 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 03:41:00,371 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 03:41:00,374 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-14 03:41:01,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:41:01,331 INFO L255 TraceCheckSpWp]: Trace formula consists of 1029 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-14 03:41:01,351 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:41:02,064 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 12 proven. 43 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2024-11-14 03:41:02,064 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:41:02,275 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1753451632] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 03:41:02,276 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 03:41:02,276 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 14 [2024-11-14 03:41:02,276 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [314724868] [2024-11-14 03:41:02,276 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 03:41:02,277 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-11-14 03:41:02,277 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:41:02,281 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-11-14 03:41:02,282 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2024-11-14 03:41:02,283 INFO L87 Difference]: Start difference. First operand 41 states and 54 transitions. Second operand has 14 states, 12 states have (on average 4.083333333333333) internal successors, (49), 14 states have internal predecessors, (49), 8 states have call successors, (28), 1 states have call predecessors, (28), 2 states have return successors, (28), 6 states have call predecessors, (28), 8 states have call successors, (28) [2024-11-14 03:41:03,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:41:03,479 INFO L93 Difference]: Finished difference Result 60 states and 80 transitions. [2024-11-14 03:41:03,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-14 03:41:03,480 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 12 states have (on average 4.083333333333333) internal successors, (49), 14 states have internal predecessors, (49), 8 states have call successors, (28), 1 states have call predecessors, (28), 2 states have return successors, (28), 6 states have call predecessors, (28), 8 states have call successors, (28) Word has length 92 [2024-11-14 03:41:03,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:41:03,481 INFO L225 Difference]: With dead ends: 60 [2024-11-14 03:41:03,481 INFO L226 Difference]: Without dead ends: 58 [2024-11-14 03:41:03,482 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 290 GetRequests, 269 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2024-11-14 03:41:03,483 INFO L432 NwaCegarLoop]: 20 mSDtfsCounter, 14 mSDsluCounter, 141 mSDsCounter, 0 mSdLazyCounter, 308 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 161 SdHoareTripleChecker+Invalid, 321 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 308 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-14 03:41:03,483 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 161 Invalid, 321 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 308 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-14 03:41:03,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2024-11-14 03:41:03,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2024-11-14 03:41:03,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 35 states have (on average 1.0285714285714285) internal successors, (36), 35 states have internal predecessors, (36), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-11-14 03:41:03,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 78 transitions. [2024-11-14 03:41:03,495 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 78 transitions. Word has length 92 [2024-11-14 03:41:03,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:41:03,496 INFO L471 AbstractCegarLoop]: Abstraction has 58 states and 78 transitions. [2024-11-14 03:41:03,497 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 12 states have (on average 4.083333333333333) internal successors, (49), 14 states have internal predecessors, (49), 8 states have call successors, (28), 1 states have call predecessors, (28), 2 states have return successors, (28), 6 states have call predecessors, (28), 8 states have call successors, (28) [2024-11-14 03:41:03,497 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 78 transitions. [2024-11-14 03:41:03,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2024-11-14 03:41:03,501 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:41:03,501 INFO L215 NwaCegarLoop]: trace histogram [21, 21, 21, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-14 03:41:03,510 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-11-14 03:41:03,721 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-14 03:41:03,908 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Ended with exit code 0 [2024-11-14 03:41:04,102 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:41:04,102 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 03:41:04,102 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:41:04,103 INFO L85 PathProgramCache]: Analyzing trace with hash 805244174, now seen corresponding path program 2 times [2024-11-14 03:41:04,106 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:41:04,106 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [876690471] [2024-11-14 03:41:04,106 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-14 03:41:04,106 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:41:04,106 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:41:04,110 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:41:04,113 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2024-11-14 03:41:07,357 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-14 03:41:07,358 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 03:41:07,397 INFO L255 TraceCheckSpWp]: Trace formula consists of 1513 conjuncts, 157 conjuncts are in the unsatisfiable core [2024-11-14 03:41:07,439 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:41:15,960 INFO L134 CoverageAnalysis]: Checked inductivity of 889 backedges. 153 proven. 136 refuted. 0 times theorem prover too weak. 600 trivial. 0 not checked. [2024-11-14 03:41:15,960 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:41:19,317 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse6 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_138~0#1|))) (let ((.cse10 (= (_ bv0 32) .cse6)) (.cse7 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse2 (let ((.cse11 (forall ((|v_ULTIMATE.start_main_~var_214_arg_1~0#1_20| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_159~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_214_arg_1~0#1_20|))))))))) .cse7)))))) (and (or .cse10 .cse11) (or .cse11 (not .cse10))))) (.cse1 (= |c_ULTIMATE.start_main_~state_194~0#1| (_ bv0 8))) (.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_134~0#1|))) (let ((.cse0 (= (_ bv0 8) |c_ULTIMATE.start_main_~input_10~0#1|)) (.cse4 (and (or .cse1 .cse2) (or .cse10 (not .cse1) (forall ((|v_ULTIMATE.start_main_~var_137_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_156_arg_1~0#1_20| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_215_arg_2~0#1_18| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse7 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_215_arg_2~0#1_18|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_1~0#1_20|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand (_ bv255 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_137_arg_1~0#1_19|) .cse9))) (_ bv1 32))))))))))))))))))))))) (_ bv0 8)))))) (.cse3 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_57~0#1|))) (and (or .cse0 (and (or .cse1 .cse2 (forall ((|v_ULTIMATE.start_main_~var_149_arg_1~0#1_18| (_ BitVec 8))) (= ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_149_arg_1~0#1_18|))) .cse3))) (_ bv0 32)))) (or .cse4 (forall ((|v_ULTIMATE.start_main_~var_149_arg_1~0#1_18| (_ BitVec 8))) (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_149_arg_1~0#1_18|))) .cse3))) (_ bv0 32))))))) (or (not .cse0) (let ((.cse5 (bvneg ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_113~0#1|) .cse7))))) (.cse8 ((_ zero_extend 24) ((_ extract 7 0) (bvnot .cse9))))) (and (or .cse4 (forall ((|v_ULTIMATE.start_main_~var_143_arg_0~0#1_17| (_ BitVec 8))) (not (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse3 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvadd .cse5 ((_ zero_extend 24) ((_ extract 7 0) (bvadd .cse6 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse7 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_143_arg_0~0#1_17|) .cse8))))))))))))))))))))) (or .cse1 .cse2 (forall ((|v_ULTIMATE.start_main_~var_143_arg_0~0#1_17| (_ BitVec 8))) (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse3 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvadd .cse5 ((_ zero_extend 24) ((_ extract 7 0) (bvadd .cse6 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse7 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_143_arg_0~0#1_17|) .cse8)))))))))))))))))))))))))))) is different from false [2024-11-14 03:41:20,422 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:41:20,423 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [876690471] [2024-11-14 03:41:20,423 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [876690471] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 03:41:20,423 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [470827493] [2024-11-14 03:41:20,423 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-14 03:41:20,423 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-14 03:41:20,423 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 [2024-11-14 03:41:20,425 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-14 03:41:20,427 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2024-11-14 03:41:23,067 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-14 03:41:23,067 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 03:41:23,152 INFO L255 TraceCheckSpWp]: Trace formula consists of 1513 conjuncts, 145 conjuncts are in the unsatisfiable core [2024-11-14 03:41:23,174 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:43:04,116 INFO L134 CoverageAnalysis]: Checked inductivity of 889 backedges. 132 proven. 121 refuted. 0 times theorem prover too weak. 636 trivial. 0 not checked. [2024-11-14 03:43:04,116 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:43:09,003 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse3 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|)) (.cse11 (= |c_ULTIMATE.start_main_~state_194~0#1| (_ bv0 8)))) (let ((.cse10 (not .cse11)) (.cse8 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_134~0#1|)) (.cse9 (or .cse11 (forall ((|v_ULTIMATE.start_main_~var_214_arg_1~0#1_24| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_159~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_214_arg_1~0#1_24|))))))))) .cse3))))))) (let ((.cse0 (= (_ bv0 8) |c_ULTIMATE.start_main_~input_10~0#1|)) (.cse6 (and (or .cse10 (forall ((|v_ULTIMATE.start_main_~var_156_arg_1~0#1_24| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_140_arg_1~0#1_24| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_215_arg_2~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_137_arg_1~0#1_23| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse3 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_215_arg_2~0#1_22|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_1~0#1_24|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand (_ bv254 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_140_arg_1~0#1_24|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_137_arg_1~0#1_23|) .cse8)))))))))))))))))))))))))))) .cse9)) (.cse5 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_57~0#1|)) (.cse7 (and .cse9 (or .cse10 (forall ((|v_ULTIMATE.start_main_~var_156_arg_1~0#1_24| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_140_arg_1~0#1_24| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_215_arg_2~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_137_arg_1~0#1_23| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse3 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_215_arg_2~0#1_22|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_156_arg_1~0#1_24|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand (_ bv255 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_140_arg_1~0#1_24|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_137_arg_1~0#1_23|) .cse8))))))))))))))))))))))))))))))) (and (or (not .cse0) (let ((.cse1 (bvneg ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_113~0#1|) .cse3))))) (.cse2 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_138~0#1|)) (.cse4 ((_ zero_extend 24) ((_ extract 7 0) (bvnot .cse8))))) (and (or (forall ((|v_ULTIMATE.start_main_~var_143_arg_0~0#1_22| (_ BitVec 8))) (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvadd .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvadd .cse2 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse3 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_143_arg_0~0#1_22|) .cse4)))))))))))))) .cse5))))) .cse6) (or .cse7 (forall ((|v_ULTIMATE.start_main_~var_143_arg_0~0#1_22| (_ BitVec 8))) (not (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvadd .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvadd .cse2 ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse3 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_143_arg_0~0#1_22|) .cse4)))))))))))))) .cse5)))))))))) (or .cse0 (and (or .cse6 (forall ((|v_ULTIMATE.start_main_~var_149_arg_1~0#1_23| (_ BitVec 8))) (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_149_arg_1~0#1_23|))))))))) (or (forall ((|v_ULTIMATE.start_main_~var_149_arg_1~0#1_23| (_ BitVec 8))) (not (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_149_arg_1~0#1_23|))))))))) .cse7))))))) is different from false [2024-11-14 03:43:10,402 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [470827493] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 03:43:10,403 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1353566633] [2024-11-14 03:43:10,403 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-14 03:43:10,403 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 03:43:10,403 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 03:43:10,405 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 03:43:10,406 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-14 03:43:11,738 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-14 03:43:11,738 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 03:43:11,755 INFO L255 TraceCheckSpWp]: Trace formula consists of 1513 conjuncts, 143 conjuncts are in the unsatisfiable core [2024-11-14 03:43:11,778 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:44:35,047 INFO L134 CoverageAnalysis]: Checked inductivity of 889 backedges. 132 proven. 121 refuted. 0 times theorem prover too weak. 636 trivial. 0 not checked. [2024-11-14 03:44:35,047 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:44:43,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1353566633] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 03:44:43,030 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 03:44:43,030 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 18, 18] total 38 [2024-11-14 03:44:43,031 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540311655] [2024-11-14 03:44:43,031 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 03:44:43,032 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2024-11-14 03:44:43,032 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:44:43,034 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2024-11-14 03:44:43,040 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=1376, Unknown=34, NotChecked=154, Total=1722 [2024-11-14 03:44:43,041 INFO L87 Difference]: Start difference. First operand 58 states and 78 transitions. Second operand has 38 states, 28 states have (on average 2.5) internal successors, (70), 35 states have internal predecessors, (70), 23 states have call successors, (42), 1 states have call predecessors, (42), 2 states have return successors, (42), 16 states have call predecessors, (42), 23 states have call successors, (42) [2024-11-14 03:44:57,242 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:45:00,171 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:45:02,939 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:45:05,722 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:45:12,246 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:45:14,509 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:45:17,144 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:45:19,226 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:45:21,915 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.69s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:46:27,435 WARN L286 SmtUtils]: Spent 6.90s on a formula simplification. DAG size of input: 375 DAG size of output: 361 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-14 03:46:43,135 WARN L286 SmtUtils]: Spent 9.74s on a formula simplification. DAG size of input: 384 DAG size of output: 367 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-14 03:46:45,329 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:46:47,377 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:46:50,088 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:46:52,092 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:46:54,098 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:47:23,574 WARN L286 SmtUtils]: Spent 8.71s on a formula simplification. DAG size of input: 278 DAG size of output: 265 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-14 03:48:02,259 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:48:05,184 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 03:48:05,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:48:05,848 INFO L93 Difference]: Finished difference Result 80 states and 107 transitions. [2024-11-14 03:48:05,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-11-14 03:48:05,851 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 28 states have (on average 2.5) internal successors, (70), 35 states have internal predecessors, (70), 23 states have call successors, (42), 1 states have call predecessors, (42), 2 states have return successors, (42), 16 states have call predecessors, (42), 23 states have call successors, (42) Word has length 137 [2024-11-14 03:48:05,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:48:05,853 INFO L225 Difference]: With dead ends: 80 [2024-11-14 03:48:05,854 INFO L226 Difference]: Without dead ends: 78 [2024-11-14 03:48:05,856 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 441 GetRequests, 380 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 752 ImplicationChecksByTransitivity, 264.0s TimeCoverageRelationStatistics Valid=483, Invalid=3126, Unknown=59, NotChecked=238, Total=3906 [2024-11-14 03:48:05,857 INFO L432 NwaCegarLoop]: 20 mSDtfsCounter, 73 mSDsluCounter, 465 mSDsCounter, 0 mSdLazyCounter, 922 mSolverCounterSat, 72 mSolverCounterUnsat, 16 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 60.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 485 SdHoareTripleChecker+Invalid, 1010 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 72 IncrementalHoareTripleChecker+Valid, 922 IncrementalHoareTripleChecker+Invalid, 16 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 66.6s IncrementalHoareTripleChecker+Time [2024-11-14 03:48:05,857 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 485 Invalid, 1010 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [72 Valid, 922 Invalid, 16 Unknown, 0 Unchecked, 66.6s Time] [2024-11-14 03:48:05,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2024-11-14 03:48:05,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 75. [2024-11-14 03:48:05,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 45 states have (on average 1.0222222222222221) internal successors, (46), 45 states have internal predecessors, (46), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-14 03:48:05,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 102 transitions. [2024-11-14 03:48:05,888 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 102 transitions. Word has length 137 [2024-11-14 03:48:05,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:48:05,889 INFO L471 AbstractCegarLoop]: Abstraction has 75 states and 102 transitions. [2024-11-14 03:48:05,889 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 28 states have (on average 2.5) internal successors, (70), 35 states have internal predecessors, (70), 23 states have call successors, (42), 1 states have call predecessors, (42), 2 states have return successors, (42), 16 states have call predecessors, (42), 23 states have call successors, (42) [2024-11-14 03:48:05,889 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 102 transitions. [2024-11-14 03:48:05,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2024-11-14 03:48:05,891 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:48:05,891 INFO L215 NwaCegarLoop]: trace histogram [28, 28, 28, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2024-11-14 03:48:05,903 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Ended with exit code 0 [2024-11-14 03:48:06,109 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-14 03:48:06,310 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (8)] Ended with exit code 0 [2024-11-14 03:48:06,492 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt [2024-11-14 03:48:06,492 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 03:48:06,493 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:48:06,493 INFO L85 PathProgramCache]: Analyzing trace with hash 435144419, now seen corresponding path program 3 times [2024-11-14 03:48:06,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:48:06,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [262129574] [2024-11-14 03:48:06,495 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-14 03:48:06,495 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:48:06,495 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:48:06,496 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:48:06,498 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25180533-5898-4d9e-a998-5a5784f2267f/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2024-11-14 03:48:11,507 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2024-11-14 03:48:11,507 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 03:48:11,544 INFO L255 TraceCheckSpWp]: Trace formula consists of 1970 conjuncts, 344 conjuncts are in the unsatisfiable core [2024-11-14 03:48:11,585 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:50:39,873 WARN L286 SmtUtils]: Spent 5.44s on a formula simplification. DAG size of input: 300 DAG size of output: 284 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)