./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 3dcfde8a71d42fe3baf4d2089c86bd7d84b36e1d1bc23ee26c9bd4a8e8f007b4 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-14 02:43:51,904 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-14 02:43:52,005 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-64bit-Taipan_Default.epf [2024-11-14 02:43:52,016 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-14 02:43:52,016 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-14 02:43:52,056 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-14 02:43:52,058 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-14 02:43:52,059 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-14 02:43:52,059 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-14 02:43:52,060 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-14 02:43:52,061 INFO L153 SettingsManager]: * User list type=DISABLED [2024-11-14 02:43:52,061 INFO L151 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2024-11-14 02:43:52,061 INFO L153 SettingsManager]: * Explicit value domain=true [2024-11-14 02:43:52,062 INFO L153 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2024-11-14 02:43:52,062 INFO L153 SettingsManager]: * Octagon Domain=false [2024-11-14 02:43:52,062 INFO L153 SettingsManager]: * Abstract domain=CompoundDomain [2024-11-14 02:43:52,062 INFO L153 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2024-11-14 02:43:52,063 INFO L153 SettingsManager]: * Use the RCFG-of-the-future interface=true [2024-11-14 02:43:52,063 INFO L153 SettingsManager]: * Interval Domain=false [2024-11-14 02:43:52,063 INFO L151 SettingsManager]: Preferences of Sifa differ from their defaults: [2024-11-14 02:43:52,063 INFO L153 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2024-11-14 02:43:52,063 INFO L153 SettingsManager]: * Simplification Technique=POLY_PAC [2024-11-14 02:43:52,064 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-14 02:43:52,064 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-14 02:43:52,064 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-14 02:43:52,064 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-14 02:43:52,065 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-14 02:43:52,065 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-14 02:43:52,066 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-14 02:43:52,066 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-14 02:43:52,066 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-14 02:43:52,066 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-14 02:43:52,066 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-14 02:43:52,066 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-14 02:43:52,067 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-14 02:43:52,067 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 02:43:52,067 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-14 02:43:52,067 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-14 02:43:52,068 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-14 02:43:52,068 INFO L153 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2024-11-14 02:43:52,068 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-14 02:43:52,069 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-14 02:43:52,069 INFO L153 SettingsManager]: * Trace refinement exception blacklist=NONE [2024-11-14 02:43:52,069 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-14 02:43:52,069 INFO L153 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3dcfde8a71d42fe3baf4d2089c86bd7d84b36e1d1bc23ee26c9bd4a8e8f007b4 [2024-11-14 02:43:52,496 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-14 02:43:52,507 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-14 02:43:52,512 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-14 02:43:52,513 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-14 02:43:52,514 INFO L274 PluginConnector]: CDTParser initialized [2024-11-14 02:43:52,516 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c Unable to find full path for "g++" [2024-11-14 02:43:54,424 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-14 02:43:54,903 INFO L384 CDTParser]: Found 1 translation units. [2024-11-14 02:43:54,904 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-11-14 02:43:54,937 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/data/474c2cb49/bcf82c1925c847aaa7d83448ba4733cc/FLAGa48240bbc [2024-11-14 02:43:54,959 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/data/474c2cb49/bcf82c1925c847aaa7d83448ba4733cc [2024-11-14 02:43:54,963 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-14 02:43:54,966 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-14 02:43:54,968 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-14 02:43:54,968 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-14 02:43:54,976 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-14 02:43:54,977 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 02:43:54" (1/1) ... [2024-11-14 02:43:54,979 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7967d450 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:54, skipping insertion in model container [2024-11-14 02:43:54,980 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 02:43:54" (1/1) ... [2024-11-14 02:43:55,043 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-14 02:43:55,277 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c[1335,1348] [2024-11-14 02:43:55,657 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 02:43:55,682 INFO L200 MainTranslator]: Completed pre-run [2024-11-14 02:43:55,695 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c[1335,1348] [2024-11-14 02:43:55,881 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 02:43:55,899 INFO L204 MainTranslator]: Completed translation [2024-11-14 02:43:55,900 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55 WrapperNode [2024-11-14 02:43:55,901 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-14 02:43:55,902 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-14 02:43:55,903 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-14 02:43:55,903 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-14 02:43:55,912 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,001 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,306 INFO L138 Inliner]: procedures = 18, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 3162 [2024-11-14 02:43:56,308 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-14 02:43:56,309 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-14 02:43:56,309 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-14 02:43:56,309 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-14 02:43:56,319 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,319 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,389 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,390 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,510 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,547 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,588 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,613 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,684 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-14 02:43:56,685 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-14 02:43:56,686 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-14 02:43:56,686 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-14 02:43:56,690 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (1/1) ... [2024-11-14 02:43:56,697 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 02:43:56,719 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 02:43:56,735 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-11-14 02:43:56,740 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-11-14 02:43:56,769 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-14 02:43:56,769 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-14 02:43:56,770 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-14 02:43:56,770 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-11-14 02:43:56,770 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-14 02:43:56,770 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-14 02:43:57,273 INFO L238 CfgBuilder]: Building ICFG [2024-11-14 02:43:57,275 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-14 02:44:02,354 INFO L? ?]: Removed 1764 outVars from TransFormulas that were not future-live. [2024-11-14 02:44:02,354 INFO L287 CfgBuilder]: Performing block encoding [2024-11-14 02:44:07,611 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-14 02:44:07,611 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-14 02:44:07,611 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 02:44:07 BoogieIcfgContainer [2024-11-14 02:44:07,612 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-14 02:44:07,614 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-14 02:44:07,614 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-14 02:44:07,619 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-14 02:44:07,619 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 02:43:54" (1/3) ... [2024-11-14 02:44:07,620 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6fb81276 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 02:44:07, skipping insertion in model container [2024-11-14 02:44:07,620 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:43:55" (2/3) ... [2024-11-14 02:44:07,621 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6fb81276 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 02:44:07, skipping insertion in model container [2024-11-14 02:44:07,622 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 02:44:07" (3/3) ... [2024-11-14 02:44:07,624 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-11-14 02:44:07,643 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-14 02:44:07,646 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c that has 2 procedures, 15 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-14 02:44:07,702 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-14 02:44:07,719 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1e92b927, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-14 02:44:07,720 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-14 02:44:07,724 INFO L276 IsEmpty]: Start isEmpty. Operand has 15 states, 9 states have (on average 1.3333333333333333) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 02:44:07,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2024-11-14 02:44:07,733 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:44:07,734 INFO L215 NwaCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:44:07,735 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 02:44:07,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:44:07,740 INFO L85 PathProgramCache]: Analyzing trace with hash -714533268, now seen corresponding path program 1 times [2024-11-14 02:44:07,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:44:07,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892981030] [2024-11-14 02:44:07,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:44:07,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:44:10,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:44:15,272 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-14 02:44:15,272 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:44:15,273 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892981030] [2024-11-14 02:44:15,273 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1892981030] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:44:15,277 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:44:15,277 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 02:44:15,278 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863045376] [2024-11-14 02:44:15,279 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:44:15,283 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-14 02:44:15,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:44:15,303 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-14 02:44:15,304 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 02:44:15,306 INFO L87 Difference]: Start difference. First operand has 15 states, 9 states have (on average 1.3333333333333333) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-14 02:44:17,190 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.87s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:44:19,742 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.08s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-14 02:44:21,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:44:21,057 INFO L93 Difference]: Finished difference Result 36 states and 48 transitions. [2024-11-14 02:44:21,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-14 02:44:21,060 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 16 [2024-11-14 02:44:21,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:44:21,066 INFO L225 Difference]: With dead ends: 36 [2024-11-14 02:44:21,066 INFO L226 Difference]: Without dead ends: 22 [2024-11-14 02:44:21,069 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 02:44:21,072 INFO L432 NwaCegarLoop]: 8 mSDtfsCounter, 0 mSDsluCounter, 15 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.7s IncrementalHoareTripleChecker+Time [2024-11-14 02:44:21,073 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 23 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 1 Unknown, 0 Unchecked, 5.7s Time] [2024-11-14 02:44:21,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2024-11-14 02:44:21,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2024-11-14 02:44:21,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 14 states have internal predecessors, (15), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-14 02:44:21,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 27 transitions. [2024-11-14 02:44:21,106 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 27 transitions. Word has length 16 [2024-11-14 02:44:21,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:44:21,107 INFO L471 AbstractCegarLoop]: Abstraction has 22 states and 27 transitions. [2024-11-14 02:44:21,107 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-14 02:44:21,107 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2024-11-14 02:44:21,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2024-11-14 02:44:21,109 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:44:21,109 INFO L215 NwaCegarLoop]: trace histogram [6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2024-11-14 02:44:21,109 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-14 02:44:21,109 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 02:44:21,110 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:44:21,110 INFO L85 PathProgramCache]: Analyzing trace with hash 383912127, now seen corresponding path program 1 times [2024-11-14 02:44:21,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:44:21,110 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641793772] [2024-11-14 02:44:21,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:44:21,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:44:35,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 02:44:35,174 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-14 02:44:43,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 02:44:43,149 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2024-11-14 02:44:43,149 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-14 02:44:43,151 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-14 02:44:43,153 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-14 02:44:43,157 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1] [2024-11-14 02:44:43,359 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-14 02:44:43,367 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.11 02:44:43 BoogieIcfgContainer [2024-11-14 02:44:43,369 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-14 02:44:43,370 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-14 02:44:43,370 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-14 02:44:43,371 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-14 02:44:43,371 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 02:44:07" (3/4) ... [2024-11-14 02:44:43,374 INFO L145 WitnessPrinter]: No result that supports witness generation found [2024-11-14 02:44:43,374 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-14 02:44:43,376 INFO L158 Benchmark]: Toolchain (without parser) took 48410.48ms. Allocated memory was 117.4MB in the beginning and 1.6GB in the end (delta: 1.5GB). Free memory was 92.9MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 413.6MB. Max. memory is 16.1GB. [2024-11-14 02:44:43,377 INFO L158 Benchmark]: CDTParser took 1.41ms. Allocated memory is still 142.6MB. Free memory is still 80.4MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 02:44:43,377 INFO L158 Benchmark]: CACSL2BoogieTranslator took 933.67ms. Allocated memory is still 117.4MB. Free memory was 92.9MB in the beginning and 40.5MB in the end (delta: 52.4MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-11-14 02:44:43,378 INFO L158 Benchmark]: Boogie Procedure Inliner took 405.90ms. Allocated memory was 117.4MB in the beginning and 352.3MB in the end (delta: 234.9MB). Free memory was 40.5MB in the beginning and 263.3MB in the end (delta: -222.8MB). Peak memory consumption was 26.1MB. Max. memory is 16.1GB. [2024-11-14 02:44:43,378 INFO L158 Benchmark]: Boogie Preprocessor took 374.95ms. Allocated memory is still 352.3MB. Free memory was 263.3MB in the beginning and 241.2MB in the end (delta: 22.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-11-14 02:44:43,380 INFO L158 Benchmark]: RCFGBuilder took 10926.16ms. Allocated memory was 352.3MB in the beginning and 704.6MB in the end (delta: 352.3MB). Free memory was 241.2MB in the beginning and 517.3MB in the end (delta: -276.1MB). Peak memory consumption was 438.7MB. Max. memory is 16.1GB. [2024-11-14 02:44:43,380 INFO L158 Benchmark]: TraceAbstraction took 35755.74ms. Allocated memory was 704.6MB in the beginning and 1.6GB in the end (delta: 880.8MB). Free memory was 517.3MB in the beginning and 1.2GB in the end (delta: -634.2MB). Peak memory consumption was 907.2MB. Max. memory is 16.1GB. [2024-11-14 02:44:43,380 INFO L158 Benchmark]: Witness Printer took 4.60ms. Allocated memory is still 1.6GB. Free memory was 1.2GB in the beginning and 1.2GB in the end (delta: 139.4kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-14 02:44:43,385 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.41ms. Allocated memory is still 142.6MB. Free memory is still 80.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 933.67ms. Allocated memory is still 117.4MB. Free memory was 92.9MB in the beginning and 40.5MB in the end (delta: 52.4MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 405.90ms. Allocated memory was 117.4MB in the beginning and 352.3MB in the end (delta: 234.9MB). Free memory was 40.5MB in the beginning and 263.3MB in the end (delta: -222.8MB). Peak memory consumption was 26.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 374.95ms. Allocated memory is still 352.3MB. Free memory was 263.3MB in the beginning and 241.2MB in the end (delta: 22.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * RCFGBuilder took 10926.16ms. Allocated memory was 352.3MB in the beginning and 704.6MB in the end (delta: 352.3MB). Free memory was 241.2MB in the beginning and 517.3MB in the end (delta: -276.1MB). Peak memory consumption was 438.7MB. Max. memory is 16.1GB. * TraceAbstraction took 35755.74ms. Allocated memory was 704.6MB in the beginning and 1.6GB in the end (delta: 880.8MB). Free memory was 517.3MB in the beginning and 1.2GB in the end (delta: -634.2MB). Peak memory consumption was 907.2MB. Max. memory is 16.1GB. * Witness Printer took 4.60ms. Allocated memory is still 1.6GB. Free memory was 1.2GB in the beginning and 1.2GB in the end (delta: 139.4kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 22]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 585, overapproximation of bitwiseOr at line 160, overapproximation of bitwiseOr at line 176, overapproximation of bitwiseOr at line 620, overapproximation of bitwiseOr at line 195, overapproximation of bitwiseAnd at line 213, overapproximation of bitwiseAnd at line 601, overapproximation of bitwiseAnd at line 165, overapproximation of bitwiseAnd at line 201, overapproximation of bitwiseAnd at line 148, overapproximation of bitwiseAnd at line 97. Possible FailurePath: [L27] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L28] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L30] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 128); [L31] const SORT_3 msb_SORT_3 = (SORT_3)1 << (128 - 1); [L33] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 7); [L34] const SORT_11 msb_SORT_11 = (SORT_11)1 << (7 - 1); [L36] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 6); [L37] const SORT_13 msb_SORT_13 = (SORT_13)1 << (6 - 1); [L39] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 5); [L40] const SORT_19 msb_SORT_19 = (SORT_19)1 << (5 - 1); [L42] const SORT_100 mask_SORT_100 = (SORT_100)-1 >> (sizeof(SORT_100) * 8 - 4); [L43] const SORT_100 msb_SORT_100 = (SORT_100)1 << (4 - 1); [L45] const SORT_141 mask_SORT_141 = (SORT_141)-1 >> (sizeof(SORT_141) * 8 - 3); [L46] const SORT_141 msb_SORT_141 = (SORT_141)1 << (3 - 1); [L48] const SORT_162 mask_SORT_162 = (SORT_162)-1 >> (sizeof(SORT_162) * 8 - 2); [L49] const SORT_162 msb_SORT_162 = (SORT_162)1 << (2 - 1); [L51] const SORT_13 var_15 = 32; [L52] const SORT_19 var_20 = 31; [L53] const SORT_19 var_25 = 30; [L54] const SORT_19 var_30 = 29; [L55] const SORT_19 var_35 = 28; [L56] const SORT_19 var_40 = 27; [L57] const SORT_19 var_45 = 26; [L58] const SORT_19 var_50 = 25; [L59] const SORT_19 var_55 = 24; [L60] const SORT_19 var_60 = 23; [L61] const SORT_19 var_65 = 22; [L62] const SORT_19 var_70 = 21; [L63] const SORT_19 var_75 = 20; [L64] const SORT_19 var_80 = 19; [L65] const SORT_19 var_85 = 18; [L66] const SORT_19 var_90 = 17; [L67] const SORT_19 var_95 = 16; [L68] const SORT_100 var_101 = 15; [L69] const SORT_100 var_106 = 14; [L70] const SORT_100 var_111 = 13; [L71] const SORT_100 var_116 = 12; [L72] const SORT_100 var_121 = 11; [L73] const SORT_100 var_126 = 10; [L74] const SORT_100 var_131 = 9; [L75] const SORT_100 var_136 = 8; [L76] const SORT_141 var_142 = 7; [L77] const SORT_141 var_147 = 6; [L78] const SORT_141 var_152 = 5; [L79] const SORT_141 var_157 = 4; [L80] const SORT_162 var_163 = 3; [L81] const SORT_162 var_168 = 2; [L82] const SORT_1 var_173 = 1; [L83] const SORT_13 var_186 = 33; [L84] const SORT_11 var_203 = 0; [L85] const SORT_1 var_233 = 0; [L86] const SORT_3 var_582 = 0; [L88] SORT_1 input_2; [L89] SORT_3 input_4; [L90] SORT_1 input_5; [L91] SORT_1 input_6; [L92] SORT_1 input_7; [L93] SORT_1 input_8; [L94] SORT_3 input_9; [L95] SORT_1 input_231; [L97] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L97] SORT_3 state_10 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 [L98] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L99] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L99] SORT_3 state_18 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L100] SORT_3 state_24 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L101] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L101] SORT_3 state_29 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L102] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L102] SORT_3 state_34 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L103] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L103] SORT_3 state_39 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L104] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L104] SORT_3 state_44 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L105] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L105] SORT_3 state_49 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L106] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L106] SORT_3 state_54 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L107] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L107] SORT_3 state_59 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L108] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L108] SORT_3 state_64 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L109] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L109] SORT_3 state_69 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L110] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L110] SORT_3 state_74 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L111] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L111] SORT_3 state_79 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L112] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L112] SORT_3 state_84 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L113] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L113] SORT_3 state_89 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L114] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L114] SORT_3 state_94 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L115] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L115] SORT_3 state_99 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L116] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L116] SORT_3 state_105 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L117] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L117] SORT_3 state_110 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L118] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L118] SORT_3 state_115 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L119] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L119] SORT_3 state_120 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L120] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L120] SORT_3 state_125 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L121] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L121] SORT_3 state_130 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L122] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L122] SORT_3 state_135 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L123] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L123] SORT_3 state_140 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L124] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L124] SORT_3 state_146 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L125] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L125] SORT_3 state_151 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L126] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L126] SORT_3 state_156 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L127] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L127] SORT_3 state_161 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L128] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L128] SORT_3 state_167 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L129] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L129] SORT_3 state_172 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L130] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L130] SORT_3 state_177 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 [L131] SORT_11 state_182 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L132] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L132] SORT_1 state_190 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L133] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L133] SORT_1 state_191 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L134] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 [L134] SORT_11 state_194 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L135] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 [L135] SORT_3 state_209 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L136] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L136] SORT_1 state_213 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L137] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 [L137] SORT_11 state_282 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L139] SORT_1 init_214_arg_1 = var_173; [L140] state_213 = init_214_arg_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_10=4, state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=127, state_209=0, state_213=1, state_24=0, state_282=126, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L143] input_2 = __VERIFIER_nondet_uchar() [L144] input_4 = __VERIFIER_nondet_uint128() [L145] input_5 = __VERIFIER_nondet_uchar() [L146] input_6 = __VERIFIER_nondet_uchar() [L147] input_7 = __VERIFIER_nondet_uchar() [L148] EXPR input_7 & mask_SORT_1 [L148] input_7 = input_7 & mask_SORT_1 [L149] input_8 = __VERIFIER_nondet_uchar() [L150] input_9 = __VERIFIER_nondet_uint128() [L151] input_231 = __VERIFIER_nondet_uchar() [L153] SORT_1 var_215_arg_0 = input_7; [L154] SORT_1 var_215_arg_1 = state_213; [L155] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L156] SORT_1 var_216_arg_0 = var_173; [L157] SORT_1 var_216 = ~var_216_arg_0; [L158] SORT_1 var_217_arg_0 = var_215; [L159] SORT_1 var_217_arg_1 = var_216; [L160] EXPR var_217_arg_0 | var_217_arg_1 [L160] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L161] EXPR var_217 & mask_SORT_1 [L161] var_217 = var_217 & mask_SORT_1 [L162] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_10=4, state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=127, state_209=0, state_213=1, state_24=0, state_282=126, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) [L163] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_10=4, state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=127, state_209=0, state_213=1, state_24=0, state_282=126, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] SORT_13 var_187_arg_0 = var_186; [L165] EXPR var_187_arg_0 & mask_SORT_13 [L165] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L166] SORT_11 var_187 = var_187_arg_0; [L167] SORT_11 var_188_arg_0 = state_182; [L168] SORT_11 var_188_arg_1 = var_187; [L169] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L170] SORT_1 var_219_arg_0 = var_188; [L171] SORT_1 var_219 = ~var_219_arg_0; [L172] SORT_1 var_220_arg_0 = input_6; [L173] SORT_1 var_220 = ~var_220_arg_0; [L174] SORT_1 var_221_arg_0 = var_219; [L175] SORT_1 var_221_arg_1 = var_220; [L176] EXPR var_221_arg_0 | var_221_arg_1 [L176] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L177] SORT_1 var_222_arg_0 = var_173; [L178] SORT_1 var_222 = ~var_222_arg_0; [L179] SORT_1 var_223_arg_0 = var_221; [L180] SORT_1 var_223_arg_1 = var_222; [L181] EXPR var_223_arg_0 | var_223_arg_1 [L181] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L182] EXPR var_223 & mask_SORT_1 [L182] var_223 = var_223 & mask_SORT_1 [L183] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_10=4, state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=127, state_209=0, state_213=1, state_24=0, state_282=126, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) [L184] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_10=4, state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=127, state_209=0, state_213=1, state_24=0, state_282=126, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L185] SORT_11 var_183_arg_0 = state_182; [L186] SORT_1 var_183 = var_183_arg_0 != 0; [L187] SORT_1 var_184_arg_0 = var_183; [L188] SORT_1 var_184 = ~var_184_arg_0; [L189] SORT_1 var_225_arg_0 = var_184; [L190] SORT_1 var_225 = ~var_225_arg_0; [L191] SORT_1 var_226_arg_0 = input_5; [L192] SORT_1 var_226 = ~var_226_arg_0; [L193] SORT_1 var_227_arg_0 = var_225; [L194] SORT_1 var_227_arg_1 = var_226; [L195] EXPR var_227_arg_0 | var_227_arg_1 [L195] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L196] SORT_1 var_228_arg_0 = var_173; [L197] SORT_1 var_228 = ~var_228_arg_0; [L198] SORT_1 var_229_arg_0 = var_227; [L199] SORT_1 var_229_arg_1 = var_228; [L200] EXPR var_229_arg_0 | var_229_arg_1 [L200] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L201] EXPR var_229 & mask_SORT_1 [L201] var_229 = var_229 & mask_SORT_1 [L202] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=0, input_6=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_10=4, state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=127, state_209=0, state_213=1, state_24=0, state_282=126, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L203] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) [L203] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=0, input_6=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_10=4, state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=127, state_209=0, state_213=1, state_24=0, state_282=126, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L205] SORT_1 var_234_arg_0 = state_213; [L206] SORT_1 var_234_arg_1 = var_233; [L207] SORT_1 var_234_arg_2 = var_173; [L208] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L209] SORT_1 var_192_arg_0 = state_191; [L210] SORT_1 var_192 = ~var_192_arg_0; [L211] SORT_1 var_193_arg_0 = state_190; [L212] SORT_1 var_193_arg_1 = var_192; [L213] EXPR var_193_arg_0 & var_193_arg_1 [L213] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L214] SORT_11 var_195_arg_0 = state_194; [L215] SORT_1 var_195 = var_195_arg_0 != 0; [L216] SORT_1 var_196_arg_0 = var_193; [L217] SORT_1 var_196_arg_1 = var_195; [L218] EXPR var_196_arg_0 & var_196_arg_1 [L218] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L219] SORT_1 var_197_arg_0 = state_190; [L220] SORT_1 var_197 = ~var_197_arg_0; [L221] SORT_1 var_198_arg_0 = input_6; [L222] SORT_1 var_198_arg_1 = var_197; [L223] EXPR var_198_arg_0 & var_198_arg_1 [L223] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L224] SORT_1 var_199_arg_0 = var_198; [L225] EXPR var_199_arg_0 & mask_SORT_1 [L225] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L226] SORT_11 var_199 = var_199_arg_0; [L227] SORT_11 var_200_arg_0 = state_194; [L228] SORT_11 var_200_arg_1 = var_199; [L229] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L230] SORT_1 var_201_arg_0 = input_5; [L231] EXPR var_201_arg_0 & mask_SORT_1 [L231] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L232] SORT_11 var_201 = var_201_arg_0; [L233] SORT_11 var_202_arg_0 = var_200; [L234] SORT_11 var_202_arg_1 = var_201; [L235] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L236] SORT_1 var_204_arg_0 = input_7; [L237] SORT_11 var_204_arg_1 = var_203; [L238] SORT_11 var_204_arg_2 = var_202; [L239] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L240] EXPR var_204 & mask_SORT_11 [L240] var_204 = var_204 & mask_SORT_11 [L241] SORT_11 var_205_arg_0 = var_204; [L242] SORT_1 var_205 = var_205_arg_0 != 0; [L243] SORT_1 var_206_arg_0 = var_205; [L244] SORT_1 var_206 = ~var_206_arg_0; [L245] SORT_1 var_207_arg_0 = var_196; [L246] SORT_1 var_207_arg_1 = var_206; [L247] EXPR var_207_arg_0 & var_207_arg_1 [L247] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L248] SORT_1 var_208_arg_0 = var_207; [L249] SORT_1 var_208 = ~var_208_arg_0; [L250] SORT_11 var_14_arg_0 = state_12; [L251] SORT_13 var_14 = var_14_arg_0 >> 0; [L252] EXPR var_14 & mask_SORT_13 [L252] var_14 = var_14 & mask_SORT_13 [L253] SORT_13 var_178_arg_0 = var_14; [L254] SORT_1 var_178 = var_178_arg_0 != 0; [L255] SORT_1 var_179_arg_0 = var_178; [L256] SORT_1 var_179 = ~var_179_arg_0; [L257] EXPR var_179 & mask_SORT_1 [L257] var_179 = var_179 & mask_SORT_1 [L258] SORT_1 var_174_arg_0 = var_173; [L259] EXPR var_174_arg_0 & mask_SORT_1 [L259] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L260] SORT_13 var_174 = var_174_arg_0; [L261] SORT_13 var_175_arg_0 = var_14; [L262] SORT_13 var_175_arg_1 = var_174; [L263] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L264] SORT_162 var_169_arg_0 = var_168; [L265] EXPR var_169_arg_0 & mask_SORT_162 [L265] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L266] SORT_13 var_169 = var_169_arg_0; [L267] SORT_13 var_170_arg_0 = var_14; [L268] SORT_13 var_170_arg_1 = var_169; [L269] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L270] SORT_162 var_164_arg_0 = var_163; [L271] EXPR var_164_arg_0 & mask_SORT_162 [L271] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L272] SORT_13 var_164 = var_164_arg_0; [L273] SORT_13 var_165_arg_0 = var_14; [L274] SORT_13 var_165_arg_1 = var_164; [L275] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L276] SORT_141 var_158_arg_0 = var_157; [L277] EXPR var_158_arg_0 & mask_SORT_141 [L277] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L278] SORT_13 var_158 = var_158_arg_0; [L279] SORT_13 var_159_arg_0 = var_14; [L280] SORT_13 var_159_arg_1 = var_158; [L281] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L282] SORT_141 var_153_arg_0 = var_152; [L283] EXPR var_153_arg_0 & mask_SORT_141 [L283] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L284] SORT_13 var_153 = var_153_arg_0; [L285] SORT_13 var_154_arg_0 = var_14; [L286] SORT_13 var_154_arg_1 = var_153; [L287] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L288] SORT_141 var_148_arg_0 = var_147; [L289] EXPR var_148_arg_0 & mask_SORT_141 [L289] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L290] SORT_13 var_148 = var_148_arg_0; [L291] SORT_13 var_149_arg_0 = var_14; [L292] SORT_13 var_149_arg_1 = var_148; [L293] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L294] SORT_141 var_143_arg_0 = var_142; [L295] EXPR var_143_arg_0 & mask_SORT_141 [L295] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L296] SORT_13 var_143 = var_143_arg_0; [L297] SORT_13 var_144_arg_0 = var_14; [L298] SORT_13 var_144_arg_1 = var_143; [L299] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L300] SORT_100 var_137_arg_0 = var_136; [L301] EXPR var_137_arg_0 & mask_SORT_100 [L301] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L302] SORT_13 var_137 = var_137_arg_0; [L303] SORT_13 var_138_arg_0 = var_14; [L304] SORT_13 var_138_arg_1 = var_137; [L305] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L306] SORT_100 var_132_arg_0 = var_131; [L307] EXPR var_132_arg_0 & mask_SORT_100 [L307] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L308] SORT_13 var_132 = var_132_arg_0; [L309] SORT_13 var_133_arg_0 = var_14; [L310] SORT_13 var_133_arg_1 = var_132; [L311] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L312] SORT_100 var_127_arg_0 = var_126; [L313] EXPR var_127_arg_0 & mask_SORT_100 [L313] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L314] SORT_13 var_127 = var_127_arg_0; [L315] SORT_13 var_128_arg_0 = var_14; [L316] SORT_13 var_128_arg_1 = var_127; [L317] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L318] SORT_100 var_122_arg_0 = var_121; [L319] EXPR var_122_arg_0 & mask_SORT_100 [L319] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L320] SORT_13 var_122 = var_122_arg_0; [L321] SORT_13 var_123_arg_0 = var_14; [L322] SORT_13 var_123_arg_1 = var_122; [L323] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L324] SORT_100 var_117_arg_0 = var_116; [L325] EXPR var_117_arg_0 & mask_SORT_100 [L325] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L326] SORT_13 var_117 = var_117_arg_0; [L327] SORT_13 var_118_arg_0 = var_14; [L328] SORT_13 var_118_arg_1 = var_117; [L329] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L330] SORT_100 var_112_arg_0 = var_111; [L331] EXPR var_112_arg_0 & mask_SORT_100 [L331] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L332] SORT_13 var_112 = var_112_arg_0; [L333] SORT_13 var_113_arg_0 = var_14; [L334] SORT_13 var_113_arg_1 = var_112; [L335] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L336] SORT_100 var_107_arg_0 = var_106; [L337] EXPR var_107_arg_0 & mask_SORT_100 [L337] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L338] SORT_13 var_107 = var_107_arg_0; [L339] SORT_13 var_108_arg_0 = var_14; [L340] SORT_13 var_108_arg_1 = var_107; [L341] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L342] SORT_100 var_102_arg_0 = var_101; [L343] EXPR var_102_arg_0 & mask_SORT_100 [L343] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L344] SORT_13 var_102 = var_102_arg_0; [L345] SORT_13 var_103_arg_0 = var_14; [L346] SORT_13 var_103_arg_1 = var_102; [L347] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L348] SORT_19 var_96_arg_0 = var_95; [L349] EXPR var_96_arg_0 & mask_SORT_19 [L349] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L350] SORT_13 var_96 = var_96_arg_0; [L351] SORT_13 var_97_arg_0 = var_14; [L352] SORT_13 var_97_arg_1 = var_96; [L353] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L354] SORT_19 var_91_arg_0 = var_90; [L355] EXPR var_91_arg_0 & mask_SORT_19 [L355] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L356] SORT_13 var_91 = var_91_arg_0; [L357] SORT_13 var_92_arg_0 = var_14; [L358] SORT_13 var_92_arg_1 = var_91; [L359] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L360] SORT_19 var_86_arg_0 = var_85; [L361] EXPR var_86_arg_0 & mask_SORT_19 [L361] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L362] SORT_13 var_86 = var_86_arg_0; [L363] SORT_13 var_87_arg_0 = var_14; [L364] SORT_13 var_87_arg_1 = var_86; [L365] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L366] SORT_19 var_81_arg_0 = var_80; [L367] EXPR var_81_arg_0 & mask_SORT_19 [L367] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L368] SORT_13 var_81 = var_81_arg_0; [L369] SORT_13 var_82_arg_0 = var_14; [L370] SORT_13 var_82_arg_1 = var_81; [L371] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L372] SORT_19 var_76_arg_0 = var_75; [L373] EXPR var_76_arg_0 & mask_SORT_19 [L373] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L374] SORT_13 var_76 = var_76_arg_0; [L375] SORT_13 var_77_arg_0 = var_14; [L376] SORT_13 var_77_arg_1 = var_76; [L377] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L378] SORT_19 var_71_arg_0 = var_70; [L379] EXPR var_71_arg_0 & mask_SORT_19 [L379] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L380] SORT_13 var_71 = var_71_arg_0; [L381] SORT_13 var_72_arg_0 = var_14; [L382] SORT_13 var_72_arg_1 = var_71; [L383] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L384] SORT_19 var_66_arg_0 = var_65; [L385] EXPR var_66_arg_0 & mask_SORT_19 [L385] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L386] SORT_13 var_66 = var_66_arg_0; [L387] SORT_13 var_67_arg_0 = var_14; [L388] SORT_13 var_67_arg_1 = var_66; [L389] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L390] SORT_19 var_61_arg_0 = var_60; [L391] EXPR var_61_arg_0 & mask_SORT_19 [L391] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L392] SORT_13 var_61 = var_61_arg_0; [L393] SORT_13 var_62_arg_0 = var_14; [L394] SORT_13 var_62_arg_1 = var_61; [L395] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L396] SORT_19 var_56_arg_0 = var_55; [L397] EXPR var_56_arg_0 & mask_SORT_19 [L397] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L398] SORT_13 var_56 = var_56_arg_0; [L399] SORT_13 var_57_arg_0 = var_14; [L400] SORT_13 var_57_arg_1 = var_56; [L401] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L402] SORT_19 var_51_arg_0 = var_50; [L403] EXPR var_51_arg_0 & mask_SORT_19 [L403] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L404] SORT_13 var_51 = var_51_arg_0; [L405] SORT_13 var_52_arg_0 = var_14; [L406] SORT_13 var_52_arg_1 = var_51; [L407] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L408] SORT_19 var_46_arg_0 = var_45; [L409] EXPR var_46_arg_0 & mask_SORT_19 [L409] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L410] SORT_13 var_46 = var_46_arg_0; [L411] SORT_13 var_47_arg_0 = var_14; [L412] SORT_13 var_47_arg_1 = var_46; [L413] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L414] SORT_19 var_41_arg_0 = var_40; [L415] EXPR var_41_arg_0 & mask_SORT_19 [L415] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L416] SORT_13 var_41 = var_41_arg_0; [L417] SORT_13 var_42_arg_0 = var_14; [L418] SORT_13 var_42_arg_1 = var_41; [L419] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L420] SORT_19 var_36_arg_0 = var_35; [L421] EXPR var_36_arg_0 & mask_SORT_19 [L421] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L422] SORT_13 var_36 = var_36_arg_0; [L423] SORT_13 var_37_arg_0 = var_14; [L424] SORT_13 var_37_arg_1 = var_36; [L425] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L426] SORT_19 var_31_arg_0 = var_30; [L427] EXPR var_31_arg_0 & mask_SORT_19 [L427] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L428] SORT_13 var_31 = var_31_arg_0; [L429] SORT_13 var_32_arg_0 = var_14; [L430] SORT_13 var_32_arg_1 = var_31; [L431] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L432] SORT_19 var_26_arg_0 = var_25; [L433] EXPR var_26_arg_0 & mask_SORT_19 [L433] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L434] SORT_13 var_26 = var_26_arg_0; [L435] SORT_13 var_27_arg_0 = var_14; [L436] SORT_13 var_27_arg_1 = var_26; [L437] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L438] SORT_19 var_21_arg_0 = var_20; [L439] EXPR var_21_arg_0 & mask_SORT_19 [L439] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L440] SORT_13 var_21 = var_21_arg_0; [L441] SORT_13 var_22_arg_0 = var_14; [L442] SORT_13 var_22_arg_1 = var_21; [L443] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L444] SORT_13 var_16_arg_0 = var_14; [L445] SORT_13 var_16_arg_1 = var_15; [L446] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L447] SORT_1 var_17_arg_0 = var_16; [L448] SORT_3 var_17_arg_1 = state_10; [L449] SORT_3 var_17_arg_2 = input_9; [L450] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L451] SORT_1 var_23_arg_0 = var_22; [L452] SORT_3 var_23_arg_1 = state_18; [L453] SORT_3 var_23_arg_2 = var_17; [L454] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L455] SORT_1 var_28_arg_0 = var_27; [L456] SORT_3 var_28_arg_1 = state_24; [L457] SORT_3 var_28_arg_2 = var_23; [L458] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L459] SORT_1 var_33_arg_0 = var_32; [L460] SORT_3 var_33_arg_1 = state_29; [L461] SORT_3 var_33_arg_2 = var_28; [L462] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L463] SORT_1 var_38_arg_0 = var_37; [L464] SORT_3 var_38_arg_1 = state_34; [L465] SORT_3 var_38_arg_2 = var_33; [L466] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L467] SORT_1 var_43_arg_0 = var_42; [L468] SORT_3 var_43_arg_1 = state_39; [L469] SORT_3 var_43_arg_2 = var_38; [L470] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L471] SORT_1 var_48_arg_0 = var_47; [L472] SORT_3 var_48_arg_1 = state_44; [L473] SORT_3 var_48_arg_2 = var_43; [L474] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L475] SORT_1 var_53_arg_0 = var_52; [L476] SORT_3 var_53_arg_1 = state_49; [L477] SORT_3 var_53_arg_2 = var_48; [L478] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L479] SORT_1 var_58_arg_0 = var_57; [L480] SORT_3 var_58_arg_1 = state_54; [L481] SORT_3 var_58_arg_2 = var_53; [L482] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L483] SORT_1 var_63_arg_0 = var_62; [L484] SORT_3 var_63_arg_1 = state_59; [L485] SORT_3 var_63_arg_2 = var_58; [L486] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L487] SORT_1 var_68_arg_0 = var_67; [L488] SORT_3 var_68_arg_1 = state_64; [L489] SORT_3 var_68_arg_2 = var_63; [L490] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L491] SORT_1 var_73_arg_0 = var_72; [L492] SORT_3 var_73_arg_1 = state_69; [L493] SORT_3 var_73_arg_2 = var_68; [L494] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L495] SORT_1 var_78_arg_0 = var_77; [L496] SORT_3 var_78_arg_1 = state_74; [L497] SORT_3 var_78_arg_2 = var_73; [L498] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L499] SORT_1 var_83_arg_0 = var_82; [L500] SORT_3 var_83_arg_1 = state_79; [L501] SORT_3 var_83_arg_2 = var_78; [L502] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L503] SORT_1 var_88_arg_0 = var_87; [L504] SORT_3 var_88_arg_1 = state_84; [L505] SORT_3 var_88_arg_2 = var_83; [L506] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L507] SORT_1 var_93_arg_0 = var_92; [L508] SORT_3 var_93_arg_1 = state_89; [L509] SORT_3 var_93_arg_2 = var_88; [L510] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L511] SORT_1 var_98_arg_0 = var_97; [L512] SORT_3 var_98_arg_1 = state_94; [L513] SORT_3 var_98_arg_2 = var_93; [L514] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L515] SORT_1 var_104_arg_0 = var_103; [L516] SORT_3 var_104_arg_1 = state_99; [L517] SORT_3 var_104_arg_2 = var_98; [L518] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L519] SORT_1 var_109_arg_0 = var_108; [L520] SORT_3 var_109_arg_1 = state_105; [L521] SORT_3 var_109_arg_2 = var_104; [L522] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L523] SORT_1 var_114_arg_0 = var_113; [L524] SORT_3 var_114_arg_1 = state_110; [L525] SORT_3 var_114_arg_2 = var_109; [L526] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L527] SORT_1 var_119_arg_0 = var_118; [L528] SORT_3 var_119_arg_1 = state_115; [L529] SORT_3 var_119_arg_2 = var_114; [L530] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L531] SORT_1 var_124_arg_0 = var_123; [L532] SORT_3 var_124_arg_1 = state_120; [L533] SORT_3 var_124_arg_2 = var_119; [L534] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L535] SORT_1 var_129_arg_0 = var_128; [L536] SORT_3 var_129_arg_1 = state_125; [L537] SORT_3 var_129_arg_2 = var_124; [L538] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L539] SORT_1 var_134_arg_0 = var_133; [L540] SORT_3 var_134_arg_1 = state_130; [L541] SORT_3 var_134_arg_2 = var_129; [L542] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L543] SORT_1 var_139_arg_0 = var_138; [L544] SORT_3 var_139_arg_1 = state_135; [L545] SORT_3 var_139_arg_2 = var_134; [L546] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L547] SORT_1 var_145_arg_0 = var_144; [L548] SORT_3 var_145_arg_1 = state_140; [L549] SORT_3 var_145_arg_2 = var_139; [L550] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L551] SORT_1 var_150_arg_0 = var_149; [L552] SORT_3 var_150_arg_1 = state_146; [L553] SORT_3 var_150_arg_2 = var_145; [L554] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L555] SORT_1 var_155_arg_0 = var_154; [L556] SORT_3 var_155_arg_1 = state_151; [L557] SORT_3 var_155_arg_2 = var_150; [L558] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L559] SORT_1 var_160_arg_0 = var_159; [L560] SORT_3 var_160_arg_1 = state_156; [L561] SORT_3 var_160_arg_2 = var_155; [L562] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L563] SORT_1 var_166_arg_0 = var_165; [L564] SORT_3 var_166_arg_1 = state_161; [L565] SORT_3 var_166_arg_2 = var_160; [L566] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L567] SORT_1 var_171_arg_0 = var_170; [L568] SORT_3 var_171_arg_1 = state_167; [L569] SORT_3 var_171_arg_2 = var_166; [L570] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L571] SORT_1 var_176_arg_0 = var_175; [L572] SORT_3 var_176_arg_1 = state_172; [L573] SORT_3 var_176_arg_2 = var_171; [L574] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L575] SORT_1 var_180_arg_0 = var_179; [L576] SORT_3 var_180_arg_1 = state_177; [L577] SORT_3 var_180_arg_2 = var_176; [L578] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; [L579] EXPR var_180 & mask_SORT_3 [L579] var_180 = var_180 & mask_SORT_3 [L580] SORT_3 var_210_arg_0 = state_209; [L581] SORT_3 var_210_arg_1 = var_180; [L582] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L583] SORT_1 var_211_arg_0 = var_208; [L584] SORT_1 var_211_arg_1 = var_210; [L585] EXPR var_211_arg_0 | var_211_arg_1 [L585] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L586] SORT_1 var_232_arg_0 = state_213; [L587] SORT_1 var_232_arg_1 = input_231; [L588] SORT_1 var_232_arg_2 = var_211; [L589] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L590] SORT_1 var_235_arg_0 = var_232; [L591] SORT_1 var_235 = ~var_235_arg_0; [L592] SORT_1 var_236_arg_0 = var_234; [L593] SORT_1 var_236_arg_1 = var_235; [L594] EXPR var_236_arg_0 & var_236_arg_1 [L594] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L595] EXPR var_236 & mask_SORT_1 [L595] var_236 = var_236 & mask_SORT_1 [L596] SORT_1 bad_237_arg_0 = var_236; [L597] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L22] COND FALSE !(!(cond)) [L597] RET __VERIFIER_assert(!(bad_237_arg_0)) [L599] SORT_11 var_283_arg_0 = state_282; [L600] SORT_13 var_283 = var_283_arg_0 >> 0; [L601] EXPR var_283 & mask_SORT_13 [L601] var_283 = var_283 & mask_SORT_13 [L602] SORT_13 var_459_arg_0 = var_283; [L603] SORT_13 var_459_arg_1 = var_15; [L604] SORT_1 var_459 = var_459_arg_0 == var_459_arg_1; [L605] SORT_1 var_460_arg_0 = input_6; [L606] SORT_1 var_460_arg_1 = var_459; [L607] EXPR var_460_arg_0 & var_460_arg_1 [L607] SORT_1 var_460 = var_460_arg_0 & var_460_arg_1; [L608] EXPR var_460 & mask_SORT_1 [L608] var_460 = var_460 & mask_SORT_1 [L609] SORT_1 var_581_arg_0 = var_460; [L610] SORT_3 var_581_arg_1 = input_4; [L611] SORT_3 var_581_arg_2 = state_10; [L612] SORT_3 var_581 = var_581_arg_0 ? var_581_arg_1 : var_581_arg_2; [L613] SORT_1 var_583_arg_0 = input_7; [L614] SORT_3 var_583_arg_1 = var_582; [L615] SORT_3 var_583_arg_2 = var_581; [L616] SORT_3 var_583 = var_583_arg_0 ? var_583_arg_1 : var_583_arg_2; [L617] SORT_3 next_584_arg_1 = var_583; [L618] SORT_1 var_241_arg_0 = input_6; [L619] SORT_1 var_241_arg_1 = input_5; [L620] EXPR var_241_arg_0 | var_241_arg_1 [L620] SORT_1 var_241 = var_241_arg_0 | var_241_arg_1; [L621] SORT_1 var_242_arg_0 = var_241; [L622] SORT_1 var_242_arg_1 = input_7; [L623] EXPR var_242_arg_0 | var_242_arg_1 [L623] SORT_1 var_242 = var_242_arg_0 | var_242_arg_1; [L624] EXPR var_242 & mask_SORT_1 [L624] var_242 = var_242 & mask_SORT_1 [L625] SORT_1 var_512_arg_0 = input_5; [L626] EXPR var_512_arg_0 & mask_SORT_1 [L626] var_512_arg_0 = var_512_arg_0 & mask_SORT_1 [L627] SORT_11 var_512 = var_512_arg_0; [L628] SORT_11 var_513_arg_0 = state_12; [L629] SORT_11 var_513_arg_1 = var_512; [L630] SORT_11 var_513 = var_513_arg_0 + var_513_arg_1; [L631] SORT_1 var_585_arg_0 = var_242; [L632] SORT_11 var_585_arg_1 = var_513; [L633] SORT_11 var_585_arg_2 = state_12; [L634] SORT_11 var_585 = var_585_arg_0 ? var_585_arg_1 : var_585_arg_2; [L635] SORT_1 var_586_arg_0 = input_7; [L636] SORT_11 var_586_arg_1 = var_203; [L637] SORT_11 var_586_arg_2 = var_585; [L638] SORT_11 var_586 = var_586_arg_0 ? var_586_arg_1 : var_586_arg_2; [L639] SORT_11 next_587_arg_1 = var_586; [L640] SORT_19 var_452_arg_0 = var_20; [L641] EXPR var_452_arg_0 & mask_SORT_19 [L641] var_452_arg_0 = var_452_arg_0 & mask_SORT_19 [L642] SORT_13 var_452 = var_452_arg_0; [L643] SORT_13 var_453_arg_0 = var_283; [L644] SORT_13 var_453_arg_1 = var_452; [L645] SORT_1 var_453 = var_453_arg_0 == var_453_arg_1; [L646] SORT_1 var_454_arg_0 = input_6; [L647] SORT_1 var_454_arg_1 = var_453; [L648] EXPR var_454_arg_0 & var_454_arg_1 [L648] SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; [L649] EXPR var_454 & mask_SORT_1 [L649] var_454 = var_454 & mask_SORT_1 [L650] SORT_1 var_588_arg_0 = var_454; [L651] SORT_3 var_588_arg_1 = input_4; [L652] SORT_3 var_588_arg_2 = state_18; [L653] SORT_3 var_588 = var_588_arg_0 ? var_588_arg_1 : var_588_arg_2; [L654] SORT_1 var_589_arg_0 = input_7; [L655] SORT_3 var_589_arg_1 = var_582; [L656] SORT_3 var_589_arg_2 = var_588; [L657] SORT_3 var_589 = var_589_arg_0 ? var_589_arg_1 : var_589_arg_2; [L658] SORT_3 next_590_arg_1 = var_589; [L659] SORT_19 var_445_arg_0 = var_25; [L660] EXPR var_445_arg_0 & mask_SORT_19 [L660] var_445_arg_0 = var_445_arg_0 & mask_SORT_19 [L661] SORT_13 var_445 = var_445_arg_0; [L662] SORT_13 var_446_arg_0 = var_283; [L663] SORT_13 var_446_arg_1 = var_445; [L664] SORT_1 var_446 = var_446_arg_0 == var_446_arg_1; [L665] SORT_1 var_447_arg_0 = input_6; [L666] SORT_1 var_447_arg_1 = var_446; [L667] EXPR var_447_arg_0 & var_447_arg_1 [L667] SORT_1 var_447 = var_447_arg_0 & var_447_arg_1; [L668] EXPR var_447 & mask_SORT_1 [L668] var_447 = var_447 & mask_SORT_1 [L669] SORT_1 var_591_arg_0 = var_447; [L670] SORT_3 var_591_arg_1 = input_4; [L671] SORT_3 var_591_arg_2 = state_24; [L672] SORT_3 var_591 = var_591_arg_0 ? var_591_arg_1 : var_591_arg_2; [L673] SORT_1 var_592_arg_0 = input_7; [L674] SORT_3 var_592_arg_1 = var_582; [L675] SORT_3 var_592_arg_2 = var_591; [L676] SORT_3 var_592 = var_592_arg_0 ? var_592_arg_1 : var_592_arg_2; [L677] SORT_3 next_593_arg_1 = var_592; [L678] SORT_19 var_431_arg_0 = var_30; [L679] EXPR var_431_arg_0 & mask_SORT_19 [L679] var_431_arg_0 = var_431_arg_0 & mask_SORT_19 [L680] SORT_13 var_431 = var_431_arg_0; [L681] SORT_13 var_432_arg_0 = var_283; [L682] SORT_13 var_432_arg_1 = var_431; [L683] SORT_1 var_432 = var_432_arg_0 == var_432_arg_1; [L684] SORT_1 var_433_arg_0 = input_6; [L685] SORT_1 var_433_arg_1 = var_432; [L686] EXPR var_433_arg_0 & var_433_arg_1 [L686] SORT_1 var_433 = var_433_arg_0 & var_433_arg_1; [L687] EXPR var_433 & mask_SORT_1 [L687] var_433 = var_433 & mask_SORT_1 [L688] SORT_1 var_594_arg_0 = var_433; [L689] SORT_3 var_594_arg_1 = input_4; [L690] SORT_3 var_594_arg_2 = state_29; [L691] SORT_3 var_594 = var_594_arg_0 ? var_594_arg_1 : var_594_arg_2; [L692] SORT_1 var_595_arg_0 = input_7; [L693] SORT_3 var_595_arg_1 = var_582; [L694] SORT_3 var_595_arg_2 = var_594; [L695] SORT_3 var_595 = var_595_arg_0 ? var_595_arg_1 : var_595_arg_2; [L696] SORT_3 next_596_arg_1 = var_595; [L697] SORT_19 var_424_arg_0 = var_35; [L698] EXPR var_424_arg_0 & mask_SORT_19 [L698] var_424_arg_0 = var_424_arg_0 & mask_SORT_19 [L699] SORT_13 var_424 = var_424_arg_0; [L700] SORT_13 var_425_arg_0 = var_283; [L701] SORT_13 var_425_arg_1 = var_424; [L702] SORT_1 var_425 = var_425_arg_0 == var_425_arg_1; [L703] SORT_1 var_426_arg_0 = input_6; [L704] SORT_1 var_426_arg_1 = var_425; [L705] EXPR var_426_arg_0 & var_426_arg_1 [L705] SORT_1 var_426 = var_426_arg_0 & var_426_arg_1; [L706] EXPR var_426 & mask_SORT_1 [L706] var_426 = var_426 & mask_SORT_1 [L707] SORT_1 var_597_arg_0 = var_426; [L708] SORT_3 var_597_arg_1 = input_4; [L709] SORT_3 var_597_arg_2 = state_34; [L710] SORT_3 var_597 = var_597_arg_0 ? var_597_arg_1 : var_597_arg_2; [L711] SORT_1 var_598_arg_0 = input_7; [L712] SORT_3 var_598_arg_1 = var_582; [L713] SORT_3 var_598_arg_2 = var_597; [L714] SORT_3 var_598 = var_598_arg_0 ? var_598_arg_1 : var_598_arg_2; [L715] SORT_3 next_599_arg_1 = var_598; [L716] SORT_19 var_417_arg_0 = var_40; [L717] EXPR var_417_arg_0 & mask_SORT_19 [L717] var_417_arg_0 = var_417_arg_0 & mask_SORT_19 [L718] SORT_13 var_417 = var_417_arg_0; [L719] SORT_13 var_418_arg_0 = var_283; [L720] SORT_13 var_418_arg_1 = var_417; [L721] SORT_1 var_418 = var_418_arg_0 == var_418_arg_1; [L722] SORT_1 var_419_arg_0 = input_6; [L723] SORT_1 var_419_arg_1 = var_418; [L724] EXPR var_419_arg_0 & var_419_arg_1 [L724] SORT_1 var_419 = var_419_arg_0 & var_419_arg_1; [L725] EXPR var_419 & mask_SORT_1 [L725] var_419 = var_419 & mask_SORT_1 [L726] SORT_1 var_600_arg_0 = var_419; [L727] SORT_3 var_600_arg_1 = input_4; [L728] SORT_3 var_600_arg_2 = state_39; [L729] SORT_3 var_600 = var_600_arg_0 ? var_600_arg_1 : var_600_arg_2; [L730] SORT_1 var_601_arg_0 = input_7; [L731] SORT_3 var_601_arg_1 = var_582; [L732] SORT_3 var_601_arg_2 = var_600; [L733] SORT_3 var_601 = var_601_arg_0 ? var_601_arg_1 : var_601_arg_2; [L734] SORT_3 next_602_arg_1 = var_601; [L735] SORT_19 var_410_arg_0 = var_45; [L736] EXPR var_410_arg_0 & mask_SORT_19 [L736] var_410_arg_0 = var_410_arg_0 & mask_SORT_19 [L737] SORT_13 var_410 = var_410_arg_0; [L738] SORT_13 var_411_arg_0 = var_283; [L739] SORT_13 var_411_arg_1 = var_410; [L740] SORT_1 var_411 = var_411_arg_0 == var_411_arg_1; [L741] SORT_1 var_412_arg_0 = input_6; [L742] SORT_1 var_412_arg_1 = var_411; [L743] EXPR var_412_arg_0 & var_412_arg_1 [L743] SORT_1 var_412 = var_412_arg_0 & var_412_arg_1; [L744] EXPR var_412 & mask_SORT_1 [L744] var_412 = var_412 & mask_SORT_1 [L745] SORT_1 var_603_arg_0 = var_412; [L746] SORT_3 var_603_arg_1 = input_4; [L747] SORT_3 var_603_arg_2 = state_44; [L748] SORT_3 var_603 = var_603_arg_0 ? var_603_arg_1 : var_603_arg_2; [L749] SORT_1 var_604_arg_0 = input_7; [L750] SORT_3 var_604_arg_1 = var_582; [L751] SORT_3 var_604_arg_2 = var_603; [L752] SORT_3 var_604 = var_604_arg_0 ? var_604_arg_1 : var_604_arg_2; [L753] SORT_3 next_605_arg_1 = var_604; [L754] SORT_19 var_403_arg_0 = var_50; [L755] EXPR var_403_arg_0 & mask_SORT_19 [L755] var_403_arg_0 = var_403_arg_0 & mask_SORT_19 [L756] SORT_13 var_403 = var_403_arg_0; [L757] SORT_13 var_404_arg_0 = var_283; [L758] SORT_13 var_404_arg_1 = var_403; [L759] SORT_1 var_404 = var_404_arg_0 == var_404_arg_1; [L760] SORT_1 var_405_arg_0 = input_6; [L761] SORT_1 var_405_arg_1 = var_404; [L762] EXPR var_405_arg_0 & var_405_arg_1 [L762] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L763] EXPR var_405 & mask_SORT_1 [L763] var_405 = var_405 & mask_SORT_1 [L764] SORT_1 var_606_arg_0 = var_405; [L765] SORT_3 var_606_arg_1 = input_4; [L766] SORT_3 var_606_arg_2 = state_49; [L767] SORT_3 var_606 = var_606_arg_0 ? var_606_arg_1 : var_606_arg_2; [L768] SORT_1 var_607_arg_0 = input_7; [L769] SORT_3 var_607_arg_1 = var_582; [L770] SORT_3 var_607_arg_2 = var_606; [L771] SORT_3 var_607 = var_607_arg_0 ? var_607_arg_1 : var_607_arg_2; [L772] SORT_3 next_608_arg_1 = var_607; [L773] SORT_19 var_396_arg_0 = var_55; [L774] EXPR var_396_arg_0 & mask_SORT_19 [L774] var_396_arg_0 = var_396_arg_0 & mask_SORT_19 [L775] SORT_13 var_396 = var_396_arg_0; [L776] SORT_13 var_397_arg_0 = var_283; [L777] SORT_13 var_397_arg_1 = var_396; [L778] SORT_1 var_397 = var_397_arg_0 == var_397_arg_1; [L779] SORT_1 var_398_arg_0 = input_6; [L780] SORT_1 var_398_arg_1 = var_397; [L781] EXPR var_398_arg_0 & var_398_arg_1 [L781] SORT_1 var_398 = var_398_arg_0 & var_398_arg_1; [L782] EXPR var_398 & mask_SORT_1 [L782] var_398 = var_398 & mask_SORT_1 [L783] SORT_1 var_609_arg_0 = var_398; [L784] SORT_3 var_609_arg_1 = input_4; [L785] SORT_3 var_609_arg_2 = state_54; [L786] SORT_3 var_609 = var_609_arg_0 ? var_609_arg_1 : var_609_arg_2; [L787] SORT_1 var_610_arg_0 = input_7; [L788] SORT_3 var_610_arg_1 = var_582; [L789] SORT_3 var_610_arg_2 = var_609; [L790] SORT_3 var_610 = var_610_arg_0 ? var_610_arg_1 : var_610_arg_2; [L791] SORT_3 next_611_arg_1 = var_610; [L792] SORT_19 var_389_arg_0 = var_60; [L793] EXPR var_389_arg_0 & mask_SORT_19 [L793] var_389_arg_0 = var_389_arg_0 & mask_SORT_19 [L794] SORT_13 var_389 = var_389_arg_0; [L795] SORT_13 var_390_arg_0 = var_283; [L796] SORT_13 var_390_arg_1 = var_389; [L797] SORT_1 var_390 = var_390_arg_0 == var_390_arg_1; [L798] SORT_1 var_391_arg_0 = input_6; [L799] SORT_1 var_391_arg_1 = var_390; [L800] EXPR var_391_arg_0 & var_391_arg_1 [L800] SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; [L801] EXPR var_391 & mask_SORT_1 [L801] var_391 = var_391 & mask_SORT_1 [L802] SORT_1 var_612_arg_0 = var_391; [L803] SORT_3 var_612_arg_1 = input_4; [L804] SORT_3 var_612_arg_2 = state_59; [L805] SORT_3 var_612 = var_612_arg_0 ? var_612_arg_1 : var_612_arg_2; [L806] SORT_1 var_613_arg_0 = input_7; [L807] SORT_3 var_613_arg_1 = var_582; [L808] SORT_3 var_613_arg_2 = var_612; [L809] SORT_3 var_613 = var_613_arg_0 ? var_613_arg_1 : var_613_arg_2; [L810] SORT_3 next_614_arg_1 = var_613; [L811] SORT_19 var_382_arg_0 = var_65; [L812] EXPR var_382_arg_0 & mask_SORT_19 [L812] var_382_arg_0 = var_382_arg_0 & mask_SORT_19 [L813] SORT_13 var_382 = var_382_arg_0; [L814] SORT_13 var_383_arg_0 = var_283; [L815] SORT_13 var_383_arg_1 = var_382; [L816] SORT_1 var_383 = var_383_arg_0 == var_383_arg_1; [L817] SORT_1 var_384_arg_0 = input_6; [L818] SORT_1 var_384_arg_1 = var_383; [L819] EXPR var_384_arg_0 & var_384_arg_1 [L819] SORT_1 var_384 = var_384_arg_0 & var_384_arg_1; [L820] EXPR var_384 & mask_SORT_1 [L820] var_384 = var_384 & mask_SORT_1 [L821] SORT_1 var_615_arg_0 = var_384; [L822] SORT_3 var_615_arg_1 = input_4; [L823] SORT_3 var_615_arg_2 = state_64; [L824] SORT_3 var_615 = var_615_arg_0 ? var_615_arg_1 : var_615_arg_2; [L825] SORT_1 var_616_arg_0 = input_7; [L826] SORT_3 var_616_arg_1 = var_582; [L827] SORT_3 var_616_arg_2 = var_615; [L828] SORT_3 var_616 = var_616_arg_0 ? var_616_arg_1 : var_616_arg_2; [L829] SORT_3 next_617_arg_1 = var_616; [L830] SORT_19 var_375_arg_0 = var_70; [L831] EXPR var_375_arg_0 & mask_SORT_19 [L831] var_375_arg_0 = var_375_arg_0 & mask_SORT_19 [L832] SORT_13 var_375 = var_375_arg_0; [L833] SORT_13 var_376_arg_0 = var_283; [L834] SORT_13 var_376_arg_1 = var_375; [L835] SORT_1 var_376 = var_376_arg_0 == var_376_arg_1; [L836] SORT_1 var_377_arg_0 = input_6; [L837] SORT_1 var_377_arg_1 = var_376; [L838] EXPR var_377_arg_0 & var_377_arg_1 [L838] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L839] EXPR var_377 & mask_SORT_1 [L839] var_377 = var_377 & mask_SORT_1 [L840] SORT_1 var_618_arg_0 = var_377; [L841] SORT_3 var_618_arg_1 = input_4; [L842] SORT_3 var_618_arg_2 = state_69; [L843] SORT_3 var_618 = var_618_arg_0 ? var_618_arg_1 : var_618_arg_2; [L844] SORT_1 var_619_arg_0 = input_7; [L845] SORT_3 var_619_arg_1 = var_582; [L846] SORT_3 var_619_arg_2 = var_618; [L847] SORT_3 var_619 = var_619_arg_0 ? var_619_arg_1 : var_619_arg_2; [L848] SORT_3 next_620_arg_1 = var_619; [L849] SORT_19 var_368_arg_0 = var_75; [L850] EXPR var_368_arg_0 & mask_SORT_19 [L850] var_368_arg_0 = var_368_arg_0 & mask_SORT_19 [L851] SORT_13 var_368 = var_368_arg_0; [L852] SORT_13 var_369_arg_0 = var_283; [L853] SORT_13 var_369_arg_1 = var_368; [L854] SORT_1 var_369 = var_369_arg_0 == var_369_arg_1; [L855] SORT_1 var_370_arg_0 = input_6; [L856] SORT_1 var_370_arg_1 = var_369; [L857] EXPR var_370_arg_0 & var_370_arg_1 [L857] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L858] EXPR var_370 & mask_SORT_1 [L858] var_370 = var_370 & mask_SORT_1 [L859] SORT_1 var_621_arg_0 = var_370; [L860] SORT_3 var_621_arg_1 = input_4; [L861] SORT_3 var_621_arg_2 = state_74; [L862] SORT_3 var_621 = var_621_arg_0 ? var_621_arg_1 : var_621_arg_2; [L863] SORT_1 var_622_arg_0 = input_7; [L864] SORT_3 var_622_arg_1 = var_582; [L865] SORT_3 var_622_arg_2 = var_621; [L866] SORT_3 var_622 = var_622_arg_0 ? var_622_arg_1 : var_622_arg_2; [L867] SORT_3 next_623_arg_1 = var_622; [L868] SORT_19 var_354_arg_0 = var_80; [L869] EXPR var_354_arg_0 & mask_SORT_19 [L869] var_354_arg_0 = var_354_arg_0 & mask_SORT_19 [L870] SORT_13 var_354 = var_354_arg_0; [L871] SORT_13 var_355_arg_0 = var_283; [L872] SORT_13 var_355_arg_1 = var_354; [L873] SORT_1 var_355 = var_355_arg_0 == var_355_arg_1; [L874] SORT_1 var_356_arg_0 = input_6; [L875] SORT_1 var_356_arg_1 = var_355; [L876] EXPR var_356_arg_0 & var_356_arg_1 [L876] SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; [L877] EXPR var_356 & mask_SORT_1 [L877] var_356 = var_356 & mask_SORT_1 [L878] SORT_1 var_624_arg_0 = var_356; [L879] SORT_3 var_624_arg_1 = input_4; [L880] SORT_3 var_624_arg_2 = state_79; [L881] SORT_3 var_624 = var_624_arg_0 ? var_624_arg_1 : var_624_arg_2; [L882] SORT_1 var_625_arg_0 = input_7; [L883] SORT_3 var_625_arg_1 = var_582; [L884] SORT_3 var_625_arg_2 = var_624; [L885] SORT_3 var_625 = var_625_arg_0 ? var_625_arg_1 : var_625_arg_2; [L886] SORT_3 next_626_arg_1 = var_625; [L887] SORT_19 var_347_arg_0 = var_85; [L888] EXPR var_347_arg_0 & mask_SORT_19 [L888] var_347_arg_0 = var_347_arg_0 & mask_SORT_19 [L889] SORT_13 var_347 = var_347_arg_0; [L890] SORT_13 var_348_arg_0 = var_283; [L891] SORT_13 var_348_arg_1 = var_347; [L892] SORT_1 var_348 = var_348_arg_0 == var_348_arg_1; [L893] SORT_1 var_349_arg_0 = input_6; [L894] SORT_1 var_349_arg_1 = var_348; [L895] EXPR var_349_arg_0 & var_349_arg_1 [L895] SORT_1 var_349 = var_349_arg_0 & var_349_arg_1; [L896] EXPR var_349 & mask_SORT_1 [L896] var_349 = var_349 & mask_SORT_1 [L897] SORT_1 var_627_arg_0 = var_349; [L898] SORT_3 var_627_arg_1 = input_4; [L899] SORT_3 var_627_arg_2 = state_84; [L900] SORT_3 var_627 = var_627_arg_0 ? var_627_arg_1 : var_627_arg_2; [L901] SORT_1 var_628_arg_0 = input_7; [L902] SORT_3 var_628_arg_1 = var_582; [L903] SORT_3 var_628_arg_2 = var_627; [L904] SORT_3 var_628 = var_628_arg_0 ? var_628_arg_1 : var_628_arg_2; [L905] SORT_3 next_629_arg_1 = var_628; [L906] SORT_19 var_340_arg_0 = var_90; [L907] EXPR var_340_arg_0 & mask_SORT_19 [L907] var_340_arg_0 = var_340_arg_0 & mask_SORT_19 [L908] SORT_13 var_340 = var_340_arg_0; [L909] SORT_13 var_341_arg_0 = var_283; [L910] SORT_13 var_341_arg_1 = var_340; [L911] SORT_1 var_341 = var_341_arg_0 == var_341_arg_1; [L912] SORT_1 var_342_arg_0 = input_6; [L913] SORT_1 var_342_arg_1 = var_341; [L914] EXPR var_342_arg_0 & var_342_arg_1 [L914] SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; [L915] EXPR var_342 & mask_SORT_1 [L915] var_342 = var_342 & mask_SORT_1 [L916] SORT_1 var_630_arg_0 = var_342; [L917] SORT_3 var_630_arg_1 = input_4; [L918] SORT_3 var_630_arg_2 = state_89; [L919] SORT_3 var_630 = var_630_arg_0 ? var_630_arg_1 : var_630_arg_2; [L920] SORT_1 var_631_arg_0 = input_7; [L921] SORT_3 var_631_arg_1 = var_582; [L922] SORT_3 var_631_arg_2 = var_630; [L923] SORT_3 var_631 = var_631_arg_0 ? var_631_arg_1 : var_631_arg_2; [L924] SORT_3 next_632_arg_1 = var_631; [L925] SORT_19 var_333_arg_0 = var_95; [L926] EXPR var_333_arg_0 & mask_SORT_19 [L926] var_333_arg_0 = var_333_arg_0 & mask_SORT_19 [L927] SORT_13 var_333 = var_333_arg_0; [L928] SORT_13 var_334_arg_0 = var_283; [L929] SORT_13 var_334_arg_1 = var_333; [L930] SORT_1 var_334 = var_334_arg_0 == var_334_arg_1; [L931] SORT_1 var_335_arg_0 = input_6; [L932] SORT_1 var_335_arg_1 = var_334; [L933] EXPR var_335_arg_0 & var_335_arg_1 [L933] SORT_1 var_335 = var_335_arg_0 & var_335_arg_1; [L934] EXPR var_335 & mask_SORT_1 [L934] var_335 = var_335 & mask_SORT_1 [L935] SORT_1 var_633_arg_0 = var_335; [L936] SORT_3 var_633_arg_1 = input_4; [L937] SORT_3 var_633_arg_2 = state_94; [L938] SORT_3 var_633 = var_633_arg_0 ? var_633_arg_1 : var_633_arg_2; [L939] SORT_1 var_634_arg_0 = input_7; [L940] SORT_3 var_634_arg_1 = var_582; [L941] SORT_3 var_634_arg_2 = var_633; [L942] SORT_3 var_634 = var_634_arg_0 ? var_634_arg_1 : var_634_arg_2; [L943] SORT_3 next_635_arg_1 = var_634; [L944] SORT_100 var_326_arg_0 = var_101; [L945] EXPR var_326_arg_0 & mask_SORT_100 [L945] var_326_arg_0 = var_326_arg_0 & mask_SORT_100 [L946] SORT_13 var_326 = var_326_arg_0; [L947] SORT_13 var_327_arg_0 = var_283; [L948] SORT_13 var_327_arg_1 = var_326; [L949] SORT_1 var_327 = var_327_arg_0 == var_327_arg_1; [L950] SORT_1 var_328_arg_0 = input_6; [L951] SORT_1 var_328_arg_1 = var_327; [L952] EXPR var_328_arg_0 & var_328_arg_1 [L952] SORT_1 var_328 = var_328_arg_0 & var_328_arg_1; [L953] EXPR var_328 & mask_SORT_1 [L953] var_328 = var_328 & mask_SORT_1 [L954] SORT_1 var_636_arg_0 = var_328; [L955] SORT_3 var_636_arg_1 = input_4; [L956] SORT_3 var_636_arg_2 = state_99; [L957] SORT_3 var_636 = var_636_arg_0 ? var_636_arg_1 : var_636_arg_2; [L958] SORT_1 var_637_arg_0 = input_7; [L959] SORT_3 var_637_arg_1 = var_582; [L960] SORT_3 var_637_arg_2 = var_636; [L961] SORT_3 var_637 = var_637_arg_0 ? var_637_arg_1 : var_637_arg_2; [L962] SORT_3 next_638_arg_1 = var_637; [L963] SORT_100 var_319_arg_0 = var_106; [L964] EXPR var_319_arg_0 & mask_SORT_100 [L964] var_319_arg_0 = var_319_arg_0 & mask_SORT_100 [L965] SORT_13 var_319 = var_319_arg_0; [L966] SORT_13 var_320_arg_0 = var_283; [L967] SORT_13 var_320_arg_1 = var_319; [L968] SORT_1 var_320 = var_320_arg_0 == var_320_arg_1; [L969] SORT_1 var_321_arg_0 = input_6; [L970] SORT_1 var_321_arg_1 = var_320; [L971] EXPR var_321_arg_0 & var_321_arg_1 [L971] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L972] EXPR var_321 & mask_SORT_1 [L972] var_321 = var_321 & mask_SORT_1 [L973] SORT_1 var_639_arg_0 = var_321; [L974] SORT_3 var_639_arg_1 = input_4; [L975] SORT_3 var_639_arg_2 = state_105; [L976] SORT_3 var_639 = var_639_arg_0 ? var_639_arg_1 : var_639_arg_2; [L977] SORT_1 var_640_arg_0 = input_7; [L978] SORT_3 var_640_arg_1 = var_582; [L979] SORT_3 var_640_arg_2 = var_639; [L980] SORT_3 var_640 = var_640_arg_0 ? var_640_arg_1 : var_640_arg_2; [L981] SORT_3 next_641_arg_1 = var_640; [L982] SORT_100 var_312_arg_0 = var_111; [L983] EXPR var_312_arg_0 & mask_SORT_100 [L983] var_312_arg_0 = var_312_arg_0 & mask_SORT_100 [L984] SORT_13 var_312 = var_312_arg_0; [L985] SORT_13 var_313_arg_0 = var_283; [L986] SORT_13 var_313_arg_1 = var_312; [L987] SORT_1 var_313 = var_313_arg_0 == var_313_arg_1; [L988] SORT_1 var_314_arg_0 = input_6; [L989] SORT_1 var_314_arg_1 = var_313; [L990] EXPR var_314_arg_0 & var_314_arg_1 [L990] SORT_1 var_314 = var_314_arg_0 & var_314_arg_1; [L991] EXPR var_314 & mask_SORT_1 [L991] var_314 = var_314 & mask_SORT_1 [L992] SORT_1 var_642_arg_0 = var_314; [L993] SORT_3 var_642_arg_1 = input_4; [L994] SORT_3 var_642_arg_2 = state_110; [L995] SORT_3 var_642 = var_642_arg_0 ? var_642_arg_1 : var_642_arg_2; [L996] SORT_1 var_643_arg_0 = input_7; [L997] SORT_3 var_643_arg_1 = var_582; [L998] SORT_3 var_643_arg_2 = var_642; [L999] SORT_3 var_643 = var_643_arg_0 ? var_643_arg_1 : var_643_arg_2; [L1000] SORT_3 next_644_arg_1 = var_643; [L1001] SORT_100 var_305_arg_0 = var_116; [L1002] EXPR var_305_arg_0 & mask_SORT_100 [L1002] var_305_arg_0 = var_305_arg_0 & mask_SORT_100 [L1003] SORT_13 var_305 = var_305_arg_0; [L1004] SORT_13 var_306_arg_0 = var_283; [L1005] SORT_13 var_306_arg_1 = var_305; [L1006] SORT_1 var_306 = var_306_arg_0 == var_306_arg_1; [L1007] SORT_1 var_307_arg_0 = input_6; [L1008] SORT_1 var_307_arg_1 = var_306; [L1009] EXPR var_307_arg_0 & var_307_arg_1 [L1009] SORT_1 var_307 = var_307_arg_0 & var_307_arg_1; [L1010] EXPR var_307 & mask_SORT_1 [L1010] var_307 = var_307 & mask_SORT_1 [L1011] SORT_1 var_645_arg_0 = var_307; [L1012] SORT_3 var_645_arg_1 = input_4; [L1013] SORT_3 var_645_arg_2 = state_115; [L1014] SORT_3 var_645 = var_645_arg_0 ? var_645_arg_1 : var_645_arg_2; [L1015] SORT_1 var_646_arg_0 = input_7; [L1016] SORT_3 var_646_arg_1 = var_582; [L1017] SORT_3 var_646_arg_2 = var_645; [L1018] SORT_3 var_646 = var_646_arg_0 ? var_646_arg_1 : var_646_arg_2; [L1019] SORT_3 next_647_arg_1 = var_646; [L1020] SORT_100 var_298_arg_0 = var_121; [L1021] EXPR var_298_arg_0 & mask_SORT_100 [L1021] var_298_arg_0 = var_298_arg_0 & mask_SORT_100 [L1022] SORT_13 var_298 = var_298_arg_0; [L1023] SORT_13 var_299_arg_0 = var_283; [L1024] SORT_13 var_299_arg_1 = var_298; [L1025] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L1026] SORT_1 var_300_arg_0 = input_6; [L1027] SORT_1 var_300_arg_1 = var_299; [L1028] EXPR var_300_arg_0 & var_300_arg_1 [L1028] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L1029] EXPR var_300 & mask_SORT_1 [L1029] var_300 = var_300 & mask_SORT_1 [L1030] SORT_1 var_648_arg_0 = var_300; [L1031] SORT_3 var_648_arg_1 = input_4; [L1032] SORT_3 var_648_arg_2 = state_120; [L1033] SORT_3 var_648 = var_648_arg_0 ? var_648_arg_1 : var_648_arg_2; [L1034] SORT_1 var_649_arg_0 = input_7; [L1035] SORT_3 var_649_arg_1 = var_582; [L1036] SORT_3 var_649_arg_2 = var_648; [L1037] SORT_3 var_649 = var_649_arg_0 ? var_649_arg_1 : var_649_arg_2; [L1038] SORT_3 next_650_arg_1 = var_649; [L1039] SORT_100 var_291_arg_0 = var_126; [L1040] EXPR var_291_arg_0 & mask_SORT_100 [L1040] var_291_arg_0 = var_291_arg_0 & mask_SORT_100 [L1041] SORT_13 var_291 = var_291_arg_0; [L1042] SORT_13 var_292_arg_0 = var_283; [L1043] SORT_13 var_292_arg_1 = var_291; [L1044] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L1045] SORT_1 var_293_arg_0 = input_6; [L1046] SORT_1 var_293_arg_1 = var_292; [L1047] EXPR var_293_arg_0 & var_293_arg_1 [L1047] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L1048] EXPR var_293 & mask_SORT_1 [L1048] var_293 = var_293 & mask_SORT_1 [L1049] SORT_1 var_651_arg_0 = var_293; [L1050] SORT_3 var_651_arg_1 = input_4; [L1051] SORT_3 var_651_arg_2 = state_125; [L1052] SORT_3 var_651 = var_651_arg_0 ? var_651_arg_1 : var_651_arg_2; [L1053] SORT_1 var_652_arg_0 = input_7; [L1054] SORT_3 var_652_arg_1 = var_582; [L1055] SORT_3 var_652_arg_2 = var_651; [L1056] SORT_3 var_652 = var_652_arg_0 ? var_652_arg_1 : var_652_arg_2; [L1057] SORT_3 next_653_arg_1 = var_652; [L1058] SORT_100 var_507_arg_0 = var_131; [L1059] EXPR var_507_arg_0 & mask_SORT_100 [L1059] var_507_arg_0 = var_507_arg_0 & mask_SORT_100 [L1060] SORT_13 var_507 = var_507_arg_0; [L1061] SORT_13 var_508_arg_0 = var_283; [L1062] SORT_13 var_508_arg_1 = var_507; [L1063] SORT_1 var_508 = var_508_arg_0 == var_508_arg_1; [L1064] SORT_1 var_509_arg_0 = input_6; [L1065] SORT_1 var_509_arg_1 = var_508; [L1066] EXPR var_509_arg_0 & var_509_arg_1 [L1066] SORT_1 var_509 = var_509_arg_0 & var_509_arg_1; [L1067] EXPR var_509 & mask_SORT_1 [L1067] var_509 = var_509 & mask_SORT_1 [L1068] SORT_1 var_654_arg_0 = var_509; [L1069] SORT_3 var_654_arg_1 = input_4; [L1070] SORT_3 var_654_arg_2 = state_130; [L1071] SORT_3 var_654 = var_654_arg_0 ? var_654_arg_1 : var_654_arg_2; [L1072] SORT_1 var_655_arg_0 = input_7; [L1073] SORT_3 var_655_arg_1 = var_582; [L1074] SORT_3 var_655_arg_2 = var_654; [L1075] SORT_3 var_655 = var_655_arg_0 ? var_655_arg_1 : var_655_arg_2; [L1076] SORT_3 next_656_arg_1 = var_655; [L1077] SORT_100 var_500_arg_0 = var_136; [L1078] EXPR var_500_arg_0 & mask_SORT_100 [L1078] var_500_arg_0 = var_500_arg_0 & mask_SORT_100 [L1079] SORT_13 var_500 = var_500_arg_0; [L1080] SORT_13 var_501_arg_0 = var_283; [L1081] SORT_13 var_501_arg_1 = var_500; [L1082] SORT_1 var_501 = var_501_arg_0 == var_501_arg_1; [L1083] SORT_1 var_502_arg_0 = input_6; [L1084] SORT_1 var_502_arg_1 = var_501; [L1085] EXPR var_502_arg_0 & var_502_arg_1 [L1085] SORT_1 var_502 = var_502_arg_0 & var_502_arg_1; [L1086] EXPR var_502 & mask_SORT_1 [L1086] var_502 = var_502 & mask_SORT_1 [L1087] SORT_1 var_657_arg_0 = var_502; [L1088] SORT_3 var_657_arg_1 = input_4; [L1089] SORT_3 var_657_arg_2 = state_135; [L1090] SORT_3 var_657 = var_657_arg_0 ? var_657_arg_1 : var_657_arg_2; [L1091] SORT_1 var_658_arg_0 = input_7; [L1092] SORT_3 var_658_arg_1 = var_582; [L1093] SORT_3 var_658_arg_2 = var_657; [L1094] SORT_3 var_658 = var_658_arg_0 ? var_658_arg_1 : var_658_arg_2; [L1095] SORT_3 next_659_arg_1 = var_658; [L1096] SORT_141 var_493_arg_0 = var_142; [L1097] EXPR var_493_arg_0 & mask_SORT_141 [L1097] var_493_arg_0 = var_493_arg_0 & mask_SORT_141 [L1098] SORT_13 var_493 = var_493_arg_0; [L1099] SORT_13 var_494_arg_0 = var_283; [L1100] SORT_13 var_494_arg_1 = var_493; [L1101] SORT_1 var_494 = var_494_arg_0 == var_494_arg_1; [L1102] SORT_1 var_495_arg_0 = input_6; [L1103] SORT_1 var_495_arg_1 = var_494; [L1104] EXPR var_495_arg_0 & var_495_arg_1 [L1104] SORT_1 var_495 = var_495_arg_0 & var_495_arg_1; [L1105] EXPR var_495 & mask_SORT_1 [L1105] var_495 = var_495 & mask_SORT_1 [L1106] SORT_1 var_660_arg_0 = var_495; [L1107] SORT_3 var_660_arg_1 = input_4; [L1108] SORT_3 var_660_arg_2 = state_140; [L1109] SORT_3 var_660 = var_660_arg_0 ? var_660_arg_1 : var_660_arg_2; [L1110] SORT_1 var_661_arg_0 = input_7; [L1111] SORT_3 var_661_arg_1 = var_582; [L1112] SORT_3 var_661_arg_2 = var_660; [L1113] SORT_3 var_661 = var_661_arg_0 ? var_661_arg_1 : var_661_arg_2; [L1114] SORT_3 next_662_arg_1 = var_661; [L1115] SORT_141 var_486_arg_0 = var_147; [L1116] EXPR var_486_arg_0 & mask_SORT_141 [L1116] var_486_arg_0 = var_486_arg_0 & mask_SORT_141 [L1117] SORT_13 var_486 = var_486_arg_0; [L1118] SORT_13 var_487_arg_0 = var_283; [L1119] SORT_13 var_487_arg_1 = var_486; [L1120] SORT_1 var_487 = var_487_arg_0 == var_487_arg_1; [L1121] SORT_1 var_488_arg_0 = input_6; [L1122] SORT_1 var_488_arg_1 = var_487; [L1123] EXPR var_488_arg_0 & var_488_arg_1 [L1123] SORT_1 var_488 = var_488_arg_0 & var_488_arg_1; [L1124] EXPR var_488 & mask_SORT_1 [L1124] var_488 = var_488 & mask_SORT_1 [L1125] SORT_1 var_663_arg_0 = var_488; [L1126] SORT_3 var_663_arg_1 = input_4; [L1127] SORT_3 var_663_arg_2 = state_146; [L1128] SORT_3 var_663 = var_663_arg_0 ? var_663_arg_1 : var_663_arg_2; [L1129] SORT_1 var_664_arg_0 = input_7; [L1130] SORT_3 var_664_arg_1 = var_582; [L1131] SORT_3 var_664_arg_2 = var_663; [L1132] SORT_3 var_664 = var_664_arg_0 ? var_664_arg_1 : var_664_arg_2; [L1133] SORT_3 next_665_arg_1 = var_664; [L1134] SORT_141 var_479_arg_0 = var_152; [L1135] EXPR var_479_arg_0 & mask_SORT_141 [L1135] var_479_arg_0 = var_479_arg_0 & mask_SORT_141 [L1136] SORT_13 var_479 = var_479_arg_0; [L1137] SORT_13 var_480_arg_0 = var_283; [L1138] SORT_13 var_480_arg_1 = var_479; [L1139] SORT_1 var_480 = var_480_arg_0 == var_480_arg_1; [L1140] SORT_1 var_481_arg_0 = input_6; [L1141] SORT_1 var_481_arg_1 = var_480; [L1142] EXPR var_481_arg_0 & var_481_arg_1 [L1142] SORT_1 var_481 = var_481_arg_0 & var_481_arg_1; [L1143] EXPR var_481 & mask_SORT_1 [L1143] var_481 = var_481 & mask_SORT_1 [L1144] SORT_1 var_666_arg_0 = var_481; [L1145] SORT_3 var_666_arg_1 = input_4; [L1146] SORT_3 var_666_arg_2 = state_151; [L1147] SORT_3 var_666 = var_666_arg_0 ? var_666_arg_1 : var_666_arg_2; [L1148] SORT_1 var_667_arg_0 = input_7; [L1149] SORT_3 var_667_arg_1 = var_582; [L1150] SORT_3 var_667_arg_2 = var_666; [L1151] SORT_3 var_667 = var_667_arg_0 ? var_667_arg_1 : var_667_arg_2; [L1152] SORT_3 next_668_arg_1 = var_667; [L1153] SORT_141 var_472_arg_0 = var_157; [L1154] EXPR var_472_arg_0 & mask_SORT_141 [L1154] var_472_arg_0 = var_472_arg_0 & mask_SORT_141 [L1155] SORT_13 var_472 = var_472_arg_0; [L1156] SORT_13 var_473_arg_0 = var_283; [L1157] SORT_13 var_473_arg_1 = var_472; [L1158] SORT_1 var_473 = var_473_arg_0 == var_473_arg_1; [L1159] SORT_1 var_474_arg_0 = input_6; [L1160] SORT_1 var_474_arg_1 = var_473; [L1161] EXPR var_474_arg_0 & var_474_arg_1 [L1161] SORT_1 var_474 = var_474_arg_0 & var_474_arg_1; [L1162] EXPR var_474 & mask_SORT_1 [L1162] var_474 = var_474 & mask_SORT_1 [L1163] SORT_1 var_669_arg_0 = var_474; [L1164] SORT_3 var_669_arg_1 = input_4; [L1165] SORT_3 var_669_arg_2 = state_156; [L1166] SORT_3 var_669 = var_669_arg_0 ? var_669_arg_1 : var_669_arg_2; [L1167] SORT_1 var_670_arg_0 = input_7; [L1168] SORT_3 var_670_arg_1 = var_582; [L1169] SORT_3 var_670_arg_2 = var_669; [L1170] SORT_3 var_670 = var_670_arg_0 ? var_670_arg_1 : var_670_arg_2; [L1171] SORT_3 next_671_arg_1 = var_670; [L1172] SORT_162 var_465_arg_0 = var_163; [L1173] EXPR var_465_arg_0 & mask_SORT_162 [L1173] var_465_arg_0 = var_465_arg_0 & mask_SORT_162 [L1174] SORT_13 var_465 = var_465_arg_0; [L1175] SORT_13 var_466_arg_0 = var_283; [L1176] SORT_13 var_466_arg_1 = var_465; [L1177] SORT_1 var_466 = var_466_arg_0 == var_466_arg_1; [L1178] SORT_1 var_467_arg_0 = input_6; [L1179] SORT_1 var_467_arg_1 = var_466; [L1180] EXPR var_467_arg_0 & var_467_arg_1 [L1180] SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; [L1181] EXPR var_467 & mask_SORT_1 [L1181] var_467 = var_467 & mask_SORT_1 [L1182] SORT_1 var_672_arg_0 = var_467; [L1183] SORT_3 var_672_arg_1 = input_4; [L1184] SORT_3 var_672_arg_2 = state_161; [L1185] SORT_3 var_672 = var_672_arg_0 ? var_672_arg_1 : var_672_arg_2; [L1186] SORT_1 var_673_arg_0 = input_7; [L1187] SORT_3 var_673_arg_1 = var_582; [L1188] SORT_3 var_673_arg_2 = var_672; [L1189] SORT_3 var_673 = var_673_arg_0 ? var_673_arg_1 : var_673_arg_2; [L1190] SORT_3 next_674_arg_1 = var_673; [L1191] SORT_162 var_438_arg_0 = var_168; [L1192] EXPR var_438_arg_0 & mask_SORT_162 [L1192] var_438_arg_0 = var_438_arg_0 & mask_SORT_162 [L1193] SORT_13 var_438 = var_438_arg_0; [L1194] SORT_13 var_439_arg_0 = var_283; [L1195] SORT_13 var_439_arg_1 = var_438; [L1196] SORT_1 var_439 = var_439_arg_0 == var_439_arg_1; [L1197] SORT_1 var_440_arg_0 = input_6; [L1198] SORT_1 var_440_arg_1 = var_439; [L1199] EXPR var_440_arg_0 & var_440_arg_1 [L1199] SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; [L1200] EXPR var_440 & mask_SORT_1 [L1200] var_440 = var_440 & mask_SORT_1 [L1201] SORT_1 var_675_arg_0 = var_440; [L1202] SORT_3 var_675_arg_1 = input_4; [L1203] SORT_3 var_675_arg_2 = state_167; [L1204] SORT_3 var_675 = var_675_arg_0 ? var_675_arg_1 : var_675_arg_2; [L1205] SORT_1 var_676_arg_0 = input_7; [L1206] SORT_3 var_676_arg_1 = var_582; [L1207] SORT_3 var_676_arg_2 = var_675; [L1208] SORT_3 var_676 = var_676_arg_0 ? var_676_arg_1 : var_676_arg_2; [L1209] SORT_3 next_677_arg_1 = var_676; [L1210] SORT_1 var_361_arg_0 = var_173; [L1211] EXPR var_361_arg_0 & mask_SORT_1 [L1211] var_361_arg_0 = var_361_arg_0 & mask_SORT_1 [L1212] SORT_13 var_361 = var_361_arg_0; [L1213] SORT_13 var_362_arg_0 = var_283; [L1214] SORT_13 var_362_arg_1 = var_361; [L1215] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L1216] SORT_1 var_363_arg_0 = input_6; [L1217] SORT_1 var_363_arg_1 = var_362; [L1218] EXPR var_363_arg_0 & var_363_arg_1 [L1218] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L1219] EXPR var_363 & mask_SORT_1 [L1219] var_363 = var_363 & mask_SORT_1 [L1220] SORT_1 var_678_arg_0 = var_363; [L1221] SORT_3 var_678_arg_1 = input_4; [L1222] SORT_3 var_678_arg_2 = state_172; [L1223] SORT_3 var_678 = var_678_arg_0 ? var_678_arg_1 : var_678_arg_2; [L1224] SORT_1 var_679_arg_0 = input_7; [L1225] SORT_3 var_679_arg_1 = var_582; [L1226] SORT_3 var_679_arg_2 = var_678; [L1227] SORT_3 var_679 = var_679_arg_0 ? var_679_arg_1 : var_679_arg_2; [L1228] SORT_3 next_680_arg_1 = var_679; [L1229] SORT_13 var_284_arg_0 = var_283; [L1230] SORT_1 var_284 = var_284_arg_0 != 0; [L1231] SORT_1 var_285_arg_0 = var_284; [L1232] SORT_1 var_285 = ~var_285_arg_0; [L1233] SORT_1 var_286_arg_0 = input_6; [L1234] SORT_1 var_286_arg_1 = var_285; [L1235] EXPR var_286_arg_0 & var_286_arg_1 [L1235] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L1236] EXPR var_286 & mask_SORT_1 [L1236] var_286 = var_286 & mask_SORT_1 [L1237] SORT_1 var_681_arg_0 = var_286; [L1238] SORT_3 var_681_arg_1 = input_4; [L1239] SORT_3 var_681_arg_2 = state_177; [L1240] SORT_3 var_681 = var_681_arg_0 ? var_681_arg_1 : var_681_arg_2; [L1241] SORT_1 var_682_arg_0 = input_7; [L1242] SORT_3 var_682_arg_1 = var_582; [L1243] SORT_3 var_682_arg_2 = var_681; [L1244] SORT_3 var_682 = var_682_arg_0 ? var_682_arg_1 : var_682_arg_2; [L1245] SORT_3 next_683_arg_1 = var_682; [L1246] SORT_1 var_684_arg_0 = input_6; [L1247] EXPR var_684_arg_0 & mask_SORT_1 [L1247] var_684_arg_0 = var_684_arg_0 & mask_SORT_1 [L1248] SORT_11 var_684 = var_684_arg_0; [L1249] SORT_11 var_685_arg_0 = state_182; [L1250] SORT_11 var_685_arg_1 = var_684; [L1251] SORT_11 var_685 = var_685_arg_0 + var_685_arg_1; [L1252] SORT_1 var_686_arg_0 = input_5; [L1253] EXPR var_686_arg_0 & mask_SORT_1 [L1253] var_686_arg_0 = var_686_arg_0 & mask_SORT_1 [L1254] SORT_11 var_686 = var_686_arg_0; [L1255] SORT_11 var_687_arg_0 = var_685; [L1256] SORT_11 var_687_arg_1 = var_686; [L1257] SORT_11 var_687 = var_687_arg_0 - var_687_arg_1; [L1258] SORT_1 var_688_arg_0 = input_7; [L1259] SORT_11 var_688_arg_1 = var_203; [L1260] SORT_11 var_688_arg_2 = var_687; [L1261] SORT_11 var_688 = var_688_arg_0 ? var_688_arg_1 : var_688_arg_2; [L1262] EXPR var_688 & mask_SORT_11 [L1262] var_688 = var_688 & mask_SORT_11 [L1263] SORT_11 next_689_arg_1 = var_688; [L1264] SORT_1 var_542_arg_0 = state_190; [L1265] SORT_1 var_542 = ~var_542_arg_0; [L1266] EXPR var_542 & mask_SORT_1 [L1266] var_542 = var_542 & mask_SORT_1 [L1267] SORT_1 var_538_arg_0 = input_8; [L1268] SORT_1 var_538_arg_1 = input_6; [L1269] EXPR var_538_arg_0 & var_538_arg_1 [L1269] SORT_1 var_538 = var_538_arg_0 & var_538_arg_1; [L1270] SORT_1 var_539_arg_0 = state_190; [L1271] SORT_1 var_539_arg_1 = var_538; [L1272] EXPR var_539_arg_0 | var_539_arg_1 [L1272] SORT_1 var_539 = var_539_arg_0 | var_539_arg_1; [L1273] SORT_1 var_690_arg_0 = var_542; [L1274] SORT_1 var_690_arg_1 = var_539; [L1275] SORT_1 var_690_arg_2 = state_190; [L1276] SORT_1 var_690 = var_690_arg_0 ? var_690_arg_1 : var_690_arg_2; [L1277] SORT_1 var_691_arg_0 = input_7; [L1278] SORT_1 var_691_arg_1 = var_233; [L1279] SORT_1 var_691_arg_2 = var_690; [L1280] SORT_1 var_691 = var_691_arg_0 ? var_691_arg_1 : var_691_arg_2; [L1281] SORT_1 next_692_arg_1 = var_691; [L1282] SORT_1 var_550_arg_0 = var_207; [L1283] SORT_1 var_550_arg_1 = state_191; [L1284] EXPR var_550_arg_0 | var_550_arg_1 [L1284] SORT_1 var_550 = var_550_arg_0 | var_550_arg_1; [L1285] SORT_1 var_693_arg_0 = var_173; [L1286] SORT_1 var_693_arg_1 = var_550; [L1287] SORT_1 var_693_arg_2 = state_191; [L1288] SORT_1 var_693 = var_693_arg_0 ? var_693_arg_1 : var_693_arg_2; [L1289] SORT_1 var_694_arg_0 = input_7; [L1290] SORT_1 var_694_arg_1 = var_233; [L1291] SORT_1 var_694_arg_2 = var_693; [L1292] SORT_1 var_694 = var_694_arg_0 ? var_694_arg_1 : var_694_arg_2; [L1293] SORT_1 next_695_arg_1 = var_694; [L1294] SORT_1 var_562_arg_0 = input_6; [L1295] SORT_1 var_562_arg_1 = input_5; [L1296] EXPR var_562_arg_0 | var_562_arg_1 [L1296] SORT_1 var_562 = var_562_arg_0 | var_562_arg_1; [L1297] SORT_1 var_563_arg_0 = var_562; [L1298] SORT_1 var_563_arg_1 = input_7; [L1299] EXPR var_563_arg_0 | var_563_arg_1 [L1299] SORT_1 var_563 = var_563_arg_0 | var_563_arg_1; [L1300] SORT_1 var_564_arg_0 = var_563; [L1301] SORT_1 var_564_arg_1 = state_190; [L1302] EXPR var_564_arg_0 | var_564_arg_1 [L1302] SORT_1 var_564 = var_564_arg_0 | var_564_arg_1; [L1303] EXPR var_564 & mask_SORT_1 [L1303] var_564 = var_564 & mask_SORT_1 [L1304] SORT_1 var_696_arg_0 = var_564; [L1305] SORT_11 var_696_arg_1 = var_204; [L1306] SORT_11 var_696_arg_2 = state_194; [L1307] SORT_11 var_696 = var_696_arg_0 ? var_696_arg_1 : var_696_arg_2; [L1308] SORT_1 var_697_arg_0 = input_7; [L1309] SORT_11 var_697_arg_1 = var_203; [L1310] SORT_11 var_697_arg_2 = var_696; [L1311] SORT_11 var_697 = var_697_arg_0 ? var_697_arg_1 : var_697_arg_2; [L1312] EXPR var_697 & mask_SORT_11 [L1312] var_697 = var_697 & mask_SORT_11 [L1313] SORT_11 next_698_arg_1 = var_697; [L1314] SORT_1 var_547_arg_0 = var_538; [L1315] SORT_1 var_547_arg_1 = var_542; [L1316] EXPR var_547_arg_0 & var_547_arg_1 [L1316] SORT_1 var_547 = var_547_arg_0 & var_547_arg_1; [L1317] EXPR var_547 & mask_SORT_1 [L1317] var_547 = var_547 & mask_SORT_1 [L1318] SORT_1 var_699_arg_0 = var_547; [L1319] SORT_3 var_699_arg_1 = input_4; [L1320] SORT_3 var_699_arg_2 = state_209; [L1321] SORT_3 var_699 = var_699_arg_0 ? var_699_arg_1 : var_699_arg_2; [L1322] SORT_1 var_700_arg_0 = input_7; [L1323] SORT_3 var_700_arg_1 = var_582; [L1324] SORT_3 var_700_arg_2 = var_699; [L1325] SORT_3 var_700 = var_700_arg_0 ? var_700_arg_1 : var_700_arg_2; [L1326] EXPR var_700 & mask_SORT_3 [L1326] var_700 = var_700 & mask_SORT_3 [L1327] SORT_3 next_701_arg_1 = var_700; [L1328] SORT_1 next_702_arg_1 = var_233; [L1329] SORT_1 var_518_arg_0 = input_6; [L1330] EXPR var_518_arg_0 & mask_SORT_1 [L1330] var_518_arg_0 = var_518_arg_0 & mask_SORT_1 [L1331] SORT_11 var_518 = var_518_arg_0; [L1332] SORT_11 var_519_arg_0 = state_282; [L1333] SORT_11 var_519_arg_1 = var_518; [L1334] SORT_11 var_519 = var_519_arg_0 + var_519_arg_1; [L1335] SORT_1 var_703_arg_0 = var_242; [L1336] SORT_11 var_703_arg_1 = var_519; [L1337] SORT_11 var_703_arg_2 = state_282; [L1338] SORT_11 var_703 = var_703_arg_0 ? var_703_arg_1 : var_703_arg_2; [L1339] SORT_1 var_704_arg_0 = input_7; [L1340] SORT_11 var_704_arg_1 = var_203; [L1341] SORT_11 var_704_arg_2 = var_703; [L1342] SORT_11 var_704 = var_704_arg_0 ? var_704_arg_1 : var_704_arg_2; [L1343] SORT_11 next_705_arg_1 = var_704; [L1345] state_10 = next_584_arg_1 [L1346] state_12 = next_587_arg_1 [L1347] state_18 = next_590_arg_1 [L1348] state_24 = next_593_arg_1 [L1349] state_29 = next_596_arg_1 [L1350] state_34 = next_599_arg_1 [L1351] state_39 = next_602_arg_1 [L1352] state_44 = next_605_arg_1 [L1353] state_49 = next_608_arg_1 [L1354] state_54 = next_611_arg_1 [L1355] state_59 = next_614_arg_1 [L1356] state_64 = next_617_arg_1 [L1357] state_69 = next_620_arg_1 [L1358] state_74 = next_623_arg_1 [L1359] state_79 = next_626_arg_1 [L1360] state_84 = next_629_arg_1 [L1361] state_89 = next_632_arg_1 [L1362] state_94 = next_635_arg_1 [L1363] state_99 = next_638_arg_1 [L1364] state_105 = next_641_arg_1 [L1365] state_110 = next_644_arg_1 [L1366] state_115 = next_647_arg_1 [L1367] state_120 = next_650_arg_1 [L1368] state_125 = next_653_arg_1 [L1369] state_130 = next_656_arg_1 [L1370] state_135 = next_659_arg_1 [L1371] state_140 = next_662_arg_1 [L1372] state_146 = next_665_arg_1 [L1373] state_151 = next_668_arg_1 [L1374] state_156 = next_671_arg_1 [L1375] state_161 = next_674_arg_1 [L1376] state_167 = next_677_arg_1 [L1377] state_172 = next_680_arg_1 [L1378] state_177 = next_683_arg_1 [L1379] state_182 = next_689_arg_1 [L1380] state_190 = next_692_arg_1 [L1381] state_191 = next_695_arg_1 [L1382] state_194 = next_698_arg_1 [L1383] state_209 = next_701_arg_1 [L1384] state_213 = next_702_arg_1 [L1385] state_282 = next_705_arg_1 [L143] input_2 = __VERIFIER_nondet_uchar() [L144] input_4 = __VERIFIER_nondet_uint128() [L145] input_5 = __VERIFIER_nondet_uchar() [L146] input_6 = __VERIFIER_nondet_uchar() [L147] input_7 = __VERIFIER_nondet_uchar() [L148] EXPR input_7 & mask_SORT_1 [L148] input_7 = input_7 & mask_SORT_1 [L149] input_8 = __VERIFIER_nondet_uchar() [L150] input_9 = __VERIFIER_nondet_uint128() [L151] input_231 = __VERIFIER_nondet_uchar() [L153] SORT_1 var_215_arg_0 = input_7; [L154] SORT_1 var_215_arg_1 = state_213; [L155] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L156] SORT_1 var_216_arg_0 = var_173; [L157] SORT_1 var_216 = ~var_216_arg_0; [L158] SORT_1 var_217_arg_0 = var_215; [L159] SORT_1 var_217_arg_1 = var_216; [L160] EXPR var_217_arg_0 | var_217_arg_1 [L160] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L161] EXPR var_217 & mask_SORT_1 [L161] var_217 = var_217 & mask_SORT_1 [L162] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=0, state_209=0, state_213=0, state_24=0, state_282=127, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) [L163] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=0, state_209=0, state_213=0, state_24=0, state_282=127, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] SORT_13 var_187_arg_0 = var_186; [L165] EXPR var_187_arg_0 & mask_SORT_13 [L165] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L166] SORT_11 var_187 = var_187_arg_0; [L167] SORT_11 var_188_arg_0 = state_182; [L168] SORT_11 var_188_arg_1 = var_187; [L169] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L170] SORT_1 var_219_arg_0 = var_188; [L171] SORT_1 var_219 = ~var_219_arg_0; [L172] SORT_1 var_220_arg_0 = input_6; [L173] SORT_1 var_220 = ~var_220_arg_0; [L174] SORT_1 var_221_arg_0 = var_219; [L175] SORT_1 var_221_arg_1 = var_220; [L176] EXPR var_221_arg_0 | var_221_arg_1 [L176] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L177] SORT_1 var_222_arg_0 = var_173; [L178] SORT_1 var_222 = ~var_222_arg_0; [L179] SORT_1 var_223_arg_0 = var_221; [L180] SORT_1 var_223_arg_1 = var_222; [L181] EXPR var_223_arg_0 | var_223_arg_1 [L181] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L182] EXPR var_223 & mask_SORT_1 [L182] var_223 = var_223 & mask_SORT_1 [L183] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=-256, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=0, state_209=0, state_213=0, state_24=0, state_282=127, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) [L184] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=-256, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=0, state_209=0, state_213=0, state_24=0, state_282=127, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L185] SORT_11 var_183_arg_0 = state_182; [L186] SORT_1 var_183 = var_183_arg_0 != 0; [L187] SORT_1 var_184_arg_0 = var_183; [L188] SORT_1 var_184 = ~var_184_arg_0; [L189] SORT_1 var_225_arg_0 = var_184; [L190] SORT_1 var_225 = ~var_225_arg_0; [L191] SORT_1 var_226_arg_0 = input_5; [L192] SORT_1 var_226 = ~var_226_arg_0; [L193] SORT_1 var_227_arg_0 = var_225; [L194] SORT_1 var_227_arg_1 = var_226; [L195] EXPR var_227_arg_0 | var_227_arg_1 [L195] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L196] SORT_1 var_228_arg_0 = var_173; [L197] SORT_1 var_228 = ~var_228_arg_0; [L198] SORT_1 var_229_arg_0 = var_227; [L199] SORT_1 var_229_arg_1 = var_228; [L200] EXPR var_229_arg_0 | var_229_arg_1 [L200] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L201] EXPR var_229 & mask_SORT_1 [L201] var_229 = var_229 & mask_SORT_1 [L202] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=255, input_6=-256, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=0, state_209=0, state_213=0, state_24=0, state_282=127, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L203] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) [L203] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=255, input_6=-256, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_110=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_115=0, state_120=0, state_125=0, state_12=11, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=1, state_191=1, state_194=0, state_209=0, state_213=0, state_24=0, state_282=127, state_29=0, state_34=0, state_39=0, state_44=0, state_49=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_54=0, state_59=0, state_64=0, state_69=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L205] SORT_1 var_234_arg_0 = state_213; [L206] SORT_1 var_234_arg_1 = var_233; [L207] SORT_1 var_234_arg_2 = var_173; [L208] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L209] SORT_1 var_192_arg_0 = state_191; [L210] SORT_1 var_192 = ~var_192_arg_0; [L211] SORT_1 var_193_arg_0 = state_190; [L212] SORT_1 var_193_arg_1 = var_192; [L213] EXPR var_193_arg_0 & var_193_arg_1 [L213] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L214] SORT_11 var_195_arg_0 = state_194; [L215] SORT_1 var_195 = var_195_arg_0 != 0; [L216] SORT_1 var_196_arg_0 = var_193; [L217] SORT_1 var_196_arg_1 = var_195; [L218] EXPR var_196_arg_0 & var_196_arg_1 [L218] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L219] SORT_1 var_197_arg_0 = state_190; [L220] SORT_1 var_197 = ~var_197_arg_0; [L221] SORT_1 var_198_arg_0 = input_6; [L222] SORT_1 var_198_arg_1 = var_197; [L223] EXPR var_198_arg_0 & var_198_arg_1 [L223] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L224] SORT_1 var_199_arg_0 = var_198; [L225] EXPR var_199_arg_0 & mask_SORT_1 [L225] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L226] SORT_11 var_199 = var_199_arg_0; [L227] SORT_11 var_200_arg_0 = state_194; [L228] SORT_11 var_200_arg_1 = var_199; [L229] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L230] SORT_1 var_201_arg_0 = input_5; [L231] EXPR var_201_arg_0 & mask_SORT_1 [L231] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L232] SORT_11 var_201 = var_201_arg_0; [L233] SORT_11 var_202_arg_0 = var_200; [L234] SORT_11 var_202_arg_1 = var_201; [L235] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L236] SORT_1 var_204_arg_0 = input_7; [L237] SORT_11 var_204_arg_1 = var_203; [L238] SORT_11 var_204_arg_2 = var_202; [L239] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L240] EXPR var_204 & mask_SORT_11 [L240] var_204 = var_204 & mask_SORT_11 [L241] SORT_11 var_205_arg_0 = var_204; [L242] SORT_1 var_205 = var_205_arg_0 != 0; [L243] SORT_1 var_206_arg_0 = var_205; [L244] SORT_1 var_206 = ~var_206_arg_0; [L245] SORT_1 var_207_arg_0 = var_196; [L246] SORT_1 var_207_arg_1 = var_206; [L247] EXPR var_207_arg_0 & var_207_arg_1 [L247] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L248] SORT_1 var_208_arg_0 = var_207; [L249] SORT_1 var_208 = ~var_208_arg_0; [L250] SORT_11 var_14_arg_0 = state_12; [L251] SORT_13 var_14 = var_14_arg_0 >> 0; [L252] EXPR var_14 & mask_SORT_13 [L252] var_14 = var_14 & mask_SORT_13 [L253] SORT_13 var_178_arg_0 = var_14; [L254] SORT_1 var_178 = var_178_arg_0 != 0; [L255] SORT_1 var_179_arg_0 = var_178; [L256] SORT_1 var_179 = ~var_179_arg_0; [L257] EXPR var_179 & mask_SORT_1 [L257] var_179 = var_179 & mask_SORT_1 [L258] SORT_1 var_174_arg_0 = var_173; [L259] EXPR var_174_arg_0 & mask_SORT_1 [L259] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L260] SORT_13 var_174 = var_174_arg_0; [L261] SORT_13 var_175_arg_0 = var_14; [L262] SORT_13 var_175_arg_1 = var_174; [L263] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L264] SORT_162 var_169_arg_0 = var_168; [L265] EXPR var_169_arg_0 & mask_SORT_162 [L265] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L266] SORT_13 var_169 = var_169_arg_0; [L267] SORT_13 var_170_arg_0 = var_14; [L268] SORT_13 var_170_arg_1 = var_169; [L269] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L270] SORT_162 var_164_arg_0 = var_163; [L271] EXPR var_164_arg_0 & mask_SORT_162 [L271] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L272] SORT_13 var_164 = var_164_arg_0; [L273] SORT_13 var_165_arg_0 = var_14; [L274] SORT_13 var_165_arg_1 = var_164; [L275] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L276] SORT_141 var_158_arg_0 = var_157; [L277] EXPR var_158_arg_0 & mask_SORT_141 [L277] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L278] SORT_13 var_158 = var_158_arg_0; [L279] SORT_13 var_159_arg_0 = var_14; [L280] SORT_13 var_159_arg_1 = var_158; [L281] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L282] SORT_141 var_153_arg_0 = var_152; [L283] EXPR var_153_arg_0 & mask_SORT_141 [L283] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L284] SORT_13 var_153 = var_153_arg_0; [L285] SORT_13 var_154_arg_0 = var_14; [L286] SORT_13 var_154_arg_1 = var_153; [L287] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L288] SORT_141 var_148_arg_0 = var_147; [L289] EXPR var_148_arg_0 & mask_SORT_141 [L289] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L290] SORT_13 var_148 = var_148_arg_0; [L291] SORT_13 var_149_arg_0 = var_14; [L292] SORT_13 var_149_arg_1 = var_148; [L293] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L294] SORT_141 var_143_arg_0 = var_142; [L295] EXPR var_143_arg_0 & mask_SORT_141 [L295] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L296] SORT_13 var_143 = var_143_arg_0; [L297] SORT_13 var_144_arg_0 = var_14; [L298] SORT_13 var_144_arg_1 = var_143; [L299] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L300] SORT_100 var_137_arg_0 = var_136; [L301] EXPR var_137_arg_0 & mask_SORT_100 [L301] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L302] SORT_13 var_137 = var_137_arg_0; [L303] SORT_13 var_138_arg_0 = var_14; [L304] SORT_13 var_138_arg_1 = var_137; [L305] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L306] SORT_100 var_132_arg_0 = var_131; [L307] EXPR var_132_arg_0 & mask_SORT_100 [L307] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L308] SORT_13 var_132 = var_132_arg_0; [L309] SORT_13 var_133_arg_0 = var_14; [L310] SORT_13 var_133_arg_1 = var_132; [L311] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L312] SORT_100 var_127_arg_0 = var_126; [L313] EXPR var_127_arg_0 & mask_SORT_100 [L313] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L314] SORT_13 var_127 = var_127_arg_0; [L315] SORT_13 var_128_arg_0 = var_14; [L316] SORT_13 var_128_arg_1 = var_127; [L317] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L318] SORT_100 var_122_arg_0 = var_121; [L319] EXPR var_122_arg_0 & mask_SORT_100 [L319] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L320] SORT_13 var_122 = var_122_arg_0; [L321] SORT_13 var_123_arg_0 = var_14; [L322] SORT_13 var_123_arg_1 = var_122; [L323] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L324] SORT_100 var_117_arg_0 = var_116; [L325] EXPR var_117_arg_0 & mask_SORT_100 [L325] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L326] SORT_13 var_117 = var_117_arg_0; [L327] SORT_13 var_118_arg_0 = var_14; [L328] SORT_13 var_118_arg_1 = var_117; [L329] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L330] SORT_100 var_112_arg_0 = var_111; [L331] EXPR var_112_arg_0 & mask_SORT_100 [L331] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L332] SORT_13 var_112 = var_112_arg_0; [L333] SORT_13 var_113_arg_0 = var_14; [L334] SORT_13 var_113_arg_1 = var_112; [L335] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L336] SORT_100 var_107_arg_0 = var_106; [L337] EXPR var_107_arg_0 & mask_SORT_100 [L337] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L338] SORT_13 var_107 = var_107_arg_0; [L339] SORT_13 var_108_arg_0 = var_14; [L340] SORT_13 var_108_arg_1 = var_107; [L341] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L342] SORT_100 var_102_arg_0 = var_101; [L343] EXPR var_102_arg_0 & mask_SORT_100 [L343] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L344] SORT_13 var_102 = var_102_arg_0; [L345] SORT_13 var_103_arg_0 = var_14; [L346] SORT_13 var_103_arg_1 = var_102; [L347] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L348] SORT_19 var_96_arg_0 = var_95; [L349] EXPR var_96_arg_0 & mask_SORT_19 [L349] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L350] SORT_13 var_96 = var_96_arg_0; [L351] SORT_13 var_97_arg_0 = var_14; [L352] SORT_13 var_97_arg_1 = var_96; [L353] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L354] SORT_19 var_91_arg_0 = var_90; [L355] EXPR var_91_arg_0 & mask_SORT_19 [L355] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L356] SORT_13 var_91 = var_91_arg_0; [L357] SORT_13 var_92_arg_0 = var_14; [L358] SORT_13 var_92_arg_1 = var_91; [L359] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L360] SORT_19 var_86_arg_0 = var_85; [L361] EXPR var_86_arg_0 & mask_SORT_19 [L361] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L362] SORT_13 var_86 = var_86_arg_0; [L363] SORT_13 var_87_arg_0 = var_14; [L364] SORT_13 var_87_arg_1 = var_86; [L365] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L366] SORT_19 var_81_arg_0 = var_80; [L367] EXPR var_81_arg_0 & mask_SORT_19 [L367] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L368] SORT_13 var_81 = var_81_arg_0; [L369] SORT_13 var_82_arg_0 = var_14; [L370] SORT_13 var_82_arg_1 = var_81; [L371] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L372] SORT_19 var_76_arg_0 = var_75; [L373] EXPR var_76_arg_0 & mask_SORT_19 [L373] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L374] SORT_13 var_76 = var_76_arg_0; [L375] SORT_13 var_77_arg_0 = var_14; [L376] SORT_13 var_77_arg_1 = var_76; [L377] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L378] SORT_19 var_71_arg_0 = var_70; [L379] EXPR var_71_arg_0 & mask_SORT_19 [L379] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L380] SORT_13 var_71 = var_71_arg_0; [L381] SORT_13 var_72_arg_0 = var_14; [L382] SORT_13 var_72_arg_1 = var_71; [L383] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L384] SORT_19 var_66_arg_0 = var_65; [L385] EXPR var_66_arg_0 & mask_SORT_19 [L385] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L386] SORT_13 var_66 = var_66_arg_0; [L387] SORT_13 var_67_arg_0 = var_14; [L388] SORT_13 var_67_arg_1 = var_66; [L389] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L390] SORT_19 var_61_arg_0 = var_60; [L391] EXPR var_61_arg_0 & mask_SORT_19 [L391] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L392] SORT_13 var_61 = var_61_arg_0; [L393] SORT_13 var_62_arg_0 = var_14; [L394] SORT_13 var_62_arg_1 = var_61; [L395] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L396] SORT_19 var_56_arg_0 = var_55; [L397] EXPR var_56_arg_0 & mask_SORT_19 [L397] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L398] SORT_13 var_56 = var_56_arg_0; [L399] SORT_13 var_57_arg_0 = var_14; [L400] SORT_13 var_57_arg_1 = var_56; [L401] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L402] SORT_19 var_51_arg_0 = var_50; [L403] EXPR var_51_arg_0 & mask_SORT_19 [L403] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L404] SORT_13 var_51 = var_51_arg_0; [L405] SORT_13 var_52_arg_0 = var_14; [L406] SORT_13 var_52_arg_1 = var_51; [L407] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L408] SORT_19 var_46_arg_0 = var_45; [L409] EXPR var_46_arg_0 & mask_SORT_19 [L409] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L410] SORT_13 var_46 = var_46_arg_0; [L411] SORT_13 var_47_arg_0 = var_14; [L412] SORT_13 var_47_arg_1 = var_46; [L413] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L414] SORT_19 var_41_arg_0 = var_40; [L415] EXPR var_41_arg_0 & mask_SORT_19 [L415] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L416] SORT_13 var_41 = var_41_arg_0; [L417] SORT_13 var_42_arg_0 = var_14; [L418] SORT_13 var_42_arg_1 = var_41; [L419] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L420] SORT_19 var_36_arg_0 = var_35; [L421] EXPR var_36_arg_0 & mask_SORT_19 [L421] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L422] SORT_13 var_36 = var_36_arg_0; [L423] SORT_13 var_37_arg_0 = var_14; [L424] SORT_13 var_37_arg_1 = var_36; [L425] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L426] SORT_19 var_31_arg_0 = var_30; [L427] EXPR var_31_arg_0 & mask_SORT_19 [L427] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L428] SORT_13 var_31 = var_31_arg_0; [L429] SORT_13 var_32_arg_0 = var_14; [L430] SORT_13 var_32_arg_1 = var_31; [L431] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L432] SORT_19 var_26_arg_0 = var_25; [L433] EXPR var_26_arg_0 & mask_SORT_19 [L433] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L434] SORT_13 var_26 = var_26_arg_0; [L435] SORT_13 var_27_arg_0 = var_14; [L436] SORT_13 var_27_arg_1 = var_26; [L437] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L438] SORT_19 var_21_arg_0 = var_20; [L439] EXPR var_21_arg_0 & mask_SORT_19 [L439] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L440] SORT_13 var_21 = var_21_arg_0; [L441] SORT_13 var_22_arg_0 = var_14; [L442] SORT_13 var_22_arg_1 = var_21; [L443] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L444] SORT_13 var_16_arg_0 = var_14; [L445] SORT_13 var_16_arg_1 = var_15; [L446] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L447] SORT_1 var_17_arg_0 = var_16; [L448] SORT_3 var_17_arg_1 = state_10; [L449] SORT_3 var_17_arg_2 = input_9; [L450] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L451] SORT_1 var_23_arg_0 = var_22; [L452] SORT_3 var_23_arg_1 = state_18; [L453] SORT_3 var_23_arg_2 = var_17; [L454] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L455] SORT_1 var_28_arg_0 = var_27; [L456] SORT_3 var_28_arg_1 = state_24; [L457] SORT_3 var_28_arg_2 = var_23; [L458] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L459] SORT_1 var_33_arg_0 = var_32; [L460] SORT_3 var_33_arg_1 = state_29; [L461] SORT_3 var_33_arg_2 = var_28; [L462] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L463] SORT_1 var_38_arg_0 = var_37; [L464] SORT_3 var_38_arg_1 = state_34; [L465] SORT_3 var_38_arg_2 = var_33; [L466] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L467] SORT_1 var_43_arg_0 = var_42; [L468] SORT_3 var_43_arg_1 = state_39; [L469] SORT_3 var_43_arg_2 = var_38; [L470] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L471] SORT_1 var_48_arg_0 = var_47; [L472] SORT_3 var_48_arg_1 = state_44; [L473] SORT_3 var_48_arg_2 = var_43; [L474] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L475] SORT_1 var_53_arg_0 = var_52; [L476] SORT_3 var_53_arg_1 = state_49; [L477] SORT_3 var_53_arg_2 = var_48; [L478] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L479] SORT_1 var_58_arg_0 = var_57; [L480] SORT_3 var_58_arg_1 = state_54; [L481] SORT_3 var_58_arg_2 = var_53; [L482] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L483] SORT_1 var_63_arg_0 = var_62; [L484] SORT_3 var_63_arg_1 = state_59; [L485] SORT_3 var_63_arg_2 = var_58; [L486] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L487] SORT_1 var_68_arg_0 = var_67; [L488] SORT_3 var_68_arg_1 = state_64; [L489] SORT_3 var_68_arg_2 = var_63; [L490] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L491] SORT_1 var_73_arg_0 = var_72; [L492] SORT_3 var_73_arg_1 = state_69; [L493] SORT_3 var_73_arg_2 = var_68; [L494] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L495] SORT_1 var_78_arg_0 = var_77; [L496] SORT_3 var_78_arg_1 = state_74; [L497] SORT_3 var_78_arg_2 = var_73; [L498] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L499] SORT_1 var_83_arg_0 = var_82; [L500] SORT_3 var_83_arg_1 = state_79; [L501] SORT_3 var_83_arg_2 = var_78; [L502] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L503] SORT_1 var_88_arg_0 = var_87; [L504] SORT_3 var_88_arg_1 = state_84; [L505] SORT_3 var_88_arg_2 = var_83; [L506] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L507] SORT_1 var_93_arg_0 = var_92; [L508] SORT_3 var_93_arg_1 = state_89; [L509] SORT_3 var_93_arg_2 = var_88; [L510] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L511] SORT_1 var_98_arg_0 = var_97; [L512] SORT_3 var_98_arg_1 = state_94; [L513] SORT_3 var_98_arg_2 = var_93; [L514] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L515] SORT_1 var_104_arg_0 = var_103; [L516] SORT_3 var_104_arg_1 = state_99; [L517] SORT_3 var_104_arg_2 = var_98; [L518] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L519] SORT_1 var_109_arg_0 = var_108; [L520] SORT_3 var_109_arg_1 = state_105; [L521] SORT_3 var_109_arg_2 = var_104; [L522] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L523] SORT_1 var_114_arg_0 = var_113; [L524] SORT_3 var_114_arg_1 = state_110; [L525] SORT_3 var_114_arg_2 = var_109; [L526] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L527] SORT_1 var_119_arg_0 = var_118; [L528] SORT_3 var_119_arg_1 = state_115; [L529] SORT_3 var_119_arg_2 = var_114; [L530] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L531] SORT_1 var_124_arg_0 = var_123; [L532] SORT_3 var_124_arg_1 = state_120; [L533] SORT_3 var_124_arg_2 = var_119; [L534] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L535] SORT_1 var_129_arg_0 = var_128; [L536] SORT_3 var_129_arg_1 = state_125; [L537] SORT_3 var_129_arg_2 = var_124; [L538] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L539] SORT_1 var_134_arg_0 = var_133; [L540] SORT_3 var_134_arg_1 = state_130; [L541] SORT_3 var_134_arg_2 = var_129; [L542] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L543] SORT_1 var_139_arg_0 = var_138; [L544] SORT_3 var_139_arg_1 = state_135; [L545] SORT_3 var_139_arg_2 = var_134; [L546] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L547] SORT_1 var_145_arg_0 = var_144; [L548] SORT_3 var_145_arg_1 = state_140; [L549] SORT_3 var_145_arg_2 = var_139; [L550] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L551] SORT_1 var_150_arg_0 = var_149; [L552] SORT_3 var_150_arg_1 = state_146; [L553] SORT_3 var_150_arg_2 = var_145; [L554] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L555] SORT_1 var_155_arg_0 = var_154; [L556] SORT_3 var_155_arg_1 = state_151; [L557] SORT_3 var_155_arg_2 = var_150; [L558] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L559] SORT_1 var_160_arg_0 = var_159; [L560] SORT_3 var_160_arg_1 = state_156; [L561] SORT_3 var_160_arg_2 = var_155; [L562] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L563] SORT_1 var_166_arg_0 = var_165; [L564] SORT_3 var_166_arg_1 = state_161; [L565] SORT_3 var_166_arg_2 = var_160; [L566] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L567] SORT_1 var_171_arg_0 = var_170; [L568] SORT_3 var_171_arg_1 = state_167; [L569] SORT_3 var_171_arg_2 = var_166; [L570] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L571] SORT_1 var_176_arg_0 = var_175; [L572] SORT_3 var_176_arg_1 = state_172; [L573] SORT_3 var_176_arg_2 = var_171; [L574] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L575] SORT_1 var_180_arg_0 = var_179; [L576] SORT_3 var_180_arg_1 = state_177; [L577] SORT_3 var_180_arg_2 = var_176; [L578] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; [L579] EXPR var_180 & mask_SORT_3 [L579] var_180 = var_180 & mask_SORT_3 [L580] SORT_3 var_210_arg_0 = state_209; [L581] SORT_3 var_210_arg_1 = var_180; [L582] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L583] SORT_1 var_211_arg_0 = var_208; [L584] SORT_1 var_211_arg_1 = var_210; [L585] EXPR var_211_arg_0 | var_211_arg_1 [L585] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L586] SORT_1 var_232_arg_0 = state_213; [L587] SORT_1 var_232_arg_1 = input_231; [L588] SORT_1 var_232_arg_2 = var_211; [L589] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L590] SORT_1 var_235_arg_0 = var_232; [L591] SORT_1 var_235 = ~var_235_arg_0; [L592] SORT_1 var_236_arg_0 = var_234; [L593] SORT_1 var_236_arg_1 = var_235; [L594] EXPR var_236_arg_0 & var_236_arg_1 [L594] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L595] EXPR var_236 & mask_SORT_1 [L595] var_236 = var_236 & mask_SORT_1 [L596] SORT_1 bad_237_arg_0 = var_236; [L597] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L22] COND TRUE !(cond) [L22] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 15 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 35.5s, OverallIterations: 2, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 5.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 0 SdHoareTripleChecker+Valid, 5.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 0 mSDsluCounter, 23 SdHoareTripleChecker+Invalid, 5.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 15 mSDsCounter, 0 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 23 IncrementalHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 0 mSolverCounterUnsat, 8 mSDtfsCounter, 23 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=1, InterpolantAutomatonStates: 4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 16.9s SatisfiabilityAnalysisTime, 4.4s InterpolantComputationTime, 47 NumberOfCodeBlocks, 47 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 15 ConstructedInterpolants, 0 QuantifiedInterpolants, 81 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 6/6 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-14 02:44:43,436 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 3dcfde8a71d42fe3baf4d2089c86bd7d84b36e1d1bc23ee26c9bd4a8e8f007b4 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-14 02:44:46,112 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-14 02:44:46,232 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2024-11-14 02:44:46,247 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-14 02:44:46,248 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-14 02:44:46,275 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-14 02:44:46,276 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-14 02:44:46,276 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-14 02:44:46,277 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-14 02:44:46,277 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-14 02:44:46,277 INFO L153 SettingsManager]: * User list type=DISABLED [2024-11-14 02:44:46,277 INFO L151 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2024-11-14 02:44:46,277 INFO L153 SettingsManager]: * Explicit value domain=true [2024-11-14 02:44:46,277 INFO L153 SettingsManager]: * Octagon Domain=false [2024-11-14 02:44:46,277 INFO L153 SettingsManager]: * Abstract domain=CompoundDomain [2024-11-14 02:44:46,277 INFO L153 SettingsManager]: * Interval Domain=false [2024-11-14 02:44:46,278 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-14 02:44:46,278 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-14 02:44:46,278 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-14 02:44:46,278 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-14 02:44:46,278 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-14 02:44:46,278 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-14 02:44:46,278 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-14 02:44:46,278 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-14 02:44:46,279 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-14 02:44:46,279 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-14 02:44:46,279 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-14 02:44:46,279 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-14 02:44:46,279 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-14 02:44:46,279 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-14 02:44:46,279 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-14 02:44:46,283 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-14 02:44:46,283 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 02:44:46,284 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-14 02:44:46,284 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-14 02:44:46,284 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-14 02:44:46,284 INFO L153 SettingsManager]: * Trace refinement strategy=WALRUS [2024-11-14 02:44:46,284 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-14 02:44:46,284 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-14 02:44:46,284 INFO L153 SettingsManager]: * Trace refinement exception blacklist=NONE [2024-11-14 02:44:46,284 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3dcfde8a71d42fe3baf4d2089c86bd7d84b36e1d1bc23ee26c9bd4a8e8f007b4 [2024-11-14 02:44:46,582 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-14 02:44:46,594 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-14 02:44:46,597 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-14 02:44:46,600 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-14 02:44:46,600 INFO L274 PluginConnector]: CDTParser initialized [2024-11-14 02:44:46,603 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c Unable to find full path for "g++" [2024-11-14 02:44:48,639 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-14 02:44:49,027 INFO L384 CDTParser]: Found 1 translation units. [2024-11-14 02:44:49,028 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-11-14 02:44:49,057 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/data/b5b5a0dac/d53df3fc71944bd3a575b38b214177ee/FLAGe6958d332 [2024-11-14 02:44:49,082 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/data/b5b5a0dac/d53df3fc71944bd3a575b38b214177ee [2024-11-14 02:44:49,085 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-14 02:44:49,087 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-14 02:44:49,090 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-14 02:44:49,090 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-14 02:44:49,098 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-14 02:44:49,102 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 02:44:49" (1/1) ... [2024-11-14 02:44:49,104 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@643ef3ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:49, skipping insertion in model container [2024-11-14 02:44:49,104 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 02:44:49" (1/1) ... [2024-11-14 02:44:49,179 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-14 02:44:49,416 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c[1335,1348] [2024-11-14 02:44:49,846 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 02:44:49,864 INFO L200 MainTranslator]: Completed pre-run [2024-11-14 02:44:49,874 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c[1335,1348] [2024-11-14 02:44:50,056 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 02:44:50,081 INFO L204 MainTranslator]: Completed translation [2024-11-14 02:44:50,082 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50 WrapperNode [2024-11-14 02:44:50,083 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-14 02:44:50,084 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-14 02:44:50,085 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-14 02:44:50,085 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-14 02:44:50,094 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,154 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,240 INFO L138 Inliner]: procedures = 18, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1458 [2024-11-14 02:44:50,241 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-14 02:44:50,241 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-14 02:44:50,241 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-14 02:44:50,242 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-14 02:44:50,250 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,250 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,265 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,265 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,300 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,306 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,313 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,319 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,331 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-14 02:44:50,333 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-14 02:44:50,333 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-14 02:44:50,333 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-14 02:44:50,334 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (1/1) ... [2024-11-14 02:44:50,341 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 02:44:50,373 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 02:44:50,392 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-11-14 02:44:50,399 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-11-14 02:44:50,438 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-14 02:44:50,438 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2024-11-14 02:44:50,438 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-14 02:44:50,438 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-14 02:44:50,438 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-14 02:44:50,439 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-14 02:44:50,965 INFO L238 CfgBuilder]: Building ICFG [2024-11-14 02:44:50,968 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-14 02:44:52,736 INFO L? ?]: Removed 416 outVars from TransFormulas that were not future-live. [2024-11-14 02:44:52,736 INFO L287 CfgBuilder]: Performing block encoding [2024-11-14 02:44:52,747 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-14 02:44:52,747 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-14 02:44:52,747 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 02:44:52 BoogieIcfgContainer [2024-11-14 02:44:52,748 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-14 02:44:52,751 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-14 02:44:52,751 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-14 02:44:52,757 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-14 02:44:52,758 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 02:44:49" (1/3) ... [2024-11-14 02:44:52,758 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ba4d3f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 02:44:52, skipping insertion in model container [2024-11-14 02:44:52,758 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:44:50" (2/3) ... [2024-11-14 02:44:52,759 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ba4d3f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 02:44:52, skipping insertion in model container [2024-11-14 02:44:52,759 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 02:44:52" (3/3) ... [2024-11-14 02:44:52,761 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-11-14 02:44:52,779 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-14 02:44:52,782 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-14 02:44:52,850 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-14 02:44:52,869 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1a5b7f82, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-14 02:44:52,871 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-14 02:44:52,875 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 02:44:52,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-14 02:44:52,885 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:44:52,886 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:44:52,887 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 02:44:52,894 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:44:52,896 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-11-14 02:44:52,915 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 02:44:52,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1377488204] [2024-11-14 02:44:52,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:44:52,917 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 02:44:52,917 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 02:44:52,922 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 02:44:52,924 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2024-11-14 02:44:53,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:44:53,952 INFO L255 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-14 02:44:53,963 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 02:44:54,264 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-14 02:44:54,265 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 02:44:54,265 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 02:44:54,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1377488204] [2024-11-14 02:44:54,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1377488204] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:44:54,266 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:44:54,267 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 02:44:54,268 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1707686713] [2024-11-14 02:44:54,269 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:44:54,275 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-14 02:44:54,275 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 02:44:54,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-14 02:44:54,299 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 02:44:54,301 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-14 02:44:54,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:44:54,757 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-11-14 02:44:54,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-14 02:44:54,760 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-11-14 02:44:54,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:44:54,767 INFO L225 Difference]: With dead ends: 43 [2024-11-14 02:44:54,767 INFO L226 Difference]: Without dead ends: 25 [2024-11-14 02:44:54,772 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 02:44:54,776 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-14 02:44:54,777 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-14 02:44:54,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-14 02:44:54,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-14 02:44:54,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-14 02:44:54,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-11-14 02:44:54,828 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-11-14 02:44:54,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:44:54,830 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-11-14 02:44:54,830 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-14 02:44:54,830 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-11-14 02:44:54,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-14 02:44:54,834 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:44:54,834 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-14 02:44:54,850 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Ended with exit code 0 [2024-11-14 02:44:55,035 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 02:44:55,035 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 02:44:55,036 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:44:55,036 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-11-14 02:44:55,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 02:44:55,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [666649345] [2024-11-14 02:44:55,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:44:55,040 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 02:44:55,041 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 02:44:55,043 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 02:44:55,046 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2024-11-14 02:44:57,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:44:57,947 INFO L255 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-14 02:44:57,962 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 02:44:58,734 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-14 02:44:58,736 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 02:44:59,038 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 02:44:59,039 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [666649345] [2024-11-14 02:44:59,039 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [666649345] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 02:44:59,039 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [236331813] [2024-11-14 02:44:59,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:44:59,041 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-14 02:44:59,041 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 [2024-11-14 02:44:59,047 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-14 02:44:59,049 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (4)] Waiting until timeout for monitored process [2024-11-14 02:45:01,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:45:01,452 INFO L255 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-14 02:45:01,468 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 02:45:01,999 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-14 02:45:01,999 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 02:45:02,220 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [236331813] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 02:45:02,221 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [691770433] [2024-11-14 02:45:02,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:45:02,221 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 02:45:02,221 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 02:45:02,224 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 02:45:02,226 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-14 02:45:03,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:45:03,128 INFO L255 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-14 02:45:03,142 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 02:45:03,789 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-14 02:45:03,789 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 02:45:04,008 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [691770433] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 02:45:04,009 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 02:45:04,009 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 10 [2024-11-14 02:45:04,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116446470] [2024-11-14 02:45:04,010 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 02:45:04,011 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-14 02:45:04,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 02:45:04,012 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-14 02:45:04,012 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-14 02:45:04,012 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-14 02:45:05,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:45:05,245 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-11-14 02:45:05,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-14 02:45:05,245 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-11-14 02:45:05,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:45:05,246 INFO L225 Difference]: With dead ends: 36 [2024-11-14 02:45:05,246 INFO L226 Difference]: Without dead ends: 34 [2024-11-14 02:45:05,247 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-11-14 02:45:05,247 INFO L432 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-14 02:45:05,248 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 86 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-14 02:45:05,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-14 02:45:05,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-11-14 02:45:05,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-14 02:45:05,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-11-14 02:45:05,256 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-11-14 02:45:05,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:45:05,256 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-11-14 02:45:05,256 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-14 02:45:05,257 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-11-14 02:45:05,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-14 02:45:05,258 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:45:05,258 INFO L215 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-14 02:45:05,283 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Ended with exit code 0 [2024-11-14 02:45:05,474 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (4)] Forceful destruction successful, exit code 0 [2024-11-14 02:45:05,677 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-14 02:45:05,859 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 02:45:05,860 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 02:45:05,860 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:45:05,860 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-11-14 02:45:05,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 02:45:05,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1715884087] [2024-11-14 02:45:05,864 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-14 02:45:05,864 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 02:45:05,864 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 02:45:05,866 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 02:45:05,869 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2024-11-14 02:45:10,022 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-14 02:45:10,022 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 02:45:10,128 INFO L255 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 100 conjuncts are in the unsatisfiable core [2024-11-14 02:45:10,155 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 02:45:14,215 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 15 proven. 64 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2024-11-14 02:45:14,216 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 02:45:17,098 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse10 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse0 (= ((_ extract 7 0) (bvand .cse10 (_ bv254 32))) (_ bv0 8))) (.cse6 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse10 (_ bv255 32))))) (.cse4 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (let ((.cse11 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_190~0#1|)) (.cse9 (forall ((|v_ULTIMATE.start_main_~var_232_arg_1~0#1_19| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse10 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_232_arg_1~0#1_19|)))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_233~0#1|))))))))))) (.cse5 (not .cse4)) (.cse7 (not .cse6)) (.cse2 (not .cse0)) (.cse8 (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_177~0#1|) |c_ULTIMATE.start_main_~state_209~0#1|))) (and (or (let ((.cse1 (not .cse8)) (.cse3 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_16| (_ BitVec 128))) (not (= |c_ULTIMATE.start_main_~state_209~0#1| (bvand |v_ULTIMATE.start_main_~var_180_arg_2~0#1_16| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)))))) (and (or (and (or .cse0 .cse1) (or .cse2 .cse3)) .cse4) (or .cse5 (and (or .cse6 .cse1) (or .cse7 .cse3))))) (and .cse9 (forall ((|v_ULTIMATE.start_main_~var_196_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_234_arg_2~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse10 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_234_arg_2~0#1_17|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_19|) .cse11))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_19|))))))))))))))))))))))))))) (or (and (forall ((|v_ULTIMATE.start_main_~var_196_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_234_arg_2~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse10 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_234_arg_2~0#1_17|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_19|) .cse11))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_19|))))))))))))))))))))))))) .cse9) (let ((.cse12 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_16| (_ BitVec 128))) (= |c_ULTIMATE.start_main_~state_209~0#1| (bvand |v_ULTIMATE.start_main_~var_180_arg_2~0#1_16| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))))) (and (or .cse5 (and (or .cse6 .cse8) (or .cse12 .cse7))) (or (and (or .cse12 .cse2) (or .cse0 .cse8)) .cse4)))))))) is different from false [2024-11-14 02:45:17,542 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 02:45:17,542 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1715884087] [2024-11-14 02:45:17,543 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1715884087] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 02:45:17,543 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [118404113] [2024-11-14 02:45:17,543 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-14 02:45:17,543 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-14 02:45:17,543 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 [2024-11-14 02:45:17,567 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-14 02:45:17,569 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-11-14 02:45:21,702 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-14 02:45:21,702 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 02:45:21,810 INFO L255 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-14 02:45:21,828 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 02:45:33,440 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-14 02:45:33,440 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 02:45:37,035 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse12 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_190~0#1|)) (.cse13 (forall ((|v_ULTIMATE.start_main_~var_232_arg_1~0#1_23| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_233~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_232_arg_1~0#1_23|)))))))))))))) (.cse5 (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_177~0#1|) |c_ULTIMATE.start_main_~state_209~0#1|))) (let ((.cse6 (not .cse5)) (.cse7 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_20| (_ BitVec 128))) (not (= |c_ULTIMATE.start_main_~state_209~0#1| (bvand |v_ULTIMATE.start_main_~var_180_arg_2~0#1_20| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))))) (.cse8 (and (forall ((|v_ULTIMATE.start_main_~var_234_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_23| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_23| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_23| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_23|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_23|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_23|))))))) (_ bv1 32))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_234_arg_2~0#1_21|)))))))))) .cse13)) (.cse2 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_20| (_ BitVec 128))) (= |c_ULTIMATE.start_main_~state_209~0#1| (bvand |v_ULTIMATE.start_main_~var_180_arg_2~0#1_20| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)))) (.cse1 (and (forall ((|v_ULTIMATE.start_main_~var_234_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_23| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_23| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_23| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_23|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_23|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_23|))))))) (_ bv0 32))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_234_arg_2~0#1_21|)))))))))) .cse13)) (.cse0 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (not .cse0) (let ((.cse4 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 (_ bv255 32)))))) (let ((.cse3 (not .cse4))) (and (or .cse1 (and (or .cse2 .cse3) (or .cse4 .cse5))) (or (and (or .cse4 .cse6) (or .cse7 .cse3)) .cse8))))) (or (let ((.cse10 (= ((_ extract 7 0) (bvand .cse9 (_ bv254 32))) (_ bv0 8)))) (let ((.cse11 (not .cse10))) (and (or (and (or .cse10 .cse6) (or .cse11 .cse7)) .cse8) (or (and (or .cse11 .cse2) (or .cse10 .cse5)) .cse1)))) .cse0))))) is different from false [2024-11-14 02:45:37,512 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [118404113] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 02:45:37,513 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1618814947] [2024-11-14 02:45:37,513 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-14 02:45:37,513 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 02:45:37,513 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 02:45:37,515 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 02:45:37,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-14 02:45:39,854 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-14 02:45:39,855 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 02:45:39,879 INFO L255 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 84 conjuncts are in the unsatisfiable core [2024-11-14 02:45:39,894 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 02:45:50,105 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-14 02:45:50,106 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 02:45:54,147 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse14 (= (_ bv0 8) |c_ULTIMATE.start_main_~state_213~0#1|)) (.cse9 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 (_ bv255 32))))) (.cse8 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse4 (= ((_ extract 7 0) (bvand .cse0 (_ bv254 32))) (_ bv0 8)))) (let ((.cse6 (not .cse4)) (.cse11 (not .cse8)) (.cse10 (not .cse9)) (.cse12 (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_177~0#1|) |c_ULTIMATE.start_main_~state_209~0#1|)) (.cse1 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_190~0#1|)) (.cse2 (not .cse14)) (.cse3 (or (forall ((|v_ULTIMATE.start_main_~var_232_arg_1~0#1_27| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_236_arg_0~0#1_28| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_28|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_232_arg_1~0#1_27|))))))))))))) .cse14))) (and (or (and (or (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_28| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_27| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_27| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_27| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_28|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_27|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_27|) .cse1))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_27|))))))))))))))))))))))))) .cse2) .cse3) (let ((.cse5 (not .cse12)) (.cse7 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_24| (_ BitVec 128))) (not (= |c_ULTIMATE.start_main_~state_209~0#1| (bvand |v_ULTIMATE.start_main_~var_180_arg_2~0#1_24| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)))))) (and (or (and (or .cse4 .cse5) (or .cse6 .cse7)) .cse8) (or (and (or .cse9 .cse5) (or .cse7 .cse10)) .cse11)))) (or (let ((.cse13 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_24| (_ BitVec 128))) (= |c_ULTIMATE.start_main_~state_209~0#1| (bvand |v_ULTIMATE.start_main_~var_180_arg_2~0#1_24| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))))) (and (or (and (or .cse6 .cse13) (or .cse4 .cse12)) .cse8) (or .cse11 (and (or .cse13 .cse10) (or .cse9 .cse12))))) (and (or (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_28| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_27| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_27| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_27| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_28|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_27|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_27|) .cse1))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_27|))))))))))))))))))))))) (_ bv0 8))) .cse2) .cse3)))))) is different from false [2024-11-14 02:45:54,660 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1618814947] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 02:45:54,660 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 02:45:54,661 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12, 12] total 22 [2024-11-14 02:45:54,661 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807478917] [2024-11-14 02:45:54,661 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 02:45:54,661 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-11-14 02:45:54,661 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 02:45:54,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-14 02:45:54,662 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=454, Unknown=5, NotChecked=132, Total=650 [2024-11-14 02:45:54,663 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 22 states, 17 states have (on average 2.823529411764706) internal successors, (48), 22 states have internal predecessors, (48), 12 states have call successors, (21), 1 states have call predecessors, (21), 2 states have return successors, (21), 9 states have call predecessors, (21), 12 states have call successors, (21) [2024-11-14 02:45:57,013 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 02:46:36,110 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 02:46:38,117 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-14 02:46:38,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:46:38,783 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions. [2024-11-14 02:46:38,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-11-14 02:46:38,788 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 17 states have (on average 2.823529411764706) internal successors, (48), 22 states have internal predecessors, (48), 12 states have call successors, (21), 1 states have call predecessors, (21), 2 states have return successors, (21), 9 states have call predecessors, (21), 12 states have call successors, (21) Word has length 65 [2024-11-14 02:46:38,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:46:38,789 INFO L225 Difference]: With dead ends: 46 [2024-11-14 02:46:38,789 INFO L226 Difference]: Without dead ends: 44 [2024-11-14 02:46:38,791 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 218 GetRequests, 180 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 47.1s TimeCoverageRelationStatistics Valid=200, Invalid=1131, Unknown=13, NotChecked=216, Total=1560 [2024-11-14 02:46:38,792 INFO L432 NwaCegarLoop]: 15 mSDtfsCounter, 35 mSDsluCounter, 177 mSDsCounter, 0 mSdLazyCounter, 364 mSolverCounterSat, 24 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 192 SdHoareTripleChecker+Invalid, 391 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 364 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 13.5s IncrementalHoareTripleChecker+Time [2024-11-14 02:46:38,792 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 192 Invalid, 391 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 364 Invalid, 3 Unknown, 0 Unchecked, 13.5s Time] [2024-11-14 02:46:38,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2024-11-14 02:46:38,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2024-11-14 02:46:38,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-14 02:46:38,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 54 transitions. [2024-11-14 02:46:38,812 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 54 transitions. Word has length 65 [2024-11-14 02:46:38,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:46:38,813 INFO L471 AbstractCegarLoop]: Abstraction has 43 states and 54 transitions. [2024-11-14 02:46:38,813 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 17 states have (on average 2.823529411764706) internal successors, (48), 22 states have internal predecessors, (48), 12 states have call successors, (21), 1 states have call predecessors, (21), 2 states have return successors, (21), 9 states have call predecessors, (21), 12 states have call successors, (21) [2024-11-14 02:46:38,813 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions. [2024-11-14 02:46:38,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2024-11-14 02:46:38,815 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:46:38,815 INFO L215 NwaCegarLoop]: trace histogram [12, 12, 12, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2024-11-14 02:46:38,855 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Ended with exit code 0 [2024-11-14 02:46:39,046 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (7)] Forceful destruction successful, exit code 0 [2024-11-14 02:46:39,238 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-14 02:46:39,416 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 02:46:39,416 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 02:46:39,418 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:46:39,419 INFO L85 PathProgramCache]: Analyzing trace with hash -1616345373, now seen corresponding path program 3 times [2024-11-14 02:46:39,421 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 02:46:39,421 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [943307141] [2024-11-14 02:46:39,421 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-14 02:46:39,421 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 02:46:39,421 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 02:46:39,425 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 02:46:39,426 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2024-11-14 02:46:51,890 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-11-14 02:46:51,890 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 02:46:52,032 INFO L255 TraceCheckSpWp]: Trace formula consists of 1873 conjuncts, 187 conjuncts are in the unsatisfiable core [2024-11-14 02:46:52,057 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 02:49:12,297 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 33 proven. 99 refuted. 0 times theorem prover too weak. 183 trivial. 0 not checked. [2024-11-14 02:49:12,297 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 02:50:04,173 WARN L286 SmtUtils]: Spent 18.27s on a formula simplification. DAG size of input: 232 DAG size of output: 227 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-14 02:50:13,824 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 02:50:13,824 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [943307141] [2024-11-14 02:50:13,825 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [943307141] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 02:50:13,825 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [83805371] [2024-11-14 02:50:13,825 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-14 02:50:13,825 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-14 02:50:13,825 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 [2024-11-14 02:50:13,827 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-14 02:50:13,828 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (10)] Waiting until timeout for monitored process [2024-11-14 02:50:22,877 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-11-14 02:50:22,877 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 02:50:23,008 INFO L255 TraceCheckSpWp]: Trace formula consists of 1873 conjuncts, 251 conjuncts are in the unsatisfiable core [2024-11-14 02:50:23,048 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 02:55:46,795 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 63 proven. 96 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2024-11-14 02:55:46,795 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 02:57:00,176 WARN L286 SmtUtils]: Spent 46.35s on a formula simplification. DAG size of input: 196 DAG size of output: 192 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-14 02:57:49,223 WARN L286 SmtUtils]: Spent 22.80s on a formula simplification that was a NOOP. DAG size: 194 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-14 02:57:49,238 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [83805371] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 02:57:49,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2062574328] [2024-11-14 02:57:49,238 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-14 02:57:49,238 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 02:57:49,238 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 02:57:49,241 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 02:57:49,242 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c3f39d5c-2f93-4f2b-845d-d87654cd11de/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-14 02:57:57,313 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-11-14 02:57:57,313 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 02:57:57,350 INFO L255 TraceCheckSpWp]: Trace formula consists of 1873 conjuncts, 217 conjuncts are in the unsatisfiable core [2024-11-14 02:57:57,382 INFO L278 TraceCheckSpWp]: Computing forward predicates...