./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/config/TaipanReach.xml -i ../../sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0bd5c2784fe43830be309c722c3fa9fc4d3ef116c17a8343acb2a2dfbcf830c0 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-14 05:21:02,247 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-14 05:21:02,352 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-32bit-Taipan_Default.epf [2024-11-14 05:21:02,362 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-14 05:21:02,364 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-14 05:21:02,404 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-14 05:21:02,405 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-14 05:21:02,405 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-14 05:21:02,406 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-14 05:21:02,408 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-14 05:21:02,409 INFO L153 SettingsManager]: * User list type=DISABLED [2024-11-14 05:21:02,409 INFO L151 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2024-11-14 05:21:02,410 INFO L153 SettingsManager]: * Explicit value domain=true [2024-11-14 05:21:02,410 INFO L153 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2024-11-14 05:21:02,410 INFO L153 SettingsManager]: * Octagon Domain=false [2024-11-14 05:21:02,410 INFO L153 SettingsManager]: * Abstract domain=CompoundDomain [2024-11-14 05:21:02,410 INFO L153 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2024-11-14 05:21:02,411 INFO L153 SettingsManager]: * Use the RCFG-of-the-future interface=true [2024-11-14 05:21:02,411 INFO L153 SettingsManager]: * Interval Domain=false [2024-11-14 05:21:02,411 INFO L151 SettingsManager]: Preferences of Sifa differ from their defaults: [2024-11-14 05:21:02,412 INFO L153 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2024-11-14 05:21:02,412 INFO L153 SettingsManager]: * Simplification Technique=POLY_PAC [2024-11-14 05:21:02,412 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-14 05:21:02,412 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-14 05:21:02,412 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-14 05:21:02,413 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-14 05:21:02,413 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-14 05:21:02,413 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-14 05:21:02,413 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-14 05:21:02,414 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-14 05:21:02,414 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-14 05:21:02,414 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-14 05:21:02,414 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-14 05:21:02,414 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-14 05:21:02,414 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-14 05:21:02,414 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-14 05:21:02,415 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-14 05:21:02,415 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-14 05:21:02,415 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 05:21:02,415 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-14 05:21:02,415 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-14 05:21:02,415 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-14 05:21:02,415 INFO L153 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2024-11-14 05:21:02,415 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-14 05:21:02,415 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-14 05:21:02,415 INFO L153 SettingsManager]: * Trace refinement exception blacklist=NONE [2024-11-14 05:21:02,416 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-14 05:21:02,416 INFO L153 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0bd5c2784fe43830be309c722c3fa9fc4d3ef116c17a8343acb2a2dfbcf830c0 [2024-11-14 05:21:02,824 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-14 05:21:02,838 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-14 05:21:02,841 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-14 05:21:02,843 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-14 05:21:02,843 INFO L274 PluginConnector]: CDTParser initialized [2024-11-14 05:21:02,845 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/../../sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c Unable to find full path for "g++" [2024-11-14 05:21:05,152 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-14 05:21:05,485 INFO L384 CDTParser]: Found 1 translation units. [2024-11-14 05:21:05,488 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c [2024-11-14 05:21:05,500 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/data/db6ac54ae/562f6058fad244c0870944e447b22a9f/FLAGc16fc757a [2024-11-14 05:21:05,522 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/data/db6ac54ae/562f6058fad244c0870944e447b22a9f [2024-11-14 05:21:05,525 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-14 05:21:05,527 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-14 05:21:05,529 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-14 05:21:05,529 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-14 05:21:05,535 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-14 05:21:05,536 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,537 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6382aab7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05, skipping insertion in model container [2024-11-14 05:21:05,537 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,554 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-14 05:21:05,740 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c[573,586] [2024-11-14 05:21:05,759 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 05:21:05,770 INFO L200 MainTranslator]: Completed pre-run [2024-11-14 05:21:05,784 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/sv-benchmarks/c/nla-digbench-scaling/mannadiv_unwindbound100.c[573,586] [2024-11-14 05:21:05,790 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 05:21:05,809 INFO L204 MainTranslator]: Completed translation [2024-11-14 05:21:05,809 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05 WrapperNode [2024-11-14 05:21:05,810 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-14 05:21:05,811 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-14 05:21:05,811 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-14 05:21:05,812 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-14 05:21:05,821 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,831 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,856 INFO L138 Inliner]: procedures = 14, calls = 11, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 47 [2024-11-14 05:21:05,857 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-14 05:21:05,858 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-14 05:21:05,858 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-14 05:21:05,858 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-14 05:21:05,868 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,868 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,870 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,870 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,874 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,882 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,886 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,887 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,892 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-14 05:21:05,893 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-14 05:21:05,896 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-14 05:21:05,896 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-14 05:21:05,897 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (1/1) ... [2024-11-14 05:21:05,910 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 05:21:05,928 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:05,947 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-11-14 05:21:05,954 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-11-14 05:21:05,989 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-14 05:21:05,990 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-14 05:21:05,990 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-14 05:21:05,991 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-11-14 05:21:05,991 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-14 05:21:05,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-14 05:21:05,991 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2024-11-14 05:21:05,992 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2024-11-14 05:21:06,092 INFO L238 CfgBuilder]: Building ICFG [2024-11-14 05:21:06,097 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-14 05:21:06,307 INFO L? ?]: Removed 6 outVars from TransFormulas that were not future-live. [2024-11-14 05:21:06,310 INFO L287 CfgBuilder]: Performing block encoding [2024-11-14 05:21:06,370 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-14 05:21:06,370 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-14 05:21:06,371 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:21:06 BoogieIcfgContainer [2024-11-14 05:21:06,371 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-14 05:21:06,374 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-14 05:21:06,375 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-14 05:21:06,380 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-14 05:21:06,380 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 05:21:05" (1/3) ... [2024-11-14 05:21:06,381 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ea4fa0e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:21:06, skipping insertion in model container [2024-11-14 05:21:06,381 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:21:05" (2/3) ... [2024-11-14 05:21:06,382 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ea4fa0e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:21:06, skipping insertion in model container [2024-11-14 05:21:06,382 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:21:06" (3/3) ... [2024-11-14 05:21:06,386 INFO L112 eAbstractionObserver]: Analyzing ICFG mannadiv_unwindbound100.c [2024-11-14 05:21:06,405 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-14 05:21:06,407 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG mannadiv_unwindbound100.c that has 3 procedures, 19 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-14 05:21:06,463 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-14 05:21:06,477 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1ce73ac4, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-14 05:21:06,477 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-14 05:21:06,482 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-14 05:21:06,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2024-11-14 05:21:06,490 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:06,491 INFO L215 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:06,491 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:06,496 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:06,497 INFO L85 PathProgramCache]: Analyzing trace with hash 287051146, now seen corresponding path program 1 times [2024-11-14 05:21:06,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:06,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939199469] [2024-11-14 05:21:06,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:06,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:06,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:06,669 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:06,670 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:06,670 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939199469] [2024-11-14 05:21:06,671 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [939199469] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 05:21:06,671 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 05:21:06,672 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-14 05:21:06,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1529346470] [2024-11-14 05:21:06,674 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 05:21:06,678 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-14 05:21:06,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:06,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-14 05:21:06,705 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-14 05:21:06,707 INFO L87 Difference]: Start difference. First operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-14 05:21:06,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:06,750 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2024-11-14 05:21:06,751 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-14 05:21:06,753 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 13 [2024-11-14 05:21:06,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:06,760 INFO L225 Difference]: With dead ends: 32 [2024-11-14 05:21:06,761 INFO L226 Difference]: Without dead ends: 17 [2024-11-14 05:21:06,768 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-14 05:21:06,774 INFO L432 NwaCegarLoop]: 18 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 4 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:06,775 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 18 Invalid, 4 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-14 05:21:06,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2024-11-14 05:21:06,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2024-11-14 05:21:06,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 10 states have (on average 1.3) internal successors, (13), 11 states have internal predecessors, (13), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 05:21:06,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 20 transitions. [2024-11-14 05:21:06,823 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 20 transitions. Word has length 13 [2024-11-14 05:21:06,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:06,827 INFO L471 AbstractCegarLoop]: Abstraction has 17 states and 20 transitions. [2024-11-14 05:21:06,827 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-14 05:21:06,828 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2024-11-14 05:21:06,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2024-11-14 05:21:06,829 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:06,829 INFO L215 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:06,830 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-14 05:21:06,830 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:06,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:06,831 INFO L85 PathProgramCache]: Analyzing trace with hash -279128393, now seen corresponding path program 1 times [2024-11-14 05:21:06,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:06,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176953276] [2024-11-14 05:21:06,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:06,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:06,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:07,074 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:07,074 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:07,074 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176953276] [2024-11-14 05:21:07,074 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1176953276] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 05:21:07,075 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 05:21:07,075 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 05:21:07,075 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1860196968] [2024-11-14 05:21:07,075 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 05:21:07,076 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-14 05:21:07,076 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:07,078 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-14 05:21:07,078 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 05:21:07,079 INFO L87 Difference]: Start difference. First operand 17 states and 20 transitions. Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-14 05:21:07,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:07,144 INFO L93 Difference]: Finished difference Result 26 states and 29 transitions. [2024-11-14 05:21:07,145 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-14 05:21:07,145 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 14 [2024-11-14 05:21:07,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:07,146 INFO L225 Difference]: With dead ends: 26 [2024-11-14 05:21:07,146 INFO L226 Difference]: Without dead ends: 19 [2024-11-14 05:21:07,147 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-14 05:21:07,148 INFO L432 NwaCegarLoop]: 15 mSDtfsCounter, 3 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:07,148 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 39 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 05:21:07,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2024-11-14 05:21:07,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2024-11-14 05:21:07,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 12 states have (on average 1.25) internal successors, (15), 13 states have internal predecessors, (15), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 05:21:07,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 22 transitions. [2024-11-14 05:21:07,155 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 22 transitions. Word has length 14 [2024-11-14 05:21:07,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:07,155 INFO L471 AbstractCegarLoop]: Abstraction has 19 states and 22 transitions. [2024-11-14 05:21:07,155 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-14 05:21:07,156 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 22 transitions. [2024-11-14 05:21:07,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2024-11-14 05:21:07,156 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:07,156 INFO L215 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:07,156 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-14 05:21:07,157 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:07,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:07,157 INFO L85 PathProgramCache]: Analyzing trace with hash -277340933, now seen corresponding path program 1 times [2024-11-14 05:21:07,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:07,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523707216] [2024-11-14 05:21:07,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:07,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:07,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-14 05:21:07,194 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [557270031] [2024-11-14 05:21:07,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:07,195 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:07,197 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:07,201 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:21:07,203 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-14 05:21:07,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:07,290 INFO L255 TraceCheckSpWp]: Trace formula consists of 59 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-14 05:21:07,296 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:21:07,433 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:07,433 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 05:21:07,434 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:07,434 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [523707216] [2024-11-14 05:21:07,435 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-14 05:21:07,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [557270031] [2024-11-14 05:21:07,435 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [557270031] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 05:21:07,435 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 05:21:07,435 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-14 05:21:07,436 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879792389] [2024-11-14 05:21:07,436 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 05:21:07,436 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 05:21:07,437 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:07,437 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 05:21:07,437 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 05:21:07,438 INFO L87 Difference]: Start difference. First operand 19 states and 22 transitions. Second operand has 5 states, 5 states have (on average 1.6) internal successors, (8), 4 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-14 05:21:07,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:07,515 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2024-11-14 05:21:07,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-14 05:21:07,516 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 1.6) internal successors, (8), 4 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 14 [2024-11-14 05:21:07,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:07,517 INFO L225 Difference]: With dead ends: 27 [2024-11-14 05:21:07,517 INFO L226 Difference]: Without dead ends: 25 [2024-11-14 05:21:07,517 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-14 05:21:07,518 INFO L432 NwaCegarLoop]: 13 mSDtfsCounter, 3 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:07,519 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 50 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 05:21:07,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-14 05:21:07,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2024-11-14 05:21:07,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 15 states have (on average 1.2) internal successors, (18), 17 states have internal predecessors, (18), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-14 05:21:07,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 27 transitions. [2024-11-14 05:21:07,526 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 27 transitions. Word has length 14 [2024-11-14 05:21:07,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:07,526 INFO L471 AbstractCegarLoop]: Abstraction has 24 states and 27 transitions. [2024-11-14 05:21:07,527 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 1.6) internal successors, (8), 4 states have internal predecessors, (8), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-14 05:21:07,527 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 27 transitions. [2024-11-14 05:21:07,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2024-11-14 05:21:07,527 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:07,527 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:07,553 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-14 05:21:07,731 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:07,731 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:07,732 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:07,732 INFO L85 PathProgramCache]: Analyzing trace with hash -144982397, now seen corresponding path program 1 times [2024-11-14 05:21:07,732 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:07,732 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [520462358] [2024-11-14 05:21:07,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:07,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:07,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:08,121 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:08,122 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:08,122 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [520462358] [2024-11-14 05:21:08,122 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [520462358] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 05:21:08,122 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1613107072] [2024-11-14 05:21:08,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:08,122 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:08,123 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:08,125 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:21:08,128 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-14 05:21:08,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:08,202 INFO L255 TraceCheckSpWp]: Trace formula consists of 70 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-14 05:21:08,203 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:21:08,408 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:08,408 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 05:21:08,408 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1613107072] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 05:21:08,408 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-14 05:21:08,408 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-11-14 05:21:08,409 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1084317692] [2024-11-14 05:21:08,409 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 05:21:08,409 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-14 05:21:08,409 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:08,410 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-14 05:21:08,410 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2024-11-14 05:21:08,410 INFO L87 Difference]: Start difference. First operand 24 states and 27 transitions. Second operand has 6 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 05:21:08,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:08,495 INFO L93 Difference]: Finished difference Result 32 states and 35 transitions. [2024-11-14 05:21:08,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 05:21:08,495 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 20 [2024-11-14 05:21:08,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:08,496 INFO L225 Difference]: With dead ends: 32 [2024-11-14 05:21:08,496 INFO L226 Difference]: Without dead ends: 25 [2024-11-14 05:21:08,498 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2024-11-14 05:21:08,499 INFO L432 NwaCegarLoop]: 13 mSDtfsCounter, 3 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:08,499 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 63 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 05:21:08,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-14 05:21:08,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-14 05:21:08,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 16 states have (on average 1.1875) internal successors, (19), 17 states have internal predecessors, (19), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-14 05:21:08,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2024-11-14 05:21:08,509 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 20 [2024-11-14 05:21:08,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:08,510 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2024-11-14 05:21:08,510 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 05:21:08,511 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2024-11-14 05:21:08,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2024-11-14 05:21:08,514 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:08,514 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:08,538 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-14 05:21:08,715 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:08,715 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:08,715 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:08,715 INFO L85 PathProgramCache]: Analyzing trace with hash 568038870, now seen corresponding path program 1 times [2024-11-14 05:21:08,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:08,716 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772086259] [2024-11-14 05:21:08,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:08,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:08,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:08,955 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:08,955 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:08,955 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772086259] [2024-11-14 05:21:08,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [772086259] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 05:21:08,955 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1687639363] [2024-11-14 05:21:08,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:08,956 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:08,956 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:08,958 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:21:08,960 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-14 05:21:09,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:09,024 INFO L255 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-14 05:21:09,025 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:21:09,081 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:09,082 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 05:21:09,178 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:09,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1687639363] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 05:21:09,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1312733012] [2024-11-14 05:21:09,203 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2024-11-14 05:21:09,203 INFO L166 IcfgInterpreter]: Building call graph [2024-11-14 05:21:09,208 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2024-11-14 05:21:09,215 INFO L176 IcfgInterpreter]: Starting interpretation [2024-11-14 05:21:09,216 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2024-11-14 05:21:10,430 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 59 for LOIs [2024-11-14 05:21:10,632 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 65 for LOIs [2024-11-14 05:21:10,700 INFO L180 IcfgInterpreter]: Interpretation finished [2024-11-14 05:21:12,569 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '585#(and (<= 1 |#StackHeapBarrier|) (<= 1 ~counter~0) (= |__VERIFIER_assert_#in~cond| 0))' at error location [2024-11-14 05:21:12,569 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2024-11-14 05:21:12,569 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 05:21:12,569 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 5] total 10 [2024-11-14 05:21:12,570 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1303656721] [2024-11-14 05:21:12,570 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 05:21:12,570 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-14 05:21:12,570 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:12,574 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-14 05:21:12,575 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=495, Unknown=0, NotChecked=0, Total=600 [2024-11-14 05:21:12,575 INFO L87 Difference]: Start difference. First operand 25 states and 28 transitions. Second operand has 10 states, 10 states have (on average 2.9) internal successors, (29), 10 states have internal predecessors, (29), 6 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 5 states have call predecessors, (9), 5 states have call successors, (9) [2024-11-14 05:21:12,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:12,721 INFO L93 Difference]: Finished difference Result 56 states and 63 transitions. [2024-11-14 05:21:12,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-14 05:21:12,722 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.9) internal successors, (29), 10 states have internal predecessors, (29), 6 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 5 states have call predecessors, (9), 5 states have call successors, (9) Word has length 22 [2024-11-14 05:21:12,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:12,723 INFO L225 Difference]: With dead ends: 56 [2024-11-14 05:21:12,723 INFO L226 Difference]: Without dead ends: 49 [2024-11-14 05:21:12,724 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=118, Invalid=584, Unknown=0, NotChecked=0, Total=702 [2024-11-14 05:21:12,725 INFO L432 NwaCegarLoop]: 15 mSDtfsCounter, 28 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 72 SdHoareTripleChecker+Invalid, 55 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:12,725 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 72 Invalid, 55 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 05:21:12,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2024-11-14 05:21:12,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 45. [2024-11-14 05:21:12,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 30 states have (on average 1.2333333333333334) internal successors, (37), 33 states have internal predecessors, (37), 9 states have call successors, (9), 5 states have call predecessors, (9), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-14 05:21:12,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 52 transitions. [2024-11-14 05:21:12,735 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 52 transitions. Word has length 22 [2024-11-14 05:21:12,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:12,736 INFO L471 AbstractCegarLoop]: Abstraction has 45 states and 52 transitions. [2024-11-14 05:21:12,736 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.9) internal successors, (29), 10 states have internal predecessors, (29), 6 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 5 states have call predecessors, (9), 5 states have call successors, (9) [2024-11-14 05:21:12,736 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 52 transitions. [2024-11-14 05:21:12,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2024-11-14 05:21:12,737 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:12,737 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:12,760 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-14 05:21:12,941 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:12,941 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:12,942 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:12,942 INFO L85 PathProgramCache]: Analyzing trace with hash 569826330, now seen corresponding path program 1 times [2024-11-14 05:21:12,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:12,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801345331] [2024-11-14 05:21:12,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:12,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:12,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-14 05:21:12,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2014844041] [2024-11-14 05:21:12,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:12,982 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:12,982 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:12,988 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:21:12,993 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-14 05:21:13,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:13,068 INFO L255 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-14 05:21:13,070 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:21:13,348 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:13,348 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 05:21:13,521 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:13,521 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801345331] [2024-11-14 05:21:13,521 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-14 05:21:13,521 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2014844041] [2024-11-14 05:21:13,521 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2014844041] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 05:21:13,522 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [30738654] [2024-11-14 05:21:13,524 INFO L159 IcfgInterpreter]: Started Sifa with 16 locations of interest [2024-11-14 05:21:13,524 INFO L166 IcfgInterpreter]: Building call graph [2024-11-14 05:21:13,524 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2024-11-14 05:21:13,524 INFO L176 IcfgInterpreter]: Starting interpretation [2024-11-14 05:21:13,525 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2024-11-14 05:21:14,058 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 33 for LOIs [2024-11-14 05:21:14,116 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 65 for LOIs [2024-11-14 05:21:14,139 INFO L180 IcfgInterpreter]: Interpretation finished [2024-11-14 05:21:15,141 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '851#(and (<= 1 |#StackHeapBarrier|) (<= 1 ~counter~0) (= |__VERIFIER_assert_#in~cond| 0) (<= ~counter~0 100))' at error location [2024-11-14 05:21:15,141 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2024-11-14 05:21:15,141 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-14 05:21:15,142 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6] total 6 [2024-11-14 05:21:15,143 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [469096448] [2024-11-14 05:21:15,143 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-14 05:21:15,143 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-14 05:21:15,143 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:15,144 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-14 05:21:15,144 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2024-11-14 05:21:15,146 INFO L87 Difference]: Start difference. First operand 45 states and 52 transitions. Second operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 05:21:15,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:15,234 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2024-11-14 05:21:15,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 05:21:15,236 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 22 [2024-11-14 05:21:15,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:15,237 INFO L225 Difference]: With dead ends: 51 [2024-11-14 05:21:15,237 INFO L226 Difference]: Without dead ends: 47 [2024-11-14 05:21:15,237 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 29 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=68, Invalid=438, Unknown=0, NotChecked=0, Total=506 [2024-11-14 05:21:15,238 INFO L432 NwaCegarLoop]: 16 mSDtfsCounter, 3 mSDsluCounter, 55 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:15,241 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 71 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 45 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 05:21:15,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2024-11-14 05:21:15,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2024-11-14 05:21:15,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 32 states have (on average 1.1875) internal successors, (38), 34 states have internal predecessors, (38), 9 states have call successors, (9), 6 states have call predecessors, (9), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-14 05:21:15,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 53 transitions. [2024-11-14 05:21:15,257 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 53 transitions. Word has length 22 [2024-11-14 05:21:15,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:15,257 INFO L471 AbstractCegarLoop]: Abstraction has 47 states and 53 transitions. [2024-11-14 05:21:15,258 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 05:21:15,261 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 53 transitions. [2024-11-14 05:21:15,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-11-14 05:21:15,262 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:15,262 INFO L215 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:15,286 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-11-14 05:21:15,463 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:15,463 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:15,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:15,463 INFO L85 PathProgramCache]: Analyzing trace with hash 24144482, now seen corresponding path program 1 times [2024-11-14 05:21:15,464 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:15,464 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676582268] [2024-11-14 05:21:15,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:15,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:15,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:15,758 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-14 05:21:15,758 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:15,758 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676582268] [2024-11-14 05:21:15,758 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [676582268] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 05:21:15,759 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1984420555] [2024-11-14 05:21:15,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:15,759 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:15,759 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:15,761 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:21:15,766 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-14 05:21:15,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:15,822 INFO L255 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-14 05:21:15,824 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:21:15,891 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-14 05:21:15,891 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 05:21:16,021 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-14 05:21:16,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1984420555] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 05:21:16,022 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [108775357] [2024-11-14 05:21:16,024 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2024-11-14 05:21:16,024 INFO L166 IcfgInterpreter]: Building call graph [2024-11-14 05:21:16,024 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2024-11-14 05:21:16,024 INFO L176 IcfgInterpreter]: Starting interpretation [2024-11-14 05:21:16,024 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2024-11-14 05:21:16,743 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 9 for LOIs [2024-11-14 05:21:16,754 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 65 for LOIs [2024-11-14 05:21:16,778 INFO L180 IcfgInterpreter]: Interpretation finished [2024-11-14 05:21:17,779 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1190#(= |__VERIFIER_assert_#in~cond| 0)' at error location [2024-11-14 05:21:17,779 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2024-11-14 05:21:17,779 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 05:21:17,779 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 8] total 12 [2024-11-14 05:21:17,780 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625173642] [2024-11-14 05:21:17,780 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 05:21:17,780 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-14 05:21:17,780 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:17,781 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-14 05:21:17,781 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=479, Unknown=0, NotChecked=0, Total=552 [2024-11-14 05:21:17,781 INFO L87 Difference]: Start difference. First operand 47 states and 53 transitions. Second operand has 12 states, 11 states have (on average 2.0) internal successors, (22), 8 states have internal predecessors, (22), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (6), 4 states have call predecessors, (6), 1 states have call successors, (6) [2024-11-14 05:21:17,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:17,892 INFO L93 Difference]: Finished difference Result 54 states and 59 transitions. [2024-11-14 05:21:17,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-14 05:21:17,893 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.0) internal successors, (22), 8 states have internal predecessors, (22), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (6), 4 states have call predecessors, (6), 1 states have call successors, (6) Word has length 28 [2024-11-14 05:21:17,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:17,894 INFO L225 Difference]: With dead ends: 54 [2024-11-14 05:21:17,894 INFO L226 Difference]: Without dead ends: 45 [2024-11-14 05:21:17,894 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 67 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 138 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=81, Invalid=519, Unknown=0, NotChecked=0, Total=600 [2024-11-14 05:21:17,895 INFO L432 NwaCegarLoop]: 13 mSDtfsCounter, 9 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 85 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:17,896 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 85 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 05:21:17,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2024-11-14 05:21:17,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2024-11-14 05:21:17,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 32 states have (on average 1.03125) internal successors, (33), 32 states have internal predecessors, (33), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-14 05:21:17,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 46 transitions. [2024-11-14 05:21:17,905 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 46 transitions. Word has length 28 [2024-11-14 05:21:17,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:17,906 INFO L471 AbstractCegarLoop]: Abstraction has 45 states and 46 transitions. [2024-11-14 05:21:17,906 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.0) internal successors, (22), 8 states have internal predecessors, (22), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (6), 4 states have call predecessors, (6), 1 states have call successors, (6) [2024-11-14 05:21:17,906 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 46 transitions. [2024-11-14 05:21:17,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2024-11-14 05:21:17,907 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:17,907 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:17,931 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-14 05:21:18,108 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:18,108 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:18,108 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:18,108 INFO L85 PathProgramCache]: Analyzing trace with hash 351435059, now seen corresponding path program 2 times [2024-11-14 05:21:18,108 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:18,108 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75413274] [2024-11-14 05:21:18,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:18,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:18,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:18,321 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 8 proven. 32 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-11-14 05:21:18,322 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:18,322 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75413274] [2024-11-14 05:21:18,322 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [75413274] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 05:21:18,322 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1094047385] [2024-11-14 05:21:18,322 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-14 05:21:18,322 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:18,322 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:18,324 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:21:18,326 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-14 05:21:18,402 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2024-11-14 05:21:18,402 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 05:21:18,404 INFO L255 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-14 05:21:18,406 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:21:18,492 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 8 proven. 56 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:18,493 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 05:21:18,673 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 8 proven. 32 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-11-14 05:21:18,673 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1094047385] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 05:21:18,673 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1902261398] [2024-11-14 05:21:18,675 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2024-11-14 05:21:18,677 INFO L166 IcfgInterpreter]: Building call graph [2024-11-14 05:21:18,677 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2024-11-14 05:21:18,678 INFO L176 IcfgInterpreter]: Starting interpretation [2024-11-14 05:21:18,678 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2024-11-14 05:21:19,332 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 1 for LOIs [2024-11-14 05:21:19,335 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 65 for LOIs [2024-11-14 05:21:19,355 INFO L180 IcfgInterpreter]: Interpretation finished [2024-11-14 05:21:20,167 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '1640#(= |__VERIFIER_assert_#in~cond| 0)' at error location [2024-11-14 05:21:20,167 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2024-11-14 05:21:20,167 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 05:21:20,167 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 8] total 16 [2024-11-14 05:21:20,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767164535] [2024-11-14 05:21:20,167 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 05:21:20,167 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2024-11-14 05:21:20,168 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:20,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-11-14 05:21:20,169 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=198, Invalid=558, Unknown=0, NotChecked=0, Total=756 [2024-11-14 05:21:20,169 INFO L87 Difference]: Start difference. First operand 45 states and 46 transitions. Second operand has 16 states, 16 states have (on average 3.5) internal successors, (56), 16 states have internal predecessors, (56), 12 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2024-11-14 05:21:20,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:20,420 INFO L93 Difference]: Finished difference Result 98 states and 104 transitions. [2024-11-14 05:21:20,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-14 05:21:20,421 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 3.5) internal successors, (56), 16 states have internal predecessors, (56), 12 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) Word has length 46 [2024-11-14 05:21:20,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:20,422 INFO L225 Difference]: With dead ends: 98 [2024-11-14 05:21:20,422 INFO L226 Difference]: Without dead ends: 93 [2024-11-14 05:21:20,423 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 397 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=306, Invalid=954, Unknown=0, NotChecked=0, Total=1260 [2024-11-14 05:21:20,424 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 44 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 67 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:20,424 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 67 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 05:21:20,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2024-11-14 05:21:20,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2024-11-14 05:21:20,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 68 states have (on average 1.0147058823529411) internal successors, (69), 68 states have internal predecessors, (69), 13 states have call successors, (13), 12 states have call predecessors, (13), 11 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-14 05:21:20,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 94 transitions. [2024-11-14 05:21:20,439 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 94 transitions. Word has length 46 [2024-11-14 05:21:20,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:20,439 INFO L471 AbstractCegarLoop]: Abstraction has 93 states and 94 transitions. [2024-11-14 05:21:20,439 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 3.5) internal successors, (56), 16 states have internal predecessors, (56), 12 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2024-11-14 05:21:20,439 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 94 transitions. [2024-11-14 05:21:20,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-11-14 05:21:20,441 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:20,442 INFO L215 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:20,463 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-14 05:21:20,646 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:20,646 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:20,647 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:20,647 INFO L85 PathProgramCache]: Analyzing trace with hash -2021774611, now seen corresponding path program 3 times [2024-11-14 05:21:20,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:20,647 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101574632] [2024-11-14 05:21:20,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:20,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:20,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:21,425 INFO L134 CoverageAnalysis]: Checked inductivity of 402 backedges. 20 proven. 200 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2024-11-14 05:21:21,426 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:21,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101574632] [2024-11-14 05:21:21,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1101574632] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 05:21:21,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2039759268] [2024-11-14 05:21:21,426 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-14 05:21:21,426 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:21,426 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:21,430 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:21:21,432 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-14 05:21:21,546 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-14 05:21:21,546 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 05:21:21,548 INFO L255 TraceCheckSpWp]: Trace formula consists of 219 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-11-14 05:21:21,556 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:21:21,764 INFO L134 CoverageAnalysis]: Checked inductivity of 402 backedges. 20 proven. 380 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:21,764 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 05:21:22,227 INFO L134 CoverageAnalysis]: Checked inductivity of 402 backedges. 20 proven. 200 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2024-11-14 05:21:22,227 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2039759268] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 05:21:22,227 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [851143701] [2024-11-14 05:21:22,229 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2024-11-14 05:21:22,229 INFO L166 IcfgInterpreter]: Building call graph [2024-11-14 05:21:22,230 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2024-11-14 05:21:22,230 INFO L176 IcfgInterpreter]: Starting interpretation [2024-11-14 05:21:22,230 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2024-11-14 05:21:22,800 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 1 for LOIs [2024-11-14 05:21:22,804 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 65 for LOIs [2024-11-14 05:21:22,821 INFO L180 IcfgInterpreter]: Interpretation finished [2024-11-14 05:21:23,632 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '2541#(= |__VERIFIER_assert_#in~cond| 0)' at error location [2024-11-14 05:21:23,632 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2024-11-14 05:21:23,632 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 05:21:23,632 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13, 14] total 28 [2024-11-14 05:21:23,632 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [751965637] [2024-11-14 05:21:23,632 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 05:21:23,633 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2024-11-14 05:21:23,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:23,635 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-11-14 05:21:23,636 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=504, Invalid=1056, Unknown=0, NotChecked=0, Total=1560 [2024-11-14 05:21:23,636 INFO L87 Difference]: Start difference. First operand 93 states and 94 transitions. Second operand has 28 states, 28 states have (on average 3.9285714285714284) internal successors, (110), 28 states have internal predecessors, (110), 24 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 23 states have call predecessors, (36), 23 states have call successors, (36) [2024-11-14 05:21:24,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:24,455 INFO L93 Difference]: Finished difference Result 194 states and 206 transitions. [2024-11-14 05:21:24,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-11-14 05:21:24,456 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 3.9285714285714284) internal successors, (110), 28 states have internal predecessors, (110), 24 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 23 states have call predecessors, (36), 23 states have call successors, (36) Word has length 94 [2024-11-14 05:21:24,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:24,458 INFO L225 Difference]: With dead ends: 194 [2024-11-14 05:21:24,458 INFO L226 Difference]: Without dead ends: 189 [2024-11-14 05:21:24,461 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 315 GetRequests, 257 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 976 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1014, Invalid=2526, Unknown=0, NotChecked=0, Total=3540 [2024-11-14 05:21:24,461 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 74 mSDsluCounter, 121 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 74 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 149 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:24,462 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [74 Valid, 135 Invalid, 149 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-14 05:21:24,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2024-11-14 05:21:24,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2024-11-14 05:21:24,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 189 states, 140 states have (on average 1.0071428571428571) internal successors, (141), 140 states have internal predecessors, (141), 25 states have call successors, (25), 24 states have call predecessors, (25), 23 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-14 05:21:24,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 190 transitions. [2024-11-14 05:21:24,495 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 190 transitions. Word has length 94 [2024-11-14 05:21:24,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:24,496 INFO L471 AbstractCegarLoop]: Abstraction has 189 states and 190 transitions. [2024-11-14 05:21:24,496 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 3.9285714285714284) internal successors, (110), 28 states have internal predecessors, (110), 24 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 23 states have call predecessors, (36), 23 states have call successors, (36) [2024-11-14 05:21:24,496 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 190 transitions. [2024-11-14 05:21:24,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2024-11-14 05:21:24,499 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:24,500 INFO L215 NwaCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:24,523 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-14 05:21:24,700 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:24,701 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:24,701 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:24,701 INFO L85 PathProgramCache]: Analyzing trace with hash 1780038241, now seen corresponding path program 4 times [2024-11-14 05:21:24,701 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:24,701 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41428715] [2024-11-14 05:21:24,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:24,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:24,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:26,543 INFO L134 CoverageAnalysis]: Checked inductivity of 1938 backedges. 44 proven. 968 refuted. 0 times theorem prover too weak. 926 trivial. 0 not checked. [2024-11-14 05:21:26,544 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:26,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [41428715] [2024-11-14 05:21:26,547 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [41428715] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 05:21:26,547 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [19433372] [2024-11-14 05:21:26,547 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-14 05:21:26,547 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:26,547 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:26,550 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:21:26,553 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-14 05:21:26,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:26,681 INFO L255 TraceCheckSpWp]: Trace formula consists of 411 conjuncts, 47 conjuncts are in the unsatisfiable core [2024-11-14 05:21:26,686 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:21:26,967 INFO L134 CoverageAnalysis]: Checked inductivity of 1938 backedges. 44 proven. 1892 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:26,968 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 05:21:28,021 INFO L134 CoverageAnalysis]: Checked inductivity of 1938 backedges. 44 proven. 968 refuted. 0 times theorem prover too weak. 926 trivial. 0 not checked. [2024-11-14 05:21:28,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [19433372] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 05:21:28,022 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [49831664] [2024-11-14 05:21:28,024 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2024-11-14 05:21:28,024 INFO L166 IcfgInterpreter]: Building call graph [2024-11-14 05:21:28,024 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2024-11-14 05:21:28,024 INFO L176 IcfgInterpreter]: Starting interpretation [2024-11-14 05:21:28,024 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2024-11-14 05:21:28,590 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 1 for LOIs [2024-11-14 05:21:28,594 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 65 for LOIs [2024-11-14 05:21:28,652 INFO L180 IcfgInterpreter]: Interpretation finished [2024-11-14 05:21:29,671 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '4354#(= |__VERIFIER_assert_#in~cond| 0)' at error location [2024-11-14 05:21:29,671 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2024-11-14 05:21:29,671 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 05:21:29,671 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 25, 26] total 52 [2024-11-14 05:21:29,671 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455552965] [2024-11-14 05:21:29,671 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 05:21:29,672 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 52 states [2024-11-14 05:21:29,673 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:29,675 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2024-11-14 05:21:29,676 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1548, Invalid=2484, Unknown=0, NotChecked=0, Total=4032 [2024-11-14 05:21:29,677 INFO L87 Difference]: Start difference. First operand 189 states and 190 transitions. Second operand has 52 states, 52 states have (on average 4.1923076923076925) internal successors, (218), 52 states have internal predecessors, (218), 48 states have call successors, (73), 25 states have call predecessors, (73), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) [2024-11-14 05:21:31,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:31,820 INFO L93 Difference]: Finished difference Result 386 states and 410 transitions. [2024-11-14 05:21:31,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2024-11-14 05:21:31,821 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 4.1923076923076925) internal successors, (218), 52 states have internal predecessors, (218), 48 states have call successors, (73), 25 states have call predecessors, (73), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) Word has length 190 [2024-11-14 05:21:31,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:31,825 INFO L225 Difference]: With dead ends: 386 [2024-11-14 05:21:31,825 INFO L226 Difference]: Without dead ends: 381 [2024-11-14 05:21:31,831 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 639 GetRequests, 533 SyntacticMatches, 0 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2674 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=3726, Invalid=7830, Unknown=0, NotChecked=0, Total=11556 [2024-11-14 05:21:31,832 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 212 mSDsluCounter, 194 mSDsCounter, 0 mSdLazyCounter, 245 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 212 SdHoareTripleChecker+Valid, 208 SdHoareTripleChecker+Invalid, 284 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 245 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:31,833 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [212 Valid, 208 Invalid, 284 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 245 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-14 05:21:31,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states. [2024-11-14 05:21:31,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 381. [2024-11-14 05:21:31,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 284 states have (on average 1.0035211267605635) internal successors, (285), 284 states have internal predecessors, (285), 49 states have call successors, (49), 48 states have call predecessors, (49), 47 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2024-11-14 05:21:31,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 382 transitions. [2024-11-14 05:21:31,880 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 382 transitions. Word has length 190 [2024-11-14 05:21:31,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:31,881 INFO L471 AbstractCegarLoop]: Abstraction has 381 states and 382 transitions. [2024-11-14 05:21:31,882 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 52 states, 52 states have (on average 4.1923076923076925) internal successors, (218), 52 states have internal predecessors, (218), 48 states have call successors, (73), 25 states have call predecessors, (73), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) [2024-11-14 05:21:31,882 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 382 transitions. [2024-11-14 05:21:31,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 383 [2024-11-14 05:21:31,890 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:31,890 INFO L215 NwaCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:31,913 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-14 05:21:32,090 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:32,091 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:32,092 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:32,092 INFO L85 PathProgramCache]: Analyzing trace with hash -843183799, now seen corresponding path program 5 times [2024-11-14 05:21:32,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:32,092 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732888970] [2024-11-14 05:21:32,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:32,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:32,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:21:38,002 INFO L134 CoverageAnalysis]: Checked inductivity of 8466 backedges. 92 proven. 4232 refuted. 0 times theorem prover too weak. 4142 trivial. 0 not checked. [2024-11-14 05:21:38,003 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:21:38,003 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732888970] [2024-11-14 05:21:38,003 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1732888970] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 05:21:38,003 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [736330859] [2024-11-14 05:21:38,003 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-14 05:21:38,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:38,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:21:38,006 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:21:38,011 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-14 05:21:39,078 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 47 check-sat command(s) [2024-11-14 05:21:39,078 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 05:21:39,084 INFO L255 TraceCheckSpWp]: Trace formula consists of 795 conjuncts, 95 conjuncts are in the unsatisfiable core [2024-11-14 05:21:39,093 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:21:39,715 INFO L134 CoverageAnalysis]: Checked inductivity of 8466 backedges. 92 proven. 8372 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:21:39,716 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 05:21:43,627 INFO L134 CoverageAnalysis]: Checked inductivity of 8466 backedges. 92 proven. 4232 refuted. 0 times theorem prover too weak. 4142 trivial. 0 not checked. [2024-11-14 05:21:43,627 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [736330859] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 05:21:43,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [324264204] [2024-11-14 05:21:43,629 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2024-11-14 05:21:43,629 INFO L166 IcfgInterpreter]: Building call graph [2024-11-14 05:21:43,630 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2024-11-14 05:21:43,630 INFO L176 IcfgInterpreter]: Starting interpretation [2024-11-14 05:21:43,630 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2024-11-14 05:21:44,064 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 1 for LOIs [2024-11-14 05:21:44,068 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 65 for LOIs [2024-11-14 05:21:44,087 INFO L180 IcfgInterpreter]: Interpretation finished [2024-11-14 05:21:45,122 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '7991#(= |__VERIFIER_assert_#in~cond| 0)' at error location [2024-11-14 05:21:45,122 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2024-11-14 05:21:45,122 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 05:21:45,122 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 49, 50] total 100 [2024-11-14 05:21:45,123 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [868815334] [2024-11-14 05:21:45,123 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 05:21:45,124 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 100 states [2024-11-14 05:21:45,124 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:21:45,128 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 100 interpolants. [2024-11-14 05:21:45,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5364, Invalid=7068, Unknown=0, NotChecked=0, Total=12432 [2024-11-14 05:21:45,132 INFO L87 Difference]: Start difference. First operand 381 states and 382 transitions. Second operand has 100 states, 100 states have (on average 4.34) internal successors, (434), 100 states have internal predecessors, (434), 96 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 95 states have call predecessors, (144), 95 states have call successors, (144) [2024-11-14 05:21:51,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:21:51,856 INFO L93 Difference]: Finished difference Result 770 states and 818 transitions. [2024-11-14 05:21:51,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2024-11-14 05:21:51,857 INFO L78 Accepts]: Start accepts. Automaton has has 100 states, 100 states have (on average 4.34) internal successors, (434), 100 states have internal predecessors, (434), 96 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 95 states have call predecessors, (144), 95 states have call successors, (144) Word has length 382 [2024-11-14 05:21:51,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:21:51,864 INFO L225 Difference]: With dead ends: 770 [2024-11-14 05:21:51,865 INFO L226 Difference]: Without dead ends: 765 [2024-11-14 05:21:51,875 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1287 GetRequests, 1085 SyntacticMatches, 0 SemanticMatches, 202 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8230 ImplicationChecksByTransitivity, 10.3s TimeCoverageRelationStatistics Valid=14334, Invalid=27078, Unknown=0, NotChecked=0, Total=41412 [2024-11-14 05:21:51,876 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 587 mSDsluCounter, 309 mSDsCounter, 0 mSdLazyCounter, 480 mSolverCounterSat, 132 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 587 SdHoareTripleChecker+Valid, 323 SdHoareTripleChecker+Invalid, 612 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 132 IncrementalHoareTripleChecker+Valid, 480 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-14 05:21:51,876 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [587 Valid, 323 Invalid, 612 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [132 Valid, 480 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-14 05:21:51,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 765 states. [2024-11-14 05:21:51,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 765 to 765. [2024-11-14 05:21:51,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 765 states, 572 states have (on average 1.0017482517482517) internal successors, (573), 572 states have internal predecessors, (573), 97 states have call successors, (97), 96 states have call predecessors, (97), 95 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2024-11-14 05:21:51,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 765 states to 765 states and 766 transitions. [2024-11-14 05:21:51,944 INFO L78 Accepts]: Start accepts. Automaton has 765 states and 766 transitions. Word has length 382 [2024-11-14 05:21:51,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:21:51,945 INFO L471 AbstractCegarLoop]: Abstraction has 765 states and 766 transitions. [2024-11-14 05:21:51,946 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 100 states, 100 states have (on average 4.34) internal successors, (434), 100 states have internal predecessors, (434), 96 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 95 states have call predecessors, (144), 95 states have call successors, (144) [2024-11-14 05:21:51,946 INFO L276 IsEmpty]: Start isEmpty. Operand 765 states and 766 transitions. [2024-11-14 05:21:51,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 767 [2024-11-14 05:21:51,972 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:21:51,972 INFO L215 NwaCegarLoop]: trace histogram [95, 95, 94, 94, 94, 94, 94, 94, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:21:51,998 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-14 05:21:52,173 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:21:52,173 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:21:52,173 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:21:52,174 INFO L85 PathProgramCache]: Analyzing trace with hash -775788775, now seen corresponding path program 6 times [2024-11-14 05:21:52,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:21:52,174 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876924417] [2024-11-14 05:21:52,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:21:52,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:21:52,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 05:22:12,244 INFO L134 CoverageAnalysis]: Checked inductivity of 35346 backedges. 188 proven. 17672 refuted. 0 times theorem prover too weak. 17486 trivial. 0 not checked. [2024-11-14 05:22:12,244 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 05:22:12,244 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876924417] [2024-11-14 05:22:12,244 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1876924417] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 05:22:12,244 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1284556269] [2024-11-14 05:22:12,245 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-14 05:22:12,245 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:22:12,245 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:22:12,247 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:22:12,248 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-14 05:22:13,290 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-14 05:22:13,290 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 05:22:13,311 INFO L255 TraceCheckSpWp]: Trace formula consists of 1563 conjuncts, 191 conjuncts are in the unsatisfiable core [2024-11-14 05:22:13,330 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 05:22:14,558 INFO L134 CoverageAnalysis]: Checked inductivity of 35346 backedges. 188 proven. 35156 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 05:22:14,558 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 05:22:20,514 INFO L134 CoverageAnalysis]: Checked inductivity of 35346 backedges. 188 proven. 17672 refuted. 0 times theorem prover too weak. 17486 trivial. 0 not checked. [2024-11-14 05:22:20,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1284556269] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 05:22:20,518 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1882963851] [2024-11-14 05:22:20,526 INFO L159 IcfgInterpreter]: Started Sifa with 17 locations of interest [2024-11-14 05:22:20,526 INFO L166 IcfgInterpreter]: Building call graph [2024-11-14 05:22:20,527 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2024-11-14 05:22:20,527 INFO L176 IcfgInterpreter]: Starting interpretation [2024-11-14 05:22:20,528 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2024-11-14 05:22:21,082 INFO L197 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 115 for LOIs [2024-11-14 05:22:21,278 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 65 for LOIs [2024-11-14 05:22:21,288 INFO L180 IcfgInterpreter]: Interpretation finished [2024-11-14 05:22:24,910 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '15186#(and (= |__VERIFIER_assert_#in~cond| 0) (or (and (exists ((|v_ULTIMATE.start_main_~x1~0#1_BEFORE_CALL_131| Int) (|v_ULTIMATE.start_main_~y3~0#1_BEFORE_CALL_81| Int) (|v_ULTIMATE.start_main_~y1~0#1_BEFORE_CALL_85| Int) (|v_ULTIMATE.start_main_~x2~0#1_BEFORE_CALL_129| Int) (|v_ULTIMATE.start_main_~y2~0#1_BEFORE_CALL_85| Int)) (and (not (= (+ (* |v_ULTIMATE.start_main_~y1~0#1_BEFORE_CALL_85| |v_ULTIMATE.start_main_~x2~0#1_BEFORE_CALL_129|) |v_ULTIMATE.start_main_~y3~0#1_BEFORE_CALL_81| |v_ULTIMATE.start_main_~y2~0#1_BEFORE_CALL_85|) |v_ULTIMATE.start_main_~x1~0#1_BEFORE_CALL_131|)) (exists ((|v_ULTIMATE.start_main_~y1~0#1_237| Int) (|v_ULTIMATE.start_main_~y3~0#1_242| Int) (|v_ULTIMATE.start_main_~y2~0#1_239| Int)) (and (or (and (= |v_ULTIMATE.start_main_~y1~0#1_BEFORE_CALL_85| (+ |v_ULTIMATE.start_main_~y1~0#1_237| 1)) (= |v_ULTIMATE.start_main_~x2~0#1_BEFORE_CALL_129| (+ |v_ULTIMATE.start_main_~y2~0#1_239| 1)) (= 0 |v_ULTIMATE.start_main_~y2~0#1_BEFORE_CALL_85|) (= (+ |v_ULTIMATE.start_main_~y3~0#1_BEFORE_CALL_81| 1) |v_ULTIMATE.start_main_~y3~0#1_242|)) (and (= (+ |v_ULTIMATE.start_main_~y2~0#1_239| 1) |v_ULTIMATE.start_main_~y2~0#1_BEFORE_CALL_85|) (= |v_ULTIMATE.start_main_~y1~0#1_BEFORE_CALL_85| |v_ULTIMATE.start_main_~y1~0#1_237|) (= (+ |v_ULTIMATE.start_main_~y3~0#1_BEFORE_CALL_81| 1) |v_ULTIMATE.start_main_~y3~0#1_242|) (not (= |v_ULTIMATE.start_main_~x2~0#1_BEFORE_CALL_129| (+ |v_ULTIMATE.start_main_~y2~0#1_239| 1))))) (not (= |v_ULTIMATE.start_main_~y3~0#1_242| 0)))))) (<= ~counter~0 100)) (and (<= 101 ~counter~0) (exists ((|v_ULTIMATE.start_main_~y1~0#1_237| Int) (|v_ULTIMATE.start_main_~y3~0#1_BEFORE_CALL_82| Int) (|v_ULTIMATE.start_main_~y1~0#1_BEFORE_CALL_86| Int) (|v_ULTIMATE.start_main_~y3~0#1_242| Int) (|v_ULTIMATE.start_main_~x2~0#1_BEFORE_CALL_130| Int) (|v_ULTIMATE.start_main_~y2~0#1_BEFORE_CALL_86| Int) (|v_ULTIMATE.start_main_~y2~0#1_239| Int)) (and (not (= |v_ULTIMATE.start_main_~y3~0#1_242| 0)) (or (and (= |v_ULTIMATE.start_main_~y3~0#1_242| (+ |v_ULTIMATE.start_main_~y3~0#1_BEFORE_CALL_82| 1)) (= |v_ULTIMATE.start_main_~x2~0#1_BEFORE_CALL_130| (+ |v_ULTIMATE.start_main_~y2~0#1_239| 1)) (= |v_ULTIMATE.start_main_~y1~0#1_BEFORE_CALL_86| (+ |v_ULTIMATE.start_main_~y1~0#1_237| 1)) (= 0 |v_ULTIMATE.start_main_~y2~0#1_BEFORE_CALL_86|)) (and (= |v_ULTIMATE.start_main_~y3~0#1_242| (+ |v_ULTIMATE.start_main_~y3~0#1_BEFORE_CALL_82| 1)) (not (= |v_ULTIMATE.start_main_~x2~0#1_BEFORE_CALL_130| (+ |v_ULTIMATE.start_main_~y2~0#1_239| 1))) (= |v_ULTIMATE.start_main_~y1~0#1_BEFORE_CALL_86| |v_ULTIMATE.start_main_~y1~0#1_237|) (= (+ |v_ULTIMATE.start_main_~y2~0#1_239| 1) |v_ULTIMATE.start_main_~y2~0#1_BEFORE_CALL_86|))))))))' at error location [2024-11-14 05:22:24,910 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2024-11-14 05:22:24,910 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 05:22:24,910 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [99, 97, 98] total 106 [2024-11-14 05:22:24,911 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [760029442] [2024-11-14 05:22:24,911 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 05:22:24,913 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 106 states [2024-11-14 05:22:24,913 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 05:22:24,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 106 interpolants. [2024-11-14 05:22:24,918 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5902, Invalid=8140, Unknown=0, NotChecked=0, Total=14042 [2024-11-14 05:22:24,919 INFO L87 Difference]: Start difference. First operand 765 states and 766 transitions. Second operand has 106 states, 106 states have (on average 5.650943396226415) internal successors, (599), 106 states have internal predecessors, (599), 102 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 101 states have call predecessors, (199), 101 states have call successors, (199) [2024-11-14 05:22:32,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 05:22:32,320 INFO L93 Difference]: Finished difference Result 818 states and 824 transitions. [2024-11-14 05:22:32,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 202 states. [2024-11-14 05:22:32,321 INFO L78 Accepts]: Start accepts. Automaton has has 106 states, 106 states have (on average 5.650943396226415) internal successors, (599), 106 states have internal predecessors, (599), 102 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 101 states have call predecessors, (199), 101 states have call successors, (199) Word has length 766 [2024-11-14 05:22:32,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 05:22:32,327 INFO L225 Difference]: With dead ends: 818 [2024-11-14 05:22:32,328 INFO L226 Difference]: Without dead ends: 813 [2024-11-14 05:22:32,335 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 2493 GetRequests, 2188 SyntacticMatches, 90 SemanticMatches, 215 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12779 ImplicationChecksByTransitivity, 18.8s TimeCoverageRelationStatistics Valid=15992, Invalid=30880, Unknown=0, NotChecked=0, Total=46872 [2024-11-14 05:22:32,336 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 35 mSDsluCounter, 351 mSDsCounter, 0 mSdLazyCounter, 531 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 365 SdHoareTripleChecker+Invalid, 535 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 531 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-14 05:22:32,336 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 365 Invalid, 535 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 531 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-14 05:22:32,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 813 states. [2024-11-14 05:22:32,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 813 to 813. [2024-11-14 05:22:32,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 813 states, 608 states have (on average 1.0016447368421053) internal successors, (609), 608 states have internal predecessors, (609), 103 states have call successors, (103), 102 states have call predecessors, (103), 101 states have return successors, (102), 102 states have call predecessors, (102), 102 states have call successors, (102) [2024-11-14 05:22:32,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 813 states to 813 states and 814 transitions. [2024-11-14 05:22:32,399 INFO L78 Accepts]: Start accepts. Automaton has 813 states and 814 transitions. Word has length 766 [2024-11-14 05:22:32,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 05:22:32,401 INFO L471 AbstractCegarLoop]: Abstraction has 813 states and 814 transitions. [2024-11-14 05:22:32,402 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 106 states, 106 states have (on average 5.650943396226415) internal successors, (599), 106 states have internal predecessors, (599), 102 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 101 states have call predecessors, (199), 101 states have call successors, (199) [2024-11-14 05:22:32,402 INFO L276 IsEmpty]: Start isEmpty. Operand 813 states and 814 transitions. [2024-11-14 05:22:32,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 815 [2024-11-14 05:22:32,410 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 05:22:32,411 INFO L215 NwaCegarLoop]: trace histogram [101, 101, 100, 100, 100, 100, 100, 100, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 05:22:32,430 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-11-14 05:22:32,612 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2024-11-14 05:22:32,612 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-14 05:22:32,612 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 05:22:32,612 INFO L85 PathProgramCache]: Analyzing trace with hash -1014991661, now seen corresponding path program 7 times [2024-11-14 05:22:32,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 05:22:32,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024060983] [2024-11-14 05:22:32,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 05:22:32,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 05:22:36,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-14 05:22:36,246 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [809524280] [2024-11-14 05:22:36,246 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-14 05:22:36,246 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 05:22:36,246 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 05:22:36,249 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 05:22:36,251 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-14 05:22:38,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 05:22:38,369 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-14 05:22:38,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 05:22:39,293 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2024-11-14 05:22:39,293 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-14 05:22:39,296 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-14 05:22:39,331 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2024-11-14 05:22:39,501 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2024-11-14 05:22:39,505 INFO L407 BasicCegarLoop]: Path program histogram: [7, 1, 1, 1, 1, 1, 1] [2024-11-14 05:22:39,763 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-14 05:22:39,766 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.11 05:22:39 BoogieIcfgContainer [2024-11-14 05:22:39,766 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-14 05:22:39,767 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-14 05:22:39,767 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-14 05:22:39,768 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-14 05:22:39,768 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:21:06" (3/4) ... [2024-11-14 05:22:39,773 INFO L136 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-14 05:22:40,008 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/witness.graphml [2024-11-14 05:22:40,008 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-14 05:22:40,009 INFO L158 Benchmark]: Toolchain (without parser) took 94482.40ms. Allocated memory was 142.6MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 118.8MB in the beginning and 1.1GB in the end (delta: -993.6MB). Peak memory consumption was 544.3MB. Max. memory is 16.1GB. [2024-11-14 05:22:40,009 INFO L158 Benchmark]: CDTParser took 0.33ms. Allocated memory is still 167.8MB. Free memory is still 104.4MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 05:22:40,010 INFO L158 Benchmark]: CACSL2BoogieTranslator took 281.86ms. Allocated memory is still 142.6MB. Free memory was 118.8MB in the beginning and 107.5MB in the end (delta: 11.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-14 05:22:40,010 INFO L158 Benchmark]: Boogie Procedure Inliner took 46.12ms. Allocated memory is still 142.6MB. Free memory was 107.5MB in the beginning and 106.5MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 05:22:40,010 INFO L158 Benchmark]: Boogie Preprocessor took 33.95ms. Allocated memory is still 142.6MB. Free memory was 106.5MB in the beginning and 105.7MB in the end (delta: 760.1kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 05:22:40,011 INFO L158 Benchmark]: RCFGBuilder took 478.66ms. Allocated memory is still 142.6MB. Free memory was 105.7MB in the beginning and 93.3MB in the end (delta: 12.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-11-14 05:22:40,011 INFO L158 Benchmark]: TraceAbstraction took 93392.20ms. Allocated memory was 142.6MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 92.6MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 494.0MB. Max. memory is 16.1GB. [2024-11-14 05:22:40,011 INFO L158 Benchmark]: Witness Printer took 240.94ms. Allocated memory is still 1.7GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-14 05:22:40,014 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.33ms. Allocated memory is still 167.8MB. Free memory is still 104.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 281.86ms. Allocated memory is still 142.6MB. Free memory was 118.8MB in the beginning and 107.5MB in the end (delta: 11.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 46.12ms. Allocated memory is still 142.6MB. Free memory was 107.5MB in the beginning and 106.5MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 33.95ms. Allocated memory is still 142.6MB. Free memory was 106.5MB in the beginning and 105.7MB in the end (delta: 760.1kB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 478.66ms. Allocated memory is still 142.6MB. Free memory was 105.7MB in the beginning and 93.3MB in the end (delta: 12.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * TraceAbstraction took 93392.20ms. Allocated memory was 142.6MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 92.6MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 494.0MB. Max. memory is 16.1GB. * Witness Printer took 240.94ms. Allocated memory is still 1.7GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 18]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L22] int counter = 0; [L24] int x1, x2; [L25] int y1, y2, y3; [L26] x1 = __VERIFIER_nondet_int() [L27] x2 = __VERIFIER_nondet_int() [L29] CALL assume_abort_if_not(x1 >= 0) VAL [\old(cond)=1, counter=0] [L13] COND FALSE !(!cond) [L29] RET assume_abort_if_not(x1 >= 0) VAL [counter=0, x1=101, x2=13] [L30] CALL assume_abort_if_not(x2 != 0) VAL [\old(cond)=1, counter=0] [L13] COND FALSE !(!cond) [L30] RET assume_abort_if_not(x2 != 0) VAL [counter=0, x1=101, x2=13] [L32] y1 = 0 [L33] y2 = 0 [L34] y3 = x1 VAL [counter=0, x1=101, x2=13, y1=0, y2=0, y3=101] [L36] EXPR counter++ VAL [counter=1, x1=101, x2=13, y1=0, y2=0, y3=101] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=1] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=1] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=1, x1=101, x2=13, y1=0, y2=0, y3=101] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=1, x1=101, x2=13, y1=0, y2=1, y3=100] [L36] EXPR counter++ VAL [counter=2, x1=101, x2=13, y1=0, y2=1, y3=100] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=2] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=2] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=2, x1=101, x2=13, y1=0, y2=1, y3=100] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=2, x1=101, x2=13, y1=0, y2=2, y3=99] [L36] EXPR counter++ VAL [counter=3, x1=101, x2=13, y1=0, y2=2, y3=99] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=3] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=3] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=3, x1=101, x2=13, y1=0, y2=2, y3=99] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=3, x1=101, x2=13, y1=0, y2=3, y3=98] [L36] EXPR counter++ VAL [counter=4, x1=101, x2=13, y1=0, y2=3, y3=98] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=4] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=4] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=4, x1=101, x2=13, y1=0, y2=3, y3=98] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=4, x1=101, x2=13, y1=0, y2=4, y3=97] [L36] EXPR counter++ VAL [counter=5, x1=101, x2=13, y1=0, y2=4, y3=97] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=5] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=5] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=5, x1=101, x2=13, y1=0, y2=4, y3=97] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=5, x1=101, x2=13, y1=0, y2=5, y3=96] [L36] EXPR counter++ VAL [counter=6, x1=101, x2=13, y1=0, y2=5, y3=96] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=6] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=6] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=6, x1=101, x2=13, y1=0, y2=5, y3=96] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=6, x1=101, x2=13, y1=0, y2=6, y3=95] [L36] EXPR counter++ VAL [counter=7, x1=101, x2=13, y1=0, y2=6, y3=95] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=7] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=7] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=7, x1=101, x2=13, y1=0, y2=6, y3=95] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=7, x1=101, x2=13, y1=0, y2=7, y3=94] [L36] EXPR counter++ VAL [counter=8, x1=101, x2=13, y1=0, y2=7, y3=94] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=8] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=8] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=8, x1=101, x2=13, y1=0, y2=7, y3=94] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=8, x1=101, x2=13, y1=0, y2=8, y3=93] [L36] EXPR counter++ VAL [counter=9, x1=101, x2=13, y1=0, y2=8, y3=93] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=9] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=9] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=9, x1=101, x2=13, y1=0, y2=8, y3=93] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=9, x1=101, x2=13, y1=0, y2=9, y3=92] [L36] EXPR counter++ VAL [counter=10, x1=101, x2=13, y1=0, y2=9, y3=92] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=10] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=10] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=10, x1=101, x2=13, y1=0, y2=9, y3=92] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=10, x1=101, x2=13, y1=0, y2=10, y3=91] [L36] EXPR counter++ VAL [counter=11, x1=101, x2=13, y1=0, y2=10, y3=91] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=11] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=11] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=11, x1=101, x2=13, y1=0, y2=10, y3=91] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=11, x1=101, x2=13, y1=0, y2=11, y3=90] [L36] EXPR counter++ VAL [counter=12, x1=101, x2=13, y1=0, y2=11, y3=90] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=12] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=12] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=12, x1=101, x2=13, y1=0, y2=11, y3=90] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=12, x1=101, x2=13, y1=0, y2=12, y3=89] [L36] EXPR counter++ VAL [counter=13, x1=101, x2=13, y1=0, y2=12, y3=89] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=13] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=13] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=13, x1=101, x2=13, y1=0, y2=12, y3=89] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=13, x1=101, x2=13, y1=1, y2=0, y3=88] [L36] EXPR counter++ VAL [counter=14, x1=101, x2=13, y1=1, y2=0, y3=88] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=14] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=14] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=14, x1=101, x2=13, y1=1, y2=0, y3=88] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=14, x1=101, x2=13, y1=1, y2=1, y3=87] [L36] EXPR counter++ VAL [counter=15, x1=101, x2=13, y1=1, y2=1, y3=87] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=15] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=15] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=15, x1=101, x2=13, y1=1, y2=1, y3=87] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=15, x1=101, x2=13, y1=1, y2=2, y3=86] [L36] EXPR counter++ VAL [counter=16, x1=101, x2=13, y1=1, y2=2, y3=86] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=16] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=16] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=16, x1=101, x2=13, y1=1, y2=2, y3=86] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=16, x1=101, x2=13, y1=1, y2=3, y3=85] [L36] EXPR counter++ VAL [counter=17, x1=101, x2=13, y1=1, y2=3, y3=85] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=17] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=17] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=17, x1=101, x2=13, y1=1, y2=3, y3=85] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=17, x1=101, x2=13, y1=1, y2=4, y3=84] [L36] EXPR counter++ VAL [counter=18, x1=101, x2=13, y1=1, y2=4, y3=84] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=18] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=18] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=18, x1=101, x2=13, y1=1, y2=4, y3=84] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=18, x1=101, x2=13, y1=1, y2=5, y3=83] [L36] EXPR counter++ VAL [counter=19, x1=101, x2=13, y1=1, y2=5, y3=83] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=19] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=19] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=19, x1=101, x2=13, y1=1, y2=5, y3=83] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=19, x1=101, x2=13, y1=1, y2=6, y3=82] [L36] EXPR counter++ VAL [counter=20, x1=101, x2=13, y1=1, y2=6, y3=82] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=20] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=20] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=20, x1=101, x2=13, y1=1, y2=6, y3=82] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=20, x1=101, x2=13, y1=1, y2=7, y3=81] [L36] EXPR counter++ VAL [counter=21, x1=101, x2=13, y1=1, y2=7, y3=81] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=21] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=21] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=21, x1=101, x2=13, y1=1, y2=7, y3=81] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=21, x1=101, x2=13, y1=1, y2=8, y3=80] [L36] EXPR counter++ VAL [counter=22, x1=101, x2=13, y1=1, y2=8, y3=80] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=22] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=22] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=22, x1=101, x2=13, y1=1, y2=8, y3=80] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=22, x1=101, x2=13, y1=1, y2=9, y3=79] [L36] EXPR counter++ VAL [counter=23, x1=101, x2=13, y1=1, y2=9, y3=79] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=23] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=23] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=23, x1=101, x2=13, y1=1, y2=9, y3=79] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=23, x1=101, x2=13, y1=1, y2=10, y3=78] [L36] EXPR counter++ VAL [counter=24, x1=101, x2=13, y1=1, y2=10, y3=78] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=24] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=24] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=24, x1=101, x2=13, y1=1, y2=10, y3=78] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=24, x1=101, x2=13, y1=1, y2=11, y3=77] [L36] EXPR counter++ VAL [counter=25, x1=101, x2=13, y1=1, y2=11, y3=77] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=25] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=25] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=25, x1=101, x2=13, y1=1, y2=11, y3=77] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=25, x1=101, x2=13, y1=1, y2=12, y3=76] [L36] EXPR counter++ VAL [counter=26, x1=101, x2=13, y1=1, y2=12, y3=76] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=26] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=26] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=26, x1=101, x2=13, y1=1, y2=12, y3=76] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=26, x1=101, x2=13, y1=2, y2=0, y3=75] [L36] EXPR counter++ VAL [counter=27, x1=101, x2=13, y1=2, y2=0, y3=75] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=27] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=27] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=27, x1=101, x2=13, y1=2, y2=0, y3=75] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=27, x1=101, x2=13, y1=2, y2=1, y3=74] [L36] EXPR counter++ VAL [counter=28, x1=101, x2=13, y1=2, y2=1, y3=74] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=28] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=28] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=28, x1=101, x2=13, y1=2, y2=1, y3=74] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=28, x1=101, x2=13, y1=2, y2=2, y3=73] [L36] EXPR counter++ VAL [counter=29, x1=101, x2=13, y1=2, y2=2, y3=73] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=29] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=29] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=29, x1=101, x2=13, y1=2, y2=2, y3=73] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=29, x1=101, x2=13, y1=2, y2=3, y3=72] [L36] EXPR counter++ VAL [counter=30, x1=101, x2=13, y1=2, y2=3, y3=72] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=30] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=30] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=30, x1=101, x2=13, y1=2, y2=3, y3=72] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=30, x1=101, x2=13, y1=2, y2=4, y3=71] [L36] EXPR counter++ VAL [counter=31, x1=101, x2=13, y1=2, y2=4, y3=71] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=31] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=31] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=31, x1=101, x2=13, y1=2, y2=4, y3=71] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=31, x1=101, x2=13, y1=2, y2=5, y3=70] [L36] EXPR counter++ VAL [counter=32, x1=101, x2=13, y1=2, y2=5, y3=70] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=32] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=32] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=32, x1=101, x2=13, y1=2, y2=5, y3=70] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=32, x1=101, x2=13, y1=2, y2=6, y3=69] [L36] EXPR counter++ VAL [counter=33, x1=101, x2=13, y1=2, y2=6, y3=69] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=33] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=33] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=33, x1=101, x2=13, y1=2, y2=6, y3=69] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=33, x1=101, x2=13, y1=2, y2=7, y3=68] [L36] EXPR counter++ VAL [counter=34, x1=101, x2=13, y1=2, y2=7, y3=68] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=34] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=34] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=34, x1=101, x2=13, y1=2, y2=7, y3=68] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=34, x1=101, x2=13, y1=2, y2=8, y3=67] [L36] EXPR counter++ VAL [counter=35, x1=101, x2=13, y1=2, y2=8, y3=67] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=35] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=35] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=35, x1=101, x2=13, y1=2, y2=8, y3=67] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=35, x1=101, x2=13, y1=2, y2=9, y3=66] [L36] EXPR counter++ VAL [counter=36, x1=101, x2=13, y1=2, y2=9, y3=66] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=36] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=36] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=36, x1=101, x2=13, y1=2, y2=9, y3=66] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=36, x1=101, x2=13, y1=2, y2=10, y3=65] [L36] EXPR counter++ VAL [counter=37, x1=101, x2=13, y1=2, y2=10, y3=65] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=37] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=37] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=37, x1=101, x2=13, y1=2, y2=10, y3=65] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=37, x1=101, x2=13, y1=2, y2=11, y3=64] [L36] EXPR counter++ VAL [counter=38, x1=101, x2=13, y1=2, y2=11, y3=64] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=38] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=38] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=38, x1=101, x2=13, y1=2, y2=11, y3=64] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=38, x1=101, x2=13, y1=2, y2=12, y3=63] [L36] EXPR counter++ VAL [counter=39, x1=101, x2=13, y1=2, y2=12, y3=63] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=39] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=39] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=39, x1=101, x2=13, y1=2, y2=12, y3=63] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=39, x1=101, x2=13, y1=3, y2=0, y3=62] [L36] EXPR counter++ VAL [counter=40, x1=101, x2=13, y1=3, y2=0, y3=62] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=40] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=40] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=40, x1=101, x2=13, y1=3, y2=0, y3=62] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=40, x1=101, x2=13, y1=3, y2=1, y3=61] [L36] EXPR counter++ VAL [counter=41, x1=101, x2=13, y1=3, y2=1, y3=61] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=41] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=41] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=41, x1=101, x2=13, y1=3, y2=1, y3=61] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=41, x1=101, x2=13, y1=3, y2=2, y3=60] [L36] EXPR counter++ VAL [counter=42, x1=101, x2=13, y1=3, y2=2, y3=60] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=42] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=42] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=42, x1=101, x2=13, y1=3, y2=2, y3=60] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=42, x1=101, x2=13, y1=3, y2=3, y3=59] [L36] EXPR counter++ VAL [counter=43, x1=101, x2=13, y1=3, y2=3, y3=59] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=43] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=43] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=43, x1=101, x2=13, y1=3, y2=3, y3=59] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=43, x1=101, x2=13, y1=3, y2=4, y3=58] [L36] EXPR counter++ VAL [counter=44, x1=101, x2=13, y1=3, y2=4, y3=58] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=44] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=44] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=44, x1=101, x2=13, y1=3, y2=4, y3=58] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=44, x1=101, x2=13, y1=3, y2=5, y3=57] [L36] EXPR counter++ VAL [counter=45, x1=101, x2=13, y1=3, y2=5, y3=57] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=45] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=45] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=45, x1=101, x2=13, y1=3, y2=5, y3=57] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=45, x1=101, x2=13, y1=3, y2=6, y3=56] [L36] EXPR counter++ VAL [counter=46, x1=101, x2=13, y1=3, y2=6, y3=56] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=46] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=46] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=46, x1=101, x2=13, y1=3, y2=6, y3=56] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=46, x1=101, x2=13, y1=3, y2=7, y3=55] [L36] EXPR counter++ VAL [counter=47, x1=101, x2=13, y1=3, y2=7, y3=55] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=47] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=47] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=47, x1=101, x2=13, y1=3, y2=7, y3=55] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=47, x1=101, x2=13, y1=3, y2=8, y3=54] [L36] EXPR counter++ VAL [counter=48, x1=101, x2=13, y1=3, y2=8, y3=54] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=48] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=48] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=48, x1=101, x2=13, y1=3, y2=8, y3=54] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=48, x1=101, x2=13, y1=3, y2=9, y3=53] [L36] EXPR counter++ VAL [counter=49, x1=101, x2=13, y1=3, y2=9, y3=53] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=49] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=49] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=49, x1=101, x2=13, y1=3, y2=9, y3=53] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=49, x1=101, x2=13, y1=3, y2=10, y3=52] [L36] EXPR counter++ VAL [counter=50, x1=101, x2=13, y1=3, y2=10, y3=52] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=50] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=50] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=50, x1=101, x2=13, y1=3, y2=10, y3=52] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=50, x1=101, x2=13, y1=3, y2=11, y3=51] [L36] EXPR counter++ VAL [counter=51, x1=101, x2=13, y1=3, y2=11, y3=51] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=51] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=51] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=51, x1=101, x2=13, y1=3, y2=11, y3=51] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=51, x1=101, x2=13, y1=3, y2=12, y3=50] [L36] EXPR counter++ VAL [counter=52, x1=101, x2=13, y1=3, y2=12, y3=50] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=52] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=52] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=52, x1=101, x2=13, y1=3, y2=12, y3=50] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=52, x1=101, x2=13, y1=4, y2=0, y3=49] [L36] EXPR counter++ VAL [counter=53, x1=101, x2=13, y1=4, y2=0, y3=49] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=53] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=53] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=53, x1=101, x2=13, y1=4, y2=0, y3=49] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=53, x1=101, x2=13, y1=4, y2=1, y3=48] [L36] EXPR counter++ VAL [counter=54, x1=101, x2=13, y1=4, y2=1, y3=48] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=54] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=54] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=54, x1=101, x2=13, y1=4, y2=1, y3=48] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=54, x1=101, x2=13, y1=4, y2=2, y3=47] [L36] EXPR counter++ VAL [counter=55, x1=101, x2=13, y1=4, y2=2, y3=47] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=55] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=55] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=55, x1=101, x2=13, y1=4, y2=2, y3=47] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=55, x1=101, x2=13, y1=4, y2=3, y3=46] [L36] EXPR counter++ VAL [counter=56, x1=101, x2=13, y1=4, y2=3, y3=46] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=56] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=56] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=56, x1=101, x2=13, y1=4, y2=3, y3=46] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=56, x1=101, x2=13, y1=4, y2=4, y3=45] [L36] EXPR counter++ VAL [counter=57, x1=101, x2=13, y1=4, y2=4, y3=45] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=57] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=57] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=57, x1=101, x2=13, y1=4, y2=4, y3=45] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=57, x1=101, x2=13, y1=4, y2=5, y3=44] [L36] EXPR counter++ VAL [counter=58, x1=101, x2=13, y1=4, y2=5, y3=44] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=58] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=58] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=58, x1=101, x2=13, y1=4, y2=5, y3=44] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=58, x1=101, x2=13, y1=4, y2=6, y3=43] [L36] EXPR counter++ VAL [counter=59, x1=101, x2=13, y1=4, y2=6, y3=43] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=59] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=59] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=59, x1=101, x2=13, y1=4, y2=6, y3=43] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=59, x1=101, x2=13, y1=4, y2=7, y3=42] [L36] EXPR counter++ VAL [counter=60, x1=101, x2=13, y1=4, y2=7, y3=42] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=60] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=60] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=60, x1=101, x2=13, y1=4, y2=7, y3=42] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=60, x1=101, x2=13, y1=4, y2=8, y3=41] [L36] EXPR counter++ VAL [counter=61, x1=101, x2=13, y1=4, y2=8, y3=41] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=61] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=61] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=61, x1=101, x2=13, y1=4, y2=8, y3=41] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=61, x1=101, x2=13, y1=4, y2=9, y3=40] [L36] EXPR counter++ VAL [counter=62, x1=101, x2=13, y1=4, y2=9, y3=40] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=62] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=62] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=62, x1=101, x2=13, y1=4, y2=9, y3=40] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=62, x1=101, x2=13, y1=4, y2=10, y3=39] [L36] EXPR counter++ VAL [counter=63, x1=101, x2=13, y1=4, y2=10, y3=39] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=63] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=63] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=63, x1=101, x2=13, y1=4, y2=10, y3=39] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=63, x1=101, x2=13, y1=4, y2=11, y3=38] [L36] EXPR counter++ VAL [counter=64, x1=101, x2=13, y1=4, y2=11, y3=38] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=64] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=64] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=64, x1=101, x2=13, y1=4, y2=11, y3=38] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=64, x1=101, x2=13, y1=4, y2=12, y3=37] [L36] EXPR counter++ VAL [counter=65, x1=101, x2=13, y1=4, y2=12, y3=37] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=65] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=65] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=65, x1=101, x2=13, y1=4, y2=12, y3=37] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=65, x1=101, x2=13, y1=5, y2=0, y3=36] [L36] EXPR counter++ VAL [counter=66, x1=101, x2=13, y1=5, y2=0, y3=36] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=66] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=66] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=66, x1=101, x2=13, y1=5, y2=0, y3=36] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=66, x1=101, x2=13, y1=5, y2=1, y3=35] [L36] EXPR counter++ VAL [counter=67, x1=101, x2=13, y1=5, y2=1, y3=35] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=67] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=67] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=67, x1=101, x2=13, y1=5, y2=1, y3=35] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=67, x1=101, x2=13, y1=5, y2=2, y3=34] [L36] EXPR counter++ VAL [counter=68, x1=101, x2=13, y1=5, y2=2, y3=34] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=68] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=68] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=68, x1=101, x2=13, y1=5, y2=2, y3=34] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=68, x1=101, x2=13, y1=5, y2=3, y3=33] [L36] EXPR counter++ VAL [counter=69, x1=101, x2=13, y1=5, y2=3, y3=33] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=69] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=69] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=69, x1=101, x2=13, y1=5, y2=3, y3=33] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=69, x1=101, x2=13, y1=5, y2=4, y3=32] [L36] EXPR counter++ VAL [counter=70, x1=101, x2=13, y1=5, y2=4, y3=32] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=70] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=70] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=70, x1=101, x2=13, y1=5, y2=4, y3=32] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=70, x1=101, x2=13, y1=5, y2=5, y3=31] [L36] EXPR counter++ VAL [counter=71, x1=101, x2=13, y1=5, y2=5, y3=31] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=71] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=71] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=71, x1=101, x2=13, y1=5, y2=5, y3=31] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=71, x1=101, x2=13, y1=5, y2=6, y3=30] [L36] EXPR counter++ VAL [counter=72, x1=101, x2=13, y1=5, y2=6, y3=30] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=72] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=72] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=72, x1=101, x2=13, y1=5, y2=6, y3=30] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=72, x1=101, x2=13, y1=5, y2=7, y3=29] [L36] EXPR counter++ VAL [counter=73, x1=101, x2=13, y1=5, y2=7, y3=29] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=73] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=73] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=73, x1=101, x2=13, y1=5, y2=7, y3=29] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=73, x1=101, x2=13, y1=5, y2=8, y3=28] [L36] EXPR counter++ VAL [counter=74, x1=101, x2=13, y1=5, y2=8, y3=28] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=74] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=74] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=74, x1=101, x2=13, y1=5, y2=8, y3=28] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=74, x1=101, x2=13, y1=5, y2=9, y3=27] [L36] EXPR counter++ VAL [counter=75, x1=101, x2=13, y1=5, y2=9, y3=27] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=75] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=75] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=75, x1=101, x2=13, y1=5, y2=9, y3=27] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=75, x1=101, x2=13, y1=5, y2=10, y3=26] [L36] EXPR counter++ VAL [counter=76, x1=101, x2=13, y1=5, y2=10, y3=26] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=76] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=76] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=76, x1=101, x2=13, y1=5, y2=10, y3=26] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=76, x1=101, x2=13, y1=5, y2=11, y3=25] [L36] EXPR counter++ VAL [counter=77, x1=101, x2=13, y1=5, y2=11, y3=25] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=77] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=77] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=77, x1=101, x2=13, y1=5, y2=11, y3=25] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=77, x1=101, x2=13, y1=5, y2=12, y3=24] [L36] EXPR counter++ VAL [counter=78, x1=101, x2=13, y1=5, y2=12, y3=24] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=78] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=78] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=78, x1=101, x2=13, y1=5, y2=12, y3=24] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=78, x1=101, x2=13, y1=6, y2=0, y3=23] [L36] EXPR counter++ VAL [counter=79, x1=101, x2=13, y1=6, y2=0, y3=23] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=79] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=79] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=79, x1=101, x2=13, y1=6, y2=0, y3=23] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=79, x1=101, x2=13, y1=6, y2=1, y3=22] [L36] EXPR counter++ VAL [counter=80, x1=101, x2=13, y1=6, y2=1, y3=22] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=80] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=80] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=80, x1=101, x2=13, y1=6, y2=1, y3=22] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=80, x1=101, x2=13, y1=6, y2=2, y3=21] [L36] EXPR counter++ VAL [counter=81, x1=101, x2=13, y1=6, y2=2, y3=21] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=81] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=81] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=81, x1=101, x2=13, y1=6, y2=2, y3=21] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=81, x1=101, x2=13, y1=6, y2=3, y3=20] [L36] EXPR counter++ VAL [counter=82, x1=101, x2=13, y1=6, y2=3, y3=20] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=82] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=82] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=82, x1=101, x2=13, y1=6, y2=3, y3=20] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=82, x1=101, x2=13, y1=6, y2=4, y3=19] [L36] EXPR counter++ VAL [counter=83, x1=101, x2=13, y1=6, y2=4, y3=19] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=83] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=83] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=83, x1=101, x2=13, y1=6, y2=4, y3=19] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=83, x1=101, x2=13, y1=6, y2=5, y3=18] [L36] EXPR counter++ VAL [counter=84, x1=101, x2=13, y1=6, y2=5, y3=18] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=84] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=84] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=84, x1=101, x2=13, y1=6, y2=5, y3=18] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=84, x1=101, x2=13, y1=6, y2=6, y3=17] [L36] EXPR counter++ VAL [counter=85, x1=101, x2=13, y1=6, y2=6, y3=17] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=85] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=85] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=85, x1=101, x2=13, y1=6, y2=6, y3=17] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=85, x1=101, x2=13, y1=6, y2=7, y3=16] [L36] EXPR counter++ VAL [counter=86, x1=101, x2=13, y1=6, y2=7, y3=16] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=86] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=86] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=86, x1=101, x2=13, y1=6, y2=7, y3=16] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=86, x1=101, x2=13, y1=6, y2=8, y3=15] [L36] EXPR counter++ VAL [counter=87, x1=101, x2=13, y1=6, y2=8, y3=15] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=87] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=87] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=87, x1=101, x2=13, y1=6, y2=8, y3=15] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=87, x1=101, x2=13, y1=6, y2=9, y3=14] [L36] EXPR counter++ VAL [counter=88, x1=101, x2=13, y1=6, y2=9, y3=14] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=88] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=88] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=88, x1=101, x2=13, y1=6, y2=9, y3=14] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=88, x1=101, x2=13, y1=6, y2=10, y3=13] [L36] EXPR counter++ VAL [counter=89, x1=101, x2=13, y1=6, y2=10, y3=13] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=89] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=89] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=89, x1=101, x2=13, y1=6, y2=10, y3=13] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=89, x1=101, x2=13, y1=6, y2=11, y3=12] [L36] EXPR counter++ VAL [counter=90, x1=101, x2=13, y1=6, y2=11, y3=12] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=90] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=90] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=90, x1=101, x2=13, y1=6, y2=11, y3=12] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=90, x1=101, x2=13, y1=6, y2=12, y3=11] [L36] EXPR counter++ VAL [counter=91, x1=101, x2=13, y1=6, y2=12, y3=11] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=91] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=91] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=91, x1=101, x2=13, y1=6, y2=12, y3=11] [L39] COND FALSE !(!(y3 != 0)) [L41] COND TRUE y2 + 1 == x2 [L42] y1 = y1 + 1 [L43] y2 = 0 [L44] y3 = y3 - 1 VAL [counter=91, x1=101, x2=13, y1=7, y2=0, y3=10] [L36] EXPR counter++ VAL [counter=92, x1=101, x2=13, y1=7, y2=0, y3=10] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=92] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=92] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=92, x1=101, x2=13, y1=7, y2=0, y3=10] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=92, x1=101, x2=13, y1=7, y2=1, y3=9] [L36] EXPR counter++ VAL [counter=93, x1=101, x2=13, y1=7, y2=1, y3=9] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=93] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=93] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=93, x1=101, x2=13, y1=7, y2=1, y3=9] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=93, x1=101, x2=13, y1=7, y2=2, y3=8] [L36] EXPR counter++ VAL [counter=94, x1=101, x2=13, y1=7, y2=2, y3=8] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=94] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=94] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=94, x1=101, x2=13, y1=7, y2=2, y3=8] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=94, x1=101, x2=13, y1=7, y2=3, y3=7] [L36] EXPR counter++ VAL [counter=95, x1=101, x2=13, y1=7, y2=3, y3=7] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=95] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=95] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=95, x1=101, x2=13, y1=7, y2=3, y3=7] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=95, x1=101, x2=13, y1=7, y2=4, y3=6] [L36] EXPR counter++ VAL [counter=96, x1=101, x2=13, y1=7, y2=4, y3=6] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=96] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=96] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=96, x1=101, x2=13, y1=7, y2=4, y3=6] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=96, x1=101, x2=13, y1=7, y2=5, y3=5] [L36] EXPR counter++ VAL [counter=97, x1=101, x2=13, y1=7, y2=5, y3=5] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=97] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=97] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=97, x1=101, x2=13, y1=7, y2=5, y3=5] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=97, x1=101, x2=13, y1=7, y2=6, y3=4] [L36] EXPR counter++ VAL [counter=98, x1=101, x2=13, y1=7, y2=6, y3=4] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=98] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=98] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=98, x1=101, x2=13, y1=7, y2=6, y3=4] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=98, x1=101, x2=13, y1=7, y2=7, y3=3] [L36] EXPR counter++ VAL [counter=99, x1=101, x2=13, y1=7, y2=7, y3=3] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=99] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=99] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=99, x1=101, x2=13, y1=7, y2=7, y3=3] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=99, x1=101, x2=13, y1=7, y2=8, y3=2] [L36] EXPR counter++ VAL [counter=100, x1=101, x2=13, y1=7, y2=8, y3=2] [L36] COND TRUE counter++<100 [L37] CALL __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [\old(cond)=1, counter=100] [L16] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=100] [L37] RET __VERIFIER_assert(y1*x2 + y2 + y3 == x1) VAL [counter=100, x1=101, x2=13, y1=7, y2=8, y3=2] [L39] COND FALSE !(!(y3 != 0)) [L41] COND FALSE !(y2 + 1 == x2) [L46] y2 = y2 + 1 [L47] y3 = y3 - 1 VAL [counter=100, x1=101, x2=13, y1=7, y2=9, y3=1] [L36] EXPR counter++ VAL [counter=101, x1=101, x2=13, y1=7, y2=9, y3=1] [L36] COND FALSE !(counter++<100) [L50] CALL __VERIFIER_assert(y1*x2 + y2 == x1) VAL [\old(cond)=0, counter=101] [L16] COND TRUE !(cond) VAL [\old(cond)=0, counter=101] [L18] reach_error() VAL [\old(cond)=0, counter=101] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 93.1s, OverallIterations: 13, TraceHistogramMax: 101, PathProgramHistogramMax: 7, EmptinessCheckTime: 0.1s, AutomataDifference: 18.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1003 SdHoareTripleChecker+Valid, 2.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1001 mSDsluCounter, 1496 SdHoareTripleChecker+Invalid, 2.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1323 mSDsCounter, 201 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1698 IncrementalHoareTripleChecker+Invalid, 1899 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 201 mSolverCounterUnsat, 173 mSDtfsCounter, 1698 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5152 GetRequests, 4358 SyntacticMatches, 94 SemanticMatches, 700 ConstructedPredicates, 0 IntricatePredicates, 2 DeprecatedPredicates, 25554 ImplicationChecksByTransitivity, 40.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=813occurred in iteration=12, InterpolantAutomatonStates: 595, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 12 MinimizatonAttempts, 5 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 8.1s SatisfiabilityAnalysisTime, 44.7s InterpolantComputationTime, 4823 NumberOfCodeBlocks, 4823 NumberOfCodeBlocksAsserted, 76 NumberOfCheckSat, 4660 ConstructedInterpolants, 0 QuantifiedInterpolants, 10974 SizeOfPredicates, 181 NumberOfNonLiveVariables, 3476 ConjunctsInSsa, 412 ConjunctsInUnsatCore, 27 InterpolantComputations, 4 PerfectInterpolantSequences, 46658/138735 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-11-14 05:22:40,072 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6ba4847-759b-4a43-9268-7aab54bbc6ec/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE