./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/config/TaipanReach.xml -i ../../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bad4bd14ff0d6303c86b61698001b4d4d1f47b3200dad5c7d05f11b8899f8627 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-13 23:43:23,876 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-13 23:43:23,957 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-Reach-32bit-Taipan_Default.epf [2024-11-13 23:43:23,962 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-13 23:43:23,962 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-13 23:43:23,997 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-13 23:43:23,998 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-13 23:43:23,998 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-13 23:43:23,998 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-13 23:43:23,998 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-13 23:43:23,998 INFO L153 SettingsManager]: * User list type=DISABLED [2024-11-13 23:43:23,998 INFO L151 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2024-11-13 23:43:23,999 INFO L153 SettingsManager]: * Explicit value domain=true [2024-11-13 23:43:24,001 INFO L153 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2024-11-13 23:43:24,002 INFO L153 SettingsManager]: * Octagon Domain=false [2024-11-13 23:43:24,002 INFO L153 SettingsManager]: * Abstract domain=CompoundDomain [2024-11-13 23:43:24,002 INFO L153 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2024-11-13 23:43:24,002 INFO L153 SettingsManager]: * Use the RCFG-of-the-future interface=true [2024-11-13 23:43:24,002 INFO L153 SettingsManager]: * Interval Domain=false [2024-11-13 23:43:24,003 INFO L151 SettingsManager]: Preferences of Sifa differ from their defaults: [2024-11-13 23:43:24,003 INFO L153 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2024-11-13 23:43:24,003 INFO L153 SettingsManager]: * Simplification Technique=POLY_PAC [2024-11-13 23:43:24,003 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-13 23:43:24,003 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-13 23:43:24,003 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-13 23:43:24,003 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-13 23:43:24,003 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-13 23:43:24,004 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-13 23:43:24,004 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-13 23:43:24,004 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-13 23:43:24,004 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-13 23:43:24,004 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-13 23:43:24,004 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-13 23:43:24,004 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-13 23:43:24,004 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-13 23:43:24,004 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-13 23:43:24,004 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-13 23:43:24,005 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-13 23:43:24,005 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-13 23:43:24,005 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-13 23:43:24,005 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-13 23:43:24,005 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-13 23:43:24,005 INFO L153 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2024-11-13 23:43:24,005 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-13 23:43:24,005 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-13 23:43:24,005 INFO L153 SettingsManager]: * Trace refinement exception blacklist=NONE [2024-11-13 23:43:24,005 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-13 23:43:24,006 INFO L153 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bad4bd14ff0d6303c86b61698001b4d4d1f47b3200dad5c7d05f11b8899f8627 [2024-11-13 23:43:24,335 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-13 23:43:24,350 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-13 23:43:24,354 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-13 23:43:24,355 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-13 23:43:24,356 INFO L274 PluginConnector]: CDTParser initialized [2024-11-13 23:43:24,358 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/../../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c Unable to find full path for "g++" [2024-11-13 23:43:26,273 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-13 23:43:26,761 INFO L384 CDTParser]: Found 1 translation units. [2024-11-13 23:43:26,761 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c [2024-11-13 23:43:26,783 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/data/600661977/ecbd5d647dc740578592050ee2049f5f/FLAGe70c54b06 [2024-11-13 23:43:26,810 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/data/600661977/ecbd5d647dc740578592050ee2049f5f [2024-11-13 23:43:26,813 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-13 23:43:26,816 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-13 23:43:26,818 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-13 23:43:26,818 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-13 23:43:26,823 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-13 23:43:26,826 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 11:43:26" (1/1) ... [2024-11-13 23:43:26,828 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d9a9566 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:26, skipping insertion in model container [2024-11-13 23:43:26,829 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 11:43:26" (1/1) ... [2024-11-13 23:43:26,879 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-13 23:43:27,075 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[911,924] [2024-11-13 23:43:27,187 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[8416,8429] [2024-11-13 23:43:27,267 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 23:43:27,285 INFO L200 MainTranslator]: Completed pre-run [2024-11-13 23:43:27,300 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[911,924] [2024-11-13 23:43:27,342 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[8416,8429] [2024-11-13 23:43:27,392 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 23:43:27,425 INFO L204 MainTranslator]: Completed translation [2024-11-13 23:43:27,425 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27 WrapperNode [2024-11-13 23:43:27,426 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-13 23:43:27,427 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-13 23:43:27,428 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-13 23:43:27,428 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-13 23:43:27,435 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,453 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,506 INFO L138 Inliner]: procedures = 61, calls = 71, calls flagged for inlining = 29, calls inlined = 29, statements flattened = 562 [2024-11-13 23:43:27,508 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-13 23:43:27,509 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-13 23:43:27,509 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-13 23:43:27,509 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-13 23:43:27,518 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,519 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,526 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,526 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,543 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,560 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,566 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,568 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,575 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-13 23:43:27,579 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-13 23:43:27,580 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-13 23:43:27,580 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-13 23:43:27,581 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (1/1) ... [2024-11-13 23:43:27,591 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-13 23:43:27,614 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:27,629 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-11-13 23:43:27,634 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-11-13 23:43:27,667 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-13 23:43:27,667 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2024-11-13 23:43:27,668 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2024-11-13 23:43:27,668 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2024-11-13 23:43:27,668 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2024-11-13 23:43:27,668 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread1 [2024-11-13 23:43:27,668 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread1 [2024-11-13 23:43:27,668 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread2 [2024-11-13 23:43:27,668 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread2 [2024-11-13 23:43:27,669 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events1 [2024-11-13 23:43:27,669 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events1 [2024-11-13 23:43:27,670 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events2 [2024-11-13 23:43:27,670 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events2 [2024-11-13 23:43:27,670 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads2 [2024-11-13 23:43:27,670 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads2 [2024-11-13 23:43:27,670 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads1 [2024-11-13 23:43:27,670 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads1 [2024-11-13 23:43:27,670 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2024-11-13 23:43:27,670 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2024-11-13 23:43:27,670 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels1 [2024-11-13 23:43:27,671 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels1 [2024-11-13 23:43:27,671 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels2 [2024-11-13 23:43:27,672 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels2 [2024-11-13 23:43:27,672 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-11-13 23:43:27,672 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events2 [2024-11-13 23:43:27,672 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events2 [2024-11-13 23:43:27,672 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events1 [2024-11-13 23:43:27,672 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events1 [2024-11-13 23:43:27,672 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-13 23:43:27,672 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-13 23:43:27,675 INFO L130 BoogieDeclarations]: Found specification of procedure error1 [2024-11-13 23:43:27,675 INFO L138 BoogieDeclarations]: Found implementation of procedure error1 [2024-11-13 23:43:27,675 INFO L130 BoogieDeclarations]: Found specification of procedure error2 [2024-11-13 23:43:27,675 INFO L138 BoogieDeclarations]: Found implementation of procedure error2 [2024-11-13 23:43:27,793 INFO L238 CfgBuilder]: Building ICFG [2024-11-13 23:43:27,796 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-13 23:43:28,456 INFO L735 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##56: assume !(1 == ~q_free~0); [2024-11-13 23:43:28,456 INFO L735 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##55: assume 1 == ~q_free~0;~c_dr_st~0 := 2;~c_dr_pc~0 := 2;~a_t~0 := do_read_c_~a~0#1; [2024-11-13 23:43:28,614 INFO L? ?]: Removed 80 outVars from TransFormulas that were not future-live. [2024-11-13 23:43:28,614 INFO L287 CfgBuilder]: Performing block encoding [2024-11-13 23:43:28,935 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-13 23:43:28,937 INFO L316 CfgBuilder]: Removed 10 assume(true) statements. [2024-11-13 23:43:28,938 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 11:43:28 BoogieIcfgContainer [2024-11-13 23:43:28,938 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-13 23:43:28,940 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-13 23:43:28,940 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-13 23:43:28,948 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-13 23:43:28,948 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.11 11:43:26" (1/3) ... [2024-11-13 23:43:28,949 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f5bf91b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 11:43:28, skipping insertion in model container [2024-11-13 23:43:28,949 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 11:43:27" (2/3) ... [2024-11-13 23:43:28,950 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f5bf91b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 11:43:28, skipping insertion in model container [2024-11-13 23:43:28,951 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 11:43:28" (3/3) ... [2024-11-13 23:43:28,952 INFO L112 eAbstractionObserver]: Analyzing ICFG pc_sfifo_3.cil+token_ring.03.cil-1.c [2024-11-13 23:43:28,969 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-13 23:43:28,971 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG pc_sfifo_3.cil+token_ring.03.cil-1.c that has 16 procedures, 178 locations, 1 initial locations, 10 loop locations, and 2 error locations. [2024-11-13 23:43:29,042 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-13 23:43:29,055 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5b8d6654, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-13 23:43:29,055 INFO L334 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2024-11-13 23:43:29,060 INFO L276 IsEmpty]: Start isEmpty. Operand has 178 states, 125 states have (on average 1.496) internal successors, (187), 133 states have internal predecessors, (187), 35 states have call successors, (35), 15 states have call predecessors, (35), 15 states have return successors, (35), 33 states have call predecessors, (35), 35 states have call successors, (35) [2024-11-13 23:43:29,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2024-11-13 23:43:29,073 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:29,073 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:29,074 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:29,078 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:29,078 INFO L85 PathProgramCache]: Analyzing trace with hash -2011717138, now seen corresponding path program 1 times [2024-11-13 23:43:29,084 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:29,084 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1563897933] [2024-11-13 23:43:29,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:29,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:29,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:29,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 23:43:29,627 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:29,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1563897933] [2024-11-13 23:43:29,631 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1563897933] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:29,632 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 23:43:29,632 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 23:43:29,633 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1791390927] [2024-11-13 23:43:29,634 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:29,639 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 23:43:29,640 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:29,669 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 23:43:29,670 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 23:43:29,673 INFO L87 Difference]: Start difference. First operand has 178 states, 125 states have (on average 1.496) internal successors, (187), 133 states have internal predecessors, (187), 35 states have call successors, (35), 15 states have call predecessors, (35), 15 states have return successors, (35), 33 states have call predecessors, (35), 35 states have call successors, (35) Second operand has 5 states, 5 states have (on average 6.0) internal successors, (30), 5 states have internal predecessors, (30), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-13 23:43:30,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:30,716 INFO L93 Difference]: Finished difference Result 677 states and 1016 transitions. [2024-11-13 23:43:30,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 23:43:30,719 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.0) internal successors, (30), 5 states have internal predecessors, (30), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 41 [2024-11-13 23:43:30,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:30,733 INFO L225 Difference]: With dead ends: 677 [2024-11-13 23:43:30,733 INFO L226 Difference]: Without dead ends: 494 [2024-11-13 23:43:30,738 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:43:30,741 INFO L432 NwaCegarLoop]: 287 mSDtfsCounter, 678 mSDsluCounter, 390 mSDsCounter, 0 mSdLazyCounter, 367 mSolverCounterSat, 198 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 679 SdHoareTripleChecker+Valid, 677 SdHoareTripleChecker+Invalid, 565 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 198 IncrementalHoareTripleChecker+Valid, 367 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:30,742 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [679 Valid, 677 Invalid, 565 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [198 Valid, 367 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-13 23:43:30,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2024-11-13 23:43:30,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 481. [2024-11-13 23:43:30,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 481 states, 358 states have (on average 1.405027932960894) internal successors, (503), 366 states have internal predecessors, (503), 84 states have call successors, (84), 39 states have call predecessors, (84), 37 states have return successors, (106), 77 states have call predecessors, (106), 80 states have call successors, (106) [2024-11-13 23:43:30,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 481 states to 481 states and 693 transitions. [2024-11-13 23:43:30,898 INFO L78 Accepts]: Start accepts. Automaton has 481 states and 693 transitions. Word has length 41 [2024-11-13 23:43:30,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:30,898 INFO L471 AbstractCegarLoop]: Abstraction has 481 states and 693 transitions. [2024-11-13 23:43:30,899 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.0) internal successors, (30), 5 states have internal predecessors, (30), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-13 23:43:30,899 INFO L276 IsEmpty]: Start isEmpty. Operand 481 states and 693 transitions. [2024-11-13 23:43:30,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-13 23:43:30,903 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:30,903 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:30,904 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-13 23:43:30,905 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:30,905 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:30,905 INFO L85 PathProgramCache]: Analyzing trace with hash 130768959, now seen corresponding path program 1 times [2024-11-13 23:43:30,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:30,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266876328] [2024-11-13 23:43:30,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:30,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:30,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:31,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 23:43:31,078 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:31,078 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266876328] [2024-11-13 23:43:31,078 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [266876328] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:31,078 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 23:43:31,079 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 23:43:31,079 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1090857876] [2024-11-13 23:43:31,079 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:31,080 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 23:43:31,080 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:31,082 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 23:43:31,082 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 23:43:31,082 INFO L87 Difference]: Start difference. First operand 481 states and 693 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 4 states have internal predecessors, (29), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-13 23:43:31,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:31,546 INFO L93 Difference]: Finished difference Result 681 states and 970 transitions. [2024-11-13 23:43:31,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 23:43:31,547 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 4 states have internal predecessors, (29), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) Word has length 44 [2024-11-13 23:43:31,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:31,553 INFO L225 Difference]: With dead ends: 681 [2024-11-13 23:43:31,553 INFO L226 Difference]: Without dead ends: 610 [2024-11-13 23:43:31,555 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 23:43:31,556 INFO L432 NwaCegarLoop]: 258 mSDtfsCounter, 298 mSDsluCounter, 186 mSDsCounter, 0 mSdLazyCounter, 226 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 298 SdHoareTripleChecker+Valid, 444 SdHoareTripleChecker+Invalid, 239 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 226 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:31,556 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [298 Valid, 444 Invalid, 239 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 226 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 23:43:31,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2024-11-13 23:43:31,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 599. [2024-11-13 23:43:31,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 599 states, 442 states have (on average 1.3914027149321266) internal successors, (615), 450 states have internal predecessors, (615), 104 states have call successors, (104), 53 states have call predecessors, (104), 51 states have return successors, (129), 97 states have call predecessors, (129), 100 states have call successors, (129) [2024-11-13 23:43:31,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 599 states to 599 states and 848 transitions. [2024-11-13 23:43:31,671 INFO L78 Accepts]: Start accepts. Automaton has 599 states and 848 transitions. Word has length 44 [2024-11-13 23:43:31,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:31,671 INFO L471 AbstractCegarLoop]: Abstraction has 599 states and 848 transitions. [2024-11-13 23:43:31,671 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 4 states have internal predecessors, (29), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-13 23:43:31,672 INFO L276 IsEmpty]: Start isEmpty. Operand 599 states and 848 transitions. [2024-11-13 23:43:31,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2024-11-13 23:43:31,676 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:31,676 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:31,676 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-13 23:43:31,677 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:31,677 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:31,681 INFO L85 PathProgramCache]: Analyzing trace with hash 227158824, now seen corresponding path program 1 times [2024-11-13 23:43:31,681 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:31,681 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267027148] [2024-11-13 23:43:31,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:31,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:31,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:31,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 23:43:31,884 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:31,884 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [267027148] [2024-11-13 23:43:31,884 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [267027148] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:31,884 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 23:43:31,884 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 23:43:31,884 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [143786898] [2024-11-13 23:43:31,884 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:31,885 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 23:43:31,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:31,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 23:43:31,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:43:31,886 INFO L87 Difference]: Start difference. First operand 599 states and 848 transitions. Second operand has 6 states, 6 states have (on average 5.0) internal successors, (30), 6 states have internal predecessors, (30), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-13 23:43:32,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:32,887 INFO L93 Difference]: Finished difference Result 1136 states and 1571 transitions. [2024-11-13 23:43:32,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-13 23:43:32,888 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 5.0) internal successors, (30), 6 states have internal predecessors, (30), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) Word has length 45 [2024-11-13 23:43:32,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:32,893 INFO L225 Difference]: With dead ends: 1136 [2024-11-13 23:43:32,893 INFO L226 Difference]: Without dead ends: 670 [2024-11-13 23:43:32,898 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-11-13 23:43:32,899 INFO L432 NwaCegarLoop]: 304 mSDtfsCounter, 717 mSDsluCounter, 469 mSDsCounter, 0 mSdLazyCounter, 646 mSolverCounterSat, 254 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 726 SdHoareTripleChecker+Valid, 773 SdHoareTripleChecker+Invalid, 900 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 254 IncrementalHoareTripleChecker+Valid, 646 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:32,900 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [726 Valid, 773 Invalid, 900 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [254 Valid, 646 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-13 23:43:32,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 670 states. [2024-11-13 23:43:32,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 670 to 585. [2024-11-13 23:43:32,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 585 states, 428 states have (on average 1.3598130841121496) internal successors, (582), 436 states have internal predecessors, (582), 104 states have call successors, (104), 53 states have call predecessors, (104), 51 states have return successors, (126), 97 states have call predecessors, (126), 100 states have call successors, (126) [2024-11-13 23:43:32,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 585 states to 585 states and 812 transitions. [2024-11-13 23:43:32,974 INFO L78 Accepts]: Start accepts. Automaton has 585 states and 812 transitions. Word has length 45 [2024-11-13 23:43:32,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:32,974 INFO L471 AbstractCegarLoop]: Abstraction has 585 states and 812 transitions. [2024-11-13 23:43:32,974 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 5.0) internal successors, (30), 6 states have internal predecessors, (30), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-13 23:43:32,974 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 812 transitions. [2024-11-13 23:43:32,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2024-11-13 23:43:32,976 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:32,976 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:32,976 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-13 23:43:32,976 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:32,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:32,976 INFO L85 PathProgramCache]: Analyzing trace with hash 903886560, now seen corresponding path program 1 times [2024-11-13 23:43:32,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:32,977 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331382797] [2024-11-13 23:43:32,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:32,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:33,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:33,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 23:43:33,132 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:33,132 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [331382797] [2024-11-13 23:43:33,133 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [331382797] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:33,133 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 23:43:33,133 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 23:43:33,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572610058] [2024-11-13 23:43:33,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:33,134 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 23:43:33,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:33,135 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 23:43:33,135 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:43:33,135 INFO L87 Difference]: Start difference. First operand 585 states and 812 transitions. Second operand has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 6 states have internal predecessors, (31), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-13 23:43:34,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:34,028 INFO L93 Difference]: Finished difference Result 1051 states and 1420 transitions. [2024-11-13 23:43:34,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 23:43:34,029 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 6 states have internal predecessors, (31), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) Word has length 46 [2024-11-13 23:43:34,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:34,038 INFO L225 Difference]: With dead ends: 1051 [2024-11-13 23:43:34,039 INFO L226 Difference]: Without dead ends: 874 [2024-11-13 23:43:34,040 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-11-13 23:43:34,041 INFO L432 NwaCegarLoop]: 304 mSDtfsCounter, 613 mSDsluCounter, 445 mSDsCounter, 0 mSdLazyCounter, 560 mSolverCounterSat, 236 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 619 SdHoareTripleChecker+Valid, 749 SdHoareTripleChecker+Invalid, 796 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 236 IncrementalHoareTripleChecker+Valid, 560 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:34,041 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [619 Valid, 749 Invalid, 796 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [236 Valid, 560 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 23:43:34,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 874 states. [2024-11-13 23:43:34,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 874 to 849. [2024-11-13 23:43:34,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 849 states, 609 states have (on average 1.3152709359605912) internal successors, (801), 617 states have internal predecessors, (801), 153 states have call successors, (153), 87 states have call predecessors, (153), 85 states have return successors, (192), 146 states have call predecessors, (192), 149 states have call successors, (192) [2024-11-13 23:43:34,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 849 states to 849 states and 1146 transitions. [2024-11-13 23:43:34,154 INFO L78 Accepts]: Start accepts. Automaton has 849 states and 1146 transitions. Word has length 46 [2024-11-13 23:43:34,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:34,155 INFO L471 AbstractCegarLoop]: Abstraction has 849 states and 1146 transitions. [2024-11-13 23:43:34,155 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 6 states have internal predecessors, (31), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-13 23:43:34,155 INFO L276 IsEmpty]: Start isEmpty. Operand 849 states and 1146 transitions. [2024-11-13 23:43:34,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2024-11-13 23:43:34,157 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:34,157 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:34,157 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-13 23:43:34,157 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:34,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:34,157 INFO L85 PathProgramCache]: Analyzing trace with hash 1031389262, now seen corresponding path program 1 times [2024-11-13 23:43:34,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:34,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799212694] [2024-11-13 23:43:34,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:34,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:34,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:34,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 23:43:34,218 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:34,218 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799212694] [2024-11-13 23:43:34,218 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [799212694] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:34,218 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 23:43:34,218 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-13 23:43:34,218 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [214259614] [2024-11-13 23:43:34,218 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:34,219 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:34,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:34,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:34,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-13 23:43:34,220 INFO L87 Difference]: Start difference. First operand 849 states and 1146 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-13 23:43:34,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:34,365 INFO L93 Difference]: Finished difference Result 850 states and 1147 transitions. [2024-11-13 23:43:34,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:34,365 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 50 [2024-11-13 23:43:34,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:34,369 INFO L225 Difference]: With dead ends: 850 [2024-11-13 23:43:34,369 INFO L226 Difference]: Without dead ends: 406 [2024-11-13 23:43:34,370 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-13 23:43:34,371 INFO L432 NwaCegarLoop]: 184 mSDtfsCounter, 204 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 204 SdHoareTripleChecker+Valid, 184 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:34,371 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [204 Valid, 184 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:43:34,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 406 states. [2024-11-13 23:43:34,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 406 to 406. [2024-11-13 23:43:34,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 406 states, 307 states have (on average 1.3973941368078175) internal successors, (429), 312 states have internal predecessors, (429), 68 states have call successors, (68), 31 states have call predecessors, (68), 30 states have return successors, (92), 63 states have call predecessors, (92), 66 states have call successors, (92) [2024-11-13 23:43:34,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 589 transitions. [2024-11-13 23:43:34,414 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 589 transitions. Word has length 50 [2024-11-13 23:43:34,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:34,414 INFO L471 AbstractCegarLoop]: Abstraction has 406 states and 589 transitions. [2024-11-13 23:43:34,415 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-13 23:43:34,415 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 589 transitions. [2024-11-13 23:43:34,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2024-11-13 23:43:34,417 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:34,420 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:34,420 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-13 23:43:34,421 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:34,421 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:34,421 INFO L85 PathProgramCache]: Analyzing trace with hash -1343306817, now seen corresponding path program 1 times [2024-11-13 23:43:34,421 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:34,421 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807870454] [2024-11-13 23:43:34,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:34,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:34,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:34,588 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-11-13 23:43:34,588 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:34,588 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807870454] [2024-11-13 23:43:34,588 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [807870454] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:34,588 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1484527922] [2024-11-13 23:43:34,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:34,589 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:34,589 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:34,591 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:34,594 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-13 23:43:34,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:34,754 INFO L255 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-13 23:43:34,759 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:34,822 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 23:43:34,822 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:34,823 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1484527922] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:34,823 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:34,823 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [5] total 6 [2024-11-13 23:43:34,823 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973918643] [2024-11-13 23:43:34,823 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:34,824 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:34,824 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:34,825 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:34,825 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:43:34,825 INFO L87 Difference]: Start difference. First operand 406 states and 589 transitions. Second operand has 3 states, 3 states have (on average 16.666666666666668) internal successors, (50), 2 states have internal predecessors, (50), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-13 23:43:34,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:34,969 INFO L93 Difference]: Finished difference Result 1190 states and 1768 transitions. [2024-11-13 23:43:34,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:34,970 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 16.666666666666668) internal successors, (50), 2 states have internal predecessors, (50), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 75 [2024-11-13 23:43:34,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:34,977 INFO L225 Difference]: With dead ends: 1190 [2024-11-13 23:43:34,977 INFO L226 Difference]: Without dead ends: 790 [2024-11-13 23:43:34,982 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:43:34,983 INFO L432 NwaCegarLoop]: 111 mSDtfsCounter, 109 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 213 SdHoareTripleChecker+Invalid, 51 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:34,983 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [109 Valid, 213 Invalid, 51 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:43:34,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 790 states. [2024-11-13 23:43:35,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 790 to 781. [2024-11-13 23:43:35,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 781 states, 595 states have (on average 1.384873949579832) internal successors, (824), 603 states have internal predecessors, (824), 125 states have call successors, (125), 61 states have call predecessors, (125), 60 states have return successors, (171), 117 states have call predecessors, (171), 123 states have call successors, (171) [2024-11-13 23:43:35,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 781 states to 781 states and 1120 transitions. [2024-11-13 23:43:35,069 INFO L78 Accepts]: Start accepts. Automaton has 781 states and 1120 transitions. Word has length 75 [2024-11-13 23:43:35,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:35,070 INFO L471 AbstractCegarLoop]: Abstraction has 781 states and 1120 transitions. [2024-11-13 23:43:35,070 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 16.666666666666668) internal successors, (50), 2 states have internal predecessors, (50), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-13 23:43:35,070 INFO L276 IsEmpty]: Start isEmpty. Operand 781 states and 1120 transitions. [2024-11-13 23:43:35,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2024-11-13 23:43:35,072 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:35,072 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:35,095 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-13 23:43:35,273 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2024-11-13 23:43:35,274 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:35,274 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:35,274 INFO L85 PathProgramCache]: Analyzing trace with hash -214072191, now seen corresponding path program 1 times [2024-11-13 23:43:35,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:35,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753436367] [2024-11-13 23:43:35,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:35,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:35,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:35,737 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-13 23:43:35,738 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:35,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1753436367] [2024-11-13 23:43:35,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1753436367] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:35,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 23:43:35,739 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 23:43:35,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76999553] [2024-11-13 23:43:35,739 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:35,739 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 23:43:35,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:35,740 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 23:43:35,740 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:43:35,740 INFO L87 Difference]: Start difference. First operand 781 states and 1120 transitions. Second operand has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-11-13 23:43:36,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:36,234 INFO L93 Difference]: Finished difference Result 2045 states and 2961 transitions. [2024-11-13 23:43:36,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-13 23:43:36,235 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) Word has length 75 [2024-11-13 23:43:36,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:36,248 INFO L225 Difference]: With dead ends: 2045 [2024-11-13 23:43:36,249 INFO L226 Difference]: Without dead ends: 1271 [2024-11-13 23:43:36,252 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2024-11-13 23:43:36,253 INFO L432 NwaCegarLoop]: 141 mSDtfsCounter, 287 mSDsluCounter, 212 mSDsCounter, 0 mSdLazyCounter, 182 mSolverCounterSat, 71 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 294 SdHoareTripleChecker+Valid, 353 SdHoareTripleChecker+Invalid, 253 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 71 IncrementalHoareTripleChecker+Valid, 182 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:36,254 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [294 Valid, 353 Invalid, 253 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [71 Valid, 182 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 23:43:36,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1271 states. [2024-11-13 23:43:36,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1271 to 1217. [2024-11-13 23:43:36,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1217 states, 926 states have (on average 1.369330453563715) internal successors, (1268), 938 states have internal predecessors, (1268), 194 states have call successors, (194), 97 states have call predecessors, (194), 96 states have return successors, (273), 182 states have call predecessors, (273), 192 states have call successors, (273) [2024-11-13 23:43:36,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1217 states to 1217 states and 1735 transitions. [2024-11-13 23:43:36,397 INFO L78 Accepts]: Start accepts. Automaton has 1217 states and 1735 transitions. Word has length 75 [2024-11-13 23:43:36,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:36,397 INFO L471 AbstractCegarLoop]: Abstraction has 1217 states and 1735 transitions. [2024-11-13 23:43:36,398 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.333333333333333) internal successors, (44), 6 states have internal predecessors, (44), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-11-13 23:43:36,398 INFO L276 IsEmpty]: Start isEmpty. Operand 1217 states and 1735 transitions. [2024-11-13 23:43:36,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2024-11-13 23:43:36,406 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:36,406 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:36,406 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-13 23:43:36,406 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:36,406 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:36,406 INFO L85 PathProgramCache]: Analyzing trace with hash 674971781, now seen corresponding path program 1 times [2024-11-13 23:43:36,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:36,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000977088] [2024-11-13 23:43:36,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:36,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:36,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:36,513 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-13 23:43:36,514 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:36,514 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000977088] [2024-11-13 23:43:36,514 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2000977088] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:36,514 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 23:43:36,514 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-13 23:43:36,514 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744760581] [2024-11-13 23:43:36,515 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:36,516 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:36,517 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:36,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:36,517 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-13 23:43:36,518 INFO L87 Difference]: Start difference. First operand 1217 states and 1735 transitions. Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-13 23:43:36,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:36,743 INFO L93 Difference]: Finished difference Result 2545 states and 3680 transitions. [2024-11-13 23:43:36,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:36,744 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 77 [2024-11-13 23:43:36,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:36,758 INFO L225 Difference]: With dead ends: 2545 [2024-11-13 23:43:36,758 INFO L226 Difference]: Without dead ends: 1485 [2024-11-13 23:43:36,762 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-13 23:43:36,763 INFO L432 NwaCegarLoop]: 166 mSDtfsCounter, 48 mSDsluCounter, 115 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:36,763 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 281 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:43:36,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1485 states. [2024-11-13 23:43:36,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1485 to 1360. [2024-11-13 23:43:36,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1360 states, 1057 states have (on average 1.3850520340586565) internal successors, (1464), 1069 states have internal predecessors, (1464), 200 states have call successors, (200), 103 states have call predecessors, (200), 102 states have return successors, (279), 188 states have call predecessors, (279), 198 states have call successors, (279) [2024-11-13 23:43:36,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1360 states to 1360 states and 1943 transitions. [2024-11-13 23:43:36,914 INFO L78 Accepts]: Start accepts. Automaton has 1360 states and 1943 transitions. Word has length 77 [2024-11-13 23:43:36,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:36,916 INFO L471 AbstractCegarLoop]: Abstraction has 1360 states and 1943 transitions. [2024-11-13 23:43:36,916 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-13 23:43:36,916 INFO L276 IsEmpty]: Start isEmpty. Operand 1360 states and 1943 transitions. [2024-11-13 23:43:36,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2024-11-13 23:43:36,922 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:36,922 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:36,922 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-13 23:43:36,922 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:36,923 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:36,923 INFO L85 PathProgramCache]: Analyzing trace with hash 457111475, now seen corresponding path program 1 times [2024-11-13 23:43:36,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:36,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [673772136] [2024-11-13 23:43:36,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:36,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:36,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:37,001 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 23:43:37,001 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:37,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [673772136] [2024-11-13 23:43:37,002 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [673772136] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:37,002 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 23:43:37,002 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-13 23:43:37,002 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1683357664] [2024-11-13 23:43:37,002 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:37,002 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:37,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:37,003 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:37,003 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-13 23:43:37,003 INFO L87 Difference]: Start difference. First operand 1360 states and 1943 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-13 23:43:37,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:37,333 INFO L93 Difference]: Finished difference Result 3997 states and 5815 transitions. [2024-11-13 23:43:37,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:37,333 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 101 [2024-11-13 23:43:37,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:37,351 INFO L225 Difference]: With dead ends: 3997 [2024-11-13 23:43:37,351 INFO L226 Difference]: Without dead ends: 2643 [2024-11-13 23:43:37,357 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-13 23:43:37,358 INFO L432 NwaCegarLoop]: 113 mSDtfsCounter, 102 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 102 SdHoareTripleChecker+Valid, 215 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:37,358 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [102 Valid, 215 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:43:37,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2643 states. [2024-11-13 23:43:37,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2643 to 2617. [2024-11-13 23:43:37,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2617 states, 2034 states have (on average 1.3628318584070795) internal successors, (2772), 2056 states have internal predecessors, (2772), 378 states have call successors, (378), 205 states have call predecessors, (378), 204 states have return successors, (524), 356 states have call predecessors, (524), 376 states have call successors, (524) [2024-11-13 23:43:37,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2617 states to 2617 states and 3674 transitions. [2024-11-13 23:43:37,660 INFO L78 Accepts]: Start accepts. Automaton has 2617 states and 3674 transitions. Word has length 101 [2024-11-13 23:43:37,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:37,660 INFO L471 AbstractCegarLoop]: Abstraction has 2617 states and 3674 transitions. [2024-11-13 23:43:37,661 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-13 23:43:37,661 INFO L276 IsEmpty]: Start isEmpty. Operand 2617 states and 3674 transitions. [2024-11-13 23:43:37,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2024-11-13 23:43:37,672 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:37,672 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:37,672 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-13 23:43:37,672 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:37,672 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:37,673 INFO L85 PathProgramCache]: Analyzing trace with hash 2008203192, now seen corresponding path program 1 times [2024-11-13 23:43:37,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:37,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905973276] [2024-11-13 23:43:37,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:37,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:37,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:37,959 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 10 proven. 25 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-11-13 23:43:37,960 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:37,960 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905973276] [2024-11-13 23:43:37,960 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905973276] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:37,960 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2091434222] [2024-11-13 23:43:37,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:37,960 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:37,960 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:37,962 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:37,965 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-13 23:43:38,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:38,124 INFO L255 TraceCheckSpWp]: Trace formula consists of 505 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-13 23:43:38,129 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:38,190 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-13 23:43:38,190 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:38,191 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2091434222] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:38,191 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:38,191 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2024-11-13 23:43:38,191 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1751329542] [2024-11-13 23:43:38,191 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:38,192 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:38,192 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:38,192 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:38,192 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:43:38,192 INFO L87 Difference]: Start difference. First operand 2617 states and 3674 transitions. Second operand has 3 states, 3 states have (on average 25.0) internal successors, (75), 3 states have internal predecessors, (75), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-13 23:43:38,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:38,551 INFO L93 Difference]: Finished difference Result 5129 states and 7249 transitions. [2024-11-13 23:43:38,551 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:38,552 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.0) internal successors, (75), 3 states have internal predecessors, (75), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) Word has length 113 [2024-11-13 23:43:38,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:38,572 INFO L225 Difference]: With dead ends: 5129 [2024-11-13 23:43:38,572 INFO L226 Difference]: Without dead ends: 3205 [2024-11-13 23:43:38,579 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:43:38,580 INFO L432 NwaCegarLoop]: 125 mSDtfsCounter, 115 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 115 SdHoareTripleChecker+Valid, 149 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:38,580 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [115 Valid, 149 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 23:43:38,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3205 states. [2024-11-13 23:43:38,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3205 to 3117. [2024-11-13 23:43:38,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3117 states, 2465 states have (on average 1.3399594320486816) internal successors, (3303), 2483 states have internal predecessors, (3303), 396 states have call successors, (396), 255 states have call predecessors, (396), 255 states have return successors, (549), 379 states have call predecessors, (549), 394 states have call successors, (549) [2024-11-13 23:43:38,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3117 states to 3117 states and 4248 transitions. [2024-11-13 23:43:38,897 INFO L78 Accepts]: Start accepts. Automaton has 3117 states and 4248 transitions. Word has length 113 [2024-11-13 23:43:38,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:38,898 INFO L471 AbstractCegarLoop]: Abstraction has 3117 states and 4248 transitions. [2024-11-13 23:43:38,898 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.0) internal successors, (75), 3 states have internal predecessors, (75), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-13 23:43:38,898 INFO L276 IsEmpty]: Start isEmpty. Operand 3117 states and 4248 transitions. [2024-11-13 23:43:38,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2024-11-13 23:43:38,908 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:38,908 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:38,928 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-13 23:43:39,109 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2024-11-13 23:43:39,109 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:39,110 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:39,110 INFO L85 PathProgramCache]: Analyzing trace with hash 1951058967, now seen corresponding path program 2 times [2024-11-13 23:43:39,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:39,110 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1916563984] [2024-11-13 23:43:39,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:39,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:39,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:39,363 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 10 proven. 26 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-11-13 23:43:39,363 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:39,364 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1916563984] [2024-11-13 23:43:39,364 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1916563984] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:39,364 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1441593980] [2024-11-13 23:43:39,364 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-13 23:43:39,364 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:39,364 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:39,366 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:39,369 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-13 23:43:39,498 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2024-11-13 23:43:39,498 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 23:43:39,500 INFO L255 TraceCheckSpWp]: Trace formula consists of 341 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-13 23:43:39,504 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:39,529 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-11-13 23:43:39,530 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:39,530 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1441593980] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:39,530 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:39,530 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2024-11-13 23:43:39,530 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [639923972] [2024-11-13 23:43:39,530 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:39,531 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:39,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:39,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:39,532 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:43:39,532 INFO L87 Difference]: Start difference. First operand 3117 states and 4248 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-13 23:43:39,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:39,999 INFO L93 Difference]: Finished difference Result 6046 states and 8457 transitions. [2024-11-13 23:43:40,000 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:40,000 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) Word has length 113 [2024-11-13 23:43:40,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:40,026 INFO L225 Difference]: With dead ends: 6046 [2024-11-13 23:43:40,026 INFO L226 Difference]: Without dead ends: 3764 [2024-11-13 23:43:40,035 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:43:40,036 INFO L432 NwaCegarLoop]: 190 mSDtfsCounter, 120 mSDsluCounter, 104 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 120 SdHoareTripleChecker+Valid, 294 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:40,036 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [120 Valid, 294 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:43:40,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3764 states. [2024-11-13 23:43:40,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3764 to 3688. [2024-11-13 23:43:40,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3688 states, 2935 states have (on average 1.3291311754684838) internal successors, (3901), 2957 states have internal predecessors, (3901), 455 states have call successors, (455), 298 states have call predecessors, (455), 297 states have return successors, (665), 433 states have call predecessors, (665), 453 states have call successors, (665) [2024-11-13 23:43:40,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3688 states to 3688 states and 5021 transitions. [2024-11-13 23:43:40,458 INFO L78 Accepts]: Start accepts. Automaton has 3688 states and 5021 transitions. Word has length 113 [2024-11-13 23:43:40,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:40,459 INFO L471 AbstractCegarLoop]: Abstraction has 3688 states and 5021 transitions. [2024-11-13 23:43:40,459 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 3 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 2 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-13 23:43:40,459 INFO L276 IsEmpty]: Start isEmpty. Operand 3688 states and 5021 transitions. [2024-11-13 23:43:40,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2024-11-13 23:43:40,468 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:40,468 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:40,488 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-13 23:43:40,672 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2024-11-13 23:43:40,672 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:40,673 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:40,673 INFO L85 PathProgramCache]: Analyzing trace with hash -1182339927, now seen corresponding path program 1 times [2024-11-13 23:43:40,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:40,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167080587] [2024-11-13 23:43:40,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:40,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:40,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:40,964 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 10 proven. 26 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-11-13 23:43:40,965 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:40,965 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167080587] [2024-11-13 23:43:40,965 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1167080587] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:40,965 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [561071041] [2024-11-13 23:43:40,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:40,965 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:40,965 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:40,967 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:40,972 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-13 23:43:41,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:41,144 INFO L255 TraceCheckSpWp]: Trace formula consists of 504 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-13 23:43:41,151 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:41,204 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-11-13 23:43:41,204 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:41,204 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [561071041] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:41,204 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:41,204 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2024-11-13 23:43:41,205 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1860783470] [2024-11-13 23:43:41,205 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:41,205 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:41,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:41,206 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:41,206 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:43:41,206 INFO L87 Difference]: Start difference. First operand 3688 states and 5021 transitions. Second operand has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-13 23:43:41,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:41,850 INFO L93 Difference]: Finished difference Result 8712 states and 11989 transitions. [2024-11-13 23:43:41,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:41,850 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 114 [2024-11-13 23:43:41,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:41,876 INFO L225 Difference]: With dead ends: 8712 [2024-11-13 23:43:41,877 INFO L226 Difference]: Without dead ends: 5031 [2024-11-13 23:43:41,886 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:43:41,887 INFO L432 NwaCegarLoop]: 128 mSDtfsCounter, 62 mSDsluCounter, 95 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 62 SdHoareTripleChecker+Valid, 223 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:41,887 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [62 Valid, 223 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:43:41,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5031 states. [2024-11-13 23:43:42,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5031 to 4122. [2024-11-13 23:43:42,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4122 states, 3325 states have (on average 1.345263157894737) internal successors, (4473), 3348 states have internal predecessors, (4473), 477 states have call successors, (477), 320 states have call predecessors, (477), 319 states have return successors, (687), 454 states have call predecessors, (687), 475 states have call successors, (687) [2024-11-13 23:43:42,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4122 states to 4122 states and 5637 transitions. [2024-11-13 23:43:42,282 INFO L78 Accepts]: Start accepts. Automaton has 4122 states and 5637 transitions. Word has length 114 [2024-11-13 23:43:42,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:42,282 INFO L471 AbstractCegarLoop]: Abstraction has 4122 states and 5637 transitions. [2024-11-13 23:43:42,282 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-13 23:43:42,282 INFO L276 IsEmpty]: Start isEmpty. Operand 4122 states and 5637 transitions. [2024-11-13 23:43:42,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2024-11-13 23:43:42,291 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:42,291 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:42,312 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-13 23:43:42,492 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:42,492 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:42,492 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:42,492 INFO L85 PathProgramCache]: Analyzing trace with hash 2120912712, now seen corresponding path program 1 times [2024-11-13 23:43:42,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:42,492 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1441996801] [2024-11-13 23:43:42,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:42,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:42,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:42,613 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 23 proven. 1 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-11-13 23:43:42,614 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:42,614 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1441996801] [2024-11-13 23:43:42,614 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1441996801] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:42,614 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [46114885] [2024-11-13 23:43:42,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:42,615 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:42,615 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:42,616 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:42,619 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-13 23:43:42,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:42,777 INFO L255 TraceCheckSpWp]: Trace formula consists of 501 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-13 23:43:42,780 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:42,821 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-13 23:43:42,825 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:42,825 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [46114885] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:42,825 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:42,825 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2024-11-13 23:43:42,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507257211] [2024-11-13 23:43:42,825 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:42,826 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:42,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:42,826 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:42,826 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:43:42,827 INFO L87 Difference]: Start difference. First operand 4122 states and 5637 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-13 23:43:43,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:43,276 INFO L93 Difference]: Finished difference Result 6546 states and 8931 transitions. [2024-11-13 23:43:43,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:43,277 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 114 [2024-11-13 23:43:43,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:43,306 INFO L225 Difference]: With dead ends: 6546 [2024-11-13 23:43:43,307 INFO L226 Difference]: Without dead ends: 4716 [2024-11-13 23:43:43,314 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:43:43,315 INFO L432 NwaCegarLoop]: 167 mSDtfsCounter, 64 mSDsluCounter, 115 mSDsCounter, 0 mSdLazyCounter, 57 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 282 SdHoareTripleChecker+Invalid, 57 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 57 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:43,315 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [64 Valid, 282 Invalid, 57 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 57 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:43:43,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4716 states. [2024-11-13 23:43:43,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4716 to 4434. [2024-11-13 23:43:43,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4434 states, 3605 states have (on average 1.3561719833564494) internal successors, (4889), 3628 states have internal predecessors, (4889), 493 states have call successors, (493), 336 states have call predecessors, (493), 335 states have return successors, (703), 470 states have call predecessors, (703), 491 states have call successors, (703) [2024-11-13 23:43:43,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4434 states to 4434 states and 6085 transitions. [2024-11-13 23:43:43,790 INFO L78 Accepts]: Start accepts. Automaton has 4434 states and 6085 transitions. Word has length 114 [2024-11-13 23:43:43,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:43,790 INFO L471 AbstractCegarLoop]: Abstraction has 4434 states and 6085 transitions. [2024-11-13 23:43:43,790 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-13 23:43:43,790 INFO L276 IsEmpty]: Start isEmpty. Operand 4434 states and 6085 transitions. [2024-11-13 23:43:43,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-11-13 23:43:43,800 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:43,800 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:43,823 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-13 23:43:44,001 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:44,001 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:44,002 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:44,002 INFO L85 PathProgramCache]: Analyzing trace with hash -146576687, now seen corresponding path program 1 times [2024-11-13 23:43:44,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:44,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1419445635] [2024-11-13 23:43:44,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:44,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:44,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:44,235 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 19 proven. 26 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-13 23:43:44,235 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:44,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1419445635] [2024-11-13 23:43:44,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1419445635] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:44,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [395477581] [2024-11-13 23:43:44,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:44,236 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:44,236 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:44,238 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:44,241 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-13 23:43:44,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:44,401 INFO L255 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-13 23:43:44,404 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:44,597 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 67 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-13 23:43:44,598 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:44,599 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [395477581] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:44,599 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:44,599 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 8 [2024-11-13 23:43:44,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1448307322] [2024-11-13 23:43:44,600 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:44,600 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 23:43:44,600 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:44,600 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 23:43:44,602 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-13 23:43:44,602 INFO L87 Difference]: Start difference. First operand 4434 states and 6085 transitions. Second operand has 4 states, 4 states have (on average 22.0) internal successors, (88), 4 states have internal predecessors, (88), 4 states have call successors, (11), 4 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 4 states have call successors, (10) [2024-11-13 23:43:45,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:45,614 INFO L93 Difference]: Finished difference Result 11012 states and 15260 transitions. [2024-11-13 23:43:45,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 23:43:45,614 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 22.0) internal successors, (88), 4 states have internal predecessors, (88), 4 states have call successors, (11), 4 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 4 states have call successors, (10) Word has length 116 [2024-11-13 23:43:45,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:45,655 INFO L225 Difference]: With dead ends: 11012 [2024-11-13 23:43:45,656 INFO L226 Difference]: Without dead ends: 7046 [2024-11-13 23:43:45,672 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-13 23:43:45,673 INFO L432 NwaCegarLoop]: 196 mSDtfsCounter, 167 mSDsluCounter, 125 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 167 SdHoareTripleChecker+Valid, 321 SdHoareTripleChecker+Invalid, 113 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:45,673 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [167 Valid, 321 Invalid, 113 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 23:43:45,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7046 states. [2024-11-13 23:43:46,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7046 to 6703. [2024-11-13 23:43:46,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6703 states, 5618 states have (on average 1.3570665717337131) internal successors, (7624), 5641 states have internal predecessors, (7624), 604 states have call successors, (604), 480 states have call predecessors, (604), 480 states have return successors, (910), 582 states have call predecessors, (910), 602 states have call successors, (910) [2024-11-13 23:43:46,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6703 states to 6703 states and 9138 transitions. [2024-11-13 23:43:46,536 INFO L78 Accepts]: Start accepts. Automaton has 6703 states and 9138 transitions. Word has length 116 [2024-11-13 23:43:46,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:46,537 INFO L471 AbstractCegarLoop]: Abstraction has 6703 states and 9138 transitions. [2024-11-13 23:43:46,537 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 22.0) internal successors, (88), 4 states have internal predecessors, (88), 4 states have call successors, (11), 4 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 4 states have call successors, (10) [2024-11-13 23:43:46,537 INFO L276 IsEmpty]: Start isEmpty. Operand 6703 states and 9138 transitions. [2024-11-13 23:43:46,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-13 23:43:46,553 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:46,554 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:46,574 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-13 23:43:46,754 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:46,755 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:46,755 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:46,755 INFO L85 PathProgramCache]: Analyzing trace with hash 913976769, now seen corresponding path program 1 times [2024-11-13 23:43:46,755 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:46,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302998968] [2024-11-13 23:43:46,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:46,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:46,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:46,878 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 21 proven. 5 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2024-11-13 23:43:46,879 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:46,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [302998968] [2024-11-13 23:43:46,879 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [302998968] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:46,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1794379000] [2024-11-13 23:43:46,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:46,879 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:46,879 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:46,881 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:46,884 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-13 23:43:47,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:47,045 INFO L255 TraceCheckSpWp]: Trace formula consists of 514 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-13 23:43:47,048 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:47,087 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-13 23:43:47,087 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:47,087 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1794379000] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:47,087 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:47,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2024-11-13 23:43:47,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1938694043] [2024-11-13 23:43:47,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:47,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:47,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:47,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:47,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:43:47,090 INFO L87 Difference]: Start difference. First operand 6703 states and 9138 transitions. Second operand has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-13 23:43:47,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:47,785 INFO L93 Difference]: Finished difference Result 12756 states and 17608 transitions. [2024-11-13 23:43:47,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:47,786 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 117 [2024-11-13 23:43:47,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:47,832 INFO L225 Difference]: With dead ends: 12756 [2024-11-13 23:43:47,832 INFO L226 Difference]: Without dead ends: 9297 [2024-11-13 23:43:47,845 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:43:47,846 INFO L432 NwaCegarLoop]: 192 mSDtfsCounter, 75 mSDsluCounter, 117 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 309 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:47,846 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 309 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:43:47,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9297 states. [2024-11-13 23:43:48,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9297 to 8023. [2024-11-13 23:43:48,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8023 states, 6794 states have (on average 1.3641448336767736) internal successors, (9268), 6817 states have internal predecessors, (9268), 676 states have call successors, (676), 552 states have call predecessors, (676), 552 states have return successors, (982), 654 states have call predecessors, (982), 674 states have call successors, (982) [2024-11-13 23:43:48,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8023 states to 8023 states and 10926 transitions. [2024-11-13 23:43:48,655 INFO L78 Accepts]: Start accepts. Automaton has 8023 states and 10926 transitions. Word has length 117 [2024-11-13 23:43:48,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:48,656 INFO L471 AbstractCegarLoop]: Abstraction has 8023 states and 10926 transitions. [2024-11-13 23:43:48,657 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-13 23:43:48,657 INFO L276 IsEmpty]: Start isEmpty. Operand 8023 states and 10926 transitions. [2024-11-13 23:43:48,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-11-13 23:43:48,671 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:48,671 INFO L215 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:48,693 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-13 23:43:48,875 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2024-11-13 23:43:48,875 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:48,876 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:48,876 INFO L85 PathProgramCache]: Analyzing trace with hash 965453368, now seen corresponding path program 1 times [2024-11-13 23:43:48,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:48,876 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [617478654] [2024-11-13 23:43:48,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:48,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:48,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:49,259 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 12 proven. 26 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2024-11-13 23:43:49,259 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:49,259 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [617478654] [2024-11-13 23:43:49,260 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [617478654] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:49,260 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1862345374] [2024-11-13 23:43:49,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:49,260 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:49,260 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:49,265 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:49,267 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-13 23:43:49,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:49,447 INFO L255 TraceCheckSpWp]: Trace formula consists of 569 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-13 23:43:49,450 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:49,568 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 62 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-13 23:43:49,571 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:49,572 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1862345374] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:49,572 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:49,572 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [6] total 11 [2024-11-13 23:43:49,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1838045653] [2024-11-13 23:43:49,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:49,573 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 23:43:49,573 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:49,573 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 23:43:49,573 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2024-11-13 23:43:49,573 INFO L87 Difference]: Start difference. First operand 8023 states and 10926 transitions. Second operand has 7 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (16), 3 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2024-11-13 23:43:50,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:50,503 INFO L93 Difference]: Finished difference Result 15107 states and 20714 transitions. [2024-11-13 23:43:50,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 23:43:50,504 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (16), 3 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) Word has length 121 [2024-11-13 23:43:50,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:50,539 INFO L225 Difference]: With dead ends: 15107 [2024-11-13 23:43:50,539 INFO L226 Difference]: Without dead ends: 8118 [2024-11-13 23:43:50,553 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2024-11-13 23:43:50,554 INFO L432 NwaCegarLoop]: 168 mSDtfsCounter, 106 mSDsluCounter, 501 mSDsCounter, 0 mSdLazyCounter, 175 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 107 SdHoareTripleChecker+Valid, 669 SdHoareTripleChecker+Invalid, 178 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 175 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:50,554 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [107 Valid, 669 Invalid, 178 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 175 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 23:43:50,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8118 states. [2024-11-13 23:43:51,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8118 to 7767. [2024-11-13 23:43:51,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7767 states, 6596 states have (on average 1.369011522134627) internal successors, (9030), 6616 states have internal predecessors, (9030), 643 states have call successors, (643), 527 states have call predecessors, (643), 527 states have return successors, (917), 624 states have call predecessors, (917), 641 states have call successors, (917) [2024-11-13 23:43:51,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7767 states to 7767 states and 10590 transitions. [2024-11-13 23:43:51,606 INFO L78 Accepts]: Start accepts. Automaton has 7767 states and 10590 transitions. Word has length 121 [2024-11-13 23:43:51,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:51,606 INFO L471 AbstractCegarLoop]: Abstraction has 7767 states and 10590 transitions. [2024-11-13 23:43:51,606 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (16), 3 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2024-11-13 23:43:51,607 INFO L276 IsEmpty]: Start isEmpty. Operand 7767 states and 10590 transitions. [2024-11-13 23:43:51,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-13 23:43:51,621 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:51,621 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:51,642 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-13 23:43:51,821 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2024-11-13 23:43:51,822 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:51,822 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:51,822 INFO L85 PathProgramCache]: Analyzing trace with hash 1602137025, now seen corresponding path program 1 times [2024-11-13 23:43:51,822 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:51,822 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1462001618] [2024-11-13 23:43:51,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:51,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:51,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:52,070 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 19 proven. 27 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-11-13 23:43:52,071 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:52,071 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1462001618] [2024-11-13 23:43:52,071 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1462001618] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:52,071 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [533129139] [2024-11-13 23:43:52,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:52,071 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:52,072 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:52,074 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:52,078 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-13 23:43:52,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:52,246 INFO L255 TraceCheckSpWp]: Trace formula consists of 509 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-13 23:43:52,251 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:52,375 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 56 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-11-13 23:43:52,376 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:52,376 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [533129139] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:52,376 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:52,377 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6] total 9 [2024-11-13 23:43:52,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1567231529] [2024-11-13 23:43:52,377 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:52,377 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 23:43:52,378 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:52,379 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 23:43:52,379 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2024-11-13 23:43:52,380 INFO L87 Difference]: Start difference. First operand 7767 states and 10590 transitions. Second operand has 5 states, 5 states have (on average 15.6) internal successors, (78), 5 states have internal predecessors, (78), 4 states have call successors, (11), 4 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-13 23:43:53,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:53,747 INFO L93 Difference]: Finished difference Result 17789 states and 24188 transitions. [2024-11-13 23:43:53,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 23:43:53,748 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 15.6) internal successors, (78), 5 states have internal predecessors, (78), 4 states have call successors, (11), 4 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 117 [2024-11-13 23:43:53,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:53,778 INFO L225 Difference]: With dead ends: 17789 [2024-11-13 23:43:53,779 INFO L226 Difference]: Without dead ends: 8246 [2024-11-13 23:43:53,792 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-13 23:43:53,793 INFO L432 NwaCegarLoop]: 174 mSDtfsCounter, 89 mSDsluCounter, 317 mSDsCounter, 0 mSdLazyCounter, 262 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 94 SdHoareTripleChecker+Valid, 491 SdHoareTripleChecker+Invalid, 288 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 262 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:53,793 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [94 Valid, 491 Invalid, 288 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 262 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 23:43:53,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8246 states. [2024-11-13 23:43:54,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8246 to 7768. [2024-11-13 23:43:54,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7768 states, 6450 states have (on average 1.3376744186046512) internal successors, (8628), 6473 states have internal predecessors, (8628), 745 states have call successors, (745), 583 states have call predecessors, (745), 572 states have return successors, (1050), 712 states have call predecessors, (1050), 743 states have call successors, (1050) [2024-11-13 23:43:54,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7768 states to 7768 states and 10423 transitions. [2024-11-13 23:43:54,500 INFO L78 Accepts]: Start accepts. Automaton has 7768 states and 10423 transitions. Word has length 117 [2024-11-13 23:43:54,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:54,500 INFO L471 AbstractCegarLoop]: Abstraction has 7768 states and 10423 transitions. [2024-11-13 23:43:54,501 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 15.6) internal successors, (78), 5 states have internal predecessors, (78), 4 states have call successors, (11), 4 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-13 23:43:54,501 INFO L276 IsEmpty]: Start isEmpty. Operand 7768 states and 10423 transitions. [2024-11-13 23:43:54,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-13 23:43:54,512 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:54,513 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:54,538 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-13 23:43:54,717 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2024-11-13 23:43:54,717 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:54,718 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:54,718 INFO L85 PathProgramCache]: Analyzing trace with hash 691564184, now seen corresponding path program 1 times [2024-11-13 23:43:54,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:54,718 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235095971] [2024-11-13 23:43:54,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:54,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:54,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:54,937 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 17 proven. 25 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-11-13 23:43:54,938 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:54,938 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235095971] [2024-11-13 23:43:54,938 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [235095971] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:54,938 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2099899496] [2024-11-13 23:43:54,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:54,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:54,938 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:54,941 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:54,944 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-13 23:43:55,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:55,125 INFO L255 TraceCheckSpWp]: Trace formula consists of 523 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-13 23:43:55,128 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:55,404 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 53 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-11-13 23:43:55,404 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:55,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2099899496] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:55,405 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:55,406 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6] total 10 [2024-11-13 23:43:55,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [612783286] [2024-11-13 23:43:55,406 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:55,406 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 23:43:55,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:55,407 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 23:43:55,407 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2024-11-13 23:43:55,408 INFO L87 Difference]: Start difference. First operand 7768 states and 10423 transitions. Second operand has 6 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 2 states have call successors, (11), 3 states have call predecessors, (11), 4 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-13 23:43:56,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:56,552 INFO L93 Difference]: Finished difference Result 13367 states and 18279 transitions. [2024-11-13 23:43:56,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 23:43:56,553 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 2 states have call successors, (11), 3 states have call predecessors, (11), 4 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 119 [2024-11-13 23:43:56,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:56,590 INFO L225 Difference]: With dead ends: 13367 [2024-11-13 23:43:56,591 INFO L226 Difference]: Without dead ends: 8425 [2024-11-13 23:43:56,603 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2024-11-13 23:43:56,604 INFO L432 NwaCegarLoop]: 76 mSDtfsCounter, 155 mSDsluCounter, 109 mSDsCounter, 0 mSdLazyCounter, 227 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 164 SdHoareTripleChecker+Valid, 185 SdHoareTripleChecker+Invalid, 279 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 227 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:56,604 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [164 Valid, 185 Invalid, 279 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 227 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 23:43:56,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8425 states. [2024-11-13 23:43:57,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8425 to 8272. [2024-11-13 23:43:57,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8272 states, 6903 states have (on average 1.3207301173402868) internal successors, (9117), 6926 states have internal predecessors, (9117), 753 states have call successors, (753), 619 states have call predecessors, (753), 615 states have return successors, (1060), 727 states have call predecessors, (1060), 751 states have call successors, (1060) [2024-11-13 23:43:57,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8272 states to 8272 states and 10930 transitions. [2024-11-13 23:43:57,468 INFO L78 Accepts]: Start accepts. Automaton has 8272 states and 10930 transitions. Word has length 119 [2024-11-13 23:43:57,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:43:57,469 INFO L471 AbstractCegarLoop]: Abstraction has 8272 states and 10930 transitions. [2024-11-13 23:43:57,469 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 2 states have call successors, (11), 3 states have call predecessors, (11), 4 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-13 23:43:57,469 INFO L276 IsEmpty]: Start isEmpty. Operand 8272 states and 10930 transitions. [2024-11-13 23:43:57,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-13 23:43:57,478 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:43:57,479 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:43:57,502 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-11-13 23:43:57,683 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2024-11-13 23:43:57,683 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:43:57,684 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:43:57,684 INFO L85 PathProgramCache]: Analyzing trace with hash -1522663688, now seen corresponding path program 1 times [2024-11-13 23:43:57,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:43:57,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834570207] [2024-11-13 23:43:57,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:57,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:43:57,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:57,857 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 17 proven. 27 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-11-13 23:43:57,857 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:43:57,857 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834570207] [2024-11-13 23:43:57,857 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834570207] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:43:57,857 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1984012615] [2024-11-13 23:43:57,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:43:57,858 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:43:57,858 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:43:57,859 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:43:57,866 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-13 23:43:58,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:43:58,012 INFO L255 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-13 23:43:58,015 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:43:58,075 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 73 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-13 23:43:58,075 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:43:58,075 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1984012615] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:43:58,075 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:43:58,075 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2024-11-13 23:43:58,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189006203] [2024-11-13 23:43:58,076 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:43:58,076 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:43:58,076 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:43:58,077 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:43:58,077 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:43:58,077 INFO L87 Difference]: Start difference. First operand 8272 states and 10930 transitions. Second operand has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-13 23:43:58,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:43:58,959 INFO L93 Difference]: Finished difference Result 13477 states and 18308 transitions. [2024-11-13 23:43:58,959 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:43:58,960 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 119 [2024-11-13 23:43:58,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:43:59,000 INFO L225 Difference]: With dead ends: 13477 [2024-11-13 23:43:59,000 INFO L226 Difference]: Without dead ends: 8269 [2024-11-13 23:43:59,014 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:43:59,014 INFO L432 NwaCegarLoop]: 200 mSDtfsCounter, 99 mSDsluCounter, 105 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 305 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:43:59,015 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [99 Valid, 305 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:43:59,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8269 states. [2024-11-13 23:44:00,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8269 to 8161. [2024-11-13 23:44:00,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8161 states, 6794 states have (on average 1.2929055048572269) internal successors, (8784), 6817 states have internal predecessors, (8784), 752 states have call successors, (752), 618 states have call predecessors, (752), 614 states have return successors, (1059), 726 states have call predecessors, (1059), 750 states have call successors, (1059) [2024-11-13 23:44:00,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8161 states to 8161 states and 10595 transitions. [2024-11-13 23:44:00,258 INFO L78 Accepts]: Start accepts. Automaton has 8161 states and 10595 transitions. Word has length 119 [2024-11-13 23:44:00,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:44:00,259 INFO L471 AbstractCegarLoop]: Abstraction has 8161 states and 10595 transitions. [2024-11-13 23:44:00,259 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-13 23:44:00,259 INFO L276 IsEmpty]: Start isEmpty. Operand 8161 states and 10595 transitions. [2024-11-13 23:44:00,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2024-11-13 23:44:00,270 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:44:00,271 INFO L215 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:44:00,294 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-11-13 23:44:00,475 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:00,475 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:44:00,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:44:00,476 INFO L85 PathProgramCache]: Analyzing trace with hash 492554470, now seen corresponding path program 1 times [2024-11-13 23:44:00,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:44:00,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [614315964] [2024-11-13 23:44:00,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:00,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:44:00,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:00,918 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 12 proven. 26 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2024-11-13 23:44:00,919 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:44:00,919 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [614315964] [2024-11-13 23:44:00,919 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [614315964] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:44:00,920 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [509936419] [2024-11-13 23:44:00,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:00,920 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:00,920 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:44:00,922 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:44:00,925 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-13 23:44:01,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:01,124 INFO L255 TraceCheckSpWp]: Trace formula consists of 578 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-13 23:44:01,129 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:44:01,542 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 62 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-13 23:44:01,542 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:44:01,542 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [509936419] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:44:01,542 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:44:01,543 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [6] total 13 [2024-11-13 23:44:01,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1615631314] [2024-11-13 23:44:01,543 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:44:01,543 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-13 23:44:01,543 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:44:01,544 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-13 23:44:01,544 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2024-11-13 23:44:01,545 INFO L87 Difference]: Start difference. First operand 8161 states and 10595 transitions. Second operand has 9 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 3 states have call successors, (16), 5 states have call predecessors, (16), 6 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2024-11-13 23:44:03,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:44:03,330 INFO L93 Difference]: Finished difference Result 16007 states and 20593 transitions. [2024-11-13 23:44:03,330 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-13 23:44:03,331 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 3 states have call successors, (16), 5 states have call predecessors, (16), 6 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) Word has length 124 [2024-11-13 23:44:03,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:44:03,366 INFO L225 Difference]: With dead ends: 16007 [2024-11-13 23:44:03,366 INFO L226 Difference]: Without dead ends: 9022 [2024-11-13 23:44:03,379 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=89, Invalid=291, Unknown=0, NotChecked=0, Total=380 [2024-11-13 23:44:03,380 INFO L432 NwaCegarLoop]: 75 mSDtfsCounter, 461 mSDsluCounter, 267 mSDsCounter, 0 mSdLazyCounter, 471 mSolverCounterSat, 150 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 478 SdHoareTripleChecker+Valid, 342 SdHoareTripleChecker+Invalid, 621 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 150 IncrementalHoareTripleChecker+Valid, 471 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 23:44:03,383 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [478 Valid, 342 Invalid, 621 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [150 Valid, 471 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 23:44:03,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9022 states. [2024-11-13 23:44:04,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9022 to 8309. [2024-11-13 23:44:04,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8309 states, 6945 states have (on average 1.2758819294456443) internal successors, (8861), 6977 states have internal predecessors, (8861), 735 states have call successors, (735), 613 states have call predecessors, (735), 628 states have return successors, (929), 719 states have call predecessors, (929), 733 states have call successors, (929) [2024-11-13 23:44:04,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8309 states to 8309 states and 10525 transitions. [2024-11-13 23:44:04,291 INFO L78 Accepts]: Start accepts. Automaton has 8309 states and 10525 transitions. Word has length 124 [2024-11-13 23:44:04,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:44:04,291 INFO L471 AbstractCegarLoop]: Abstraction has 8309 states and 10525 transitions. [2024-11-13 23:44:04,291 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 3 states have call successors, (16), 5 states have call predecessors, (16), 6 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2024-11-13 23:44:04,291 INFO L276 IsEmpty]: Start isEmpty. Operand 8309 states and 10525 transitions. [2024-11-13 23:44:04,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-11-13 23:44:04,297 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:44:04,297 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:44:04,322 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-11-13 23:44:04,497 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:04,498 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:44:04,498 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:44:04,498 INFO L85 PathProgramCache]: Analyzing trace with hash -774439596, now seen corresponding path program 1 times [2024-11-13 23:44:04,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:44:04,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383536369] [2024-11-13 23:44:04,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:04,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:44:04,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:04,677 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 17 proven. 27 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-11-13 23:44:04,678 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:44:04,678 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1383536369] [2024-11-13 23:44:04,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1383536369] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:44:04,678 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1809503111] [2024-11-13 23:44:04,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:04,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:04,678 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:44:04,681 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:44:04,683 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-13 23:44:04,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:04,849 INFO L255 TraceCheckSpWp]: Trace formula consists of 521 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-13 23:44:04,852 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:44:04,962 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 79 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 23:44:04,963 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:44:04,963 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1809503111] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:44:04,963 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:44:04,963 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6] total 9 [2024-11-13 23:44:04,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [475357357] [2024-11-13 23:44:04,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:44:04,964 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 23:44:04,964 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:44:04,965 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 23:44:04,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2024-11-13 23:44:04,965 INFO L87 Difference]: Start difference. First operand 8309 states and 10525 transitions. Second operand has 5 states, 5 states have (on average 19.6) internal successors, (98), 5 states have internal predecessors, (98), 4 states have call successors, (12), 4 states have call predecessors, (12), 4 states have return successors, (11), 4 states have call predecessors, (11), 4 states have call successors, (11) [2024-11-13 23:44:06,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:44:06,027 INFO L93 Difference]: Finished difference Result 14664 states and 18741 transitions. [2024-11-13 23:44:06,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 23:44:06,027 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 19.6) internal successors, (98), 5 states have internal predecessors, (98), 4 states have call successors, (12), 4 states have call predecessors, (12), 4 states have return successors, (11), 4 states have call predecessors, (11), 4 states have call successors, (11) Word has length 121 [2024-11-13 23:44:06,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:44:06,062 INFO L225 Difference]: With dead ends: 14664 [2024-11-13 23:44:06,062 INFO L226 Difference]: Without dead ends: 8576 [2024-11-13 23:44:06,073 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-13 23:44:06,075 INFO L432 NwaCegarLoop]: 181 mSDtfsCounter, 100 mSDsluCounter, 315 mSDsCounter, 0 mSdLazyCounter, 263 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 496 SdHoareTripleChecker+Invalid, 290 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 263 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 23:44:06,075 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [105 Valid, 496 Invalid, 290 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 263 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 23:44:06,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8576 states. [2024-11-13 23:44:06,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8576 to 7842. [2024-11-13 23:44:06,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7842 states, 6473 states have (on average 1.2672640197744478) internal successors, (8203), 6519 states have internal predecessors, (8203), 727 states have call successors, (727), 598 states have call predecessors, (727), 641 states have return successors, (1021), 725 states have call predecessors, (1021), 725 states have call successors, (1021) [2024-11-13 23:44:06,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7842 states to 7842 states and 9951 transitions. [2024-11-13 23:44:06,824 INFO L78 Accepts]: Start accepts. Automaton has 7842 states and 9951 transitions. Word has length 121 [2024-11-13 23:44:06,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:44:06,824 INFO L471 AbstractCegarLoop]: Abstraction has 7842 states and 9951 transitions. [2024-11-13 23:44:06,824 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 19.6) internal successors, (98), 5 states have internal predecessors, (98), 4 states have call successors, (12), 4 states have call predecessors, (12), 4 states have return successors, (11), 4 states have call predecessors, (11), 4 states have call successors, (11) [2024-11-13 23:44:06,824 INFO L276 IsEmpty]: Start isEmpty. Operand 7842 states and 9951 transitions. [2024-11-13 23:44:06,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2024-11-13 23:44:06,831 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:44:06,831 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:44:06,852 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-11-13 23:44:07,031 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:07,031 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:44:07,032 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:44:07,032 INFO L85 PathProgramCache]: Analyzing trace with hash -149702811, now seen corresponding path program 1 times [2024-11-13 23:44:07,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:44:07,032 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839655569] [2024-11-13 23:44:07,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:07,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:44:07,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:07,127 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 26 proven. 4 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked. [2024-11-13 23:44:07,127 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:44:07,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [839655569] [2024-11-13 23:44:07,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [839655569] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:44:07,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [607609067] [2024-11-13 23:44:07,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:07,128 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:07,128 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:44:07,130 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:44:07,135 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-13 23:44:07,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:07,306 INFO L255 TraceCheckSpWp]: Trace formula consists of 613 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-13 23:44:07,309 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:44:07,347 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 94 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-11-13 23:44:07,347 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:44:07,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [607609067] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:44:07,348 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:44:07,348 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2024-11-13 23:44:07,348 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1506785727] [2024-11-13 23:44:07,348 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:44:07,348 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:44:07,349 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:44:07,349 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:44:07,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:44:07,349 INFO L87 Difference]: Start difference. First operand 7842 states and 9951 transitions. Second operand has 3 states, 3 states have (on average 31.666666666666668) internal successors, (95), 3 states have internal predecessors, (95), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-13 23:44:08,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:44:08,434 INFO L93 Difference]: Finished difference Result 17672 states and 22718 transitions. [2024-11-13 23:44:08,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:44:08,435 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.666666666666668) internal successors, (95), 3 states have internal predecessors, (95), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 147 [2024-11-13 23:44:08,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:44:08,493 INFO L225 Difference]: With dead ends: 17672 [2024-11-13 23:44:08,493 INFO L226 Difference]: Without dead ends: 11158 [2024-11-13 23:44:08,510 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:44:08,513 INFO L432 NwaCegarLoop]: 184 mSDtfsCounter, 65 mSDsluCounter, 116 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 300 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:44:08,513 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [65 Valid, 300 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:44:08,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11158 states. [2024-11-13 23:44:09,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11158 to 9026. [2024-11-13 23:44:09,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9026 states, 7495 states have (on average 1.2691127418278854) internal successors, (9512), 7542 states have internal predecessors, (9512), 809 states have call successors, (809), 680 states have call predecessors, (809), 721 states have return successors, (1099), 804 states have call predecessors, (1099), 807 states have call successors, (1099) [2024-11-13 23:44:09,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9026 states to 9026 states and 11420 transitions. [2024-11-13 23:44:09,725 INFO L78 Accepts]: Start accepts. Automaton has 9026 states and 11420 transitions. Word has length 147 [2024-11-13 23:44:09,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:44:09,726 INFO L471 AbstractCegarLoop]: Abstraction has 9026 states and 11420 transitions. [2024-11-13 23:44:09,726 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.666666666666668) internal successors, (95), 3 states have internal predecessors, (95), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-13 23:44:09,726 INFO L276 IsEmpty]: Start isEmpty. Operand 9026 states and 11420 transitions. [2024-11-13 23:44:09,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2024-11-13 23:44:09,737 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:44:09,737 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:44:09,760 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2024-11-13 23:44:09,938 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:09,938 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:44:09,939 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:44:09,939 INFO L85 PathProgramCache]: Analyzing trace with hash -21668625, now seen corresponding path program 1 times [2024-11-13 23:44:09,939 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:44:09,939 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600126210] [2024-11-13 23:44:09,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:09,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:44:09,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:10,005 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 39 proven. 17 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-11-13 23:44:10,006 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:44:10,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600126210] [2024-11-13 23:44:10,006 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1600126210] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:44:10,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [245559987] [2024-11-13 23:44:10,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:10,006 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:10,007 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:44:10,009 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:44:10,011 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-13 23:44:10,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:10,188 INFO L255 TraceCheckSpWp]: Trace formula consists of 621 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-13 23:44:10,191 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:44:10,248 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 96 proven. 0 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-11-13 23:44:10,249 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:44:10,249 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [245559987] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:44:10,249 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:44:10,249 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 4 [2024-11-13 23:44:10,249 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818272909] [2024-11-13 23:44:10,249 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:44:10,250 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:44:10,250 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:44:10,251 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:44:10,251 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 23:44:10,251 INFO L87 Difference]: Start difference. First operand 9026 states and 11420 transitions. Second operand has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-13 23:44:11,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:44:11,102 INFO L93 Difference]: Finished difference Result 16635 states and 21728 transitions. [2024-11-13 23:44:11,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:44:11,103 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 150 [2024-11-13 23:44:11,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:44:11,140 INFO L225 Difference]: With dead ends: 16635 [2024-11-13 23:44:11,140 INFO L226 Difference]: Without dead ends: 8896 [2024-11-13 23:44:11,153 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 151 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 23:44:11,154 INFO L432 NwaCegarLoop]: 192 mSDtfsCounter, 97 mSDsluCounter, 89 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 97 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:44:11,154 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [97 Valid, 281 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 59 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:44:11,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8896 states. [2024-11-13 23:44:11,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8896 to 8786. [2024-11-13 23:44:11,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8786 states, 7265 states have (on average 1.2291810048176188) internal successors, (8930), 7312 states have internal predecessors, (8930), 804 states have call successors, (804), 675 states have call predecessors, (804), 716 states have return successors, (1094), 799 states have call predecessors, (1094), 802 states have call successors, (1094) [2024-11-13 23:44:11,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8786 states to 8786 states and 10828 transitions. [2024-11-13 23:44:11,993 INFO L78 Accepts]: Start accepts. Automaton has 8786 states and 10828 transitions. Word has length 150 [2024-11-13 23:44:11,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:44:11,994 INFO L471 AbstractCegarLoop]: Abstraction has 8786 states and 10828 transitions. [2024-11-13 23:44:11,994 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-13 23:44:11,994 INFO L276 IsEmpty]: Start isEmpty. Operand 8786 states and 10828 transitions. [2024-11-13 23:44:11,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2024-11-13 23:44:11,999 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:44:12,000 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:44:12,013 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2024-11-13 23:44:12,200 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:12,200 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:44:12,200 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:44:12,201 INFO L85 PathProgramCache]: Analyzing trace with hash -19605810, now seen corresponding path program 1 times [2024-11-13 23:44:12,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:44:12,201 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [548038578] [2024-11-13 23:44:12,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:12,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:44:12,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:12,344 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 34 proven. 20 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-11-13 23:44:12,345 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:44:12,345 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [548038578] [2024-11-13 23:44:12,345 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [548038578] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:44:12,345 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [449868476] [2024-11-13 23:44:12,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:12,345 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:12,345 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:44:12,347 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:44:12,351 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-13 23:44:12,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:12,517 INFO L255 TraceCheckSpWp]: Trace formula consists of 630 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-13 23:44:12,521 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:44:12,606 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 87 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-13 23:44:12,607 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:44:12,607 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [449868476] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:44:12,607 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:44:12,607 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 6 [2024-11-13 23:44:12,607 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1796598394] [2024-11-13 23:44:12,608 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:44:12,608 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-13 23:44:12,608 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:44:12,609 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 23:44:12,609 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:44:12,609 INFO L87 Difference]: Start difference. First operand 8786 states and 10828 transitions. Second operand has 3 states, 3 states have (on average 33.333333333333336) internal successors, (100), 3 states have internal predecessors, (100), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-13 23:44:14,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:44:14,005 INFO L93 Difference]: Finished difference Result 16903 states and 21294 transitions. [2024-11-13 23:44:14,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 23:44:14,005 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 33.333333333333336) internal successors, (100), 3 states have internal predecessors, (100), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 150 [2024-11-13 23:44:14,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:44:14,047 INFO L225 Difference]: With dead ends: 16903 [2024-11-13 23:44:14,047 INFO L226 Difference]: Without dead ends: 9526 [2024-11-13 23:44:14,065 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 152 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:44:14,066 INFO L432 NwaCegarLoop]: 129 mSDtfsCounter, 86 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 86 SdHoareTripleChecker+Valid, 158 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 23:44:14,066 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [86 Valid, 158 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 23:44:14,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9526 states. [2024-11-13 23:44:15,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9526 to 9283. [2024-11-13 23:44:15,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9283 states, 7730 states have (on average 1.203751617076326) internal successors, (9305), 7785 states have internal predecessors, (9305), 804 states have call successors, (804), 699 states have call predecessors, (804), 748 states have return successors, (1131), 799 states have call predecessors, (1131), 802 states have call successors, (1131) [2024-11-13 23:44:15,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9283 states to 9283 states and 11240 transitions. [2024-11-13 23:44:15,212 INFO L78 Accepts]: Start accepts. Automaton has 9283 states and 11240 transitions. Word has length 150 [2024-11-13 23:44:15,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:44:15,213 INFO L471 AbstractCegarLoop]: Abstraction has 9283 states and 11240 transitions. [2024-11-13 23:44:15,213 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 33.333333333333336) internal successors, (100), 3 states have internal predecessors, (100), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-13 23:44:15,213 INFO L276 IsEmpty]: Start isEmpty. Operand 9283 states and 11240 transitions. [2024-11-13 23:44:15,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2024-11-13 23:44:15,219 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:44:15,219 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:44:15,236 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2024-11-13 23:44:15,419 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:15,420 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:44:15,420 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:44:15,420 INFO L85 PathProgramCache]: Analyzing trace with hash 349877700, now seen corresponding path program 1 times [2024-11-13 23:44:15,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:44:15,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [438139412] [2024-11-13 23:44:15,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:15,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:44:15,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:15,638 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 47 proven. 36 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2024-11-13 23:44:15,638 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:44:15,638 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [438139412] [2024-11-13 23:44:15,638 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [438139412] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 23:44:15,638 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1910291955] [2024-11-13 23:44:15,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:15,639 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 23:44:15,639 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-13 23:44:15,641 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 23:44:15,643 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-13 23:44:15,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:15,849 INFO L255 TraceCheckSpWp]: Trace formula consists of 627 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-13 23:44:15,853 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 23:44:15,947 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-11-13 23:44:15,947 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 23:44:15,947 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1910291955] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:44:15,947 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 23:44:15,947 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2024-11-13 23:44:15,948 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [287429807] [2024-11-13 23:44:15,948 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:44:15,948 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 23:44:15,948 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:44:15,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 23:44:15,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 23:44:15,949 INFO L87 Difference]: Start difference. First operand 9283 states and 11240 transitions. Second operand has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 4 states have call successors, (13), 4 states have call predecessors, (13), 4 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-11-13 23:44:17,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:44:17,797 INFO L93 Difference]: Finished difference Result 22074 states and 26864 transitions. [2024-11-13 23:44:17,798 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 23:44:17,798 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 4 states have call successors, (13), 4 states have call predecessors, (13), 4 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) Word has length 153 [2024-11-13 23:44:17,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:44:17,840 INFO L225 Difference]: With dead ends: 22074 [2024-11-13 23:44:17,840 INFO L226 Difference]: Without dead ends: 14297 [2024-11-13 23:44:17,851 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 159 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2024-11-13 23:44:17,852 INFO L432 NwaCegarLoop]: 177 mSDtfsCounter, 96 mSDsluCounter, 225 mSDsCounter, 0 mSdLazyCounter, 206 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 101 SdHoareTripleChecker+Valid, 402 SdHoareTripleChecker+Invalid, 234 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 206 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 23:44:17,852 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [101 Valid, 402 Invalid, 234 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 206 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 23:44:17,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14297 states. [2024-11-13 23:44:19,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14297 to 13120. [2024-11-13 23:44:19,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13120 states, 10819 states have (on average 1.1808854792494685) internal successors, (12776), 10900 states have internal predecessors, (12776), 1207 states have call successors, (1207), 1023 states have call predecessors, (1207), 1093 states have return successors, (1805), 1197 states have call predecessors, (1805), 1205 states have call successors, (1805) [2024-11-13 23:44:19,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13120 states to 13120 states and 15788 transitions. [2024-11-13 23:44:19,610 INFO L78 Accepts]: Start accepts. Automaton has 13120 states and 15788 transitions. Word has length 153 [2024-11-13 23:44:19,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:44:19,611 INFO L471 AbstractCegarLoop]: Abstraction has 13120 states and 15788 transitions. [2024-11-13 23:44:19,611 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 4 states have call successors, (13), 4 states have call predecessors, (13), 4 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-11-13 23:44:19,611 INFO L276 IsEmpty]: Start isEmpty. Operand 13120 states and 15788 transitions. [2024-11-13 23:44:19,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2024-11-13 23:44:19,625 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:44:19,626 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:44:19,668 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2024-11-13 23:44:19,826 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2024-11-13 23:44:19,827 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:44:19,828 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:44:19,828 INFO L85 PathProgramCache]: Analyzing trace with hash 1391916524, now seen corresponding path program 1 times [2024-11-13 23:44:19,828 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:44:19,829 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811397760] [2024-11-13 23:44:19,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:19,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:44:19,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 23:44:20,147 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 175 trivial. 0 not checked. [2024-11-13 23:44:20,147 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-13 23:44:20,147 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811397760] [2024-11-13 23:44:20,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [811397760] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 23:44:20,148 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 23:44:20,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 23:44:20,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [334451381] [2024-11-13 23:44:20,148 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 23:44:20,149 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 23:44:20,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-13 23:44:20,149 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 23:44:20,149 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:44:20,150 INFO L87 Difference]: Start difference. First operand 13120 states and 15788 transitions. Second operand has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 6 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 5 states have call predecessors, (11), 5 states have call successors, (11) [2024-11-13 23:44:25,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 23:44:25,982 INFO L93 Difference]: Finished difference Result 51321 states and 61655 transitions. [2024-11-13 23:44:25,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 23:44:25,982 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 6 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 5 states have call predecessors, (11), 5 states have call successors, (11) Word has length 182 [2024-11-13 23:44:25,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 23:44:26,149 INFO L225 Difference]: With dead ends: 51321 [2024-11-13 23:44:26,149 INFO L226 Difference]: Without dead ends: 45221 [2024-11-13 23:44:26,179 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 23:44:26,179 INFO L432 NwaCegarLoop]: 379 mSDtfsCounter, 405 mSDsluCounter, 837 mSDsCounter, 0 mSdLazyCounter, 628 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 405 SdHoareTripleChecker+Valid, 1216 SdHoareTripleChecker+Invalid, 638 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 628 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 23:44:26,180 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [405 Valid, 1216 Invalid, 638 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 628 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 23:44:26,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45221 states. [2024-11-13 23:44:30,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45221 to 35263. [2024-11-13 23:44:30,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35263 states, 29004 states have (on average 1.1853192663080954) internal successors, (34379), 29190 states have internal predecessors, (34379), 3300 states have call successors, (3300), 2746 states have call predecessors, (3300), 2958 states have return successors, (4822), 3327 states have call predecessors, (4822), 3298 states have call successors, (4822) [2024-11-13 23:44:30,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35263 states to 35263 states and 42501 transitions. [2024-11-13 23:44:31,009 INFO L78 Accepts]: Start accepts. Automaton has 35263 states and 42501 transitions. Word has length 182 [2024-11-13 23:44:31,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 23:44:31,010 INFO L471 AbstractCegarLoop]: Abstraction has 35263 states and 42501 transitions. [2024-11-13 23:44:31,010 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 6 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 5 states have call predecessors, (11), 5 states have call successors, (11) [2024-11-13 23:44:31,010 INFO L276 IsEmpty]: Start isEmpty. Operand 35263 states and 42501 transitions. [2024-11-13 23:44:31,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2024-11-13 23:44:31,042 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 23:44:31,042 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:44:31,042 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-13 23:44:31,042 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 23:44:31,043 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 23:44:31,043 INFO L85 PathProgramCache]: Analyzing trace with hash 954626569, now seen corresponding path program 1 times [2024-11-13 23:44:31,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-13 23:44:31,043 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [779432788] [2024-11-13 23:44:31,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 23:44:31,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 23:44:31,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 23:44:31,089 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 23:44:31,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 23:44:31,361 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2024-11-13 23:44:31,361 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-13 23:44:31,363 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location error2Err0ASSERT_VIOLATIONERROR_FUNCTION (1 of 2 remaining) [2024-11-13 23:44:31,366 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location error1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 2 remaining) [2024-11-13 23:44:31,367 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-13 23:44:31,371 INFO L407 BasicCegarLoop]: Path program histogram: [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 23:44:31,716 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-13 23:44:31,723 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.11 11:44:31 BoogieIcfgContainer [2024-11-13 23:44:31,723 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-13 23:44:31,724 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-13 23:44:31,726 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-13 23:44:31,726 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-13 23:44:31,727 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 11:43:28" (3/4) ... [2024-11-13 23:44:31,729 INFO L136 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-13 23:44:32,071 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/witness.graphml [2024-11-13 23:44:32,072 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-13 23:44:32,073 INFO L158 Benchmark]: Toolchain (without parser) took 65257.54ms. Allocated memory was 117.4MB in the beginning and 5.1GB in the end (delta: 4.9GB). Free memory was 92.8MB in the beginning and 4.7GB in the end (delta: -4.6GB). Peak memory consumption was 296.7MB. Max. memory is 16.1GB. [2024-11-13 23:44:32,076 INFO L158 Benchmark]: CDTParser took 1.02ms. Allocated memory is still 167.8MB. Free memory is still 104.0MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 23:44:32,076 INFO L158 Benchmark]: CACSL2BoogieTranslator took 609.56ms. Allocated memory is still 117.4MB. Free memory was 92.8MB in the beginning and 74.3MB in the end (delta: 18.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-11-13 23:44:32,076 INFO L158 Benchmark]: Boogie Procedure Inliner took 81.22ms. Allocated memory is still 117.4MB. Free memory was 74.3MB in the beginning and 71.5MB in the end (delta: 2.7MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 23:44:32,077 INFO L158 Benchmark]: Boogie Preprocessor took 69.53ms. Allocated memory is still 117.4MB. Free memory was 71.5MB in the beginning and 68.7MB in the end (delta: 2.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-13 23:44:32,077 INFO L158 Benchmark]: RCFGBuilder took 1358.61ms. Allocated memory was 117.4MB in the beginning and 352.3MB in the end (delta: 234.9MB). Free memory was 68.7MB in the beginning and 321.5MB in the end (delta: -252.8MB). Peak memory consumption was 37.5MB. Max. memory is 16.1GB. [2024-11-13 23:44:32,077 INFO L158 Benchmark]: TraceAbstraction took 62783.40ms. Allocated memory was 352.3MB in the beginning and 5.1GB in the end (delta: 4.7GB). Free memory was 321.5MB in the beginning and 4.8GB in the end (delta: -4.4GB). Peak memory consumption was 256.7MB. Max. memory is 16.1GB. [2024-11-13 23:44:32,077 INFO L158 Benchmark]: Witness Printer took 347.78ms. Allocated memory is still 5.1GB. Free memory was 4.8GB in the beginning and 4.7GB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-13 23:44:32,079 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.02ms. Allocated memory is still 167.8MB. Free memory is still 104.0MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 609.56ms. Allocated memory is still 117.4MB. Free memory was 92.8MB in the beginning and 74.3MB in the end (delta: 18.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 81.22ms. Allocated memory is still 117.4MB. Free memory was 74.3MB in the beginning and 71.5MB in the end (delta: 2.7MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 69.53ms. Allocated memory is still 117.4MB. Free memory was 71.5MB in the beginning and 68.7MB in the end (delta: 2.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 1358.61ms. Allocated memory was 117.4MB in the beginning and 352.3MB in the end (delta: 234.9MB). Free memory was 68.7MB in the beginning and 321.5MB in the end (delta: -252.8MB). Peak memory consumption was 37.5MB. Max. memory is 16.1GB. * TraceAbstraction took 62783.40ms. Allocated memory was 352.3MB in the beginning and 5.1GB in the end (delta: 4.7GB). Free memory was 321.5MB in the beginning and 4.8GB in the end (delta: -4.4GB). Peak memory consumption was 256.7MB. Max. memory is 16.1GB. * Witness Printer took 347.78ms. Allocated memory is still 5.1GB. Free memory was 4.8GB in the beginning and 4.7GB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 599]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L32] int fast_clk_edge ; [L33] int slow_clk_edge ; [L34] int q_buf_0 ; [L35] int q_free ; [L36] int q_read_ev ; [L37] int q_write_ev ; [L38] int q_req_up ; [L39] int q_ev ; [L60] int p_num_write ; [L61] int p_last_write ; [L62] int p_dw_st ; [L63] int p_dw_pc ; [L64] int p_dw_i ; [L65] int c_num_read ; [L66] int c_last_read ; [L67] int c_dr_st ; [L68] int c_dr_pc ; [L69] int c_dr_i ; [L202] static int a_t ; [L352] static int t = 0; [L603] int m_pc = 0; [L604] int t1_pc = 0; [L605] int t2_pc = 0; [L606] int t3_pc = 0; [L607] int m_st ; [L608] int t1_st ; [L609] int t2_st ; [L610] int t3_st ; [L611] int m_i ; [L612] int t1_i ; [L613] int t2_i ; [L614] int t3_i ; [L615] int M_E = 2; [L616] int T1_E = 2; [L617] int T2_E = 2; [L618] int T3_E = 2; [L619] int E_M = 2; [L620] int E_1 = 2; [L621] int E_2 = 2; [L622] int E_3 = 2; [L628] int token ; [L630] int local ; [L1327] COND FALSE !(__VERIFIER_nondet_int()) [L1330] CALL main2() [L1314] int __retres1 ; [L1318] CALL init_model2() [L1227] m_i = 1 [L1228] t1_i = 1 [L1229] t2_i = 1 [L1230] t3_i = 1 [L1318] RET init_model2() [L1319] CALL start_simulation2() [L1255] int kernel_st ; [L1256] int tmp ; [L1257] int tmp___0 ; [L1261] kernel_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L1262] FCALL update_channels2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L1263] CALL init_threads2() [L883] COND TRUE m_i == 1 [L884] m_st = 0 [L888] COND TRUE t1_i == 1 [L889] t1_st = 0 [L893] COND TRUE t2_i == 1 [L894] t2_st = 0 [L898] COND TRUE t3_i == 1 [L899] t3_st = 0 [L1263] RET init_threads2() [L1264] CALL fire_delta_events2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, \old(T3_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L1020] COND FALSE !(M_E == 0) [L1025] COND FALSE !(T1_E == 0) [L1030] COND FALSE !(T2_E == 0) [L1035] COND FALSE !(T3_E == 0) [L1040] COND FALSE !(E_M == 0) [L1045] COND FALSE !(E_1 == 0) [L1050] COND FALSE !(E_2 == 0) [L1055] COND FALSE !(E_3 == 0) [L1264] RET fire_delta_events2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L1265] CALL activate_threads2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L799] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L809] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L818] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L828] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L837] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L847] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L856] COND FALSE !(t3_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L866] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) [L1265] RET activate_threads2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L1266] CALL reset_delta_events2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, \old(T3_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L1068] COND FALSE !(M_E == 1) [L1073] COND FALSE !(T1_E == 1) [L1078] COND FALSE !(T2_E == 1) [L1083] COND FALSE !(T3_E == 1) [L1088] COND FALSE !(E_M == 1) [L1093] COND FALSE !(E_1 == 1) [L1098] COND FALSE !(E_2 == 1) [L1103] COND FALSE !(E_3 == 1) [L1266] RET reset_delta_events2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L1269] COND TRUE 1 [L1272] kernel_st = 1 [L1273] CALL eval2() [L939] int tmp ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L943] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L946] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L908] int __retres1 ; [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 [L934] return (__retres1); [L946] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L967] COND TRUE t1_st == 0 [L968] int tmp_ndt_2; [L969] tmp_ndt_2 = __VERIFIER_nondet_int() [L970] COND TRUE \read(tmp_ndt_2) [L972] t1_st = 1 [L973] CALL transmit1() [L691] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=1, t2_i=1, t2_pc=0, t2_st=0, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L702] COND TRUE 1 [L704] t1_pc = 1 [L705] t1_st = 2 [L973] RET transmit1() [L981] COND TRUE t2_st == 0 [L982] int tmp_ndt_3; [L983] tmp_ndt_3 = __VERIFIER_nondet_int() [L984] COND TRUE \read(tmp_ndt_3) [L986] t2_st = 1 [L987] CALL transmit2() [L727] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=0, t2_st=1, t3_i=1, t3_pc=0, t3_st=0, t=0, token=0] [L738] COND TRUE 1 [L740] t2_pc = 1 [L741] t2_st = 2 [L987] RET transmit2() [L995] COND TRUE t3_st == 0 [L996] int tmp_ndt_4; [L997] tmp_ndt_4 = __VERIFIER_nondet_int() [L998] COND TRUE \read(tmp_ndt_4) [L1000] t3_st = 1 [L1001] CALL transmit3() [L763] COND TRUE t3_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=0, t3_st=1, t=0, token=0] [L774] COND TRUE 1 [L776] t3_pc = 1 [L777] t3_st = 2 [L1001] RET transmit3() [L943] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L946] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L908] int __retres1 ; [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 [L934] return (__retres1); [L946] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND TRUE \read(tmp_ndt_1) [L958] m_st = 1 [L959] CALL master() [L633] int tmp_var = __VERIFIER_nondet_int(); [L635] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, tmp_var=0, token=0] [L646] COND TRUE 1 [L649] token = __VERIFIER_nondet_int() [L650] local = token [L651] E_1 = 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, tmp_var=0, token=0] [L652] CALL immediate_notify() VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L1160] CALL activate_threads2() VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L799] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L809] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L818] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L819] COND TRUE E_1 == 1 [L820] __retres1 = 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND TRUE \read(tmp___0) [L1131] t1_st = 0 [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L837] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L838] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L847] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L856] COND TRUE t3_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L857] COND FALSE !(E_3 == 1) VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L866] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) [L1160] RET activate_threads2() VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L652] RET immediate_notify() VAL [E_1=1, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, tmp_var=0, token=0] [L653] E_1 = 2 [L654] m_pc = 1 [L655] m_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, tmp_var=0, token=0] [L959] RET master() [L967] COND TRUE t1_st == 0 [L968] int tmp_ndt_2; [L969] tmp_ndt_2 = __VERIFIER_nondet_int() [L970] COND TRUE \read(tmp_ndt_2) [L972] t1_st = 1 [L973] CALL transmit1() [L691] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=0] [L694] COND TRUE t1_pc == 1 [L710] token += 1 [L711] E_2 = 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L712] CALL immediate_notify() VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L1160] CALL activate_threads2() VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L799] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L800] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L809] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L818] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L819] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L828] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L837] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L838] COND TRUE E_2 == 1 [L839] __retres1 = 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND TRUE \read(tmp___1) [L1139] t2_st = 0 [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L856] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L857] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L866] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) [L1160] RET activate_threads2() VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L712] RET immediate_notify() VAL [E_1=2, E_2=1, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L713] E_2 = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L702] COND TRUE 1 [L704] t1_pc = 1 [L705] t1_st = 2 [L973] RET transmit1() [L981] COND TRUE t2_st == 0 [L982] int tmp_ndt_3; [L983] tmp_ndt_3 = __VERIFIER_nondet_int() [L984] COND TRUE \read(tmp_ndt_3) [L986] t2_st = 1 [L987] CALL transmit2() [L727] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=1] [L730] COND TRUE t2_pc == 1 [L746] token += 1 [L747] E_3 = 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L748] CALL immediate_notify() VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L1160] CALL activate_threads2() VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L799] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L800] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L809] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L818] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L819] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L828] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L837] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L838] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L847] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L856] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L857] COND TRUE E_3 == 1 [L858] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=2, t=0, token=2] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND TRUE \read(tmp___2) [L1147] t3_st = 0 [L1160] RET activate_threads2() VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \old(t3_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=0, t=0, token=2] [L748] RET immediate_notify() VAL [E_1=2, E_2=2, E_3=1, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=0, t=0, token=2] [L749] E_3 = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t3_i=1, t3_pc=1, t3_st=0, t=0, token=2] [L738] COND TRUE 1 [L740] t2_pc = 1 [L741] t2_st = 2 [L987] RET transmit2() [L995] COND TRUE t3_st == 0 [L996] int tmp_ndt_4; [L997] tmp_ndt_4 = __VERIFIER_nondet_int() [L998] COND TRUE \read(tmp_ndt_4) [L1000] t3_st = 1 [L1001] CALL transmit3() [L763] COND FALSE !(t3_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=2] [L766] COND TRUE t3_pc == 1 [L782] token += 1 [L783] E_M = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L784] CALL immediate_notify() VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L1160] CALL activate_threads2() VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L799] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L800] COND TRUE E_M == 1 [L801] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L811] return (__retres1); [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND TRUE \read(tmp) [L1123] m_st = 0 [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L818] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L819] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L828] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L830] return (__retres1); [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L837] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L838] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L847] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L849] return (__retres1); [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L856] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L857] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L866] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L868] return (__retres1); [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) [L1160] RET activate_threads2() VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=2, \old(t3_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L784] RET immediate_notify() VAL [E_1=2, E_2=2, E_3=2, E_M=1, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L785] E_M = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=1, t=0, token=3] [L774] COND TRUE 1 [L776] t3_pc = 1 [L777] t3_st = 2 [L1001] RET transmit3() [L943] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=3] [L946] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=3] [L908] int __retres1 ; [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 [L934] return (__retres1); [L946] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=3] [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=3] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND TRUE \read(tmp_ndt_1) [L958] m_st = 1 [L959] CALL master() [L633] int tmp_var = __VERIFIER_nondet_int(); [L635] COND FALSE !(m_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, tmp_var=5, token=3] [L638] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, tmp_var=5, token=3] [L660] COND FALSE !(token != local + 3) [L665] COND TRUE tmp_var <= 5 [L666] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, tmp_var=5, token=3] [L671] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, tmp_var=5, token=3] [L672] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, tmp_var=5, token=3] [L673] COND TRUE tmp_var == 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=3] [L674] CALL error2() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=3] [L599] reach_error() VAL [E_1=2, E_2=2, E_3=2, E_M=2, M_E=2, T1_E=2, T2_E=2, T3_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t3_i=1, t3_pc=1, t3_st=2, t=0, token=3] - UnprovableResult [Line: 27]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 178 locations, 2 error locations. Started 1 CEGAR loops. OverallTime: 62.4s, OverallIterations: 27, TraceHistogramMax: 5, PathProgramHistogramMax: 2, EmptinessCheckTime: 0.2s, AutomataDifference: 27.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 5483 SdHoareTripleChecker+Valid, 7.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 5418 mSDsluCounter, 10312 SdHoareTripleChecker+Invalid, 5.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5511 mSDsCounter, 1097 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 4991 IncrementalHoareTripleChecker+Invalid, 6088 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1097 mSolverCounterUnsat, 4801 mSDtfsCounter, 4991 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 2290 GetRequests, 2144 SyntacticMatches, 0 SemanticMatches, 146 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=35263occurred in iteration=26, InterpolantAutomatonStates: 130, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 19.6s AutomataMinimizationTime, 26 MinimizatonAttempts, 19477 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.7s SsaConstructionTime, 1.7s SatisfiabilityAnalysisTime, 6.9s InterpolantComputationTime, 5012 NumberOfCodeBlocks, 4968 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 4784 ConstructedInterpolants, 0 QuantifiedInterpolants, 7908 SizeOfPredicates, 2 NumberOfNonLiveVariables, 8974 ConjunctsInSsa, 122 ConjunctsInUnsatCore, 43 InterpolantComputations, 26 PerfectInterpolantSequences, 2840/3196 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-11-13 23:44:32,125 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc84bfb5-45d6-405f-a94e-274956538d4b/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE