./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-DerefFreeMemtrack-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 440f273968b34677cc4ba81db9f48373d3cac4b8a75ac1f970ae3fdbbff89c17 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-14 02:58:28,526 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-14 02:58:28,630 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-DerefFreeMemtrack-64bit-Taipan_Default.epf [2024-11-14 02:58:28,638 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-14 02:58:28,638 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-14 02:58:28,677 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-14 02:58:28,678 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-14 02:58:28,678 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-14 02:58:28,679 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-14 02:58:28,679 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-14 02:58:28,679 INFO L153 SettingsManager]: * User list type=DISABLED [2024-11-14 02:58:28,679 INFO L151 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2024-11-14 02:58:28,679 INFO L153 SettingsManager]: * Explicit value domain=true [2024-11-14 02:58:28,680 INFO L153 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2024-11-14 02:58:28,680 INFO L153 SettingsManager]: * Octagon Domain=false [2024-11-14 02:58:28,680 INFO L153 SettingsManager]: * Abstract domain=CompoundDomain [2024-11-14 02:58:28,680 INFO L153 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2024-11-14 02:58:28,680 INFO L153 SettingsManager]: * Use the RCFG-of-the-future interface=true [2024-11-14 02:58:28,680 INFO L153 SettingsManager]: * Interval Domain=false [2024-11-14 02:58:28,681 INFO L151 SettingsManager]: Preferences of Sifa differ from their defaults: [2024-11-14 02:58:28,681 INFO L153 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2024-11-14 02:58:28,681 INFO L153 SettingsManager]: * Simplification Technique=POLY_PAC [2024-11-14 02:58:28,681 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-14 02:58:28,681 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-14 02:58:28,682 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-14 02:58:28,682 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-14 02:58:28,682 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-14 02:58:28,682 INFO L153 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2024-11-14 02:58:28,682 INFO L153 SettingsManager]: * Bitprecise bitfields=true [2024-11-14 02:58:28,682 INFO L153 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2024-11-14 02:58:28,683 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-14 02:58:28,683 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-14 02:58:28,683 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-14 02:58:28,683 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-14 02:58:28,683 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-14 02:58:28,683 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-14 02:58:28,683 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-14 02:58:28,684 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-14 02:58:28,684 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 02:58:28,684 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-14 02:58:28,684 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-14 02:58:28,684 INFO L153 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2024-11-14 02:58:28,684 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-14 02:58:28,684 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-14 02:58:28,684 INFO L153 SettingsManager]: * Trace refinement exception blacklist=NONE [2024-11-14 02:58:28,684 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-14 02:58:28,684 INFO L153 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 440f273968b34677cc4ba81db9f48373d3cac4b8a75ac1f970ae3fdbbff89c17 [2024-11-14 02:58:28,973 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-14 02:58:28,982 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-14 02:58:28,985 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-14 02:58:28,986 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-14 02:58:28,987 INFO L274 PluginConnector]: CDTParser initialized [2024-11-14 02:58:28,988 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i Unable to find full path for "g++" [2024-11-14 02:58:31,046 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-14 02:58:31,472 INFO L384 CDTParser]: Found 1 translation units. [2024-11-14 02:58:31,473 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i [2024-11-14 02:58:31,512 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/data/1401c1794/ebe3ebdbdc8a43829050394bcff5fd15/FLAGe241b78ac [2024-11-14 02:58:31,528 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/data/1401c1794/ebe3ebdbdc8a43829050394bcff5fd15 [2024-11-14 02:58:31,530 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-14 02:58:31,532 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-14 02:58:31,534 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-14 02:58:31,534 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-14 02:58:31,538 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-14 02:58:31,539 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 02:58:31" (1/1) ... [2024-11-14 02:58:31,541 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2be32238 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:31, skipping insertion in model container [2024-11-14 02:58:31,541 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 02:58:31" (1/1) ... [2024-11-14 02:58:31,607 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-14 02:58:32,273 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,277 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,286 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,289 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,290 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,295 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,302 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,306 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,307 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,310 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,315 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,317 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,319 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,324 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,326 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,342 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,343 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,344 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,359 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,377 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,379 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,380 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,381 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,383 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,384 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,388 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,389 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,390 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,390 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,393 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,397 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,428 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,429 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,429 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,434 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,441 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,443 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,467 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,498 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 02:58:32,499 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 02:58:32,523 INFO L200 MainTranslator]: Completed pre-run [2024-11-14 02:58:32,777 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 02:58:32,821 INFO L204 MainTranslator]: Completed translation [2024-11-14 02:58:32,821 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32 WrapperNode [2024-11-14 02:58:32,821 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-14 02:58:32,822 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-14 02:58:32,822 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-14 02:58:32,823 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-14 02:58:32,828 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:32,854 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:32,930 INFO L138 Inliner]: procedures = 118, calls = 369, calls flagged for inlining = 54, calls inlined = 37, statements flattened = 917 [2024-11-14 02:58:32,931 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-14 02:58:32,931 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-14 02:58:32,931 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-14 02:58:32,931 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-14 02:58:32,939 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:32,940 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:32,949 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:32,950 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:32,979 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:32,986 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:32,991 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:32,995 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:33,011 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-14 02:58:33,016 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-14 02:58:33,016 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-14 02:58:33,016 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-14 02:58:33,017 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (1/1) ... [2024-11-14 02:58:33,027 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 02:58:33,040 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 02:58:33,054 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-11-14 02:58:33,058 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-11-14 02:58:33,086 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2024-11-14 02:58:33,086 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2024-11-14 02:58:33,086 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2024-11-14 02:58:33,086 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2024-11-14 02:58:33,087 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2024-11-14 02:58:33,087 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2024-11-14 02:58:33,087 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-11-14 02:58:33,087 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_time_to_tm [2024-11-14 02:58:33,087 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_time_to_tm [2024-11-14 02:58:33,087 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_proc [2024-11-14 02:58:33,087 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_proc [2024-11-14 02:58:33,087 INFO L130 BoogieDeclarations]: Found specification of procedure irq_set_irq_wake [2024-11-14 02:58:33,087 INFO L138 BoogieDeclarations]: Found implementation of procedure irq_set_irq_wake [2024-11-14 02:58:33,088 INFO L130 BoogieDeclarations]: Found specification of procedure outer_sync [2024-11-14 02:58:33,088 INFO L138 BoogieDeclarations]: Found implementation of procedure outer_sync [2024-11-14 02:58:33,088 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_remove [2024-11-14 02:58:33,088 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_remove [2024-11-14 02:58:33,088 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_shutdown [2024-11-14 02:58:33,088 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_shutdown [2024-11-14 02:58:33,088 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2024-11-14 02:58:33,089 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_tm_to_time [2024-11-14 02:58:33,090 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_tm_to_time [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2024-11-14 02:58:33,090 INFO L138 BoogieDeclarations]: Found implementation of procedure __release_region [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2024-11-14 02:58:33,090 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_alarm [2024-11-14 02:58:33,090 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_alarm [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2024-11-14 02:58:33,090 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_check [2024-11-14 02:58:33,090 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_check [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_alarm_irq_enable [2024-11-14 02:58:33,090 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_alarm_irq_enable [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_iounmap [2024-11-14 02:58:33,090 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_iounmap [2024-11-14 02:58:33,090 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-14 02:58:33,091 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_device_unregister [2024-11-14 02:58:33,091 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_device_unregister [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2024-11-14 02:58:33,091 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err [2024-11-14 02:58:33,091 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure device_may_wakeup [2024-11-14 02:58:33,091 INFO L138 BoogieDeclarations]: Found implementation of procedure device_may_wakeup [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2024-11-14 02:58:33,091 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2024-11-14 02:58:33,091 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_resource [2024-11-14 02:58:33,091 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-14 02:58:33,092 INFO L130 BoogieDeclarations]: Found specification of procedure platform_set_drvdata [2024-11-14 02:58:33,092 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_set_drvdata [2024-11-14 02:58:33,092 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_drvdata [2024-11-14 02:58:33,092 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_drvdata [2024-11-14 02:58:33,092 INFO L130 BoogieDeclarations]: Found specification of procedure dev_err [2024-11-14 02:58:33,092 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_err [2024-11-14 02:58:33,092 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_time [2024-11-14 02:58:33,092 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_time [2024-11-14 02:58:33,092 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_wait_while_busy [2024-11-14 02:58:33,092 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_wait_while_busy [2024-11-14 02:58:33,092 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-11-14 02:58:33,092 INFO L130 BoogieDeclarations]: Found specification of procedure resource_size [2024-11-14 02:58:33,092 INFO L138 BoogieDeclarations]: Found implementation of procedure resource_size [2024-11-14 02:58:33,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2024-11-14 02:58:33,095 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2024-11-14 02:58:33,095 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_time [2024-11-14 02:58:33,096 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_time [2024-11-14 02:58:33,096 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-14 02:58:33,097 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-14 02:58:33,468 INFO L238 CfgBuilder]: Building ICFG [2024-11-14 02:58:33,471 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-14 02:58:33,875 INFO L735 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2024-11-14 02:58:37,120 INFO L? ?]: Removed 552 outVars from TransFormulas that were not future-live. [2024-11-14 02:58:37,121 INFO L287 CfgBuilder]: Performing block encoding [2024-11-14 02:58:37,488 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-14 02:58:37,489 INFO L316 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-14 02:58:37,489 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 02:58:37 BoogieIcfgContainer [2024-11-14 02:58:37,489 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-14 02:58:37,491 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-14 02:58:37,491 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-14 02:58:37,496 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-14 02:58:37,496 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 02:58:31" (1/3) ... [2024-11-14 02:58:37,497 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6462537a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 02:58:37, skipping insertion in model container [2024-11-14 02:58:37,497 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 02:58:32" (2/3) ... [2024-11-14 02:58:37,497 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6462537a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 02:58:37, skipping insertion in model container [2024-11-14 02:58:37,498 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 02:58:37" (3/3) ... [2024-11-14 02:58:37,499 INFO L112 eAbstractionObserver]: Analyzing ICFG linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i [2024-11-14 02:58:37,515 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:None NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-14 02:58:37,518 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i that has 33 procedures, 483 locations, 1 initial locations, 1 loop locations, and 111 error locations. [2024-11-14 02:58:37,567 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-14 02:58:37,583 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=None, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@54da1805, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-14 02:58:37,583 INFO L334 AbstractCegarLoop]: Starting to check reachability of 111 error locations. [2024-11-14 02:58:37,590 INFO L276 IsEmpty]: Start isEmpty. Operand has 482 states, 259 states have (on average 1.7335907335907337) internal successors, (449), 379 states have internal predecessors, (449), 80 states have call successors, (80), 32 states have call predecessors, (80), 31 states have return successors, (74), 74 states have call predecessors, (74), 74 states have call successors, (74) [2024-11-14 02:58:37,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2024-11-14 02:58:37,599 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:58:37,600 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:58:37,600 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:58:37,606 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:58:37,607 INFO L85 PathProgramCache]: Analyzing trace with hash -594450758, now seen corresponding path program 1 times [2024-11-14 02:58:37,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:58:37,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718442572] [2024-11-14 02:58:37,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:58:37,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:58:38,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:58:38,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 02:58:38,684 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:58:38,684 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1718442572] [2024-11-14 02:58:38,686 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1718442572] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:58:38,687 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:58:38,687 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-14 02:58:38,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1871006014] [2024-11-14 02:58:38,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:58:38,695 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 02:58:38,696 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:58:38,729 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 02:58:38,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 02:58:38,734 INFO L87 Difference]: Start difference. First operand has 482 states, 259 states have (on average 1.7335907335907337) internal successors, (449), 379 states have internal predecessors, (449), 80 states have call successors, (80), 32 states have call predecessors, (80), 31 states have return successors, (74), 74 states have call predecessors, (74), 74 states have call successors, (74) Second operand has 5 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:58:40,762 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:58:42,769 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:58:44,774 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:58:46,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:58:46,910 INFO L93 Difference]: Finished difference Result 764 states and 1037 transitions. [2024-11-14 02:58:46,912 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 02:58:46,913 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 8 [2024-11-14 02:58:46,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:58:46,936 INFO L225 Difference]: With dead ends: 764 [2024-11-14 02:58:46,936 INFO L226 Difference]: Without dead ends: 751 [2024-11-14 02:58:46,938 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-14 02:58:46,941 INFO L432 NwaCegarLoop]: 477 mSDtfsCounter, 383 mSDsluCounter, 925 mSDsCounter, 0 mSdLazyCounter, 1191 mSolverCounterSat, 147 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 404 SdHoareTripleChecker+Valid, 1402 SdHoareTripleChecker+Invalid, 1341 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 147 IncrementalHoareTripleChecker+Valid, 1191 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 8.0s IncrementalHoareTripleChecker+Time [2024-11-14 02:58:46,942 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [404 Valid, 1402 Invalid, 1341 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [147 Valid, 1191 Invalid, 3 Unknown, 0 Unchecked, 8.0s Time] [2024-11-14 02:58:46,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 751 states. [2024-11-14 02:58:47,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 751 to 668. [2024-11-14 02:58:47,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 668 states, 406 states have (on average 1.729064039408867) internal successors, (702), 520 states have internal predecessors, (702), 110 states have call successors, (110), 31 states have call predecessors, (110), 41 states have return successors, (166), 120 states have call predecessors, (166), 109 states have call successors, (166) [2024-11-14 02:58:47,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 668 states to 668 states and 978 transitions. [2024-11-14 02:58:47,081 INFO L78 Accepts]: Start accepts. Automaton has 668 states and 978 transitions. Word has length 8 [2024-11-14 02:58:47,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:58:47,082 INFO L471 AbstractCegarLoop]: Abstraction has 668 states and 978 transitions. [2024-11-14 02:58:47,082 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:58:47,082 INFO L276 IsEmpty]: Start isEmpty. Operand 668 states and 978 transitions. [2024-11-14 02:58:47,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2024-11-14 02:58:47,083 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:58:47,083 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:58:47,084 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-14 02:58:47,084 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:58:47,084 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:58:47,084 INFO L85 PathProgramCache]: Analyzing trace with hash -1248103769, now seen corresponding path program 1 times [2024-11-14 02:58:47,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:58:47,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853937499] [2024-11-14 02:58:47,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:58:47,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:58:47,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:58:47,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 02:58:47,662 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:58:47,662 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853937499] [2024-11-14 02:58:47,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [853937499] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:58:47,663 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:58:47,663 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-14 02:58:47,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1092046653] [2024-11-14 02:58:47,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:58:47,664 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 02:58:47,664 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:58:47,665 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 02:58:47,665 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 02:58:47,666 INFO L87 Difference]: Start difference. First operand 668 states and 978 transitions. Second operand has 5 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:58:49,675 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:58:51,682 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:58:53,695 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:58:55,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:58:55,732 INFO L93 Difference]: Finished difference Result 1005 states and 1521 transitions. [2024-11-14 02:58:55,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-14 02:58:55,733 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 9 [2024-11-14 02:58:55,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:58:55,739 INFO L225 Difference]: With dead ends: 1005 [2024-11-14 02:58:55,739 INFO L226 Difference]: Without dead ends: 1005 [2024-11-14 02:58:55,740 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-14 02:58:55,740 INFO L432 NwaCegarLoop]: 437 mSDtfsCounter, 374 mSDsluCounter, 874 mSDsCounter, 0 mSdLazyCounter, 1170 mSolverCounterSat, 138 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 397 SdHoareTripleChecker+Valid, 1311 SdHoareTripleChecker+Invalid, 1311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 138 IncrementalHoareTripleChecker+Valid, 1170 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 7.9s IncrementalHoareTripleChecker+Time [2024-11-14 02:58:55,741 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [397 Valid, 1311 Invalid, 1311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [138 Valid, 1170 Invalid, 3 Unknown, 0 Unchecked, 7.9s Time] [2024-11-14 02:58:55,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1005 states. [2024-11-14 02:58:55,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1005 to 936. [2024-11-14 02:58:55,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 936 states, 621 states have (on average 1.748792270531401) internal successors, (1086), 738 states have internal predecessors, (1086), 162 states have call successors, (162), 31 states have call predecessors, (162), 42 states have return successors, (264), 172 states have call predecessors, (264), 161 states have call successors, (264) [2024-11-14 02:58:55,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 936 states to 936 states and 1512 transitions. [2024-11-14 02:58:55,820 INFO L78 Accepts]: Start accepts. Automaton has 936 states and 1512 transitions. Word has length 9 [2024-11-14 02:58:55,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:58:55,820 INFO L471 AbstractCegarLoop]: Abstraction has 936 states and 1512 transitions. [2024-11-14 02:58:55,820 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:58:55,820 INFO L276 IsEmpty]: Start isEmpty. Operand 936 states and 1512 transitions. [2024-11-14 02:58:55,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2024-11-14 02:58:55,821 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:58:55,821 INFO L215 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:58:55,821 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-14 02:58:55,821 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:58:55,822 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:58:55,822 INFO L85 PathProgramCache]: Analyzing trace with hash -2081115941, now seen corresponding path program 1 times [2024-11-14 02:58:55,822 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:58:55,822 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [80349197] [2024-11-14 02:58:55,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:58:55,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:58:55,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:58:56,390 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 02:58:56,390 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:58:56,390 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [80349197] [2024-11-14 02:58:56,390 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [80349197] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:58:56,391 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:58:56,391 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-14 02:58:56,391 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1714454497] [2024-11-14 02:58:56,391 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:58:56,391 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-14 02:58:56,391 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:58:56,392 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-14 02:58:56,392 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-14 02:58:56,392 INFO L87 Difference]: Start difference. First operand 936 states and 1512 transitions. Second operand has 7 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 7 states have internal predecessors, (10), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 02:58:58,403 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:00,407 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:02,411 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:04,414 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:06,418 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:09,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:59:09,518 INFO L93 Difference]: Finished difference Result 1224 states and 1944 transitions. [2024-11-14 02:59:09,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-14 02:59:09,519 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 7 states have internal predecessors, (10), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 19 [2024-11-14 02:59:09,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:59:09,527 INFO L225 Difference]: With dead ends: 1224 [2024-11-14 02:59:09,528 INFO L226 Difference]: Without dead ends: 1224 [2024-11-14 02:59:09,528 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-14 02:59:09,529 INFO L432 NwaCegarLoop]: 399 mSDtfsCounter, 632 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 1831 mSolverCounterSat, 317 mSolverCounterUnsat, 5 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 672 SdHoareTripleChecker+Valid, 1535 SdHoareTripleChecker+Invalid, 2153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 317 IncrementalHoareTripleChecker+Valid, 1831 IncrementalHoareTripleChecker+Invalid, 5 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 13.0s IncrementalHoareTripleChecker+Time [2024-11-14 02:59:09,529 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [672 Valid, 1535 Invalid, 2153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [317 Valid, 1831 Invalid, 5 Unknown, 0 Unchecked, 13.0s Time] [2024-11-14 02:59:09,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1224 states. [2024-11-14 02:59:09,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1224 to 948. [2024-11-14 02:59:09,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 948 states, 628 states have (on average 1.7515923566878981) internal successors, (1100), 745 states have internal predecessors, (1100), 164 states have call successors, (164), 31 states have call predecessors, (164), 46 states have return successors, (312), 177 states have call predecessors, (312), 163 states have call successors, (312) [2024-11-14 02:59:09,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 948 states to 948 states and 1576 transitions. [2024-11-14 02:59:09,631 INFO L78 Accepts]: Start accepts. Automaton has 948 states and 1576 transitions. Word has length 19 [2024-11-14 02:59:09,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:59:09,634 INFO L471 AbstractCegarLoop]: Abstraction has 948 states and 1576 transitions. [2024-11-14 02:59:09,634 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 7 states have internal predecessors, (10), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 02:59:09,634 INFO L276 IsEmpty]: Start isEmpty. Operand 948 states and 1576 transitions. [2024-11-14 02:59:09,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2024-11-14 02:59:09,635 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:59:09,635 INFO L215 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:59:09,635 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-14 02:59:09,635 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:59:09,638 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:59:09,638 INFO L85 PathProgramCache]: Analyzing trace with hash -90084186, now seen corresponding path program 1 times [2024-11-14 02:59:09,638 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:59:09,639 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495174861] [2024-11-14 02:59:09,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:59:09,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:59:09,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:59:10,503 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 02:59:10,504 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:59:10,504 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495174861] [2024-11-14 02:59:10,504 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [495174861] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:59:10,504 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:59:10,504 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-14 02:59:10,504 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [552829101] [2024-11-14 02:59:10,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:59:10,505 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-14 02:59:10,505 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:59:10,506 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-14 02:59:10,506 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2024-11-14 02:59:10,506 INFO L87 Difference]: Start difference. First operand 948 states and 1576 transitions. Second operand has 8 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 02:59:12,515 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:14,518 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:16,521 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:18,525 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:20,532 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:24,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:59:24,285 INFO L93 Difference]: Finished difference Result 1773 states and 3041 transitions. [2024-11-14 02:59:24,286 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-14 02:59:24,287 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 20 [2024-11-14 02:59:24,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:59:24,297 INFO L225 Difference]: With dead ends: 1773 [2024-11-14 02:59:24,297 INFO L226 Difference]: Without dead ends: 1773 [2024-11-14 02:59:24,297 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2024-11-14 02:59:24,298 INFO L432 NwaCegarLoop]: 384 mSDtfsCounter, 706 mSDsluCounter, 1297 mSDsCounter, 0 mSdLazyCounter, 2654 mSolverCounterSat, 243 mSolverCounterUnsat, 5 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 13.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 755 SdHoareTripleChecker+Valid, 1681 SdHoareTripleChecker+Invalid, 2902 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 243 IncrementalHoareTripleChecker+Valid, 2654 IncrementalHoareTripleChecker+Invalid, 5 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 13.6s IncrementalHoareTripleChecker+Time [2024-11-14 02:59:24,298 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [755 Valid, 1681 Invalid, 2902 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [243 Valid, 2654 Invalid, 5 Unknown, 0 Unchecked, 13.6s Time] [2024-11-14 02:59:24,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1773 states. [2024-11-14 02:59:24,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1773 to 1636. [2024-11-14 02:59:24,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1636 states, 1181 states have (on average 1.7679932260795936) internal successors, (2088), 1302 states have internal predecessors, (2088), 297 states have call successors, (297), 31 states have call predecessors, (297), 49 states have return successors, (641), 313 states have call predecessors, (641), 296 states have call successors, (641) [2024-11-14 02:59:24,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1636 states to 1636 states and 3026 transitions. [2024-11-14 02:59:24,388 INFO L78 Accepts]: Start accepts. Automaton has 1636 states and 3026 transitions. Word has length 20 [2024-11-14 02:59:24,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:59:24,388 INFO L471 AbstractCegarLoop]: Abstraction has 1636 states and 3026 transitions. [2024-11-14 02:59:24,388 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 7 states have internal predecessors, (11), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 02:59:24,389 INFO L276 IsEmpty]: Start isEmpty. Operand 1636 states and 3026 transitions. [2024-11-14 02:59:24,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2024-11-14 02:59:24,389 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:59:24,389 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:59:24,390 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-14 02:59:24,390 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:59:24,391 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:59:24,391 INFO L85 PathProgramCache]: Analyzing trace with hash -1730976538, now seen corresponding path program 1 times [2024-11-14 02:59:24,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:59:24,391 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66277223] [2024-11-14 02:59:24,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:59:24,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:59:24,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:59:24,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 02:59:24,617 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:59:24,618 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [66277223] [2024-11-14 02:59:24,618 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [66277223] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:59:24,618 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:59:24,618 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-14 02:59:24,618 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [149966320] [2024-11-14 02:59:24,618 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:59:24,618 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-14 02:59:24,619 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:59:24,620 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-14 02:59:24,620 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-14 02:59:24,620 INFO L87 Difference]: Start difference. First operand 1636 states and 3026 transitions. Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:59:26,629 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:28,634 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:28,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:59:28,931 INFO L93 Difference]: Finished difference Result 3221 states and 5942 transitions. [2024-11-14 02:59:28,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-14 02:59:28,932 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2024-11-14 02:59:28,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:59:28,951 INFO L225 Difference]: With dead ends: 3221 [2024-11-14 02:59:28,951 INFO L226 Difference]: Without dead ends: 3221 [2024-11-14 02:59:28,951 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-14 02:59:28,952 INFO L432 NwaCegarLoop]: 515 mSDtfsCounter, 548 mSDsluCounter, 510 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 3 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 548 SdHoareTripleChecker+Valid, 1025 SdHoareTripleChecker+Invalid, 143 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.2s IncrementalHoareTripleChecker+Time [2024-11-14 02:59:28,952 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [548 Valid, 1025 Invalid, 143 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 138 Invalid, 2 Unknown, 0 Unchecked, 4.2s Time] [2024-11-14 02:59:28,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3221 states. [2024-11-14 02:59:29,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3221 to 3109. [2024-11-14 02:59:29,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3109 states, 2324 states have (on average 1.7637693631669535) internal successors, (4099), 2458 states have internal predecessors, (4099), 580 states have call successors, (580), 60 states have call predecessors, (580), 96 states have return successors, (1259), 612 states have call predecessors, (1259), 579 states have call successors, (1259) [2024-11-14 02:59:29,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3109 states to 3109 states and 5938 transitions. [2024-11-14 02:59:29,128 INFO L78 Accepts]: Start accepts. Automaton has 3109 states and 5938 transitions. Word has length 18 [2024-11-14 02:59:29,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:59:29,128 INFO L471 AbstractCegarLoop]: Abstraction has 3109 states and 5938 transitions. [2024-11-14 02:59:29,128 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:59:29,128 INFO L276 IsEmpty]: Start isEmpty. Operand 3109 states and 5938 transitions. [2024-11-14 02:59:29,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2024-11-14 02:59:29,131 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:59:29,131 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:59:29,131 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-14 02:59:29,131 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:59:29,132 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:59:29,132 INFO L85 PathProgramCache]: Analyzing trace with hash 1099706676, now seen corresponding path program 1 times [2024-11-14 02:59:29,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:59:29,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112596032] [2024-11-14 02:59:29,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:59:29,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:59:29,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:59:29,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 02:59:29,515 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:59:29,515 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [112596032] [2024-11-14 02:59:29,515 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [112596032] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:59:29,515 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:59:29,515 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-14 02:59:29,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1084811186] [2024-11-14 02:59:29,516 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:59:29,516 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 02:59:29,517 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:59:29,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 02:59:29,518 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 02:59:29,518 INFO L87 Difference]: Start difference. First operand 3109 states and 5938 transitions. Second operand has 5 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:59:31,531 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:33,534 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:35,538 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:37,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:59:37,268 INFO L93 Difference]: Finished difference Result 3442 states and 6500 transitions. [2024-11-14 02:59:37,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-14 02:59:37,269 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2024-11-14 02:59:37,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:59:37,293 INFO L225 Difference]: With dead ends: 3442 [2024-11-14 02:59:37,294 INFO L226 Difference]: Without dead ends: 3440 [2024-11-14 02:59:37,294 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 02:59:37,297 INFO L432 NwaCegarLoop]: 470 mSDtfsCounter, 357 mSDsluCounter, 910 mSDsCounter, 0 mSdLazyCounter, 1178 mSolverCounterSat, 131 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 378 SdHoareTripleChecker+Valid, 1380 SdHoareTripleChecker+Invalid, 1312 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 131 IncrementalHoareTripleChecker+Valid, 1178 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 7.6s IncrementalHoareTripleChecker+Time [2024-11-14 02:59:37,300 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [378 Valid, 1380 Invalid, 1312 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [131 Valid, 1178 Invalid, 3 Unknown, 0 Unchecked, 7.6s Time] [2024-11-14 02:59:37,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3440 states. [2024-11-14 02:59:37,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3440 to 3368. [2024-11-14 02:59:37,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3368 states, 2534 states have (on average 1.7624309392265194) internal successors, (4466), 2670 states have internal predecessors, (4466), 629 states have call successors, (629), 60 states have call predecessors, (629), 96 states have return successors, (1377), 661 states have call predecessors, (1377), 628 states have call successors, (1377) [2024-11-14 02:59:37,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3368 states to 3368 states and 6472 transitions. [2024-11-14 02:59:37,505 INFO L78 Accepts]: Start accepts. Automaton has 3368 states and 6472 transitions. Word has length 21 [2024-11-14 02:59:37,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:59:37,505 INFO L471 AbstractCegarLoop]: Abstraction has 3368 states and 6472 transitions. [2024-11-14 02:59:37,506 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:59:37,506 INFO L276 IsEmpty]: Start isEmpty. Operand 3368 states and 6472 transitions. [2024-11-14 02:59:37,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2024-11-14 02:59:37,511 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:59:37,512 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:59:37,512 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-14 02:59:37,512 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting tegra_rtc_procErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:59:37,512 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:59:37,513 INFO L85 PathProgramCache]: Analyzing trace with hash -470299213, now seen corresponding path program 1 times [2024-11-14 02:59:37,513 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:59:37,513 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1168543018] [2024-11-14 02:59:37,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:59:37,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:59:37,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:59:37,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 02:59:37,766 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:59:37,766 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1168543018] [2024-11-14 02:59:37,766 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1168543018] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:59:37,766 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:59:37,766 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-14 02:59:37,767 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [396185417] [2024-11-14 02:59:37,767 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:59:37,767 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-14 02:59:37,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:59:37,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-14 02:59:37,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-14 02:59:37,769 INFO L87 Difference]: Start difference. First operand 3368 states and 6472 transitions. Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:59:39,783 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:39,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:59:39,905 INFO L93 Difference]: Finished difference Result 2062 states and 3754 transitions. [2024-11-14 02:59:39,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-14 02:59:39,906 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2024-11-14 02:59:39,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:59:39,919 INFO L225 Difference]: With dead ends: 2062 [2024-11-14 02:59:39,919 INFO L226 Difference]: Without dead ends: 2062 [2024-11-14 02:59:39,919 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-14 02:59:39,920 INFO L432 NwaCegarLoop]: 305 mSDtfsCounter, 347 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 2 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 347 SdHoareTripleChecker+Valid, 305 SdHoareTripleChecker+Invalid, 51 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2024-11-14 02:59:39,920 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [347 Valid, 305 Invalid, 51 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 48 Invalid, 1 Unknown, 0 Unchecked, 2.1s Time] [2024-11-14 02:59:39,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2062 states. [2024-11-14 02:59:40,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2062 to 2062. [2024-11-14 02:59:40,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2062 states, 1528 states have (on average 1.556282722513089) internal successors, (2378), 1584 states have internal predecessors, (2378), 407 states have call successors, (407), 48 states have call predecessors, (407), 78 states have return successors, (969), 433 states have call predecessors, (969), 406 states have call successors, (969) [2024-11-14 02:59:40,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2062 states to 2062 states and 3754 transitions. [2024-11-14 02:59:40,080 INFO L78 Accepts]: Start accepts. Automaton has 2062 states and 3754 transitions. Word has length 25 [2024-11-14 02:59:40,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:59:40,081 INFO L471 AbstractCegarLoop]: Abstraction has 2062 states and 3754 transitions. [2024-11-14 02:59:40,081 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 02:59:40,081 INFO L276 IsEmpty]: Start isEmpty. Operand 2062 states and 3754 transitions. [2024-11-14 02:59:40,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2024-11-14 02:59:40,083 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:59:40,084 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:59:40,084 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-14 02:59:40,084 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_irq_1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:59:40,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:59:40,085 INFO L85 PathProgramCache]: Analyzing trace with hash 1592910224, now seen corresponding path program 1 times [2024-11-14 02:59:40,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:59:40,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1688531906] [2024-11-14 02:59:40,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:59:40,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:59:40,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:59:40,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 02:59:40,445 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:59:40,445 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1688531906] [2024-11-14 02:59:40,445 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1688531906] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:59:40,445 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:59:40,445 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-14 02:59:40,445 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241863897] [2024-11-14 02:59:40,446 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:59:40,446 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 02:59:40,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:59:40,447 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 02:59:40,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 02:59:40,447 INFO L87 Difference]: Start difference. First operand 2062 states and 3754 transitions. Second operand has 5 states, 5 states have (on average 5.2) internal successors, (26), 4 states have internal predecessors, (26), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 02:59:42,461 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:44,465 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:46,469 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:46,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:59:46,782 INFO L93 Difference]: Finished difference Result 2074 states and 3724 transitions. [2024-11-14 02:59:46,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 02:59:46,783 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.2) internal successors, (26), 4 states have internal predecessors, (26), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 33 [2024-11-14 02:59:46,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:59:46,798 INFO L225 Difference]: With dead ends: 2074 [2024-11-14 02:59:46,798 INFO L226 Difference]: Without dead ends: 2074 [2024-11-14 02:59:46,799 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-14 02:59:46,800 INFO L432 NwaCegarLoop]: 305 mSDtfsCounter, 344 mSDsluCounter, 598 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 2 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 345 SdHoareTripleChecker+Valid, 903 SdHoareTripleChecker+Invalid, 165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.3s IncrementalHoareTripleChecker+Time [2024-11-14 02:59:46,800 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [345 Valid, 903 Invalid, 165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 160 Invalid, 3 Unknown, 0 Unchecked, 6.3s Time] [2024-11-14 02:59:46,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2074 states. [2024-11-14 02:59:46,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2074 to 2072. [2024-11-14 02:59:46,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2072 states, 1536 states have (on average 1.5533854166666667) internal successors, (2386), 1592 states have internal predecessors, (2386), 407 states have call successors, (407), 50 states have call predecessors, (407), 80 states have return successors, (929), 433 states have call predecessors, (929), 406 states have call successors, (929) [2024-11-14 02:59:46,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2072 states to 2072 states and 3722 transitions. [2024-11-14 02:59:46,902 INFO L78 Accepts]: Start accepts. Automaton has 2072 states and 3722 transitions. Word has length 33 [2024-11-14 02:59:46,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:59:46,904 INFO L471 AbstractCegarLoop]: Abstraction has 2072 states and 3722 transitions. [2024-11-14 02:59:46,905 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.2) internal successors, (26), 4 states have internal predecessors, (26), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 02:59:46,905 INFO L276 IsEmpty]: Start isEmpty. Operand 2072 states and 3722 transitions. [2024-11-14 02:59:46,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2024-11-14 02:59:46,907 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:59:46,908 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:59:46,908 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-14 02:59:46,908 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_irq_1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:59:46,909 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:59:46,910 INFO L85 PathProgramCache]: Analyzing trace with hash 17663693, now seen corresponding path program 1 times [2024-11-14 02:59:46,910 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:59:46,910 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599015382] [2024-11-14 02:59:46,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:59:46,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:59:47,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:59:47,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 02:59:47,243 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:59:47,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599015382] [2024-11-14 02:59:47,243 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [599015382] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:59:47,243 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:59:47,243 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-14 02:59:47,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [674503921] [2024-11-14 02:59:47,244 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:59:47,244 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 02:59:47,245 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:59:47,245 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 02:59:47,245 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 02:59:47,246 INFO L87 Difference]: Start difference. First operand 2072 states and 3722 transitions. Second operand has 5 states, 5 states have (on average 4.8) internal successors, (24), 4 states have internal predecessors, (24), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 02:59:49,259 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:51,263 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:53,266 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:53,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 02:59:53,582 INFO L93 Difference]: Finished difference Result 2084 states and 3692 transitions. [2024-11-14 02:59:53,582 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 02:59:53,583 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 4.8) internal successors, (24), 4 states have internal predecessors, (24), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 31 [2024-11-14 02:59:53,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 02:59:53,595 INFO L225 Difference]: With dead ends: 2084 [2024-11-14 02:59:53,595 INFO L226 Difference]: Without dead ends: 2084 [2024-11-14 02:59:53,596 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-14 02:59:53,596 INFO L432 NwaCegarLoop]: 305 mSDtfsCounter, 346 mSDsluCounter, 598 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 2 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 347 SdHoareTripleChecker+Valid, 903 SdHoareTripleChecker+Invalid, 165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.3s IncrementalHoareTripleChecker+Time [2024-11-14 02:59:53,597 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [347 Valid, 903 Invalid, 165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 160 Invalid, 3 Unknown, 0 Unchecked, 6.3s Time] [2024-11-14 02:59:53,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2084 states. [2024-11-14 02:59:53,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2084 to 2082. [2024-11-14 02:59:53,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2082 states, 1544 states have (on average 1.5505181347150259) internal successors, (2394), 1600 states have internal predecessors, (2394), 407 states have call successors, (407), 52 states have call predecessors, (407), 82 states have return successors, (889), 433 states have call predecessors, (889), 406 states have call successors, (889) [2024-11-14 02:59:53,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2082 states to 2082 states and 3690 transitions. [2024-11-14 02:59:53,688 INFO L78 Accepts]: Start accepts. Automaton has 2082 states and 3690 transitions. Word has length 31 [2024-11-14 02:59:53,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 02:59:53,688 INFO L471 AbstractCegarLoop]: Abstraction has 2082 states and 3690 transitions. [2024-11-14 02:59:53,689 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.8) internal successors, (24), 4 states have internal predecessors, (24), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 02:59:53,689 INFO L276 IsEmpty]: Start isEmpty. Operand 2082 states and 3690 transitions. [2024-11-14 02:59:53,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2024-11-14 02:59:53,690 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 02:59:53,690 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 02:59:53,690 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-14 02:59:53,691 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_irq_1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 02:59:53,691 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 02:59:53,691 INFO L85 PathProgramCache]: Analyzing trace with hash -875195406, now seen corresponding path program 1 times [2024-11-14 02:59:53,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 02:59:53,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1486925574] [2024-11-14 02:59:53,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 02:59:53,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 02:59:53,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 02:59:54,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 02:59:54,010 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 02:59:54,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1486925574] [2024-11-14 02:59:54,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1486925574] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 02:59:54,010 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 02:59:54,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-14 02:59:54,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431592964] [2024-11-14 02:59:54,011 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 02:59:54,011 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 02:59:54,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 02:59:54,012 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 02:59:54,012 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 02:59:54,013 INFO L87 Difference]: Start difference. First operand 2082 states and 3690 transitions. Second operand has 5 states, 5 states have (on average 4.6) internal successors, (23), 4 states have internal predecessors, (23), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 02:59:56,027 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 02:59:58,032 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:00:00,036 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:00:00,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:00:00,338 INFO L93 Difference]: Finished difference Result 4168 states and 7338 transitions. [2024-11-14 03:00:00,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-14 03:00:00,338 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 4.6) internal successors, (23), 4 states have internal predecessors, (23), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 30 [2024-11-14 03:00:00,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:00:00,361 INFO L225 Difference]: With dead ends: 4168 [2024-11-14 03:00:00,361 INFO L226 Difference]: Without dead ends: 4168 [2024-11-14 03:00:00,361 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-14 03:00:00,362 INFO L432 NwaCegarLoop]: 305 mSDtfsCounter, 348 mSDsluCounter, 898 mSDsCounter, 0 mSdLazyCounter, 216 mSolverCounterSat, 3 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 349 SdHoareTripleChecker+Valid, 1203 SdHoareTripleChecker+Invalid, 222 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 216 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.2s IncrementalHoareTripleChecker+Time [2024-11-14 03:00:00,362 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [349 Valid, 1203 Invalid, 222 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 216 Invalid, 3 Unknown, 0 Unchecked, 6.2s Time] [2024-11-14 03:00:00,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4168 states. [2024-11-14 03:00:00,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4168 to 3969. [2024-11-14 03:00:00,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3969 states, 2986 states have (on average 1.5686537173476223) internal successors, (4684), 3091 states have internal predecessors, (4684), 772 states have call successors, (772), 101 states have call predecessors, (772), 162 states have return successors, (1696), 784 states have call predecessors, (1696), 771 states have call successors, (1696) [2024-11-14 03:00:00,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3969 states to 3969 states and 7152 transitions. [2024-11-14 03:00:00,547 INFO L78 Accepts]: Start accepts. Automaton has 3969 states and 7152 transitions. Word has length 30 [2024-11-14 03:00:00,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:00:00,547 INFO L471 AbstractCegarLoop]: Abstraction has 3969 states and 7152 transitions. [2024-11-14 03:00:00,547 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.6) internal successors, (23), 4 states have internal predecessors, (23), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-14 03:00:00,547 INFO L276 IsEmpty]: Start isEmpty. Operand 3969 states and 7152 transitions. [2024-11-14 03:00:00,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2024-11-14 03:00:00,549 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:00:00,549 INFO L215 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:00:00,549 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-14 03:00:00,549 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:00:00,549 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:00:00,549 INFO L85 PathProgramCache]: Analyzing trace with hash 753411251, now seen corresponding path program 1 times [2024-11-14 03:00:00,550 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 03:00:00,550 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [18036521] [2024-11-14 03:00:00,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:00:00,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 03:00:00,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:00:00,996 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 03:00:00,996 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 03:00:00,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [18036521] [2024-11-14 03:00:00,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [18036521] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:00:00,996 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:00:00,996 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:00:00,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [538768844] [2024-11-14 03:00:00,997 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:00:00,998 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-14 03:00:00,998 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 03:00:00,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-14 03:00:00,998 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-14 03:00:00,999 INFO L87 Difference]: Start difference. First operand 3969 states and 7152 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 4 states have internal predecessors, (23), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-11-14 03:00:03,008 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:00:05,013 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:00:07,017 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:00:07,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:00:07,229 INFO L93 Difference]: Finished difference Result 3971 states and 7154 transitions. [2024-11-14 03:00:07,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-14 03:00:07,230 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 4 states have internal predecessors, (23), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 32 [2024-11-14 03:00:07,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:00:07,249 INFO L225 Difference]: With dead ends: 3971 [2024-11-14 03:00:07,249 INFO L226 Difference]: Without dead ends: 3971 [2024-11-14 03:00:07,249 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-14 03:00:07,250 INFO L432 NwaCegarLoop]: 304 mSDtfsCounter, 2 mSDsluCounter, 607 mSDsCounter, 0 mSdLazyCounter, 143 mSolverCounterSat, 0 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 911 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 143 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.2s IncrementalHoareTripleChecker+Time [2024-11-14 03:00:07,250 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 911 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 143 Invalid, 3 Unknown, 0 Unchecked, 6.2s Time] [2024-11-14 03:00:07,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3971 states. [2024-11-14 03:00:07,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3971 to 3971. [2024-11-14 03:00:07,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3971 states, 2988 states have (on average 1.5682730923694779) internal successors, (4686), 3093 states have internal predecessors, (4686), 772 states have call successors, (772), 101 states have call predecessors, (772), 162 states have return successors, (1696), 784 states have call predecessors, (1696), 771 states have call successors, (1696) [2024-11-14 03:00:07,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3971 states to 3971 states and 7154 transitions. [2024-11-14 03:00:07,403 INFO L78 Accepts]: Start accepts. Automaton has 3971 states and 7154 transitions. Word has length 32 [2024-11-14 03:00:07,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:00:07,403 INFO L471 AbstractCegarLoop]: Abstraction has 3971 states and 7154 transitions. [2024-11-14 03:00:07,403 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 4 states have internal predecessors, (23), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-11-14 03:00:07,404 INFO L276 IsEmpty]: Start isEmpty. Operand 3971 states and 7154 transitions. [2024-11-14 03:00:07,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2024-11-14 03:00:07,408 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:00:07,408 INFO L215 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:00:07,408 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-14 03:00:07,409 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:00:07,409 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:00:07,409 INFO L85 PathProgramCache]: Analyzing trace with hash -991017780, now seen corresponding path program 1 times [2024-11-14 03:00:07,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 03:00:07,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684250272] [2024-11-14 03:00:07,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:00:07,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 03:00:07,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:00:07,900 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 03:00:07,901 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2024-11-14 03:00:07,901 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1684250272] [2024-11-14 03:00:07,901 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1684250272] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-14 03:00:07,901 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [358268356] [2024-11-14 03:00:07,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:00:07,901 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 03:00:07,901 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 03:00:07,907 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 03:00:07,910 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-14 03:00:08,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:00:08,975 INFO L255 TraceCheckSpWp]: Trace formula consists of 546 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-14 03:00:08,980 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:00:09,065 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 03:00:09,066 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:00:09,237 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-14 03:00:09,237 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [358268356] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 03:00:09,237 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1477160422] [2024-11-14 03:00:09,267 INFO L159 IcfgInterpreter]: Started Sifa with 31 locations of interest [2024-11-14 03:00:09,267 INFO L166 IcfgInterpreter]: Building call graph [2024-11-14 03:00:09,272 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2024-11-14 03:00:09,278 INFO L176 IcfgInterpreter]: Starting interpretation [2024-11-14 03:00:09,278 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2024-11-14 03:00:37,977 INFO L197 IcfgInterpreter]: Interpreting procedure ldv_zalloc with input of size 504 for LOIs [2024-11-14 03:01:26,868 INFO L197 IcfgInterpreter]: Interpreting procedure ldv_is_err with input of size 514 for LOIs [2024-11-14 03:01:31,005 INFO L197 IcfgInterpreter]: Interpreting procedure assume_abort_if_not with input of size 566 for LOIs [2024-11-14 03:01:35,476 INFO L180 IcfgInterpreter]: Interpretation finished [2024-11-14 03:01:37,569 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse29 ((as const (Array Int Int)) 0))) (let ((.cse31 (store .cse29 0 0))) (let ((.cse30 (store (store .cse31 8 0) 16 0))) (and (= c_~ldv_irq_line_1_3~0 0) (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse8 (select |v_#memory_int_209| 14)) (.cse12 (select |v_#memory_int_197| 15)) (.cse15 (select |v_#memory_int_218| 14)) (.cse11 (select |v_#memory_int_203| 14)) (.cse19 (select |v_#memory_int_206| 15)) (.cse0 (select |v_#memory_int_205| 15)) (.cse21 (select |v_#memory_int_193| 15)) (.cse9 (select |v_#memory_int_215| 15)) (.cse20 (select |v_#memory_int_194| 15)) (.cse16 (select |v_#memory_int_217| 14)) (.cse6 (select |v_#memory_int_190| 14)) (.cse24 (select |v_#memory_int_195| 14)) (.cse22 (select |v_#memory_int_214| 15)) (.cse23 (select |v_#memory_int_212| 15)) (.cse26 (select |v_#memory_int_210| 15)) (.cse17 (select |v_#memory_int_198| 15)) (.cse3 (select |v_#memory_int_202| 15)) (.cse18 (select |v_#memory_int_207| 15)) (.cse10 (select |v_#memory_int_211| 15)) (.cse14 (select |v_#memory_int_204| 15)) (.cse4 (select |v_#memory_int_641| 1)) (.cse1 (select |v_#memory_int_199| 15)) (.cse28 (select |v_#memory_int_216| 15)) (.cse27 (select |v_#memory_int_208| 14)) (.cse5 (select |v_#memory_int_200| 14)) (.cse13 (select |v_#memory_int_196| 15)) (.cse2 (select |v_#memory_int_191| 15)) (.cse25 (select |v_#memory_int_192| 14)) (.cse7 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse0 64 (select .cse1 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse2 32 (select .cse3 32))) |v_#memory_int_202|) (= 48 (select .cse4 0)) (= (store |v_#memory_int_200| 14 (store .cse5 32 (select .cse6 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse7 64 (select .cse8 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse9 129 (select .cse10 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse8 72 (select .cse11 72)))) (= (store |v_#memory_int_197| 15 (store .cse12 16 (select .cse13 16))) |v_#memory_int_196|) (= (store |v_#memory_int_204| 15 (store .cse14 145 (select (select |c_#memory_int| 15) 145))) |c_#memory_int|) (= (store |v_#memory_int_218| 14 (store .cse15 8 (select .cse16 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse17 8 (select .cse12 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse15 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse18 48 (select .cse19 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse20 113 (select .cse21 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse11 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse19 56 (select .cse0 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse22 89 (select .cse23 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse21 121 (select .cse9 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse24 48 (select .cse25 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse26 105 (select .cse20 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse16 16 (select .cse27 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse6 40 (select .cse24 40)))) (= (store |v_#memory_int_216| 15 (store .cse28 81 (select .cse22 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse23 97 (select .cse26 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse29 0 (select .cse17 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse3 40 (select .cse18 40)))) (= (store |v_#memory_int_211| 15 (store .cse10 137 (select .cse14 137))) |v_#memory_int_204|) (= (select .cse4 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse1 72 0) 73 (select .cse28 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse27 24 (select .cse5 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse13 24 (select .cse2 24)))) (= (store |v_#memory_int_192| 14 (store .cse25 56 (select .cse7 56))) |v_#memory_int_213|)))) (= |c_~#tegra_rtc_driver~0.offset| 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|) 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (exists ((|v_#length_273| (Array Int Int))) (and (= (select |v_#length_273| 4) 12) (= (select |v_#length_273| 11) 50) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= |c_#length| (store |v_#length_273| |c_ULTIMATE.start_main_~#ldvarg2~0#1.base| 4)) (= 42 (select |v_#length_273| 6)) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= 153 (select |v_#length_273| 15)))) (= (select |c_ULTIMATE.start_main_old_#valid#1| 12) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| 15) 1) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 14) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| 5) 1) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 0) 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 2) 1) (not (= |c_ULTIMATE.start_main_~#ldvarg2~0#1.base| 0)) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 11) 1) (= c_~tegra_rtc_driver_group0~0.offset 0) (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse32 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse30 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse31 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse32 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse32 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0)))))) (= (select |c_ULTIMATE.start_main_old_#valid#1| 13) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| 4) 1) (= c_~ldv_irq_data_1_0~0.base 0) (= c_~ldv_irq_data_1_3~0.offset 0) (<= (+ |c_#StackHeapBarrier| 1) |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|) (= c_~tegra_rtc_ops_group0~0.offset 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 8) 1) (= c_~ldv_irq_data_1_1~0.offset 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= |c_ULTIMATE.start_main_~#ldvarg2~0#1.offset| 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 10) 1) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 1) 1) (= c_~tegra_rtc_ops_group1~0.base 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 6) 1) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse33 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse33 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse30 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse31 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse33 72))))))) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (= |c_#valid| (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_main_~#ldvarg2~0#1.base| 1)) (= (select |c_ULTIMATE.start_main_old_#valid#1| 3) 1) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 9) 1) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| 7) 1) (= c_~ldv_retval_2~0 0))))) is different from false [2024-11-14 03:01:39,586 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse32 ((as const (Array Int Int)) 0))) (let ((.cse1 (store .cse32 0 0))) (let ((.cse0 (store (store .cse1 8 0) 16 0))) (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= |c_#valid| |c_old(#valid)|) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse2 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse0 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse1 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse2 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse2 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0)))))) (= |c_old(#memory_int)| |c_#memory_int|) (= c_~ldv_irq_data_1_0~0.base 0) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (= 136 |c_ldv_zalloc_#in~size#1|) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= |c_old(#length)| |c_#length|) (= c_~ldv_state_variable_2~0 0) (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse3 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse3 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse0 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse1 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse3 72))))))) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse12 (select |v_#memory_int_209| 14)) (.cse16 (select |v_#memory_int_197| 15)) (.cse18 (select |v_#memory_int_218| 14)) (.cse15 (select |v_#memory_int_203| 14)) (.cse22 (select |v_#memory_int_206| 15)) (.cse4 (select |v_#memory_int_205| 15)) (.cse24 (select |v_#memory_int_193| 15)) (.cse13 (select |v_#memory_int_215| 15)) (.cse23 (select |v_#memory_int_194| 15)) (.cse19 (select |v_#memory_int_217| 14)) (.cse10 (select |v_#memory_int_190| 14)) (.cse27 (select |v_#memory_int_195| 14)) (.cse25 (select |v_#memory_int_214| 15)) (.cse26 (select |v_#memory_int_212| 15)) (.cse29 (select |v_#memory_int_210| 15)) (.cse20 (select |v_#memory_int_198| 15)) (.cse7 (select |v_#memory_int_202| 15)) (.cse21 (select |v_#memory_int_207| 15)) (.cse14 (select |v_#memory_int_211| 15)) (.cse33 (select |v_#memory_int_204| 15)) (.cse8 (select |v_#memory_int_641| 1)) (.cse5 (select |v_#memory_int_199| 15)) (.cse31 (select |v_#memory_int_216| 15)) (.cse30 (select |v_#memory_int_208| 14)) (.cse9 (select |v_#memory_int_200| 14)) (.cse17 (select |v_#memory_int_196| 15)) (.cse6 (select |v_#memory_int_191| 15)) (.cse28 (select |v_#memory_int_192| 14)) (.cse11 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse4 64 (select .cse5 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse6 32 (select .cse7 32))) |v_#memory_int_202|) (= 48 (select .cse8 0)) (= (store |v_#memory_int_200| 14 (store .cse9 32 (select .cse10 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse11 64 (select .cse12 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse13 129 (select .cse14 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse12 72 (select .cse15 72)))) (= (store |v_#memory_int_197| 15 (store .cse16 16 (select .cse17 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse18 8 (select .cse19 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse20 8 (select .cse16 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse18 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse21 48 (select .cse22 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse23 113 (select .cse24 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse15 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse22 56 (select .cse4 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse25 89 (select .cse26 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse24 121 (select .cse13 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse27 48 (select .cse28 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse29 105 (select .cse23 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse19 16 (select .cse30 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse10 40 (select .cse27 40)))) (= (store |v_#memory_int_216| 15 (store .cse31 81 (select .cse25 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse26 97 (select .cse29 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse32 0 (select .cse20 0)))) (= |c_old(#memory_int)| (store |v_#memory_int_204| 15 (store .cse33 145 (select (select |c_old(#memory_int)| 15) 145)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse7 40 (select .cse21 40)))) (= (store |v_#memory_int_211| 15 (store .cse14 137 (select .cse33 137))) |v_#memory_int_204|) (= (select .cse8 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse5 72 0) 73 (select .cse31 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse30 24 (select .cse9 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse17 24 (select .cse6 24)))) (= (store |v_#memory_int_192| 14 (store .cse28 56 (select .cse11 56))) |v_#memory_int_213|)))) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= (+ |c_#StackHeapBarrier| 1) |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1) |c_old(#valid)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |c_old(#length)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0))) (= c_~ldv_retval_2~0 0))))) is different from false [2024-11-14 03:01:41,612 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse32 ((as const (Array Int Int)) 0))) (let ((.cse1 (store .cse32 0 0))) (let ((.cse0 (store (store .cse1 8 0) 16 0))) (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= |c_#valid| |c_old(#valid)|) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= |c_ldv_zalloc_~size#1| 136) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse2 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse0 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse1 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse2 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse2 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0)))))) (= |c_old(#memory_int)| |c_#memory_int|) (= c_~ldv_irq_data_1_0~0.base 0) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= c_~ldv_irq_line_1_1~0 0) (<= 0 (+ |c_ldv_zalloc_~tmp___0~1#1| 2147483648)) (= c_~tegra_rtc_driver_group0~0.base 0) (= 136 |c_ldv_zalloc_#in~size#1|) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= |c_old(#length)| |c_#length|) (= c_~ldv_state_variable_2~0 0) (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse3 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse3 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse0 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse1 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse3 72))))))) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse12 (select |v_#memory_int_209| 14)) (.cse16 (select |v_#memory_int_197| 15)) (.cse18 (select |v_#memory_int_218| 14)) (.cse15 (select |v_#memory_int_203| 14)) (.cse22 (select |v_#memory_int_206| 15)) (.cse4 (select |v_#memory_int_205| 15)) (.cse24 (select |v_#memory_int_193| 15)) (.cse13 (select |v_#memory_int_215| 15)) (.cse23 (select |v_#memory_int_194| 15)) (.cse19 (select |v_#memory_int_217| 14)) (.cse10 (select |v_#memory_int_190| 14)) (.cse27 (select |v_#memory_int_195| 14)) (.cse25 (select |v_#memory_int_214| 15)) (.cse26 (select |v_#memory_int_212| 15)) (.cse29 (select |v_#memory_int_210| 15)) (.cse20 (select |v_#memory_int_198| 15)) (.cse7 (select |v_#memory_int_202| 15)) (.cse21 (select |v_#memory_int_207| 15)) (.cse14 (select |v_#memory_int_211| 15)) (.cse33 (select |v_#memory_int_204| 15)) (.cse8 (select |v_#memory_int_641| 1)) (.cse5 (select |v_#memory_int_199| 15)) (.cse31 (select |v_#memory_int_216| 15)) (.cse30 (select |v_#memory_int_208| 14)) (.cse9 (select |v_#memory_int_200| 14)) (.cse17 (select |v_#memory_int_196| 15)) (.cse6 (select |v_#memory_int_191| 15)) (.cse28 (select |v_#memory_int_192| 14)) (.cse11 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse4 64 (select .cse5 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse6 32 (select .cse7 32))) |v_#memory_int_202|) (= 48 (select .cse8 0)) (= (store |v_#memory_int_200| 14 (store .cse9 32 (select .cse10 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse11 64 (select .cse12 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse13 129 (select .cse14 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse12 72 (select .cse15 72)))) (= (store |v_#memory_int_197| 15 (store .cse16 16 (select .cse17 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse18 8 (select .cse19 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse20 8 (select .cse16 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse18 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse21 48 (select .cse22 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse23 113 (select .cse24 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse15 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse22 56 (select .cse4 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse25 89 (select .cse26 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse24 121 (select .cse13 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse27 48 (select .cse28 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse29 105 (select .cse23 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse19 16 (select .cse30 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse10 40 (select .cse27 40)))) (= (store |v_#memory_int_216| 15 (store .cse31 81 (select .cse25 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse26 97 (select .cse29 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse32 0 (select .cse20 0)))) (= |c_old(#memory_int)| (store |v_#memory_int_204| 15 (store .cse33 145 (select (select |c_old(#memory_int)| 15) 145)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse7 40 (select .cse21 40)))) (= (store |v_#memory_int_211| 15 (store .cse14 137 (select .cse33 137))) |v_#memory_int_204|) (= (select .cse8 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse5 72 0) 73 (select .cse31 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse30 24 (select .cse9 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse17 24 (select .cse6 24)))) (= (store |v_#memory_int_192| 14 (store .cse28 56 (select .cse11 56))) |v_#memory_int_213|)))) (<= |c_ldv_zalloc_~tmp___0~1#1| 2147483647) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= (+ |c_#StackHeapBarrier| 1) |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1) |c_old(#valid)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |c_old(#length)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0))) (= c_~ldv_retval_2~0 0))))) is different from false [2024-11-14 03:01:43,635 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse28 ((as const (Array Int Int)) 0))) (let ((.cse31 (store .cse28 0 0))) (let ((.cse30 (store (store .cse31 8 0) 16 0))) (and (= c_~ldv_irq_line_1_3~0 0) (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse8 (select |v_#memory_int_209| 14)) (.cse12 (select |v_#memory_int_197| 15)) (.cse14 (select |v_#memory_int_218| 14)) (.cse11 (select |v_#memory_int_203| 14)) (.cse18 (select |v_#memory_int_206| 15)) (.cse0 (select |v_#memory_int_205| 15)) (.cse20 (select |v_#memory_int_193| 15)) (.cse9 (select |v_#memory_int_215| 15)) (.cse19 (select |v_#memory_int_194| 15)) (.cse15 (select |v_#memory_int_217| 14)) (.cse6 (select |v_#memory_int_190| 14)) (.cse23 (select |v_#memory_int_195| 14)) (.cse21 (select |v_#memory_int_214| 15)) (.cse22 (select |v_#memory_int_212| 15)) (.cse25 (select |v_#memory_int_210| 15)) (.cse16 (select |v_#memory_int_198| 15)) (.cse3 (select |v_#memory_int_202| 15)) (.cse17 (select |v_#memory_int_207| 15)) (.cse10 (select |v_#memory_int_211| 15)) (.cse29 (select |v_#memory_int_204| 15)) (.cse4 (select |v_#memory_int_641| 1)) (.cse1 (select |v_#memory_int_199| 15)) (.cse27 (select |v_#memory_int_216| 15)) (.cse26 (select |v_#memory_int_208| 14)) (.cse5 (select |v_#memory_int_200| 14)) (.cse13 (select |v_#memory_int_196| 15)) (.cse2 (select |v_#memory_int_191| 15)) (.cse24 (select |v_#memory_int_192| 14)) (.cse7 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse0 64 (select .cse1 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse2 32 (select .cse3 32))) |v_#memory_int_202|) (= 48 (select .cse4 0)) (= (store |v_#memory_int_200| 14 (store .cse5 32 (select .cse6 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse7 64 (select .cse8 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse9 129 (select .cse10 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse8 72 (select .cse11 72)))) (= (store |v_#memory_int_197| 15 (store .cse12 16 (select .cse13 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse14 8 (select .cse15 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse16 8 (select .cse12 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse14 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse17 48 (select .cse18 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse19 113 (select .cse20 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse11 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse18 56 (select .cse0 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse21 89 (select .cse22 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse20 121 (select .cse9 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse23 48 (select .cse24 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse25 105 (select .cse19 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse15 16 (select .cse26 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse6 40 (select .cse23 40)))) (= (store |v_#memory_int_216| 15 (store .cse27 81 (select .cse21 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse22 97 (select .cse25 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse28 0 (select .cse16 0)))) (= |c_old(#memory_int)| (store |v_#memory_int_204| 15 (store .cse29 145 (select (select |c_old(#memory_int)| 15) 145)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse3 40 (select .cse17 40)))) (= (store |v_#memory_int_211| 15 (store .cse10 137 (select .cse29 137))) |v_#memory_int_204|) (= (select .cse4 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse1 72 0) 73 (select .cse27 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse26 24 (select .cse5 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse13 24 (select .cse2 24)))) (= (store |v_#memory_int_192| 14 (store .cse24 56 (select .cse7 56))) |v_#memory_int_213|)))) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= (store |c_old(#memory_int)| |c_ldv_zalloc_~p~1#1.base| .cse28) |c_#memory_int|) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= 0 (select |c_old(#valid)| |c_ldv_zalloc_~p~1#1.base|)) (= c_~tegra_rtc_driver_group0~0.offset 0) (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse32 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse30 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse31 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse32 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse32 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0)))))) (= c_~ldv_irq_data_1_0~0.base 0) (= |c_#valid| (store |c_old(#valid)| |c_ldv_zalloc_~p~1#1.base| 1)) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= |c_ldv_zalloc_~p~1#1.offset| 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (<= (+ 1 |c_ldv_zalloc_~p~1#1.base|) |c_#StackHeapBarrier|) (= c_~ldv_irq_line_1_1~0 0) (= |c_#length| (store |c_old(#length)| |c_ldv_zalloc_~p~1#1.base| 136)) (= c_~tegra_rtc_driver_group0~0.base 0) (= 136 |c_ldv_zalloc_#in~size#1|) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse33 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse33 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse30 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse31 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse33 72))))))) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (not (= 0 |c_ldv_zalloc_~p~1#1.base|)) (= c_~ldv_retval_0~0 0) (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= (+ |c_#StackHeapBarrier| 1) |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1) |c_old(#valid)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |c_old(#length)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0))) (= c_~ldv_retval_2~0 0))))) is different from false [2024-11-14 03:01:45,663 WARN L851 $PredicateComparison]: unable to prove that (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (= c_~ldv_irq_data_1_0~0.base 0) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (= c_~ldv_retval_2~0 0) (let ((.cse13 ((as const (Array Int Int)) 0))) (let ((.cse78 (store .cse13 0 0))) (let ((.cse77 (store (store .cse78 8 0) 16 0))) (let ((.cse4 (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse79 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse77 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse78 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse79 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse79 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))))))) (.cse8 (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse76 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse76 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse77 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse78 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse76 72)))))))) (.cse12 (+ |c_#StackHeapBarrier| 1)) (.cse43 (= |c_assume_abort_if_not_#in~cond| 1)) (.cse44 (= |c_assume_abort_if_not_#in~cond| 0))) (or (exists ((|v_old(#valid)_BEFORE_CALL_7| (Array Int Int)) (|v_old(#memory_int)_BEFORE_CALL_7| (Array Int (Array Int Int))) (|v_old(#length)_BEFORE_CALL_7| (Array Int Int)) (|v_ldv_zalloc_#t~ret16#1_BEFORE_CALL_5| Int) (|v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| Int)) (let ((.cse9 (= |v_ldv_zalloc_#t~ret16#1_BEFORE_CALL_5| 0))) (and (<= |v_ldv_zalloc_#t~ret16#1_BEFORE_CALL_5| 1) (let ((.cse0 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse22 (select |v_#memory_int_209| 14)) (.cse27 (select |v_#memory_int_197| 15)) (.cse29 (select |v_#memory_int_218| 14)) (.cse25 (select |v_#memory_int_203| 14)) (.cse33 (select |v_#memory_int_206| 15)) (.cse14 (select |v_#memory_int_205| 15)) (.cse35 (select |v_#memory_int_193| 15)) (.cse23 (select |v_#memory_int_215| 15)) (.cse34 (select |v_#memory_int_194| 15)) (.cse30 (select |v_#memory_int_217| 14)) (.cse20 (select |v_#memory_int_190| 14)) (.cse38 (select |v_#memory_int_195| 14)) (.cse36 (select |v_#memory_int_214| 15)) (.cse37 (select |v_#memory_int_212| 15)) (.cse40 (select |v_#memory_int_210| 15)) (.cse31 (select |v_#memory_int_198| 15)) (.cse17 (select |v_#memory_int_202| 15)) (.cse32 (select |v_#memory_int_207| 15)) (.cse24 (select |v_#memory_int_211| 15)) (.cse26 (select |v_#memory_int_204| 15)) (.cse18 (select |v_#memory_int_641| 1)) (.cse15 (select |v_#memory_int_199| 15)) (.cse42 (select |v_#memory_int_216| 15)) (.cse41 (select |v_#memory_int_208| 14)) (.cse19 (select |v_#memory_int_200| 14)) (.cse28 (select |v_#memory_int_196| 15)) (.cse16 (select |v_#memory_int_191| 15)) (.cse39 (select |v_#memory_int_192| 14)) (.cse21 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse14 64 (select .cse15 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse16 32 (select .cse17 32))) |v_#memory_int_202|) (= 48 (select .cse18 0)) (= (store |v_#memory_int_200| 14 (store .cse19 32 (select .cse20 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse21 64 (select .cse22 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse23 129 (select .cse24 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse22 72 (select .cse25 72)))) (= |v_old(#memory_int)_BEFORE_CALL_7| (store |v_#memory_int_204| 15 (store .cse26 145 (select (select |v_old(#memory_int)_BEFORE_CALL_7| 15) 145)))) (= (store |v_#memory_int_197| 15 (store .cse27 16 (select .cse28 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse29 8 (select .cse30 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse31 8 (select .cse27 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse29 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse32 48 (select .cse33 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse34 113 (select .cse35 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse25 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse33 56 (select .cse14 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse36 89 (select .cse37 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse35 121 (select .cse23 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse38 48 (select .cse39 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse40 105 (select .cse34 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse30 16 (select .cse41 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse20 40 (select .cse38 40)))) (= (store |v_#memory_int_216| 15 (store .cse42 81 (select .cse36 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse37 97 (select .cse40 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse13 0 (select .cse31 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse17 40 (select .cse32 40)))) (= (store |v_#memory_int_211| 15 (store .cse24 137 (select .cse26 137))) |v_#memory_int_204|) (= (select .cse18 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse15 72 0) 73 (select .cse42 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse41 24 (select .cse19 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse28 24 (select .cse16 24)))) (= (store |v_#memory_int_192| 14 (store .cse39 56 (select .cse21 56))) |v_#memory_int_213|))))) (.cse1 (not (= |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 0))) (.cse3 (<= (+ |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 1) |c_#StackHeapBarrier|)) (.cse2 (mod |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 18446744073709551616)) (.cse5 (= (select |v_old(#valid)_BEFORE_CALL_7| |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13|) 0)) (.cse6 (= |c_#memory_int| (store |v_old(#memory_int)_BEFORE_CALL_7| |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| .cse13))) (.cse7 (= |c_#valid| (store |v_old(#valid)_BEFORE_CALL_7| |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 1))) (.cse10 (= (store |v_old(#length)_BEFORE_CALL_7| |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 136) |c_#length|)) (.cse11 (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= .cse12 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |v_old(#length)_BEFORE_CALL_7|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1) |v_old(#valid)_BEFORE_CALL_7|) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0))))) (or (and .cse0 .cse1 (<= .cse2 2012) .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 (not (= .cse2 0)) .cse9 .cse10 .cse11) (and .cse0 .cse1 .cse3 (<= 2013 .cse2) .cse4 .cse5 .cse6 (= |v_ldv_zalloc_#t~ret16#1_BEFORE_CALL_5| 1) .cse7 .cse8 .cse10 .cse11))) (or (and .cse43 .cse9) (and (not .cse9) .cse44)) (<= 0 |v_ldv_zalloc_#t~ret16#1_BEFORE_CALL_5|)))) (and .cse4 .cse8 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| Int) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_old(#memory_int)_BEFORE_CALL_9| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int)) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#length_273| (Array Int Int)) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse54 (select |v_#memory_int_209| 14)) (.cse59 (select |v_#memory_int_197| 15)) (.cse61 (select |v_#memory_int_218| 14)) (.cse57 (select |v_#memory_int_203| 14)) (.cse65 (select |v_#memory_int_206| 15)) (.cse46 (select |v_#memory_int_205| 15)) (.cse67 (select |v_#memory_int_193| 15)) (.cse55 (select |v_#memory_int_215| 15)) (.cse66 (select |v_#memory_int_194| 15)) (.cse62 (select |v_#memory_int_217| 14)) (.cse52 (select |v_#memory_int_190| 14)) (.cse70 (select |v_#memory_int_195| 14)) (.cse68 (select |v_#memory_int_214| 15)) (.cse69 (select |v_#memory_int_212| 15)) (.cse72 (select |v_#memory_int_210| 15)) (.cse45 (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1)) (.cse63 (select |v_#memory_int_198| 15)) (.cse49 (select |v_#memory_int_202| 15)) (.cse64 (select |v_#memory_int_207| 15)) (.cse56 (select |v_#memory_int_211| 15)) (.cse75 (select |v_#memory_int_204| 15)) (.cse50 (select |v_#memory_int_641| 1)) (.cse47 (select |v_#memory_int_199| 15)) (.cse74 (select |v_#memory_int_216| 15)) (.cse73 (select |v_#memory_int_208| 14)) (.cse51 (select |v_#memory_int_200| 14)) (.cse60 (select |v_#memory_int_196| 15)) (.cse48 (select |v_#memory_int_191| 15)) (.cse71 (select |v_#memory_int_192| 14)) (.cse53 (select |v_#memory_int_213| 14))) (and (= (select .cse45 |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15|) 0) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= .cse12 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (store |v_#memory_int_205| 15 (store .cse46 64 (select .cse47 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse48 32 (select .cse49 32))) |v_#memory_int_202|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= 48 (select .cse50 0)) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (store |v_#memory_int_200| 14 (store .cse51 32 (select .cse52 32))) |v_#memory_int_190|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_#memory_int_213| 14 (store .cse53 64 (select .cse54 64))) |v_#memory_int_209|) (= (store |v_old(#memory_int)_BEFORE_CALL_9| |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| .cse13) |c_#memory_int|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (store |v_#memory_int_215| 15 (store .cse55 129 (select .cse56 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse54 72 (select .cse57 72)))) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (let ((.cse58 (= (mod |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 18446744073709551616) 0))) (or (and (not .cse58) .cse43) (and .cse44 .cse58))) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= (store |v_#memory_int_197| 15 (store .cse59 16 (select .cse60 16))) |v_#memory_int_196|) (= |c_#length| (store (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 136)) (= (store |v_#memory_int_218| 14 (store .cse61 8 (select .cse62 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse63 8 (select .cse59 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse61 0))) |v_#memory_int_218|) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= (store |v_#memory_int_207| 15 (store .cse64 48 (select .cse65 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse66 113 (select .cse67 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse57 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse65 56 (select .cse46 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse68 89 (select .cse69 89))) |v_#memory_int_212|) (= 42 (select |v_#length_273| 6)) (= (store |v_#memory_int_193| 15 (store .cse67 121 (select .cse55 121))) |v_#memory_int_215|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= (store |v_#memory_int_195| 14 (store .cse70 48 (select .cse71 48))) |v_#memory_int_192|) (= 32 (select |v_#length_273| 7)) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse72 105 (select .cse66 105)))) (<= (+ |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 1) |c_#StackHeapBarrier|) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse62 16 (select .cse73 16)))) (= (select |v_#length_273| 10) 10) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse52 40 (select .cse70 40)))) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= (store |v_#memory_int_216| 15 (store .cse74 81 (select .cse68 81))) |v_#memory_int_214|) (= |v_old(#memory_int)_BEFORE_CALL_9| (store |v_#memory_int_204| 15 (store .cse75 145 (select (select |v_old(#memory_int)_BEFORE_CALL_9| 15) 145)))) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (store |v_#memory_int_212| 15 (store .cse69 97 (select .cse72 97))) |v_#memory_int_210|) (= |c_#valid| (store .cse45 |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 1)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse13 0 (select .cse63 0)))) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse49 40 (select .cse64 40)))) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= (store |v_#memory_int_211| 15 (store .cse56 137 (select .cse75 137))) |v_#memory_int_204|) (= 153 (select |v_#length_273| 15)) (= (select .cse50 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse47 72 0) 73 (select .cse74 73))) |v_#memory_int_216|) (not (= |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 0)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (store |v_#memory_int_208| 14 (store .cse73 24 (select .cse51 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse60 24 (select .cse48 24)))) (= (store |v_#memory_int_192| 14 (store .cse71 56 (select .cse53 56))) |v_#memory_int_213|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0))))))))))) is different from false [2024-11-14 03:01:47,699 WARN L851 $PredicateComparison]: unable to prove that (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (= c_~ldv_irq_data_1_0~0.base 0) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (let ((.cse12 ((as const (Array Int Int)) 0))) (let ((.cse68 (store .cse12 0 0))) (let ((.cse67 (store (store .cse68 8 0) 16 0))) (let ((.cse0 (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse69 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse67 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse68 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse69 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse69 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))))))) (.cse2 (+ |c_#StackHeapBarrier| 1)) (.cse33 (= |c_assume_abort_if_not_#in~cond| 1)) (.cse34 (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse66 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse66 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse67 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse68 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse66 72))))))))) (or (and .cse0 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| Int) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_old(#memory_int)_BEFORE_CALL_9| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int)) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#length_273| (Array Int Int)) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse11 (select |v_#memory_int_209| 14)) (.cse16 (select |v_#memory_int_197| 15)) (.cse18 (select |v_#memory_int_218| 14)) (.cse15 (select |v_#memory_int_203| 14)) (.cse22 (select |v_#memory_int_206| 15)) (.cse3 (select |v_#memory_int_205| 15)) (.cse24 (select |v_#memory_int_193| 15)) (.cse13 (select |v_#memory_int_215| 15)) (.cse23 (select |v_#memory_int_194| 15)) (.cse19 (select |v_#memory_int_217| 14)) (.cse9 (select |v_#memory_int_190| 14)) (.cse27 (select |v_#memory_int_195| 14)) (.cse25 (select |v_#memory_int_214| 15)) (.cse26 (select |v_#memory_int_212| 15)) (.cse29 (select |v_#memory_int_210| 15)) (.cse1 (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1)) (.cse20 (select |v_#memory_int_198| 15)) (.cse6 (select |v_#memory_int_202| 15)) (.cse21 (select |v_#memory_int_207| 15)) (.cse14 (select |v_#memory_int_211| 15)) (.cse32 (select |v_#memory_int_204| 15)) (.cse7 (select |v_#memory_int_641| 1)) (.cse4 (select |v_#memory_int_199| 15)) (.cse31 (select |v_#memory_int_216| 15)) (.cse30 (select |v_#memory_int_208| 14)) (.cse8 (select |v_#memory_int_200| 14)) (.cse17 (select |v_#memory_int_196| 15)) (.cse5 (select |v_#memory_int_191| 15)) (.cse28 (select |v_#memory_int_192| 14)) (.cse10 (select |v_#memory_int_213| 14))) (and (= (select .cse1 |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15|) 0) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= .cse2 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (store |v_#memory_int_205| 15 (store .cse3 64 (select .cse4 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse5 32 (select .cse6 32))) |v_#memory_int_202|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= 48 (select .cse7 0)) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (store |v_#memory_int_200| 14 (store .cse8 32 (select .cse9 32))) |v_#memory_int_190|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_#memory_int_213| 14 (store .cse10 64 (select .cse11 64))) |v_#memory_int_209|) (= (store |v_old(#memory_int)_BEFORE_CALL_9| |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| .cse12) |c_#memory_int|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (store |v_#memory_int_215| 15 (store .cse13 129 (select .cse14 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse11 72 (select .cse15 72)))) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= (store |v_#memory_int_197| 15 (store .cse16 16 (select .cse17 16))) |v_#memory_int_196|) (= |c_#length| (store (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 136)) (not (= (mod |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 18446744073709551616) 0)) (= (store |v_#memory_int_218| 14 (store .cse18 8 (select .cse19 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse20 8 (select .cse16 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse18 0))) |v_#memory_int_218|) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= (store |v_#memory_int_207| 15 (store .cse21 48 (select .cse22 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse23 113 (select .cse24 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse15 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse22 56 (select .cse3 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse25 89 (select .cse26 89))) |v_#memory_int_212|) (= 42 (select |v_#length_273| 6)) (= (store |v_#memory_int_193| 15 (store .cse24 121 (select .cse13 121))) |v_#memory_int_215|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= (store |v_#memory_int_195| 14 (store .cse27 48 (select .cse28 48))) |v_#memory_int_192|) (= 32 (select |v_#length_273| 7)) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse29 105 (select .cse23 105)))) (<= (+ |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 1) |c_#StackHeapBarrier|) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse19 16 (select .cse30 16)))) (= (select |v_#length_273| 10) 10) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse9 40 (select .cse27 40)))) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= (store |v_#memory_int_216| 15 (store .cse31 81 (select .cse25 81))) |v_#memory_int_214|) (= |v_old(#memory_int)_BEFORE_CALL_9| (store |v_#memory_int_204| 15 (store .cse32 145 (select (select |v_old(#memory_int)_BEFORE_CALL_9| 15) 145)))) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (store |v_#memory_int_212| 15 (store .cse26 97 (select .cse29 97))) |v_#memory_int_210|) (= |c_#valid| (store .cse1 |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 1)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse12 0 (select .cse20 0)))) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse6 40 (select .cse21 40)))) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= (store |v_#memory_int_211| 15 (store .cse14 137 (select .cse32 137))) |v_#memory_int_204|) (= 153 (select |v_#length_273| 15)) (= (select .cse7 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse4 72 0) 73 (select .cse31 73))) |v_#memory_int_216|) (not (= |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_15| 0)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (store |v_#memory_int_208| 14 (store .cse30 24 (select .cse8 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse17 24 (select .cse5 24)))) (= (store |v_#memory_int_192| 14 (store .cse28 56 (select .cse10 56))) |v_#memory_int_213|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0)))) .cse33 .cse34) (and .cse0 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| Int) (|v_old(#memory_int)_BEFORE_CALL_7| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int)) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#length_273| (Array Int Int)) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse43 (select |v_#memory_int_209| 14)) (.cse49 (select |v_#memory_int_197| 15)) (.cse51 (select |v_#memory_int_218| 14)) (.cse47 (select |v_#memory_int_203| 14)) (.cse55 (select |v_#memory_int_206| 15)) (.cse35 (select |v_#memory_int_205| 15)) (.cse57 (select |v_#memory_int_193| 15)) (.cse45 (select |v_#memory_int_215| 15)) (.cse56 (select |v_#memory_int_194| 15)) (.cse52 (select |v_#memory_int_217| 14)) (.cse41 (select |v_#memory_int_190| 14)) (.cse60 (select |v_#memory_int_195| 14)) (.cse58 (select |v_#memory_int_214| 15)) (.cse44 (mod |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 18446744073709551616)) (.cse59 (select |v_#memory_int_212| 15)) (.cse62 (select |v_#memory_int_210| 15)) (.cse53 (select |v_#memory_int_198| 15)) (.cse38 (select |v_#memory_int_202| 15)) (.cse54 (select |v_#memory_int_207| 15)) (.cse46 (select |v_#memory_int_211| 15)) (.cse48 (select |v_#memory_int_204| 15)) (.cse39 (select |v_#memory_int_641| 1)) (.cse36 (select |v_#memory_int_199| 15)) (.cse64 (select |v_#memory_int_216| 15)) (.cse65 (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1)) (.cse63 (select |v_#memory_int_208| 14)) (.cse40 (select |v_#memory_int_200| 14)) (.cse50 (select |v_#memory_int_196| 15)) (.cse37 (select |v_#memory_int_191| 15)) (.cse61 (select |v_#memory_int_192| 14)) (.cse42 (select |v_#memory_int_213| 14))) (and (not (= |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 0)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (= (store (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 136) |c_#length|) (<= .cse2 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (store |v_#memory_int_205| 15 (store .cse35 64 (select .cse36 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse37 32 (select .cse38 32))) |v_#memory_int_202|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= 48 (select .cse39 0)) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (store |v_#memory_int_200| 14 (store .cse40 32 (select .cse41 32))) |v_#memory_int_190|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_#memory_int_213| 14 (store .cse42 64 (select .cse43 64))) |v_#memory_int_209|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (<= .cse44 2012) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (store |v_#memory_int_215| 15 (store .cse45 129 (select .cse46 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse43 72 (select .cse47 72)))) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (<= (+ |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 1) |c_#StackHeapBarrier|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= |v_old(#memory_int)_BEFORE_CALL_7| (store |v_#memory_int_204| 15 (store .cse48 145 (select (select |v_old(#memory_int)_BEFORE_CALL_7| 15) 145)))) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= (store |v_#memory_int_197| 15 (store .cse49 16 (select .cse50 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse51 8 (select .cse52 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse53 8 (select .cse49 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse51 0))) |v_#memory_int_218|) (= |c_#memory_int| (store |v_old(#memory_int)_BEFORE_CALL_7| |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| .cse12)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= (store |v_#memory_int_207| 15 (store .cse54 48 (select .cse55 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse56 113 (select .cse57 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse47 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse55 56 (select .cse35 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse58 89 (select .cse59 89))) |v_#memory_int_212|) (= 42 (select |v_#length_273| 6)) (= (store |v_#memory_int_193| 15 (store .cse57 121 (select .cse45 121))) |v_#memory_int_215|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= (store |v_#memory_int_195| 14 (store .cse60 48 (select .cse61 48))) |v_#memory_int_192|) (= 32 (select |v_#length_273| 7)) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse62 105 (select .cse56 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse52 16 (select .cse63 16)))) (= (select |v_#length_273| 10) 10) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse41 40 (select .cse60 40)))) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= (store |v_#memory_int_216| 15 (store .cse64 81 (select .cse58 81))) |v_#memory_int_214|) (= 88 (select |v_#length_273| 14)) (not (= .cse44 0)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (store |v_#memory_int_212| 15 (store .cse59 97 (select .cse62 97))) |v_#memory_int_210|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse12 0 (select .cse53 0)))) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse38 40 (select .cse54 40)))) (= (select .cse65 |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13|) 0) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= (store |v_#memory_int_211| 15 (store .cse46 137 (select .cse48 137))) |v_#memory_int_204|) (= 153 (select |v_#length_273| 15)) (= (select .cse39 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse36 72 0) 73 (select .cse64 73))) |v_#memory_int_216|) (= |c_#valid| (store .cse65 |v_ldv_zalloc_~p~1#1.base_BEFORE_CALL_13| 1)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (store |v_#memory_int_208| 14 (store .cse63 24 (select .cse40 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse50 24 (select .cse37 24)))) (= (store |v_#memory_int_192| 14 (store .cse61 56 (select .cse42 56))) |v_#memory_int_213|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0)))) .cse33 .cse34)))))) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (= c_~ldv_retval_2~0 0)) is different from false [2024-11-14 03:01:49,723 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse28 ((as const (Array Int Int)) 0))) (let ((.cse31 (store .cse28 0 0))) (let ((.cse30 (store (store .cse31 8 0) 16 0))) (and (= c_~ldv_irq_line_1_3~0 0) (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse8 (select |v_#memory_int_209| 14)) (.cse12 (select |v_#memory_int_197| 15)) (.cse14 (select |v_#memory_int_218| 14)) (.cse11 (select |v_#memory_int_203| 14)) (.cse18 (select |v_#memory_int_206| 15)) (.cse0 (select |v_#memory_int_205| 15)) (.cse20 (select |v_#memory_int_193| 15)) (.cse9 (select |v_#memory_int_215| 15)) (.cse19 (select |v_#memory_int_194| 15)) (.cse15 (select |v_#memory_int_217| 14)) (.cse6 (select |v_#memory_int_190| 14)) (.cse23 (select |v_#memory_int_195| 14)) (.cse21 (select |v_#memory_int_214| 15)) (.cse22 (select |v_#memory_int_212| 15)) (.cse25 (select |v_#memory_int_210| 15)) (.cse16 (select |v_#memory_int_198| 15)) (.cse3 (select |v_#memory_int_202| 15)) (.cse17 (select |v_#memory_int_207| 15)) (.cse10 (select |v_#memory_int_211| 15)) (.cse29 (select |v_#memory_int_204| 15)) (.cse4 (select |v_#memory_int_641| 1)) (.cse1 (select |v_#memory_int_199| 15)) (.cse27 (select |v_#memory_int_216| 15)) (.cse26 (select |v_#memory_int_208| 14)) (.cse5 (select |v_#memory_int_200| 14)) (.cse13 (select |v_#memory_int_196| 15)) (.cse2 (select |v_#memory_int_191| 15)) (.cse24 (select |v_#memory_int_192| 14)) (.cse7 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse0 64 (select .cse1 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse2 32 (select .cse3 32))) |v_#memory_int_202|) (= 48 (select .cse4 0)) (= (store |v_#memory_int_200| 14 (store .cse5 32 (select .cse6 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse7 64 (select .cse8 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse9 129 (select .cse10 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse8 72 (select .cse11 72)))) (= (store |v_#memory_int_197| 15 (store .cse12 16 (select .cse13 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse14 8 (select .cse15 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse16 8 (select .cse12 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse14 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse17 48 (select .cse18 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse19 113 (select .cse20 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse11 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse18 56 (select .cse0 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse21 89 (select .cse22 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse20 121 (select .cse9 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse23 48 (select .cse24 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse25 105 (select .cse19 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse15 16 (select .cse26 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse6 40 (select .cse23 40)))) (= (store |v_#memory_int_216| 15 (store .cse27 81 (select .cse21 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse22 97 (select .cse25 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse28 0 (select .cse16 0)))) (= |c_old(#memory_int)| (store |v_#memory_int_204| 15 (store .cse29 145 (select (select |c_old(#memory_int)| 15) 145)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse3 40 (select .cse17 40)))) (= (store |v_#memory_int_211| 15 (store .cse10 137 (select .cse29 137))) |v_#memory_int_204|) (= (select .cse4 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse1 72 0) 73 (select .cse27 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse26 24 (select .cse5 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse13 24 (select .cse2 24)))) (= (store |v_#memory_int_192| 14 (store .cse24 56 (select .cse7 56))) |v_#memory_int_213|)))) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (not (= (mod |c_ldv_zalloc_~p~1#1.base| 18446744073709551616) 0)) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= (store |c_old(#memory_int)| |c_ldv_zalloc_~p~1#1.base| .cse28) |c_#memory_int|) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= 0 (select |c_old(#valid)| |c_ldv_zalloc_~p~1#1.base|)) (= c_~tegra_rtc_driver_group0~0.offset 0) (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse32 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse30 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse31 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse32 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse32 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0)))))) (= c_~ldv_irq_data_1_0~0.base 0) (= |c_#valid| (store |c_old(#valid)| |c_ldv_zalloc_~p~1#1.base| 1)) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= |c_ldv_zalloc_~p~1#1.offset| 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (<= (+ 1 |c_ldv_zalloc_~p~1#1.base|) |c_#StackHeapBarrier|) (= c_~ldv_irq_line_1_1~0 0) (= |c_#length| (store |c_old(#length)| |c_ldv_zalloc_~p~1#1.base| 136)) (= c_~tegra_rtc_driver_group0~0.base 0) (= 136 |c_ldv_zalloc_#in~size#1|) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse33 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse33 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse30 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse31 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse33 72))))))) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (not (= 0 |c_ldv_zalloc_~p~1#1.base|)) (= c_~ldv_retval_0~0 0) (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= (+ |c_#StackHeapBarrier| 1) |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1) |c_old(#valid)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |c_old(#length)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0))) (= c_~ldv_retval_2~0 0))))) is different from false [2024-11-14 03:01:51,739 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse17 ((as const (Array Int Int)) 0))) (let ((.cse1 (store .cse17 0 0))) (let ((.cse0 (store (store .cse1 8 0) 16 0))) (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= |c_ldv_is_err_#in~ptr.offset| 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse2 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse0 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse1 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse2 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse2 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0)))))) (= c_~ldv_irq_data_1_0~0.base 0) (not (= |c_ldv_is_err_#in~ptr.base| 0)) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (<= (+ |c_ldv_is_err_#in~ptr.base| 1) |c_#StackHeapBarrier|) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (let ((.cse3 (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= (+ |c_#StackHeapBarrier| 1) |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= |c_#valid| (store .cse3 |c_ldv_is_err_#in~ptr.base| 1)) (= |c_#length| (store (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |c_ldv_is_err_#in~ptr.base| 136)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= (select .cse3 |c_ldv_is_err_#in~ptr.base|) 0) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0)))) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse4 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse4 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse0 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse1 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse4 72))))))) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (not (= (mod |c_ldv_is_err_#in~ptr.base| 18446744073709551616) 0)) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_old(#memory_int)_BEFORE_CALL_8| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse13 (select |v_#memory_int_209| 14)) (.cse18 (select |v_#memory_int_197| 15)) (.cse20 (select |v_#memory_int_218| 14)) (.cse16 (select |v_#memory_int_203| 14)) (.cse24 (select |v_#memory_int_206| 15)) (.cse5 (select |v_#memory_int_205| 15)) (.cse26 (select |v_#memory_int_193| 15)) (.cse14 (select |v_#memory_int_215| 15)) (.cse25 (select |v_#memory_int_194| 15)) (.cse21 (select |v_#memory_int_217| 14)) (.cse11 (select |v_#memory_int_190| 14)) (.cse29 (select |v_#memory_int_195| 14)) (.cse27 (select |v_#memory_int_214| 15)) (.cse28 (select |v_#memory_int_212| 15)) (.cse32 (select |v_#memory_int_210| 15)) (.cse22 (select |v_#memory_int_198| 15)) (.cse8 (select |v_#memory_int_202| 15)) (.cse23 (select |v_#memory_int_207| 15)) (.cse15 (select |v_#memory_int_211| 15)) (.cse31 (select |v_#memory_int_204| 15)) (.cse9 (select |v_#memory_int_641| 1)) (.cse6 (select |v_#memory_int_199| 15)) (.cse34 (select |v_#memory_int_216| 15)) (.cse33 (select |v_#memory_int_208| 14)) (.cse10 (select |v_#memory_int_200| 14)) (.cse19 (select |v_#memory_int_196| 15)) (.cse7 (select |v_#memory_int_191| 15)) (.cse30 (select |v_#memory_int_192| 14)) (.cse12 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse5 64 (select .cse6 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse7 32 (select .cse8 32))) |v_#memory_int_202|) (= 48 (select .cse9 0)) (= (store |v_#memory_int_200| 14 (store .cse10 32 (select .cse11 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse12 64 (select .cse13 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse14 129 (select .cse15 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse13 72 (select .cse16 72)))) (= |c_#memory_int| (store |v_old(#memory_int)_BEFORE_CALL_8| |c_ldv_is_err_#in~ptr.base| .cse17)) (= (store |v_#memory_int_197| 15 (store .cse18 16 (select .cse19 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse20 8 (select .cse21 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse22 8 (select .cse18 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse20 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse23 48 (select .cse24 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse25 113 (select .cse26 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse16 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse24 56 (select .cse5 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse27 89 (select .cse28 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse26 121 (select .cse14 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse29 48 (select .cse30 48))) |v_#memory_int_192|) (= (store |v_#memory_int_204| 15 (store .cse31 145 (select (select |v_old(#memory_int)_BEFORE_CALL_8| 15) 145))) |v_old(#memory_int)_BEFORE_CALL_8|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse32 105 (select .cse25 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse21 16 (select .cse33 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse11 40 (select .cse29 40)))) (= (store |v_#memory_int_216| 15 (store .cse34 81 (select .cse27 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse28 97 (select .cse32 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse17 0 (select .cse22 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse8 40 (select .cse23 40)))) (= (store |v_#memory_int_211| 15 (store .cse15 137 (select .cse31 137))) |v_#memory_int_204|) (= (select .cse9 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse6 72 0) 73 (select .cse34 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse33 24 (select .cse10 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse19 24 (select .cse7 24)))) (= (store |v_#memory_int_192| 14 (store .cse30 56 (select .cse12 56))) |v_#memory_int_213|)))) (= c_~ldv_retval_2~0 0))))) is different from false [2024-11-14 03:01:53,762 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse18 ((as const (Array Int Int)) 0))) (let ((.cse1 (store .cse18 0 0))) (let ((.cse0 (store (store .cse1 8 0) 16 0)) (.cse3 (mod |c_ldv_is_err_#in~ptr.base| 18446744073709551616))) (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= |c_ldv_is_err_#in~ptr.offset| 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse2 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse0 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse1 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse2 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse2 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0)))))) (= c_~ldv_irq_data_1_0~0.base 0) (not (= |c_ldv_is_err_#in~ptr.base| 0)) (or (and (= |c_ldv_is_err_#res| 1) (<= 2013 .cse3)) (and (<= .cse3 2012) (= |c_ldv_is_err_#res| 0))) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (<= (+ |c_ldv_is_err_#in~ptr.base| 1) |c_#StackHeapBarrier|) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (let ((.cse4 (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= (+ |c_#StackHeapBarrier| 1) |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= |c_#valid| (store .cse4 |c_ldv_is_err_#in~ptr.base| 1)) (= |c_#length| (store (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |c_ldv_is_err_#in~ptr.base| 136)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= (select .cse4 |c_ldv_is_err_#in~ptr.base|) 0) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0)))) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse5 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse5 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse0 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse1 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse5 72))))))) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (not (= .cse3 0)) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_old(#memory_int)_BEFORE_CALL_8| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse14 (select |v_#memory_int_209| 14)) (.cse19 (select |v_#memory_int_197| 15)) (.cse21 (select |v_#memory_int_218| 14)) (.cse17 (select |v_#memory_int_203| 14)) (.cse25 (select |v_#memory_int_206| 15)) (.cse6 (select |v_#memory_int_205| 15)) (.cse27 (select |v_#memory_int_193| 15)) (.cse15 (select |v_#memory_int_215| 15)) (.cse26 (select |v_#memory_int_194| 15)) (.cse22 (select |v_#memory_int_217| 14)) (.cse12 (select |v_#memory_int_190| 14)) (.cse30 (select |v_#memory_int_195| 14)) (.cse28 (select |v_#memory_int_214| 15)) (.cse29 (select |v_#memory_int_212| 15)) (.cse33 (select |v_#memory_int_210| 15)) (.cse23 (select |v_#memory_int_198| 15)) (.cse9 (select |v_#memory_int_202| 15)) (.cse24 (select |v_#memory_int_207| 15)) (.cse16 (select |v_#memory_int_211| 15)) (.cse32 (select |v_#memory_int_204| 15)) (.cse10 (select |v_#memory_int_641| 1)) (.cse7 (select |v_#memory_int_199| 15)) (.cse35 (select |v_#memory_int_216| 15)) (.cse34 (select |v_#memory_int_208| 14)) (.cse11 (select |v_#memory_int_200| 14)) (.cse20 (select |v_#memory_int_196| 15)) (.cse8 (select |v_#memory_int_191| 15)) (.cse31 (select |v_#memory_int_192| 14)) (.cse13 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse6 64 (select .cse7 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse8 32 (select .cse9 32))) |v_#memory_int_202|) (= 48 (select .cse10 0)) (= (store |v_#memory_int_200| 14 (store .cse11 32 (select .cse12 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse13 64 (select .cse14 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse15 129 (select .cse16 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse14 72 (select .cse17 72)))) (= |c_#memory_int| (store |v_old(#memory_int)_BEFORE_CALL_8| |c_ldv_is_err_#in~ptr.base| .cse18)) (= (store |v_#memory_int_197| 15 (store .cse19 16 (select .cse20 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse21 8 (select .cse22 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse23 8 (select .cse19 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse21 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse24 48 (select .cse25 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse26 113 (select .cse27 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse17 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse25 56 (select .cse6 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse28 89 (select .cse29 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse27 121 (select .cse15 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse30 48 (select .cse31 48))) |v_#memory_int_192|) (= (store |v_#memory_int_204| 15 (store .cse32 145 (select (select |v_old(#memory_int)_BEFORE_CALL_8| 15) 145))) |v_old(#memory_int)_BEFORE_CALL_8|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse33 105 (select .cse26 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse22 16 (select .cse34 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse12 40 (select .cse30 40)))) (= (store |v_#memory_int_216| 15 (store .cse35 81 (select .cse28 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse29 97 (select .cse33 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse18 0 (select .cse23 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse9 40 (select .cse24 40)))) (= (store |v_#memory_int_211| 15 (store .cse16 137 (select .cse32 137))) |v_#memory_int_204|) (= (select .cse10 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse7 72 0) 73 (select .cse35 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse34 24 (select .cse11 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse20 24 (select .cse8 24)))) (= (store |v_#memory_int_192| 14 (store .cse31 56 (select .cse13 56))) |v_#memory_int_213|)))) (= c_~ldv_retval_2~0 0))))) is different from false [2024-11-14 03:01:55,787 WARN L851 $PredicateComparison]: unable to prove that (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (let ((.cse15 ((as const (Array Int Int)) 0))) (let ((.cse13 (store .cse15 0 0))) (let ((.cse12 (store (store .cse13 8 0) 16 0))) (let ((.cse0 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse24 (select |v_#memory_int_209| 14)) (.cse28 (select |v_#memory_int_197| 15)) (.cse30 (select |v_#memory_int_218| 14)) (.cse27 (select |v_#memory_int_203| 14)) (.cse34 (select |v_#memory_int_206| 15)) (.cse16 (select |v_#memory_int_205| 15)) (.cse36 (select |v_#memory_int_193| 15)) (.cse25 (select |v_#memory_int_215| 15)) (.cse35 (select |v_#memory_int_194| 15)) (.cse31 (select |v_#memory_int_217| 14)) (.cse22 (select |v_#memory_int_190| 14)) (.cse39 (select |v_#memory_int_195| 14)) (.cse37 (select |v_#memory_int_214| 15)) (.cse38 (select |v_#memory_int_212| 15)) (.cse41 (select |v_#memory_int_210| 15)) (.cse32 (select |v_#memory_int_198| 15)) (.cse19 (select |v_#memory_int_202| 15)) (.cse33 (select |v_#memory_int_207| 15)) (.cse26 (select |v_#memory_int_211| 15)) (.cse44 (select |v_#memory_int_204| 15)) (.cse20 (select |v_#memory_int_641| 1)) (.cse17 (select |v_#memory_int_199| 15)) (.cse43 (select |v_#memory_int_216| 15)) (.cse42 (select |v_#memory_int_208| 14)) (.cse21 (select |v_#memory_int_200| 14)) (.cse29 (select |v_#memory_int_196| 15)) (.cse18 (select |v_#memory_int_191| 15)) (.cse40 (select |v_#memory_int_192| 14)) (.cse23 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse16 64 (select .cse17 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse18 32 (select .cse19 32))) |v_#memory_int_202|) (= 48 (select .cse20 0)) (= (store |v_#memory_int_200| 14 (store .cse21 32 (select .cse22 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse23 64 (select .cse24 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse25 129 (select .cse26 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse24 72 (select .cse27 72)))) (= (store |v_#memory_int_197| 15 (store .cse28 16 (select .cse29 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse30 8 (select .cse31 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse32 8 (select .cse28 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse30 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse33 48 (select .cse34 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse35 113 (select .cse36 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse27 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse34 56 (select .cse16 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse37 89 (select .cse38 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse36 121 (select .cse25 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse39 48 (select .cse40 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse41 105 (select .cse35 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse31 16 (select .cse42 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse22 40 (select .cse39 40)))) (= (store |v_#memory_int_216| 15 (store .cse43 81 (select .cse37 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse38 97 (select .cse41 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse15 0 (select .cse32 0)))) (= |c_old(#memory_int)| (store |v_#memory_int_204| 15 (store .cse44 145 (select (select |c_old(#memory_int)| 15) 145)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse19 40 (select .cse33 40)))) (= (store |v_#memory_int_211| 15 (store .cse26 137 (select .cse44 137))) |v_#memory_int_204|) (= (select .cse20 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse17 72 0) 73 (select .cse43 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse42 24 (select .cse21 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse29 24 (select .cse18 24)))) (= (store |v_#memory_int_192| 14 (store .cse40 56 (select .cse23 56))) |v_#memory_int_213|))))) (.cse1 (= (store |c_old(#memory_int)| |c_ldv_zalloc_~p~1#1.base| .cse15) |c_#memory_int|)) (.cse3 (= 0 (select |c_old(#valid)| |c_ldv_zalloc_~p~1#1.base|))) (.cse4 (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse14 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse12 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse13 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse14 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse14 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))))))) (.cse5 (= |c_#valid| (store |c_old(#valid)| |c_ldv_zalloc_~p~1#1.base| 1))) (.cse6 (<= (+ 1 |c_ldv_zalloc_~p~1#1.base|) |c_#StackHeapBarrier|)) (.cse7 (= |c_#length| (store |c_old(#length)| |c_ldv_zalloc_~p~1#1.base| 136))) (.cse8 (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse11 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse11 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse12 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse13 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse11 72)))))))) (.cse2 (mod |c_ldv_zalloc_~p~1#1.base| 18446744073709551616)) (.cse9 (not (= 0 |c_ldv_zalloc_~p~1#1.base|))) (.cse10 (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= (+ |c_#StackHeapBarrier| 1) |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1) |c_old(#valid)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |c_old(#length)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0))))) (or (and .cse0 .cse1 (<= 2013 .cse2) .cse3 .cse4 .cse5 (= |c_ldv_zalloc_#t~ret16#1| 1) .cse6 .cse7 .cse8 .cse9 .cse10) (and .cse0 (not (= .cse2 0)) .cse1 (= |c_ldv_zalloc_#t~ret16#1| 0) .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 (<= .cse2 2012) .cse9 .cse10)))))) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (<= |c_ldv_zalloc_#t~ret16#1| 1) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (<= 0 |c_ldv_zalloc_#t~ret16#1|) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (= c_~ldv_irq_data_1_0~0.base 0) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= |c_ldv_zalloc_~p~1#1.offset| 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (= 136 |c_ldv_zalloc_#in~size#1|) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (= c_~ldv_retval_2~0 0)) is different from false [2024-11-14 03:01:57,807 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse28 ((as const (Array Int Int)) 0))) (let ((.cse32 (store .cse28 0 0))) (let ((.cse31 (store (store .cse32 8 0) 16 0)) (.cse30 (mod |c_ldv_zalloc_~p~1#1.base| 18446744073709551616))) (and (= c_~ldv_irq_line_1_3~0 0) (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse8 (select |v_#memory_int_209| 14)) (.cse12 (select |v_#memory_int_197| 15)) (.cse14 (select |v_#memory_int_218| 14)) (.cse11 (select |v_#memory_int_203| 14)) (.cse18 (select |v_#memory_int_206| 15)) (.cse0 (select |v_#memory_int_205| 15)) (.cse20 (select |v_#memory_int_193| 15)) (.cse9 (select |v_#memory_int_215| 15)) (.cse19 (select |v_#memory_int_194| 15)) (.cse15 (select |v_#memory_int_217| 14)) (.cse6 (select |v_#memory_int_190| 14)) (.cse23 (select |v_#memory_int_195| 14)) (.cse21 (select |v_#memory_int_214| 15)) (.cse22 (select |v_#memory_int_212| 15)) (.cse25 (select |v_#memory_int_210| 15)) (.cse16 (select |v_#memory_int_198| 15)) (.cse3 (select |v_#memory_int_202| 15)) (.cse17 (select |v_#memory_int_207| 15)) (.cse10 (select |v_#memory_int_211| 15)) (.cse29 (select |v_#memory_int_204| 15)) (.cse4 (select |v_#memory_int_641| 1)) (.cse1 (select |v_#memory_int_199| 15)) (.cse27 (select |v_#memory_int_216| 15)) (.cse26 (select |v_#memory_int_208| 14)) (.cse5 (select |v_#memory_int_200| 14)) (.cse13 (select |v_#memory_int_196| 15)) (.cse2 (select |v_#memory_int_191| 15)) (.cse24 (select |v_#memory_int_192| 14)) (.cse7 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse0 64 (select .cse1 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse2 32 (select .cse3 32))) |v_#memory_int_202|) (= 48 (select .cse4 0)) (= (store |v_#memory_int_200| 14 (store .cse5 32 (select .cse6 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse7 64 (select .cse8 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse9 129 (select .cse10 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse8 72 (select .cse11 72)))) (= (store |v_#memory_int_197| 15 (store .cse12 16 (select .cse13 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse14 8 (select .cse15 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse16 8 (select .cse12 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse14 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse17 48 (select .cse18 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse19 113 (select .cse20 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse11 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse18 56 (select .cse0 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse21 89 (select .cse22 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse20 121 (select .cse9 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse23 48 (select .cse24 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse25 105 (select .cse19 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse15 16 (select .cse26 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse6 40 (select .cse23 40)))) (= (store |v_#memory_int_216| 15 (store .cse27 81 (select .cse21 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse22 97 (select .cse25 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse28 0 (select .cse16 0)))) (= |c_old(#memory_int)| (store |v_#memory_int_204| 15 (store .cse29 145 (select (select |c_old(#memory_int)| 15) 145)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse3 40 (select .cse17 40)))) (= (store |v_#memory_int_211| 15 (store .cse10 137 (select .cse29 137))) |v_#memory_int_204|) (= (select .cse4 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse1 72 0) 73 (select .cse27 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse26 24 (select .cse5 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse13 24 (select .cse2 24)))) (= (store |v_#memory_int_192| 14 (store .cse24 56 (select .cse7 56))) |v_#memory_int_213|)))) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (not (= .cse30 0)) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= (store |c_old(#memory_int)| |c_ldv_zalloc_~p~1#1.base| .cse28) |c_#memory_int|) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= |c_ldv_zalloc_#t~ret16#1| 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= 0 (select |c_old(#valid)| |c_ldv_zalloc_~p~1#1.base|)) (= c_~tegra_rtc_driver_group0~0.offset 0) (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse33 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse31 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse32 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse33 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse33 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0)))))) (= c_~ldv_irq_data_1_0~0.base 0) (= |c_#valid| (store |c_old(#valid)| |c_ldv_zalloc_~p~1#1.base| 1)) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= |c_ldv_zalloc_~p~1#1.offset| 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (<= (+ 1 |c_ldv_zalloc_~p~1#1.base|) |c_#StackHeapBarrier|) (= c_~ldv_irq_line_1_1~0 0) (= |c_#length| (store |c_old(#length)| |c_ldv_zalloc_~p~1#1.base| 136)) (= c_~tegra_rtc_driver_group0~0.base 0) (= 136 |c_ldv_zalloc_#in~size#1|) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse34 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse34 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse31 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse32 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse34 72))))))) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (<= .cse30 2012) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (not (= 0 |c_ldv_zalloc_~p~1#1.base|)) (= c_~ldv_retval_0~0 0) (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= (+ |c_#StackHeapBarrier| 1) |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1) |c_old(#valid)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |c_old(#length)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0))) (= c_~ldv_retval_2~0 0))))) is different from false [2024-11-14 03:01:59,825 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse28 ((as const (Array Int Int)) 0))) (let ((.cse32 (store .cse28 0 0))) (let ((.cse30 (mod |c_ldv_zalloc_#res#1.base| 18446744073709551616)) (.cse31 (store (store .cse32 8 0) 16 0))) (and (= c_~ldv_irq_line_1_3~0 0) (= (select |c_old(#valid)| |c_ldv_zalloc_#res#1.base|) 0) (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse8 (select |v_#memory_int_209| 14)) (.cse12 (select |v_#memory_int_197| 15)) (.cse14 (select |v_#memory_int_218| 14)) (.cse11 (select |v_#memory_int_203| 14)) (.cse18 (select |v_#memory_int_206| 15)) (.cse0 (select |v_#memory_int_205| 15)) (.cse20 (select |v_#memory_int_193| 15)) (.cse9 (select |v_#memory_int_215| 15)) (.cse19 (select |v_#memory_int_194| 15)) (.cse15 (select |v_#memory_int_217| 14)) (.cse6 (select |v_#memory_int_190| 14)) (.cse23 (select |v_#memory_int_195| 14)) (.cse21 (select |v_#memory_int_214| 15)) (.cse22 (select |v_#memory_int_212| 15)) (.cse25 (select |v_#memory_int_210| 15)) (.cse16 (select |v_#memory_int_198| 15)) (.cse3 (select |v_#memory_int_202| 15)) (.cse17 (select |v_#memory_int_207| 15)) (.cse10 (select |v_#memory_int_211| 15)) (.cse29 (select |v_#memory_int_204| 15)) (.cse4 (select |v_#memory_int_641| 1)) (.cse1 (select |v_#memory_int_199| 15)) (.cse27 (select |v_#memory_int_216| 15)) (.cse26 (select |v_#memory_int_208| 14)) (.cse5 (select |v_#memory_int_200| 14)) (.cse13 (select |v_#memory_int_196| 15)) (.cse2 (select |v_#memory_int_191| 15)) (.cse24 (select |v_#memory_int_192| 14)) (.cse7 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse0 64 (select .cse1 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse2 32 (select .cse3 32))) |v_#memory_int_202|) (= 48 (select .cse4 0)) (= (store |v_#memory_int_200| 14 (store .cse5 32 (select .cse6 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse7 64 (select .cse8 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse9 129 (select .cse10 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse8 72 (select .cse11 72)))) (= (store |v_#memory_int_197| 15 (store .cse12 16 (select .cse13 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse14 8 (select .cse15 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse16 8 (select .cse12 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse14 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse17 48 (select .cse18 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse19 113 (select .cse20 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse11 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse18 56 (select .cse0 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse21 89 (select .cse22 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse20 121 (select .cse9 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse23 48 (select .cse24 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse25 105 (select .cse19 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse15 16 (select .cse26 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse6 40 (select .cse23 40)))) (= (store |v_#memory_int_216| 15 (store .cse27 81 (select .cse21 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse22 97 (select .cse25 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse28 0 (select .cse16 0)))) (= |c_old(#memory_int)| (store |v_#memory_int_204| 15 (store .cse29 145 (select (select |c_old(#memory_int)| 15) 145)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse3 40 (select .cse17 40)))) (= (store |v_#memory_int_211| 15 (store .cse10 137 (select .cse29 137))) |v_#memory_int_204|) (= (select .cse4 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse1 72 0) 73 (select .cse27 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse26 24 (select .cse5 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse13 24 (select .cse2 24)))) (= (store |v_#memory_int_192| 14 (store .cse24 56 (select .cse7 56))) |v_#memory_int_213|)))) (= |c_~#tegra_rtc_driver~0.offset| 0) (= (store |c_old(#valid)| |c_ldv_zalloc_#res#1.base| 1) |c_#valid|) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= (store |c_old(#memory_int)| |c_ldv_zalloc_#res#1.base| .cse28) |c_#memory_int|) (= |c_#length| (store |c_old(#length)| |c_ldv_zalloc_#res#1.base| 136)) (= |c_ldv_zalloc_#res#1.offset| 0) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (not (= .cse30 0)) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse33 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse31 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse32 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse33 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse33 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0)))))) (= c_~ldv_irq_data_1_0~0.base 0) (<= (+ |c_ldv_zalloc_#res#1.base| 1) |c_#StackHeapBarrier|) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (<= .cse30 2012) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (= 136 |c_ldv_zalloc_#in~size#1|) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse34 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse34 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse31 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse32 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse34 72))))))) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (not (= |c_ldv_zalloc_#res#1.base| 0)) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (exists ((|v_#length_273| (Array Int Int)) (|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| Int) (|v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| (Array Int Int))) (and (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 5) 1) (= (select |v_#length_273| 4) 12) (<= (+ |c_#StackHeapBarrier| 1) |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 4) 1) (= (select |v_#length_273| 11) 50) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 10) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 6) 1) (= (store |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 1) |c_old(#valid)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 7) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 11) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 15) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 3) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 12) 1) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (not (= 0 |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|)) (= 42 (select |v_#length_273| 6)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3|) 0) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 1) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 8) 1) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 14) 1) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 2) 1) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 9) 1) (= 153 (select |v_#length_273| 15)) (= (store |v_#length_273| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_BEFORE_CALL_3| 4) |c_old(#length)|) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 13) 1) (= (select |v_ULTIMATE.start_main_old_#valid#1_BEFORE_CALL_3| 0) 0))) (= c_~ldv_retval_2~0 0))))) is different from false [2024-11-14 03:02:01,849 WARN L851 $PredicateComparison]: unable to prove that (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= |c_ULTIMATE.start_main_#t~ret241#1.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (let ((.cse47 ((as const (Array Int Int)) 0))) (let ((.cse89 (store .cse47 0 0))) (let ((.cse88 (store (store .cse89 8 0) 16 0)) (.cse91 (mod |c_ULTIMATE.start_main_#t~ret241#1.base| 18446744073709551616))) (let ((.cse0 (= (select |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|) 0)) (.cse1 (<= (+ |c_ULTIMATE.start_main_#t~ret241#1.base| 1) |c_#StackHeapBarrier|)) (.cse2 (= (select |c_ULTIMATE.start_main_old_#valid#1| 12) 1)) (.cse3 (= (select |c_ULTIMATE.start_main_old_#valid#1| 15) 1)) (.cse4 (= (select |c_ULTIMATE.start_main_old_#valid#1| 14) 1)) (.cse5 (= (select |c_ULTIMATE.start_main_old_#valid#1| 5) 1)) (.cse6 (not (= .cse91 0))) (.cse7 (= (select |c_ULTIMATE.start_main_old_#valid#1| 0) 0)) (.cse8 (exists ((|v_#length_274| (Array Int Int))) (= (store |v_#length_274| |c_ULTIMATE.start_main_#t~ret241#1.base| 136) |c_#length|))) (.cse9 (= (select |c_ULTIMATE.start_main_old_#valid#1| 2) 1)) (.cse10 (<= .cse91 2012)) (.cse11 (= (select |c_ULTIMATE.start_main_old_#valid#1| 11) 1)) (.cse12 (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse90 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse88 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse89 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse90 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse90 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))))))) (.cse13 (= (select |c_ULTIMATE.start_main_old_#valid#1| 13) 1)) (.cse14 (= (select |c_ULTIMATE.start_main_old_#valid#1| 4) 1)) (.cse15 (<= (+ |c_#StackHeapBarrier| 1) |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|)) (.cse16 (exists ((|v_#length_273| (Array Int Int))) (and (= (select |v_#length_273| 4) 12) (= (select |v_#length_273| 11) 50) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= 42 (select |v_#length_273| 6)) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= 153 (select |v_#length_273| 15))))) (.cse17 (= (select |c_ULTIMATE.start_main_old_#valid#1| 8) 1)) (.cse48 (= (select |c_ULTIMATE.start_main_old_#valid#1| 10) 1)) (.cse49 (exists ((|v_#memory_int_642| (Array Int (Array Int Int)))) (= (store |v_#memory_int_642| |c_ULTIMATE.start_main_#t~ret241#1.base| .cse47) |c_#memory_int|))) (.cse50 (exists ((|v_#valid_305| (Array Int Int))) (and (= 0 (select |v_#valid_305| |c_ULTIMATE.start_main_#t~ret241#1.base|)) (= |c_#valid| (store |v_#valid_305| |c_ULTIMATE.start_main_#t~ret241#1.base| 1))))) (.cse51 (= (select |c_ULTIMATE.start_main_old_#valid#1| 1) 1)) (.cse52 (= (select |c_ULTIMATE.start_main_old_#valid#1| 6) 1)) (.cse53 (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse87 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse87 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse88 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse89 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse87 72)))))))) (.cse54 (= (select |c_ULTIMATE.start_main_old_#valid#1| 3) 1)) (.cse55 (= (select |c_ULTIMATE.start_main_old_#valid#1| 9) 1)) (.cse56 (= (select |c_ULTIMATE.start_main_old_#valid#1| 7) 1)) (.cse57 (not (= |c_ULTIMATE.start_main_#t~ret241#1.base| 0)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14 .cse15 .cse16 .cse17 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_old(#memory_int)_AFTER_CALL_3| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse26 (select |v_#memory_int_209| 14)) (.cse30 (select |v_#memory_int_197| 15)) (.cse32 (select |v_#memory_int_218| 14)) (.cse29 (select |v_#memory_int_203| 14)) (.cse36 (select |v_#memory_int_206| 15)) (.cse18 (select |v_#memory_int_205| 15)) (.cse38 (select |v_#memory_int_193| 15)) (.cse27 (select |v_#memory_int_215| 15)) (.cse37 (select |v_#memory_int_194| 15)) (.cse33 (select |v_#memory_int_217| 14)) (.cse24 (select |v_#memory_int_190| 14)) (.cse41 (select |v_#memory_int_195| 14)) (.cse39 (select |v_#memory_int_214| 15)) (.cse40 (select |v_#memory_int_212| 15)) (.cse43 (select |v_#memory_int_210| 15)) (.cse34 (select |v_#memory_int_198| 15)) (.cse21 (select |v_#memory_int_202| 15)) (.cse35 (select |v_#memory_int_207| 15)) (.cse28 (select |v_#memory_int_211| 15)) (.cse45 (select |v_#memory_int_204| 15)) (.cse22 (select |v_#memory_int_641| 1)) (.cse19 (select |v_#memory_int_199| 15)) (.cse46 (select |v_#memory_int_216| 15)) (.cse44 (select |v_#memory_int_208| 14)) (.cse23 (select |v_#memory_int_200| 14)) (.cse31 (select |v_#memory_int_196| 15)) (.cse20 (select |v_#memory_int_191| 15)) (.cse42 (select |v_#memory_int_192| 14)) (.cse25 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse18 64 (select .cse19 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse20 32 (select .cse21 32))) |v_#memory_int_202|) (= 48 (select .cse22 0)) (= (store |v_#memory_int_200| 14 (store .cse23 32 (select .cse24 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse25 64 (select .cse26 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse27 129 (select .cse28 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse26 72 (select .cse29 72)))) (= (store |v_#memory_int_197| 15 (store .cse30 16 (select .cse31 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse32 8 (select .cse33 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse34 8 (select .cse30 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse32 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse35 48 (select .cse36 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse37 113 (select .cse38 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse29 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse36 56 (select .cse18 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse39 89 (select .cse40 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse38 121 (select .cse27 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse41 48 (select .cse42 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse43 105 (select .cse37 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse33 16 (select .cse44 16)))) (= (store |v_#memory_int_204| 15 (store .cse45 145 (select (select |v_old(#memory_int)_AFTER_CALL_3| 15) 145))) |v_old(#memory_int)_AFTER_CALL_3|) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse24 40 (select .cse41 40)))) (= (store |v_#memory_int_216| 15 (store .cse46 81 (select .cse39 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse40 97 (select .cse43 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse47 0 (select .cse34 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse21 40 (select .cse35 40)))) (= (store |v_#memory_int_211| 15 (store .cse28 137 (select .cse45 137))) |v_#memory_int_204|) (= (select .cse22 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse19 72 0) 73 (select .cse46 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse44 24 (select .cse23 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse31 24 (select .cse20 24)))) (= (store |v_#memory_int_192| 14 (store .cse42 56 (select .cse25 56))) |v_#memory_int_213|)))) .cse48 .cse49 .cse50 .cse51 .cse52 .cse53 .cse54 .cse55 .cse56 .cse57) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14 .cse15 .cse16 .cse17 .cse48 .cse49 .cse50 .cse51 .cse52 .cse53 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_old(#memory_int)_AFTER_CALL_2| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse66 (select |v_#memory_int_209| 14)) (.cse70 (select |v_#memory_int_197| 15)) (.cse73 (select |v_#memory_int_218| 14)) (.cse69 (select |v_#memory_int_203| 14)) (.cse77 (select |v_#memory_int_206| 15)) (.cse58 (select |v_#memory_int_205| 15)) (.cse79 (select |v_#memory_int_193| 15)) (.cse67 (select |v_#memory_int_215| 15)) (.cse78 (select |v_#memory_int_194| 15)) (.cse74 (select |v_#memory_int_217| 14)) (.cse64 (select |v_#memory_int_190| 14)) (.cse82 (select |v_#memory_int_195| 14)) (.cse80 (select |v_#memory_int_214| 15)) (.cse81 (select |v_#memory_int_212| 15)) (.cse84 (select |v_#memory_int_210| 15)) (.cse75 (select |v_#memory_int_198| 15)) (.cse61 (select |v_#memory_int_202| 15)) (.cse76 (select |v_#memory_int_207| 15)) (.cse68 (select |v_#memory_int_211| 15)) (.cse72 (select |v_#memory_int_204| 15)) (.cse62 (select |v_#memory_int_641| 1)) (.cse59 (select |v_#memory_int_199| 15)) (.cse86 (select |v_#memory_int_216| 15)) (.cse85 (select |v_#memory_int_208| 14)) (.cse63 (select |v_#memory_int_200| 14)) (.cse71 (select |v_#memory_int_196| 15)) (.cse60 (select |v_#memory_int_191| 15)) (.cse83 (select |v_#memory_int_192| 14)) (.cse65 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse58 64 (select .cse59 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse60 32 (select .cse61 32))) |v_#memory_int_202|) (= 48 (select .cse62 0)) (= (store |v_#memory_int_200| 14 (store .cse63 32 (select .cse64 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse65 64 (select .cse66 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse67 129 (select .cse68 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse66 72 (select .cse69 72)))) (= (store |v_#memory_int_197| 15 (store .cse70 16 (select .cse71 16))) |v_#memory_int_196|) (= (store |v_#memory_int_204| 15 (store .cse72 145 (select (select |v_old(#memory_int)_AFTER_CALL_2| 15) 145))) |v_old(#memory_int)_AFTER_CALL_2|) (= (store |v_#memory_int_218| 14 (store .cse73 8 (select .cse74 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse75 8 (select .cse70 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse73 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse76 48 (select .cse77 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse78 113 (select .cse79 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse69 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse77 56 (select .cse58 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse80 89 (select .cse81 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse79 121 (select .cse67 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse82 48 (select .cse83 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse84 105 (select .cse78 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse74 16 (select .cse85 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse64 40 (select .cse82 40)))) (= (store |v_#memory_int_216| 15 (store .cse86 81 (select .cse80 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse81 97 (select .cse84 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse47 0 (select .cse75 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse61 40 (select .cse76 40)))) (= (store |v_#memory_int_211| 15 (store .cse68 137 (select .cse72 137))) |v_#memory_int_204|) (= (select .cse62 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse59 72 0) 73 (select .cse86 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse85 24 (select .cse63 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse71 24 (select .cse60 24)))) (= (store |v_#memory_int_192| 14 (store .cse83 56 (select .cse65 56))) |v_#memory_int_213|)))) .cse54 .cse55 .cse56 .cse57)))))) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (= c_~ldv_irq_data_1_0~0.base 0) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (<= 2 |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|) (= |c_ULTIMATE.start_main_~#ldvarg2~0#1.offset| 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (= c_~ldv_retval_1~0 0) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (= c_~ldv_retval_2~0 0)) is different from false [2024-11-14 03:02:03,882 WARN L851 $PredicateComparison]: unable to prove that (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= |c_ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (= 0 |c_ULTIMATE.start_main_~ldvarg1~0#1.offset|) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (= c_~ldv_irq_data_1_0~0.base 0) (= c_~ldv_irq_data_1_3~0.offset 0) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= |c_ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 2 |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|) (= |c_ULTIMATE.start_main_~#ldvarg2~0#1.offset| 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (= |c_ULTIMATE.start_main_~#ldvarg2~0#1.base| |c_ULTIMATE.start_#Ultimate.C_memset_#ptr#1.base|) (= c_~ldv_retval_1~0 0) (let ((.cse45 ((as const (Array Int Int)) 0))) (let ((.cse90 (store .cse45 0 0))) (let ((.cse89 (store (store .cse90 8 0) 16 0)) (.cse87 (mod |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 18446744073709551616))) (let ((.cse0 (= (select |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|) 0)) (.cse1 (<= (+ |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 1) |c_#StackHeapBarrier|)) (.cse2 (not (= .cse87 0))) (.cse3 (= (select |c_ULTIMATE.start_main_old_#valid#1| 12) 1)) (.cse4 (= (select |c_ULTIMATE.start_main_old_#valid#1| 15) 1)) (.cse5 (= (select |c_ULTIMATE.start_main_old_#valid#1| 14) 1)) (.cse6 (= (select |c_ULTIMATE.start_main_old_#valid#1| 5) 1)) (.cse7 (= (select |c_ULTIMATE.start_main_old_#valid#1| 0) 0)) (.cse8 (= (select |c_ULTIMATE.start_main_old_#valid#1| 2) 1)) (.cse9 (= (select |c_ULTIMATE.start_main_old_#valid#1| 11) 1)) (.cse10 (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse91 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse89 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse90 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse91 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse91 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))))))) (.cse11 (= (select |c_ULTIMATE.start_main_old_#valid#1| 13) 1)) (.cse12 (= (select |c_ULTIMATE.start_main_old_#valid#1| 4) 1)) (.cse13 (<= (+ |c_#StackHeapBarrier| 1) |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|)) (.cse14 (exists ((|v_#length_273| (Array Int Int))) (and (= (select |v_#length_273| 4) 12) (= (select |v_#length_273| 11) 50) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= 42 (select |v_#length_273| 6)) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= 153 (select |v_#length_273| 15))))) (.cse15 (= (select |c_ULTIMATE.start_main_old_#valid#1| 8) 1)) (.cse46 (= (select |c_ULTIMATE.start_main_old_#valid#1| 10) 1)) (.cse47 (exists ((|v_#length_274| (Array Int Int))) (= (store |v_#length_274| |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 136) |c_#length|))) (.cse48 (not (= |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 0))) (.cse49 (= (select |c_ULTIMATE.start_main_old_#valid#1| 1) 1)) (.cse50 (= (select |c_ULTIMATE.start_main_old_#valid#1| 6) 1)) (.cse51 (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse88 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse88 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse89 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse90 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse88 72)))))))) (.cse52 (exists ((|v_#memory_int_642| (Array Int (Array Int Int)))) (= (store |v_#memory_int_642| |c_ULTIMATE.start_main_~ldvarg1~0#1.base| .cse45) |c_#memory_int|))) (.cse53 (= (select |c_ULTIMATE.start_main_old_#valid#1| 3) 1)) (.cse54 (= (select |c_ULTIMATE.start_main_old_#valid#1| 9) 1)) (.cse55 (exists ((|v_#valid_305| (Array Int Int))) (and (= |c_#valid| (store |v_#valid_305| |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 1)) (= (select |v_#valid_305| |c_ULTIMATE.start_main_~ldvarg1~0#1.base|) 0)))) (.cse56 (<= .cse87 2012)) (.cse57 (= (select |c_ULTIMATE.start_main_old_#valid#1| 7) 1))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14 .cse15 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_old(#memory_int)_AFTER_CALL_3| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse24 (select |v_#memory_int_209| 14)) (.cse28 (select |v_#memory_int_197| 15)) (.cse30 (select |v_#memory_int_218| 14)) (.cse27 (select |v_#memory_int_203| 14)) (.cse34 (select |v_#memory_int_206| 15)) (.cse16 (select |v_#memory_int_205| 15)) (.cse36 (select |v_#memory_int_193| 15)) (.cse25 (select |v_#memory_int_215| 15)) (.cse35 (select |v_#memory_int_194| 15)) (.cse31 (select |v_#memory_int_217| 14)) (.cse22 (select |v_#memory_int_190| 14)) (.cse39 (select |v_#memory_int_195| 14)) (.cse37 (select |v_#memory_int_214| 15)) (.cse38 (select |v_#memory_int_212| 15)) (.cse41 (select |v_#memory_int_210| 15)) (.cse32 (select |v_#memory_int_198| 15)) (.cse19 (select |v_#memory_int_202| 15)) (.cse33 (select |v_#memory_int_207| 15)) (.cse26 (select |v_#memory_int_211| 15)) (.cse43 (select |v_#memory_int_204| 15)) (.cse20 (select |v_#memory_int_641| 1)) (.cse17 (select |v_#memory_int_199| 15)) (.cse44 (select |v_#memory_int_216| 15)) (.cse42 (select |v_#memory_int_208| 14)) (.cse21 (select |v_#memory_int_200| 14)) (.cse29 (select |v_#memory_int_196| 15)) (.cse18 (select |v_#memory_int_191| 15)) (.cse40 (select |v_#memory_int_192| 14)) (.cse23 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse16 64 (select .cse17 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse18 32 (select .cse19 32))) |v_#memory_int_202|) (= 48 (select .cse20 0)) (= (store |v_#memory_int_200| 14 (store .cse21 32 (select .cse22 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse23 64 (select .cse24 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse25 129 (select .cse26 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse24 72 (select .cse27 72)))) (= (store |v_#memory_int_197| 15 (store .cse28 16 (select .cse29 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse30 8 (select .cse31 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse32 8 (select .cse28 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse30 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse33 48 (select .cse34 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse35 113 (select .cse36 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse27 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse34 56 (select .cse16 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse37 89 (select .cse38 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse36 121 (select .cse25 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse39 48 (select .cse40 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse41 105 (select .cse35 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse31 16 (select .cse42 16)))) (= (store |v_#memory_int_204| 15 (store .cse43 145 (select (select |v_old(#memory_int)_AFTER_CALL_3| 15) 145))) |v_old(#memory_int)_AFTER_CALL_3|) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse22 40 (select .cse39 40)))) (= (store |v_#memory_int_216| 15 (store .cse44 81 (select .cse37 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse38 97 (select .cse41 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse45 0 (select .cse32 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse19 40 (select .cse33 40)))) (= (store |v_#memory_int_211| 15 (store .cse26 137 (select .cse43 137))) |v_#memory_int_204|) (= (select .cse20 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse17 72 0) 73 (select .cse44 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse42 24 (select .cse21 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse29 24 (select .cse18 24)))) (= (store |v_#memory_int_192| 14 (store .cse40 56 (select .cse23 56))) |v_#memory_int_213|)))) .cse46 .cse47 .cse48 .cse49 .cse50 .cse51 .cse52 .cse53 .cse54 .cse55 .cse56 .cse57) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14 .cse15 .cse46 .cse47 .cse48 .cse49 .cse50 .cse51 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_old(#memory_int)_AFTER_CALL_2| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse66 (select |v_#memory_int_209| 14)) (.cse70 (select |v_#memory_int_197| 15)) (.cse73 (select |v_#memory_int_218| 14)) (.cse69 (select |v_#memory_int_203| 14)) (.cse77 (select |v_#memory_int_206| 15)) (.cse58 (select |v_#memory_int_205| 15)) (.cse79 (select |v_#memory_int_193| 15)) (.cse67 (select |v_#memory_int_215| 15)) (.cse78 (select |v_#memory_int_194| 15)) (.cse74 (select |v_#memory_int_217| 14)) (.cse64 (select |v_#memory_int_190| 14)) (.cse82 (select |v_#memory_int_195| 14)) (.cse80 (select |v_#memory_int_214| 15)) (.cse81 (select |v_#memory_int_212| 15)) (.cse84 (select |v_#memory_int_210| 15)) (.cse75 (select |v_#memory_int_198| 15)) (.cse61 (select |v_#memory_int_202| 15)) (.cse76 (select |v_#memory_int_207| 15)) (.cse68 (select |v_#memory_int_211| 15)) (.cse72 (select |v_#memory_int_204| 15)) (.cse62 (select |v_#memory_int_641| 1)) (.cse59 (select |v_#memory_int_199| 15)) (.cse86 (select |v_#memory_int_216| 15)) (.cse85 (select |v_#memory_int_208| 14)) (.cse63 (select |v_#memory_int_200| 14)) (.cse71 (select |v_#memory_int_196| 15)) (.cse60 (select |v_#memory_int_191| 15)) (.cse83 (select |v_#memory_int_192| 14)) (.cse65 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse58 64 (select .cse59 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse60 32 (select .cse61 32))) |v_#memory_int_202|) (= 48 (select .cse62 0)) (= (store |v_#memory_int_200| 14 (store .cse63 32 (select .cse64 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse65 64 (select .cse66 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse67 129 (select .cse68 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse66 72 (select .cse69 72)))) (= (store |v_#memory_int_197| 15 (store .cse70 16 (select .cse71 16))) |v_#memory_int_196|) (= (store |v_#memory_int_204| 15 (store .cse72 145 (select (select |v_old(#memory_int)_AFTER_CALL_2| 15) 145))) |v_old(#memory_int)_AFTER_CALL_2|) (= (store |v_#memory_int_218| 14 (store .cse73 8 (select .cse74 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse75 8 (select .cse70 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse73 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse76 48 (select .cse77 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse78 113 (select .cse79 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse69 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse77 56 (select .cse58 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse80 89 (select .cse81 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse79 121 (select .cse67 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse82 48 (select .cse83 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse84 105 (select .cse78 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse74 16 (select .cse85 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse64 40 (select .cse82 40)))) (= (store |v_#memory_int_216| 15 (store .cse86 81 (select .cse80 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse81 97 (select .cse84 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse45 0 (select .cse75 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse61 40 (select .cse76 40)))) (= (store |v_#memory_int_211| 15 (store .cse68 137 (select .cse72 137))) |v_#memory_int_204|) (= (select .cse62 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse59 72 0) 73 (select .cse86 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse85 24 (select .cse63 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse71 24 (select .cse60 24)))) (= (store |v_#memory_int_192| 14 (store .cse83 56 (select .cse65 56))) |v_#memory_int_213|)))) .cse52 .cse53 .cse54 .cse55 .cse56 .cse57)))))) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (= c_~ldv_retval_2~0 0)) is different from false [2024-11-14 03:02:05,910 WARN L851 $PredicateComparison]: unable to prove that (and (= c_~ldv_irq_line_1_3~0 0) (= |c_~#tegra_rtc_driver~0.offset| 0) (= c_~LDV_IN_INTERRUPT~0 1) (= c_~ldv_irq_data_1_3~0.base 0) (= c_~ldv_irq_line_1_0~0 0) (= c_~ldv_irq_1_3~0 0) (= c_~ldv_irq_data_1_0~0.offset 0) (= |c_~#tegra_rtc_driver~0.base| 15) (= c_~tegra_rtc_ops_group2~0.offset 0) (= |c_~#tegra_rtc_ops~0.offset| 0) (= c_~ldv_irq_1_0~0 0) (= c_~ldv_irq_1_2~0 0) (= |c_ULTIMATE.start_#Ultimate.C_memset_#value#1| 0) (= 0 |c_ULTIMATE.start_main_~ldvarg1~0#1.offset|) (= c_~ldv_irq_data_1_1~0.base 0) (= c_~ldv_irq_1_1~0 0) (<= 1 |c_#StackHeapBarrier|) (= c_~tegra_rtc_ops_group0~0.base 0) (= c_~tegra_rtc_ops_group2~0.base 0) (= c_~ldv_state_variable_1~0 0) (= c_~tegra_rtc_driver_group0~0.offset 0) (= c_~ldv_irq_data_1_0~0.base 0) (= c_~ldv_irq_data_1_3~0.offset 0) (= (select |c_#valid| |c_ULTIMATE.start_#Ultimate.C_memset_#ptr#1.base|) 1) (= c_~tegra_rtc_ops_group0~0.offset 0) (= c_~ldv_irq_data_1_1~0.offset 0) (= c_~ldv_irq_data_1_2~0.offset 0) (= c_~ldv_irq_line_1_2~0 0) (= |c_ULTIMATE.start_#Ultimate.C_memset_#ptr#1.offset| 0) (<= 2 |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|) (= |c_ULTIMATE.start_main_~#ldvarg2~0#1.offset| 0) (= c_~ldv_irq_line_1_1~0 0) (= c_~tegra_rtc_driver_group0~0.base 0) (= c_~tegra_rtc_ops_group1~0.base 0) (= c_~ref_cnt~0 0) (= c_~ldv_state_variable_2~0 0) (= c_~ldv_init~0 0) (= c_~ldv_state_variable_3~0 0) (= |c_~#tegra_rtc_ops~0.base| 14) (= |c_ULTIMATE.start_main_~#ldvarg2~0#1.base| |c_ULTIMATE.start_#Ultimate.C_memset_#ptr#1.base|) (= c_~ldv_retval_1~0 0) (let ((.cse45 ((as const (Array Int Int)) 0))) (let ((.cse90 (store .cse45 0 0))) (let ((.cse89 (store (store .cse90 8 0) 16 0)) (.cse87 (mod |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 18446744073709551616))) (let ((.cse0 (= (select |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|) 0)) (.cse1 (<= (+ |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 1) |c_#StackHeapBarrier|)) (.cse2 (not (= .cse87 0))) (.cse3 (= (select |c_ULTIMATE.start_main_old_#valid#1| 12) 1)) (.cse4 (= (select |c_ULTIMATE.start_main_old_#valid#1| 15) 1)) (.cse5 (= (select |c_ULTIMATE.start_main_old_#valid#1| 14) 1)) (.cse6 (= (select |c_ULTIMATE.start_main_old_#valid#1| 5) 1)) (.cse7 (= (select |c_ULTIMATE.start_main_old_#valid#1| 0) 0)) (.cse8 (= (select |c_ULTIMATE.start_main_old_#valid#1| 2) 1)) (.cse9 (= (select |c_ULTIMATE.start_main_old_#valid#1| 11) 1)) (.cse10 (exists ((|v_#memory_$Pointer$.base_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.base_144| (Array Int (Array Int Int)))) (let ((.cse91 (select |v_#memory_$Pointer$.base_144| 15))) (and (= (store (store |v_#memory_$Pointer$.base_162| 14 (store (store (store (store (store (store (store (store .cse89 24 |#funAddr~tegra_rtc_read_time.base|) 32 |#funAddr~tegra_rtc_set_time.base|) 40 |#funAddr~tegra_rtc_read_alarm.base|) 48 |#funAddr~tegra_rtc_set_alarm.base|) 56 |#funAddr~tegra_rtc_proc.base|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.base|)) 15 (store (store (store (store (store (store (store (store (store .cse90 8 |#funAddr~tegra_rtc_remove.base|) 16 |#funAddr~tegra_rtc_shutdown.base|) 24 |#funAddr~tegra_rtc_suspend.base|) 32 |#funAddr~tegra_rtc_resume.base|) 40 13) 48 0) 56 |c_~#__this_module~0.base|) 64 0) 72 (select .cse91 72))) |v_#memory_$Pointer$.base_144|) (= |c_#memory_$Pointer$.base| (store |v_#memory_$Pointer$.base_144| 15 (store (store (store (store (store (store (store (store (store (store .cse91 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))))))) (.cse11 (= (select |c_ULTIMATE.start_main_old_#valid#1| 13) 1)) (.cse12 (= (select |c_ULTIMATE.start_main_old_#valid#1| 4) 1)) (.cse13 (<= (+ |c_#StackHeapBarrier| 1) |c_ULTIMATE.start_main_~#ldvarg2~0#1.base|)) (.cse14 (exists ((|v_#length_273| (Array Int Int))) (and (= (select |v_#length_273| 4) 12) (= (select |v_#length_273| 11) 50) (= (select |v_#length_273| 8) 21) (= 36 (select |v_#length_273| 3)) (= 10 (select |v_#length_273| 13)) (= 42 (select |v_#length_273| 6)) (= 32 (select |v_#length_273| 7)) (= (select |v_#length_273| 10) 10) (= 2 (select |v_#length_273| 1)) (= 88 (select |v_#length_273| 14)) (= 42 (select |v_#length_273| 5)) (= (select |v_#length_273| 2) 79) (= 32 (select |v_#length_273| 12)) (= 37 (select |v_#length_273| 9)) (= 153 (select |v_#length_273| 15))))) (.cse15 (= (select |c_ULTIMATE.start_main_old_#valid#1| 8) 1)) (.cse46 (= (select |c_ULTIMATE.start_main_old_#valid#1| 10) 1)) (.cse47 (exists ((|v_#length_274| (Array Int Int))) (= (store |v_#length_274| |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 136) |c_#length|))) (.cse48 (not (= |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 0))) (.cse49 (= (select |c_ULTIMATE.start_main_old_#valid#1| 1) 1)) (.cse50 (= (select |c_ULTIMATE.start_main_old_#valid#1| 6) 1)) (.cse51 (exists ((|v_#memory_$Pointer$.offset_162| (Array Int (Array Int Int))) (|v_#memory_$Pointer$.offset_144| (Array Int (Array Int Int)))) (let ((.cse88 (select |v_#memory_$Pointer$.offset_144| 15))) (and (= |c_#memory_$Pointer$.offset| (store |v_#memory_$Pointer$.offset_144| 15 (store (store (store (store (store (store (store (store (store (store .cse88 73 0) 81 0) 89 0) 97 0) 105 0) 113 0) 121 0) 129 0) 137 0) 145 0))) (= |v_#memory_$Pointer$.offset_144| (store (store |v_#memory_$Pointer$.offset_162| 14 (store (store (store (store (store (store (store (store .cse89 24 |#funAddr~tegra_rtc_read_time.offset|) 32 |#funAddr~tegra_rtc_set_time.offset|) 40 |#funAddr~tegra_rtc_read_alarm.offset|) 48 |#funAddr~tegra_rtc_set_alarm.offset|) 56 |#funAddr~tegra_rtc_proc.offset|) 64 0) 72 0) 80 |#funAddr~tegra_rtc_alarm_irq_enable.offset|)) 15 (store (store (store (store (store (store (store (store (store .cse90 8 |#funAddr~tegra_rtc_remove.offset|) 16 |#funAddr~tegra_rtc_shutdown.offset|) 24 |#funAddr~tegra_rtc_suspend.offset|) 32 |#funAddr~tegra_rtc_resume.offset|) 40 0) 48 0) 56 |c_~#__this_module~0.offset|) 64 0) 72 (select .cse88 72)))))))) (.cse52 (exists ((|v_#memory_int_642| (Array Int (Array Int Int)))) (= (store |v_#memory_int_642| |c_ULTIMATE.start_main_~ldvarg1~0#1.base| .cse45) |c_#memory_int|))) (.cse53 (= (select |c_ULTIMATE.start_main_old_#valid#1| 3) 1)) (.cse54 (= (select |c_ULTIMATE.start_main_old_#valid#1| 9) 1)) (.cse55 (exists ((|v_#valid_305| (Array Int Int))) (and (= |c_#valid| (store |v_#valid_305| |c_ULTIMATE.start_main_~ldvarg1~0#1.base| 1)) (= (select |v_#valid_305| |c_ULTIMATE.start_main_~ldvarg1~0#1.base|) 0)))) (.cse56 (<= .cse87 2012)) (.cse57 (= (select |c_ULTIMATE.start_main_old_#valid#1| 7) 1))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14 .cse15 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_old(#memory_int)_AFTER_CALL_3| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse24 (select |v_#memory_int_209| 14)) (.cse28 (select |v_#memory_int_197| 15)) (.cse30 (select |v_#memory_int_218| 14)) (.cse27 (select |v_#memory_int_203| 14)) (.cse34 (select |v_#memory_int_206| 15)) (.cse16 (select |v_#memory_int_205| 15)) (.cse36 (select |v_#memory_int_193| 15)) (.cse25 (select |v_#memory_int_215| 15)) (.cse35 (select |v_#memory_int_194| 15)) (.cse31 (select |v_#memory_int_217| 14)) (.cse22 (select |v_#memory_int_190| 14)) (.cse39 (select |v_#memory_int_195| 14)) (.cse37 (select |v_#memory_int_214| 15)) (.cse38 (select |v_#memory_int_212| 15)) (.cse41 (select |v_#memory_int_210| 15)) (.cse32 (select |v_#memory_int_198| 15)) (.cse19 (select |v_#memory_int_202| 15)) (.cse33 (select |v_#memory_int_207| 15)) (.cse26 (select |v_#memory_int_211| 15)) (.cse43 (select |v_#memory_int_204| 15)) (.cse20 (select |v_#memory_int_641| 1)) (.cse17 (select |v_#memory_int_199| 15)) (.cse44 (select |v_#memory_int_216| 15)) (.cse42 (select |v_#memory_int_208| 14)) (.cse21 (select |v_#memory_int_200| 14)) (.cse29 (select |v_#memory_int_196| 15)) (.cse18 (select |v_#memory_int_191| 15)) (.cse40 (select |v_#memory_int_192| 14)) (.cse23 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse16 64 (select .cse17 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse18 32 (select .cse19 32))) |v_#memory_int_202|) (= 48 (select .cse20 0)) (= (store |v_#memory_int_200| 14 (store .cse21 32 (select .cse22 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse23 64 (select .cse24 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse25 129 (select .cse26 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse24 72 (select .cse27 72)))) (= (store |v_#memory_int_197| 15 (store .cse28 16 (select .cse29 16))) |v_#memory_int_196|) (= (store |v_#memory_int_218| 14 (store .cse30 8 (select .cse31 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse32 8 (select .cse28 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse30 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse33 48 (select .cse34 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse35 113 (select .cse36 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse27 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse34 56 (select .cse16 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse37 89 (select .cse38 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse36 121 (select .cse25 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse39 48 (select .cse40 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse41 105 (select .cse35 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse31 16 (select .cse42 16)))) (= (store |v_#memory_int_204| 15 (store .cse43 145 (select (select |v_old(#memory_int)_AFTER_CALL_3| 15) 145))) |v_old(#memory_int)_AFTER_CALL_3|) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse22 40 (select .cse39 40)))) (= (store |v_#memory_int_216| 15 (store .cse44 81 (select .cse37 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse38 97 (select .cse41 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse45 0 (select .cse32 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse19 40 (select .cse33 40)))) (= (store |v_#memory_int_211| 15 (store .cse26 137 (select .cse43 137))) |v_#memory_int_204|) (= (select .cse20 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse17 72 0) 73 (select .cse44 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse42 24 (select .cse21 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse29 24 (select .cse18 24)))) (= (store |v_#memory_int_192| 14 (store .cse40 56 (select .cse23 56))) |v_#memory_int_213|)))) .cse46 .cse47 .cse48 .cse49 .cse50 .cse51 .cse52 .cse53 .cse54 .cse55 .cse56 .cse57) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14 .cse15 .cse46 .cse47 .cse48 .cse49 .cse50 .cse51 (exists ((|v_#memory_int_217| (Array Int (Array Int Int))) (|v_#memory_int_218| (Array Int (Array Int Int))) (|v_#memory_int_213| (Array Int (Array Int Int))) (|v_old(#memory_int)_AFTER_CALL_2| (Array Int (Array Int Int))) (|v_#memory_int_214| (Array Int (Array Int Int))) (|v_#memory_int_215| (Array Int (Array Int Int))) (|v_#memory_int_216| (Array Int (Array Int Int))) (|v_#memory_int_641| (Array Int (Array Int Int))) (|v_#memory_int_200| (Array Int (Array Int Int))) (|v_#memory_int_201| (Array Int (Array Int Int))) (|v_#memory_int_206| (Array Int (Array Int Int))) (|v_#memory_int_207| (Array Int (Array Int Int))) (|v_#memory_int_208| (Array Int (Array Int Int))) (|v_#memory_int_209| (Array Int (Array Int Int))) (|v_#memory_int_202| (Array Int (Array Int Int))) (|v_#memory_int_203| (Array Int (Array Int Int))) (|v_#memory_int_204| (Array Int (Array Int Int))) (|v_#memory_int_205| (Array Int (Array Int Int))) (|v_#memory_int_190| (Array Int (Array Int Int))) (|v_#memory_int_191| (Array Int (Array Int Int))) (|v_#memory_int_192| (Array Int (Array Int Int))) (|v_#memory_int_193| (Array Int (Array Int Int))) (|v_#memory_int_198| (Array Int (Array Int Int))) (|v_#memory_int_199| (Array Int (Array Int Int))) (|v_#memory_int_210| (Array Int (Array Int Int))) (|v_#memory_int_211| (Array Int (Array Int Int))) (|v_#memory_int_212| (Array Int (Array Int Int))) (|v_#memory_int_194| (Array Int (Array Int Int))) (|v_#memory_int_195| (Array Int (Array Int Int))) (|v_#memory_int_196| (Array Int (Array Int Int))) (|v_#memory_int_197| (Array Int (Array Int Int)))) (let ((.cse66 (select |v_#memory_int_209| 14)) (.cse70 (select |v_#memory_int_197| 15)) (.cse73 (select |v_#memory_int_218| 14)) (.cse69 (select |v_#memory_int_203| 14)) (.cse77 (select |v_#memory_int_206| 15)) (.cse58 (select |v_#memory_int_205| 15)) (.cse79 (select |v_#memory_int_193| 15)) (.cse67 (select |v_#memory_int_215| 15)) (.cse78 (select |v_#memory_int_194| 15)) (.cse74 (select |v_#memory_int_217| 14)) (.cse64 (select |v_#memory_int_190| 14)) (.cse82 (select |v_#memory_int_195| 14)) (.cse80 (select |v_#memory_int_214| 15)) (.cse81 (select |v_#memory_int_212| 15)) (.cse84 (select |v_#memory_int_210| 15)) (.cse75 (select |v_#memory_int_198| 15)) (.cse61 (select |v_#memory_int_202| 15)) (.cse76 (select |v_#memory_int_207| 15)) (.cse68 (select |v_#memory_int_211| 15)) (.cse72 (select |v_#memory_int_204| 15)) (.cse62 (select |v_#memory_int_641| 1)) (.cse59 (select |v_#memory_int_199| 15)) (.cse86 (select |v_#memory_int_216| 15)) (.cse85 (select |v_#memory_int_208| 14)) (.cse63 (select |v_#memory_int_200| 14)) (.cse71 (select |v_#memory_int_196| 15)) (.cse60 (select |v_#memory_int_191| 15)) (.cse83 (select |v_#memory_int_192| 14)) (.cse65 (select |v_#memory_int_213| 14))) (and (= (store |v_#memory_int_205| 15 (store .cse58 64 (select .cse59 64))) |v_#memory_int_199|) (= (store |v_#memory_int_191| 15 (store .cse60 32 (select .cse61 32))) |v_#memory_int_202|) (= 48 (select .cse62 0)) (= (store |v_#memory_int_200| 14 (store .cse63 32 (select .cse64 32))) |v_#memory_int_190|) (= (store |v_#memory_int_213| 14 (store .cse65 64 (select .cse66 64))) |v_#memory_int_209|) (= (store |v_#memory_int_215| 15 (store .cse67 129 (select .cse68 129))) |v_#memory_int_211|) (= |v_#memory_int_203| (store |v_#memory_int_209| 14 (store .cse66 72 (select .cse69 72)))) (= (store |v_#memory_int_197| 15 (store .cse70 16 (select .cse71 16))) |v_#memory_int_196|) (= (store |v_#memory_int_204| 15 (store .cse72 145 (select (select |v_old(#memory_int)_AFTER_CALL_2| 15) 145))) |v_old(#memory_int)_AFTER_CALL_2|) (= (store |v_#memory_int_218| 14 (store .cse73 8 (select .cse74 8))) |v_#memory_int_217|) (= (store |v_#memory_int_198| 15 (store .cse75 8 (select .cse70 8))) |v_#memory_int_197|) (= (store |v_#memory_int_641| 14 (store (select |v_#memory_int_641| 14) 0 (select .cse73 0))) |v_#memory_int_218|) (= (store |v_#memory_int_207| 15 (store .cse76 48 (select .cse77 48))) |v_#memory_int_206|) (= (store |v_#memory_int_194| 15 (store .cse78 113 (select .cse79 113))) |v_#memory_int_193|) (= (store |v_#memory_int_203| 14 (store .cse69 80 (select (select |v_#memory_int_201| 14) 80))) |v_#memory_int_201|) (= (store |v_#memory_int_206| 15 (store .cse77 56 (select .cse58 56))) |v_#memory_int_205|) (= (store |v_#memory_int_214| 15 (store .cse80 89 (select .cse81 89))) |v_#memory_int_212|) (= (store |v_#memory_int_193| 15 (store .cse79 121 (select .cse67 121))) |v_#memory_int_215|) (= (store |v_#memory_int_195| 14 (store .cse82 48 (select .cse83 48))) |v_#memory_int_192|) (= |v_#memory_int_194| (store |v_#memory_int_210| 15 (store .cse84 105 (select .cse78 105)))) (= |v_#memory_int_208| (store |v_#memory_int_217| 14 (store .cse74 16 (select .cse85 16)))) (= |v_#memory_int_195| (store |v_#memory_int_190| 14 (store .cse64 40 (select .cse82 40)))) (= (store |v_#memory_int_216| 15 (store .cse86 81 (select .cse80 81))) |v_#memory_int_214|) (= (store |v_#memory_int_212| 15 (store .cse81 97 (select .cse84 97))) |v_#memory_int_210|) (= |v_#memory_int_198| (store |v_#memory_int_201| 15 (store .cse45 0 (select .cse75 0)))) (= |v_#memory_int_207| (store |v_#memory_int_202| 15 (store .cse61 40 (select .cse76 40)))) (= (store |v_#memory_int_211| 15 (store .cse68 137 (select .cse72 137))) |v_#memory_int_204|) (= (select .cse62 1) 0) (= (store |v_#memory_int_199| 15 (store (store .cse59 72 0) 73 (select .cse86 73))) |v_#memory_int_216|) (= (store |v_#memory_int_208| 14 (store .cse85 24 (select .cse63 24))) |v_#memory_int_200|) (= |v_#memory_int_191| (store |v_#memory_int_196| 15 (store .cse71 24 (select .cse60 24)))) (= (store |v_#memory_int_192| 14 (store .cse83 56 (select .cse65 56))) |v_#memory_int_213|)))) .cse52 .cse53 .cse54 .cse55 .cse56 .cse57)))))) (= c_~ldv_state_variable_0~0 0) (= c_~ldv_irq_data_1_2~0.base 0) (= |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4) (= c_~tegra_rtc_ops_group1~0.offset 0) (= c_~ldv_retval_0~0 0) (= c_~ldv_retval_2~0 0)) is different from false [2024-11-14 03:02:06,576 INFO L133 SifaRunner]: Sifa could not show that error location is unreachable, found '51378#(and (= 1 |ULTIMATE.start_main_~tmp___1~5#1|) (<= 0 (+ ~ldv_retval_0~0 2147483648)) (exists ((|v_ULTIMATE.start_main_old_#valid#1_10| (Array Int Int))) (not (= |v_ULTIMATE.start_main_old_#valid#1_10| |#valid|))) (= ~ldv_state_variable_2~0 0) (not (= ~ldv_retval_0~0 0)) (<= ~ldv_retval_0~0 2147483647) (exists ((|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_22| Int) (|v_#valid_306| (Array Int Int))) (= (store |v_#valid_306| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_22| 0) |#valid|)) (= ~ldv_state_variable_0~0 2) (= ~ldv_state_variable_1~0 1) (= ~ref_cnt~0 0) (exists ((|v_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr302#1_16| Int) (|v_ULTIMATE.start_#Ultimate.C_memset_#amount#1_15| Int)) (<= (mod |v_ULTIMATE.start_#Ultimate.C_memset_#amount#1_15| 18446744073709551616) (mod |v_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr302#1_16| 18446744073709551616))) (= ~ldv_state_variable_3~0 0) (= |ULTIMATE.start_main_#res#1| 0))' at error location [2024-11-14 03:02:06,576 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2024-11-14 03:02:06,576 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-14 03:02:06,577 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2024-11-14 03:02:06,577 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2089380207] [2024-11-14 03:02:06,577 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-14 03:02:06,577 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-14 03:02:06,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2024-11-14 03:02:06,578 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-14 03:02:06,578 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=262, Unknown=15, NotChecked=690, Total=1056 [2024-11-14 03:02:06,578 INFO L87 Difference]: Start difference. First operand 3971 states and 7154 transitions. Second operand has 9 states, 9 states have (on average 3.4444444444444446) internal successors, (31), 9 states have internal predecessors, (31), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-11-14 03:02:08,590 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:10,595 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:12,600 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:14,605 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:16,610 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:18,615 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:20,622 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:22,626 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:23,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:02:23,228 INFO L93 Difference]: Finished difference Result 3977 states and 7160 transitions. [2024-11-14 03:02:23,228 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-14 03:02:23,228 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 3.4444444444444446) internal successors, (31), 9 states have internal predecessors, (31), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 33 [2024-11-14 03:02:23,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:02:23,245 INFO L225 Difference]: With dead ends: 3977 [2024-11-14 03:02:23,245 INFO L226 Difference]: Without dead ends: 3977 [2024-11-14 03:02:23,246 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 15 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 31.3s TimeCoverageRelationStatistics Valid=107, Invalid=318, Unknown=15, NotChecked=750, Total=1190 [2024-11-14 03:02:23,246 INFO L432 NwaCegarLoop]: 304 mSDtfsCounter, 8 mSDsluCounter, 1215 mSDsCounter, 0 mSdLazyCounter, 243 mSolverCounterSat, 1 mSolverCounterUnsat, 8 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 16.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 1519 SdHoareTripleChecker+Invalid, 252 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 243 IncrementalHoareTripleChecker+Invalid, 8 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 16.5s IncrementalHoareTripleChecker+Time [2024-11-14 03:02:23,247 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 1519 Invalid, 252 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 243 Invalid, 8 Unknown, 0 Unchecked, 16.5s Time] [2024-11-14 03:02:23,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3977 states. [2024-11-14 03:02:23,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3977 to 3977. [2024-11-14 03:02:23,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3977 states, 2994 states have (on average 1.5671342685370742) internal successors, (4692), 3099 states have internal predecessors, (4692), 772 states have call successors, (772), 101 states have call predecessors, (772), 162 states have return successors, (1696), 784 states have call predecessors, (1696), 771 states have call successors, (1696) [2024-11-14 03:02:23,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3977 states to 3977 states and 7160 transitions. [2024-11-14 03:02:23,373 INFO L78 Accepts]: Start accepts. Automaton has 3977 states and 7160 transitions. Word has length 33 [2024-11-14 03:02:23,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:02:23,373 INFO L471 AbstractCegarLoop]: Abstraction has 3977 states and 7160 transitions. [2024-11-14 03:02:23,374 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.4444444444444446) internal successors, (31), 9 states have internal predecessors, (31), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-11-14 03:02:23,374 INFO L276 IsEmpty]: Start isEmpty. Operand 3977 states and 7160 transitions. [2024-11-14 03:02:23,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2024-11-14 03:02:23,375 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:02:23,376 INFO L215 NwaCegarLoop]: trace histogram [4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:02:23,400 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-14 03:02:23,576 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2024-11-14 03:02:23,577 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:02:23,577 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:02:23,578 INFO L85 PathProgramCache]: Analyzing trace with hash 226222835, now seen corresponding path program 2 times [2024-11-14 03:02:23,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2024-11-14 03:02:23,578 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616914442] [2024-11-14 03:02:23,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:02:23,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-14 03:02:23,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 03:02:23,826 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-14 03:02:23,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 03:02:23,956 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2024-11-14 03:02:23,956 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-14 03:02:23,958 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK (110 of 111 remaining) [2024-11-14 03:02:23,960 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location kfreeErr0ASSERT_VIOLATIONMEMORY_FREE (109 of 111 remaining) [2024-11-14 03:02:23,960 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location kfreeErr1ASSERT_VIOLATIONMEMORY_FREE (108 of 111 remaining) [2024-11-14 03:02:23,960 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location kfreeErr2ASSERT_VIOLATIONMEMORY_FREE (107 of 111 remaining) [2024-11-14 03:02:23,960 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (106 of 111 remaining) [2024-11-14 03:02:23,960 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (105 of 111 remaining) [2024-11-14 03:02:23,960 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (104 of 111 remaining) [2024-11-14 03:02:23,961 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (103 of 111 remaining) [2024-11-14 03:02:23,961 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (102 of 111 remaining) [2024-11-14 03:02:23,961 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (101 of 111 remaining) [2024-11-14 03:02:23,961 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (100 of 111 remaining) [2024-11-14 03:02:23,961 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (99 of 111 remaining) [2024-11-14 03:02:23,961 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr8REQUIRES_VIOLATIONMEMORY_DEREFERENCE (98 of 111 remaining) [2024-11-14 03:02:23,962 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr9REQUIRES_VIOLATIONMEMORY_DEREFERENCE (97 of 111 remaining) [2024-11-14 03:02:23,962 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE (96 of 111 remaining) [2024-11-14 03:02:23,962 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE (95 of 111 remaining) [2024-11-14 03:02:23,962 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (94 of 111 remaining) [2024-11-14 03:02:23,962 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (93 of 111 remaining) [2024-11-14 03:02:23,962 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (92 of 111 remaining) [2024-11-14 03:02:23,962 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (91 of 111 remaining) [2024-11-14 03:02:23,962 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (90 of 111 remaining) [2024-11-14 03:02:23,962 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (89 of 111 remaining) [2024-11-14 03:02:23,963 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (88 of 111 remaining) [2024-11-14 03:02:23,963 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (87 of 111 remaining) [2024-11-14 03:02:23,963 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_errorErr0ASSERT_VIOLATIONMEMORY_LEAK (86 of 111 remaining) [2024-11-14 03:02:23,963 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (85 of 111 remaining) [2024-11-14 03:02:23,963 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (84 of 111 remaining) [2024-11-14 03:02:23,963 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (83 of 111 remaining) [2024-11-14 03:02:23,963 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (82 of 111 remaining) [2024-11-14 03:02:23,963 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (81 of 111 remaining) [2024-11-14 03:02:23,964 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (80 of 111 remaining) [2024-11-14 03:02:23,964 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (79 of 111 remaining) [2024-11-14 03:02:23,964 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (78 of 111 remaining) [2024-11-14 03:02:23,964 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (77 of 111 remaining) [2024-11-14 03:02:23,964 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (76 of 111 remaining) [2024-11-14 03:02:23,964 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (75 of 111 remaining) [2024-11-14 03:02:23,964 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (74 of 111 remaining) [2024-11-14 03:02:23,964 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (73 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (72 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_wait_while_busyErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (71 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_wait_while_busyErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (70 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_wait_while_busyErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (69 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_wait_while_busyErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (68 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (67 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (66 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (65 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (64 of 111 remaining) [2024-11-14 03:02:23,965 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (63 of 111 remaining) [2024-11-14 03:02:23,966 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (62 of 111 remaining) [2024-11-14 03:02:23,966 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (61 of 111 remaining) [2024-11-14 03:02:23,966 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (60 of 111 remaining) [2024-11-14 03:02:23,966 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location outer_syncErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (59 of 111 remaining) [2024-11-14 03:02:23,966 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location outer_syncErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (58 of 111 remaining) [2024-11-14 03:02:23,966 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location outer_syncErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (57 of 111 remaining) [2024-11-14 03:02:23,966 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location outer_syncErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (56 of 111 remaining) [2024-11-14 03:02:23,966 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (55 of 111 remaining) [2024-11-14 03:02:23,966 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (54 of 111 remaining) [2024-11-14 03:02:23,967 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (53 of 111 remaining) [2024-11-14 03:02:23,967 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (52 of 111 remaining) [2024-11-14 03:02:23,967 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (51 of 111 remaining) [2024-11-14 03:02:23,967 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (50 of 111 remaining) [2024-11-14 03:02:23,967 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (49 of 111 remaining) [2024-11-14 03:02:23,967 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (48 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location device_may_wakeupErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (47 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location device_may_wakeupErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (46 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location device_may_wakeupErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (45 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location device_may_wakeupErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (44 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location resource_sizeErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (43 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location resource_sizeErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (42 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location resource_sizeErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (41 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location resource_sizeErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (40 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (39 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (38 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (37 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (36 of 111 remaining) [2024-11-14 03:02:23,968 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (35 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (34 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE (33 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE (32 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (31 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (30 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (29 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (28 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (27 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (26 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8REQUIRES_VIOLATIONMEMORY_DEREFERENCE (25 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9REQUIRES_VIOLATIONMEMORY_DEREFERENCE (24 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE (23 of 111 remaining) [2024-11-14 03:02:23,969 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE (22 of 111 remaining) [2024-11-14 03:02:23,971 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12REQUIRES_VIOLATIONMEMORY_DEREFERENCE (21 of 111 remaining) [2024-11-14 03:02:23,971 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13REQUIRES_VIOLATIONMEMORY_DEREFERENCE (20 of 111 remaining) [2024-11-14 03:02:23,971 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE (19 of 111 remaining) [2024-11-14 03:02:23,972 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE (18 of 111 remaining) [2024-11-14 03:02:23,972 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16REQUIRES_VIOLATIONMEMORY_DEREFERENCE (17 of 111 remaining) [2024-11-14 03:02:23,972 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17REQUIRES_VIOLATIONMEMORY_DEREFERENCE (16 of 111 remaining) [2024-11-14 03:02:23,972 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18REQUIRES_VIOLATIONMEMORY_DEREFERENCE (15 of 111 remaining) [2024-11-14 03:02:23,972 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE (14 of 111 remaining) [2024-11-14 03:02:23,972 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE (13 of 111 remaining) [2024-11-14 03:02:23,972 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE (12 of 111 remaining) [2024-11-14 03:02:23,972 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr22REQUIRES_VIOLATIONMEMORY_DEREFERENCE (11 of 111 remaining) [2024-11-14 03:02:23,972 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE (10 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE (9 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr25REQUIRES_VIOLATIONMEMORY_DEREFERENCE (8 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr26REQUIRES_VIOLATIONMEMORY_DEREFERENCE (7 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr27REQUIRES_VIOLATIONMEMORY_DEREFERENCE (6 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr28REQUIRES_VIOLATIONMEMORY_DEREFERENCE (5 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr29REQUIRES_VIOLATIONMEMORY_DEREFERENCE (4 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr30REQUIRES_VIOLATIONMEMORY_DEREFERENCE (3 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr31REQUIRES_VIOLATIONMEMORY_DEREFERENCE (2 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr32REQUIRES_VIOLATIONMEMORY_DEREFERENCE (1 of 111 remaining) [2024-11-14 03:02:23,973 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr33REQUIRES_VIOLATIONMEMORY_DEREFERENCE (0 of 111 remaining) [2024-11-14 03:02:23,973 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-14 03:02:23,977 INFO L407 BasicCegarLoop]: Path program histogram: [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:02:24,067 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-14 03:02:24,073 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.11 03:02:24 BoogieIcfgContainer [2024-11-14 03:02:24,073 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-14 03:02:24,075 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-14 03:02:24,075 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-14 03:02:24,075 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-14 03:02:24,076 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 02:58:37" (3/4) ... [2024-11-14 03:02:24,078 INFO L145 WitnessPrinter]: No result that supports witness generation found [2024-11-14 03:02:24,079 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-14 03:02:24,080 INFO L158 Benchmark]: Toolchain (without parser) took 232548.36ms. Allocated memory was 117.4MB in the beginning and 620.8MB in the end (delta: 503.3MB). Free memory was 89.4MB in the beginning and 246.4MB in the end (delta: -157.0MB). Peak memory consumption was 354.1MB. Max. memory is 16.1GB. [2024-11-14 03:02:24,080 INFO L158 Benchmark]: CDTParser took 0.50ms. Allocated memory is still 117.4MB. Free memory is still 73.1MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 03:02:24,081 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1288.30ms. Allocated memory is still 117.4MB. Free memory was 89.4MB in the beginning and 40.6MB in the end (delta: 48.8MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. [2024-11-14 03:02:24,082 INFO L158 Benchmark]: Boogie Procedure Inliner took 108.39ms. Allocated memory is still 117.4MB. Free memory was 40.6MB in the beginning and 85.8MB in the end (delta: -45.2MB). Peak memory consumption was 16.0MB. Max. memory is 16.1GB. [2024-11-14 03:02:24,082 INFO L158 Benchmark]: Boogie Preprocessor took 84.05ms. Allocated memory is still 117.4MB. Free memory was 85.8MB in the beginning and 79.5MB in the end (delta: 6.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-14 03:02:24,082 INFO L158 Benchmark]: RCFGBuilder took 4473.37ms. Allocated memory is still 117.4MB. Free memory was 79.5MB in the beginning and 72.1MB in the end (delta: 7.5MB). Peak memory consumption was 65.3MB. Max. memory is 16.1GB. [2024-11-14 03:02:24,082 INFO L158 Benchmark]: TraceAbstraction took 226581.96ms. Allocated memory was 117.4MB in the beginning and 620.8MB in the end (delta: 503.3MB). Free memory was 71.2MB in the beginning and 246.4MB in the end (delta: -175.2MB). Peak memory consumption was 327.7MB. Max. memory is 16.1GB. [2024-11-14 03:02:24,083 INFO L158 Benchmark]: Witness Printer took 4.67ms. Allocated memory is still 620.8MB. Free memory was 246.4MB in the beginning and 246.4MB in the end (delta: 35.6kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-14 03:02:24,087 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.50ms. Allocated memory is still 117.4MB. Free memory is still 73.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 1288.30ms. Allocated memory is still 117.4MB. Free memory was 89.4MB in the beginning and 40.6MB in the end (delta: 48.8MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 108.39ms. Allocated memory is still 117.4MB. Free memory was 40.6MB in the beginning and 85.8MB in the end (delta: -45.2MB). Peak memory consumption was 16.0MB. Max. memory is 16.1GB. * Boogie Preprocessor took 84.05ms. Allocated memory is still 117.4MB. Free memory was 85.8MB in the beginning and 79.5MB in the end (delta: 6.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 4473.37ms. Allocated memory is still 117.4MB. Free memory was 79.5MB in the beginning and 72.1MB in the end (delta: 7.5MB). Peak memory consumption was 65.3MB. Max. memory is 16.1GB. * TraceAbstraction took 226581.96ms. Allocated memory was 117.4MB in the beginning and 620.8MB in the end (delta: 503.3MB). Free memory was 71.2MB in the beginning and 246.4MB in the end (delta: -175.2MB). Peak memory consumption was 327.7MB. Max. memory is 16.1GB. * Witness Printer took 4.67ms. Allocated memory is still 620.8MB. Free memory was 246.4MB in the beginning and 246.4MB in the end (delta: 35.6kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 2396]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of large string literal at line 2227, overapproximation of memtrack at line 2396. Possible FailurePath: [L1695] int ldv_irq_1_2 = 0; [L1696] int LDV_IN_INTERRUPT = 1; [L1697] int ldv_irq_1_3 = 0; [L1698] struct platform_device *tegra_rtc_driver_group0 ; [L1699] void *ldv_irq_data_1_1 ; [L1700] int ldv_irq_1_1 = 0; [L1701] int ldv_irq_1_0 = 0; [L1702] int ldv_irq_line_1_3 ; [L1703] void *ldv_irq_data_1_0 ; [L1704] int ldv_state_variable_0 ; [L1705] struct device *tegra_rtc_ops_group1 ; [L1706] int ldv_state_variable_3 ; [L1707] int ldv_irq_line_1_0 ; [L1708] int ldv_state_variable_2 ; [L1709] void *ldv_irq_data_1_3 ; [L1710] int ref_cnt ; [L1711] int ldv_irq_line_1_1 ; [L1712] struct rtc_time *tegra_rtc_ops_group0 ; [L1713] void *ldv_irq_data_1_2 ; [L1714] int ldv_state_variable_1 ; [L1715] int ldv_irq_line_1_2 ; [L1716] struct rtc_wkalrm *tegra_rtc_ops_group2 ; [L2058-L2060] static struct rtc_class_ops tegra_rtc_ops = {0, 0, 0, & tegra_rtc_read_time, & tegra_rtc_set_time, & tegra_rtc_read_alarm, & tegra_rtc_set_alarm, & tegra_rtc_proc, 0, 0, & tegra_rtc_alarm_irq_enable}; [L2226-L2227] static struct platform_driver tegra_rtc_driver = {0, & tegra_rtc_remove, & tegra_rtc_shutdown, & tegra_rtc_suspend, & tegra_rtc_resume, {"tegra_rtc", 0, & __this_module, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0}; [L2243] int ldv_retval_2 ; [L2244] int ldv_retval_0 ; [L2246] int ldv_retval_1 ; [L2769] int ldv_init = 0; [L2398] struct seq_file *ldvarg1 ; [L2399] void *tmp ; [L2400] unsigned int ldvarg0 ; [L2401] unsigned int tmp___0 ; [L2402] pm_message_t ldvarg2 ; [L2403] int tmp___1 ; [L2404] int tmp___2 ; [L2405] int tmp___3 ; [L2406] int tmp___4 ; VAL [LDV_IN_INTERRUPT=1, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg2={17:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2408] CALL, EXPR ldv_zalloc(136U) VAL [LDV_IN_INTERRUPT=1, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1636] void *p ; [L1637] void *tmp ; [L1638] int tmp___0 ; [L1640] tmp___0 = __VERIFIER_nondet_int() [L1641] COND FALSE !(tmp___0 != 0) [L1644] EXPR, FCALL calloc(1U, size) [L1644] tmp = calloc(1U, size) [L1645] p = tmp VAL [LDV_IN_INTERRUPT=1, \old(size)=136, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, p={-(((__int128) 0 << 64) | 18446744073709551615U):0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1646] CALL assume_abort_if_not((unsigned long )p != (unsigned long )((void *)0)) VAL [LDV_IN_INTERRUPT=1, \old(cond)=1, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1613] COND FALSE !(!cond) [L1646] RET assume_abort_if_not((unsigned long )p != (unsigned long )((void *)0)) VAL [LDV_IN_INTERRUPT=1, \old(size)=136, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, p={-(((__int128) 0 << 64) | 18446744073709551615U):0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1647] CALL, EXPR ldv_is_err(p) VAL [LDV_IN_INTERRUPT=1, \old(ptr)={-(((__int128) 0 << 64) | 18446744073709551615U):0}, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2736] return ((unsigned long )ptr > 2012UL); [L1647] RET, EXPR ldv_is_err(p) VAL [LDV_IN_INTERRUPT=1, \old(size)=136, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, p={-(((__int128) 0 << 64) | 18446744073709551615U):0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1647] CALL assume_abort_if_not(ldv_is_err(p) == 0) VAL [LDV_IN_INTERRUPT=1, \old(cond)=1, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1613] COND FALSE !(!cond) [L1647] RET assume_abort_if_not(ldv_is_err(p) == 0) VAL [LDV_IN_INTERRUPT=1, \old(size)=136, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, p={-(((__int128) 0 << 64) | 18446744073709551615U):0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1648] return (p); VAL [LDV_IN_INTERRUPT=1, \old(size)=136, \result={-(((__int128) 0 << 64) | 18446744073709551615U):0}, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2408] RET, EXPR ldv_zalloc(136U) VAL [LDV_IN_INTERRUPT=1, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg2={17:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2408] tmp = ldv_zalloc(136U) [L2409] ldvarg1 = (struct seq_file *)tmp [L2410] tmp___0 = __VERIFIER_nondet_uint() [L2411] ldvarg0 = tmp___0 [L2412] FCALL ldv_initialize() [L2413] FCALL memset((void *)(& ldvarg2), 0, 4U) [L2414] ldv_state_variable_1 = 1 [L2415] ref_cnt = 0 [L2416] ldv_state_variable_0 = 1 [L2417] ldv_state_variable_3 = 0 [L2418] ldv_state_variable_2 = 0 VAL [LDV_IN_INTERRUPT=1, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg1={-(((__int128) 0 << 64) | 18446744073709551615U):0}, ldvarg2={17:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2420] tmp___1 = __VERIFIER_nondet_int() [L2422] case 0: [L2428] case 1: [L2430] tmp___2 = __VERIFIER_nondet_int() [L2432] case 0: VAL [LDV_IN_INTERRUPT=1, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg1={-(((__int128) 0 << 64) | 18446744073709551615U):0}, ldvarg2={17:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___1=1, tmp___2=1] [L2428] case 1: [L2440] case 1: VAL [LDV_IN_INTERRUPT=1, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg1={-(((__int128) 0 << 64) | 18446744073709551615U):0}, ldvarg2={17:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___1=1] [L2428] case 1: [L2442] CALL, EXPR tegra_rtc_init() [L2230] int tmp ; [L2232] CALL, EXPR platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2848] return __VERIFIER_nondet_int(); [L2232] RET, EXPR platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2232] tmp = platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2233] return (tmp); [L2442] RET, EXPR tegra_rtc_init() [L2442] ldv_retval_0 = tegra_rtc_init() [L2428] case 1: [L2450] ldv_state_variable_0 = 2 VAL [LDV_IN_INTERRUPT=1, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=1, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg1={-(((__int128) 0 << 64) | 18446744073709551615U):0}, ldvarg2={17:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___1=1] [L2635] FCALL ldv_check_final_state() [L2636] return 0; [L2636] return 0; VAL [LDV_IN_INTERRUPT=1, \result=0, __this_module={182:159}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=1, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg1={-(((__int128) 0 << 64) | 18446744073709551615U):0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___1=1] - UnprovableResult [Line: 2896]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 2896]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 2896]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: 12]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 33 procedures, 483 locations, 111 error locations. Started 1 CEGAR loops. OverallTime: 226.4s, OverallIterations: 13, TraceHistogramMax: 4, PathProgramHistogramMax: 2, EmptinessCheckTime: 0.0s, AutomataDifference: 99.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 42 mSolverCounterUnknown, 4552 SdHoareTripleChecker+Valid, 97.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 4395 mSDsluCounter, 14078 SdHoareTripleChecker+Invalid, 95.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 9568 mSDsCounter, 989 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 9132 IncrementalHoareTripleChecker+Invalid, 10163 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 989 mSolverCounterUnsat, 4510 mSDtfsCounter, 9132 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 169 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 15 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 31.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3977occurred in iteration=12, InterpolantAutomatonStates: 68, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.6s AutomataMinimizationTime, 12 MinimizatonAttempts, 952 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 1.3s SatisfiabilityAnalysisTime, 3.9s InterpolantComputationTime, 348 NumberOfCodeBlocks, 348 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 331 ConstructedInterpolants, 0 QuantifiedInterpolants, 918 SizeOfPredicates, 0 NumberOfNonLiveVariables, 546 ConjunctsInSsa, 8 ConjunctsInUnsatCore, 14 InterpolantComputations, 11 PerfectInterpolantSequences, 12/15 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-14 03:02:24,127 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-DerefFreeMemtrack-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 440f273968b34677cc4ba81db9f48373d3cac4b8a75ac1f970ae3fdbbff89c17 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-14 03:02:26,784 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-14 03:02:26,896 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/config/svcomp-DerefFreeMemtrack-64bit-Taipan_Bitvector.epf [2024-11-14 03:02:26,905 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-14 03:02:26,906 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-14 03:02:26,941 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-14 03:02:26,961 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-14 03:02:26,965 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-14 03:02:26,966 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-14 03:02:26,966 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-14 03:02:26,966 INFO L153 SettingsManager]: * User list type=DISABLED [2024-11-14 03:02:26,966 INFO L151 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2024-11-14 03:02:26,966 INFO L153 SettingsManager]: * Explicit value domain=true [2024-11-14 03:02:26,966 INFO L153 SettingsManager]: * Octagon Domain=false [2024-11-14 03:02:26,966 INFO L153 SettingsManager]: * Abstract domain=CompoundDomain [2024-11-14 03:02:26,967 INFO L153 SettingsManager]: * Interval Domain=false [2024-11-14 03:02:26,967 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-14 03:02:26,967 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-14 03:02:26,967 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-14 03:02:26,969 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-14 03:02:26,969 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-14 03:02:26,969 INFO L153 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2024-11-14 03:02:26,969 INFO L153 SettingsManager]: * Bitprecise bitfields=true [2024-11-14 03:02:26,969 INFO L153 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2024-11-14 03:02:26,969 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-14 03:02:26,969 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-14 03:02:26,970 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 03:02:26,970 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-14 03:02:26,970 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-14 03:02:26,971 INFO L153 SettingsManager]: * Trace refinement strategy=WALRUS [2024-11-14 03:02:26,971 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-14 03:02:26,971 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-14 03:02:26,971 INFO L153 SettingsManager]: * Trace refinement exception blacklist=NONE [2024-11-14 03:02:26,971 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 440f273968b34677cc4ba81db9f48373d3cac4b8a75ac1f970ae3fdbbff89c17 [2024-11-14 03:02:27,340 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-14 03:02:27,350 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-14 03:02:27,352 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-14 03:02:27,354 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-14 03:02:27,354 INFO L274 PluginConnector]: CDTParser initialized [2024-11-14 03:02:27,356 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i Unable to find full path for "g++" [2024-11-14 03:02:29,360 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-14 03:02:29,789 INFO L384 CDTParser]: Found 1 translation units. [2024-11-14 03:02:29,789 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i [2024-11-14 03:02:29,819 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/data/a11239f5f/c52415cab4b94d8db86bc22dc704b895/FLAGc6dc1e75c [2024-11-14 03:02:29,837 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/data/a11239f5f/c52415cab4b94d8db86bc22dc704b895 [2024-11-14 03:02:29,839 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-14 03:02:29,841 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-14 03:02:29,843 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-14 03:02:29,843 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-14 03:02:29,848 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-14 03:02:29,849 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 03:02:29" (1/1) ... [2024-11-14 03:02:29,850 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2cb29423 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:29, skipping insertion in model container [2024-11-14 03:02:29,850 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 03:02:29" (1/1) ... [2024-11-14 03:02:29,919 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-14 03:02:30,610 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,617 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,627 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,628 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,631 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,638 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,640 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,647 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,648 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,651 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,656 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,658 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,660 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,667 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,669 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,686 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,686 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,687 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,700 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,727 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,731 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,731 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,733 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,736 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,740 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,743 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,748 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,749 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,750 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,757 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,761 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,795 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,795 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,796 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,801 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,805 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,806 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,832 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,855 WARN L1072 CHandler]: saw a pointer cast to a type that we could not get a type size for, not adapting memory model [2024-11-14 03:02:30,858 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 03:02:30,889 INFO L200 MainTranslator]: Completed pre-run [2024-11-14 03:02:31,104 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-14 03:02:31,162 INFO L204 MainTranslator]: Completed translation [2024-11-14 03:02:31,163 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31 WrapperNode [2024-11-14 03:02:31,163 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-14 03:02:31,164 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-14 03:02:31,165 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-14 03:02:31,165 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-14 03:02:31,171 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,217 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,311 INFO L138 Inliner]: procedures = 122, calls = 369, calls flagged for inlining = 54, calls inlined = 37, statements flattened = 839 [2024-11-14 03:02:31,311 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-14 03:02:31,312 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-14 03:02:31,312 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-14 03:02:31,312 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-14 03:02:31,320 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,320 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,327 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,327 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,357 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,364 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,370 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,374 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,382 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-14 03:02:31,383 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-14 03:02:31,383 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-14 03:02:31,384 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-14 03:02:31,385 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (1/1) ... [2024-11-14 03:02:31,391 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-11-14 03:02:31,405 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 03:02:31,429 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-11-14 03:02:31,434 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-11-14 03:02:31,462 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2024-11-14 03:02:31,462 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2024-11-14 03:02:31,463 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1 [2024-11-14 03:02:31,463 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2024-11-14 03:02:31,463 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2024-11-14 03:02:31,463 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2024-11-14 03:02:31,463 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2024-11-14 03:02:31,463 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2024-11-14 03:02:31,463 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_time_to_tm [2024-11-14 03:02:31,463 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_time_to_tm [2024-11-14 03:02:31,463 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_proc [2024-11-14 03:02:31,463 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_proc [2024-11-14 03:02:31,463 INFO L130 BoogieDeclarations]: Found specification of procedure irq_set_irq_wake [2024-11-14 03:02:31,463 INFO L138 BoogieDeclarations]: Found implementation of procedure irq_set_irq_wake [2024-11-14 03:02:31,464 INFO L130 BoogieDeclarations]: Found specification of procedure outer_sync [2024-11-14 03:02:31,464 INFO L138 BoogieDeclarations]: Found implementation of procedure outer_sync [2024-11-14 03:02:31,464 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_remove [2024-11-14 03:02:31,464 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_remove [2024-11-14 03:02:31,465 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_shutdown [2024-11-14 03:02:31,465 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_shutdown [2024-11-14 03:02:31,466 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2024-11-14 03:02:31,466 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2024-11-14 03:02:31,466 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_tm_to_time [2024-11-14 03:02:31,466 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_tm_to_time [2024-11-14 03:02:31,466 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2024-11-14 03:02:31,466 INFO L138 BoogieDeclarations]: Found implementation of procedure __release_region [2024-11-14 03:02:31,466 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2024-11-14 03:02:31,466 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2024-11-14 03:02:31,466 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_alarm [2024-11-14 03:02:31,467 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_alarm [2024-11-14 03:02:31,467 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2024-11-14 03:02:31,467 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2024-11-14 03:02:31,467 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE1 [2024-11-14 03:02:31,467 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_check [2024-11-14 03:02:31,467 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_check [2024-11-14 03:02:31,467 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_alarm_irq_enable [2024-11-14 03:02:31,467 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_alarm_irq_enable [2024-11-14 03:02:31,467 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_iounmap [2024-11-14 03:02:31,467 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_iounmap [2024-11-14 03:02:31,467 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-14 03:02:31,467 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-14 03:02:31,469 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-11-14 03:02:31,469 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-14 03:02:31,469 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_device_unregister [2024-11-14 03:02:31,469 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_device_unregister [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2024-11-14 03:02:31,470 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err [2024-11-14 03:02:31,470 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure device_may_wakeup [2024-11-14 03:02:31,470 INFO L138 BoogieDeclarations]: Found implementation of procedure device_may_wakeup [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2024-11-14 03:02:31,470 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2024-11-14 03:02:31,470 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_resource [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE8 [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1 [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-14 03:02:31,470 INFO L130 BoogieDeclarations]: Found specification of procedure platform_set_drvdata [2024-11-14 03:02:31,470 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_set_drvdata [2024-11-14 03:02:31,471 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_drvdata [2024-11-14 03:02:31,471 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_drvdata [2024-11-14 03:02:31,471 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2024-11-14 03:02:31,471 INFO L130 BoogieDeclarations]: Found specification of procedure dev_err [2024-11-14 03:02:31,471 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_err [2024-11-14 03:02:31,471 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_time [2024-11-14 03:02:31,471 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_time [2024-11-14 03:02:31,471 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_wait_while_busy [2024-11-14 03:02:31,471 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_wait_while_busy [2024-11-14 03:02:31,471 INFO L130 BoogieDeclarations]: Found specification of procedure resource_size [2024-11-14 03:02:31,471 INFO L138 BoogieDeclarations]: Found implementation of procedure resource_size [2024-11-14 03:02:31,471 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2024-11-14 03:02:31,471 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2024-11-14 03:02:31,471 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_time [2024-11-14 03:02:31,471 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_time [2024-11-14 03:02:31,471 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-14 03:02:31,471 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-14 03:02:31,849 INFO L238 CfgBuilder]: Building ICFG [2024-11-14 03:02:31,852 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-14 03:02:32,422 INFO L735 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2024-11-14 03:02:36,304 INFO L? ?]: Removed 565 outVars from TransFormulas that were not future-live. [2024-11-14 03:02:36,304 INFO L287 CfgBuilder]: Performing block encoding [2024-11-14 03:02:36,340 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-14 03:02:36,344 INFO L316 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-14 03:02:36,345 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:02:36 BoogieIcfgContainer [2024-11-14 03:02:36,345 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-14 03:02:36,348 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-14 03:02:36,348 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-14 03:02:36,356 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-14 03:02:36,357 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 03:02:29" (1/3) ... [2024-11-14 03:02:36,357 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50cb23de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 03:02:36, skipping insertion in model container [2024-11-14 03:02:36,358 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:02:31" (2/3) ... [2024-11-14 03:02:36,358 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50cb23de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 03:02:36, skipping insertion in model container [2024-11-14 03:02:36,358 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:02:36" (3/3) ... [2024-11-14 03:02:36,359 INFO L112 eAbstractionObserver]: Analyzing ICFG linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i [2024-11-14 03:02:36,375 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:None NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-14 03:02:36,378 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point.cil.out.i that has 33 procedures, 575 locations, 1 initial locations, 1 loop locations, and 111 error locations. [2024-11-14 03:02:36,455 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-14 03:02:36,472 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=None, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3462dde5, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-14 03:02:36,472 INFO L334 AbstractCegarLoop]: Starting to check reachability of 111 error locations. [2024-11-14 03:02:36,478 INFO L276 IsEmpty]: Start isEmpty. Operand has 574 states, 351 states have (on average 1.5783475783475784) internal successors, (554), 471 states have internal predecessors, (554), 80 states have call successors, (80), 32 states have call predecessors, (80), 31 states have return successors, (74), 74 states have call predecessors, (74), 74 states have call successors, (74) [2024-11-14 03:02:36,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2024-11-14 03:02:36,487 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:02:36,487 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:02:36,488 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:02:36,494 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:02:36,496 INFO L85 PathProgramCache]: Analyzing trace with hash 929860443, now seen corresponding path program 1 times [2024-11-14 03:02:36,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:02:36,514 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [691489559] [2024-11-14 03:02:36,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:02:36,516 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:02:36,517 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:02:36,522 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:02:36,523 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2024-11-14 03:02:37,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:02:37,082 INFO L255 TraceCheckSpWp]: Trace formula consists of 266 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-14 03:02:37,087 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:02:37,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2024-11-14 03:02:37,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:02:37,360 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:02:37,360 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:02:37,360 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [691489559] [2024-11-14 03:02:37,361 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [691489559] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:02:37,361 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:02:37,361 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:02:37,363 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [683729760] [2024-11-14 03:02:37,363 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:02:37,367 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 03:02:37,367 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:02:37,389 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 03:02:37,390 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 03:02:37,393 INFO L87 Difference]: Start difference. First operand has 574 states, 351 states have (on average 1.5783475783475784) internal successors, (554), 471 states have internal predecessors, (554), 80 states have call successors, (80), 32 states have call predecessors, (80), 31 states have return successors, (74), 74 states have call predecessors, (74), 74 states have call successors, (74) Second operand has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:02:39,430 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:41,441 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:43,446 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:50,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:02:50,952 INFO L93 Difference]: Finished difference Result 912 states and 1209 transitions. [2024-11-14 03:02:50,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 03:02:50,956 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 10 [2024-11-14 03:02:50,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:02:50,972 INFO L225 Difference]: With dead ends: 912 [2024-11-14 03:02:50,972 INFO L226 Difference]: Without dead ends: 898 [2024-11-14 03:02:50,974 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-14 03:02:50,976 INFO L432 NwaCegarLoop]: 506 mSDtfsCounter, 481 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 1095 mSolverCounterSat, 159 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 502 SdHoareTripleChecker+Valid, 1615 SdHoareTripleChecker+Invalid, 1257 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 159 IncrementalHoareTripleChecker+Valid, 1095 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 13.3s IncrementalHoareTripleChecker+Time [2024-11-14 03:02:50,977 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [502 Valid, 1615 Invalid, 1257 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [159 Valid, 1095 Invalid, 3 Unknown, 0 Unchecked, 13.3s Time] [2024-11-14 03:02:50,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 898 states. [2024-11-14 03:02:51,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 898 to 802. [2024-11-14 03:02:51,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 802 states, 540 states have (on average 1.5851851851851853) internal successors, (856), 654 states have internal predecessors, (856), 110 states have call successors, (110), 31 states have call predecessors, (110), 41 states have return successors, (166), 120 states have call predecessors, (166), 109 states have call successors, (166) [2024-11-14 03:02:51,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 802 states to 802 states and 1132 transitions. [2024-11-14 03:02:51,081 INFO L78 Accepts]: Start accepts. Automaton has 802 states and 1132 transitions. Word has length 10 [2024-11-14 03:02:51,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:02:51,081 INFO L471 AbstractCegarLoop]: Abstraction has 802 states and 1132 transitions. [2024-11-14 03:02:51,082 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:02:51,082 INFO L276 IsEmpty]: Start isEmpty. Operand 802 states and 1132 transitions. [2024-11-14 03:02:51,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2024-11-14 03:02:51,083 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:02:51,083 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:02:51,092 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Ended with exit code 0 [2024-11-14 03:02:51,284 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:02:51,284 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:02:51,285 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:02:51,285 INFO L85 PathProgramCache]: Analyzing trace with hash -1239096834, now seen corresponding path program 1 times [2024-11-14 03:02:51,285 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:02:51,285 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [968207419] [2024-11-14 03:02:51,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:02:51,286 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:02:51,286 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:02:51,288 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:02:51,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2024-11-14 03:02:51,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:02:51,768 INFO L255 TraceCheckSpWp]: Trace formula consists of 267 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-14 03:02:51,770 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:02:51,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-11-14 03:02:52,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:02:52,230 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:02:52,230 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:02:52,230 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [968207419] [2024-11-14 03:02:52,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [968207419] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:02:52,231 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:02:52,231 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:02:52,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091528400] [2024-11-14 03:02:52,231 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:02:52,232 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 03:02:52,232 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:02:52,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 03:02:52,233 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 03:02:52,233 INFO L87 Difference]: Start difference. First operand 802 states and 1132 transitions. Second operand has 5 states, 4 states have (on average 2.25) internal successors, (9), 5 states have internal predecessors, (9), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:02:54,257 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:56,282 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:02:58,285 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:06,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:03:06,762 INFO L93 Difference]: Finished difference Result 1191 states and 1740 transitions. [2024-11-14 03:03:06,763 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-14 03:03:06,763 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.25) internal successors, (9), 5 states have internal predecessors, (9), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2024-11-14 03:03:06,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:03:06,772 INFO L225 Difference]: With dead ends: 1191 [2024-11-14 03:03:06,773 INFO L226 Difference]: Without dead ends: 1191 [2024-11-14 03:03:06,773 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-14 03:03:06,777 INFO L432 NwaCegarLoop]: 539 mSDtfsCounter, 471 mSDsluCounter, 1165 mSDsCounter, 0 mSdLazyCounter, 1121 mSolverCounterSat, 141 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 13.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 494 SdHoareTripleChecker+Valid, 1704 SdHoareTripleChecker+Invalid, 1265 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 141 IncrementalHoareTripleChecker+Valid, 1121 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 14.3s IncrementalHoareTripleChecker+Time [2024-11-14 03:03:06,777 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [494 Valid, 1704 Invalid, 1265 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [141 Valid, 1121 Invalid, 3 Unknown, 0 Unchecked, 14.3s Time] [2024-11-14 03:03:06,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1191 states. [2024-11-14 03:03:06,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1191 to 1119. [2024-11-14 03:03:06,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1119 states, 804 states have (on average 1.6194029850746268) internal successors, (1302), 921 states have internal predecessors, (1302), 162 states have call successors, (162), 31 states have call predecessors, (162), 42 states have return successors, (264), 172 states have call predecessors, (264), 161 states have call successors, (264) [2024-11-14 03:03:06,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1119 states to 1119 states and 1728 transitions. [2024-11-14 03:03:06,873 INFO L78 Accepts]: Start accepts. Automaton has 1119 states and 1728 transitions. Word has length 11 [2024-11-14 03:03:06,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:03:06,873 INFO L471 AbstractCegarLoop]: Abstraction has 1119 states and 1728 transitions. [2024-11-14 03:03:06,873 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.25) internal successors, (9), 5 states have internal predecessors, (9), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:06,874 INFO L276 IsEmpty]: Start isEmpty. Operand 1119 states and 1728 transitions. [2024-11-14 03:03:06,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2024-11-14 03:03:06,875 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:03:06,875 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:03:06,883 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Ended with exit code 0 [2024-11-14 03:03:07,079 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:07,080 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:03:07,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:03:07,081 INFO L85 PathProgramCache]: Analyzing trace with hash -734960162, now seen corresponding path program 1 times [2024-11-14 03:03:07,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:03:07,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [588142427] [2024-11-14 03:03:07,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:07,081 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:07,081 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:03:07,083 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:03:07,086 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2024-11-14 03:03:07,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:07,705 INFO L255 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-14 03:03:07,707 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:07,724 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2024-11-14 03:03:07,900 WARN L873 $PredicateComparison]: unable to prove that (exists ((|ldv_zalloc_#t~malloc15#1.base| (_ BitVec 64))) (and (= (_ bv0 1) (select |c_old(#valid)| |ldv_zalloc_#t~malloc15#1.base|)) (= |c_#valid| (store |c_old(#valid)| |ldv_zalloc_#t~malloc15#1.base| (select |c_#valid| |ldv_zalloc_#t~malloc15#1.base|))))) is different from true [2024-11-14 03:03:07,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 3 [2024-11-14 03:03:08,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 3 [2024-11-14 03:03:08,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 3 [2024-11-14 03:03:08,315 INFO L349 Elim1Store]: treesize reduction 24, result has 33.3 percent of original size [2024-11-14 03:03:08,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 20 [2024-11-14 03:03:08,414 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-14 03:03:08,414 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:03:08,414 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:03:08,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [588142427] [2024-11-14 03:03:08,414 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [588142427] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:03:08,414 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:03:08,415 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-14 03:03:08,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1413437448] [2024-11-14 03:03:08,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:03:08,415 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-14 03:03:08,415 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:03:08,416 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-14 03:03:08,416 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=14, Unknown=1, NotChecked=6, Total=30 [2024-11-14 03:03:08,416 INFO L87 Difference]: Start difference. First operand 1119 states and 1728 transitions. Second operand has 6 states, 5 states have (on average 3.0) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 03:03:10,445 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:12,448 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:14,451 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:21,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:03:21,994 INFO L93 Difference]: Finished difference Result 1329 states and 2002 transitions. [2024-11-14 03:03:21,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 03:03:21,995 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.0) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 26 [2024-11-14 03:03:21,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:03:22,010 INFO L225 Difference]: With dead ends: 1329 [2024-11-14 03:03:22,010 INFO L226 Difference]: Without dead ends: 1329 [2024-11-14 03:03:22,010 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=13, Invalid=20, Unknown=1, NotChecked=8, Total=42 [2024-11-14 03:03:22,011 INFO L432 NwaCegarLoop]: 555 mSDtfsCounter, 471 mSDsluCounter, 1175 mSDsCounter, 0 mSdLazyCounter, 1088 mSolverCounterSat, 140 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 13.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 492 SdHoareTripleChecker+Valid, 1730 SdHoareTripleChecker+Invalid, 2441 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 140 IncrementalHoareTripleChecker+Valid, 1088 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 1210 IncrementalHoareTripleChecker+Unchecked, 13.4s IncrementalHoareTripleChecker+Time [2024-11-14 03:03:22,011 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [492 Valid, 1730 Invalid, 2441 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [140 Valid, 1088 Invalid, 3 Unknown, 1210 Unchecked, 13.4s Time] [2024-11-14 03:03:22,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1329 states. [2024-11-14 03:03:22,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1329 to 1118. [2024-11-14 03:03:22,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1118 states, 804 states have (on average 1.6181592039800996) internal successors, (1301), 920 states have internal predecessors, (1301), 162 states have call successors, (162), 31 states have call predecessors, (162), 42 states have return successors, (264), 172 states have call predecessors, (264), 161 states have call successors, (264) [2024-11-14 03:03:22,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1118 states to 1118 states and 1727 transitions. [2024-11-14 03:03:22,078 INFO L78 Accepts]: Start accepts. Automaton has 1118 states and 1727 transitions. Word has length 26 [2024-11-14 03:03:22,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:03:22,079 INFO L471 AbstractCegarLoop]: Abstraction has 1118 states and 1727 transitions. [2024-11-14 03:03:22,079 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.0) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 03:03:22,079 INFO L276 IsEmpty]: Start isEmpty. Operand 1118 states and 1727 transitions. [2024-11-14 03:03:22,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-11-14 03:03:22,081 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:03:22,081 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:03:22,090 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Ended with exit code 0 [2024-11-14 03:03:22,281 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:22,282 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:03:22,282 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:03:22,282 INFO L85 PathProgramCache]: Analyzing trace with hash -567238619, now seen corresponding path program 1 times [2024-11-14 03:03:22,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:03:22,283 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [684011808] [2024-11-14 03:03:22,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:22,283 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:22,283 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:03:22,285 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:03:22,286 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2024-11-14 03:03:22,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:22,691 INFO L255 TraceCheckSpWp]: Trace formula consists of 300 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-14 03:03:22,693 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:22,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:22,827 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:03:22,827 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:03:22,827 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [684011808] [2024-11-14 03:03:22,827 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [684011808] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:03:22,827 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:03:22,827 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:03:22,827 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [130529954] [2024-11-14 03:03:22,827 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:03:22,830 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-14 03:03:22,830 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:03:22,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-14 03:03:22,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-14 03:03:22,831 INFO L87 Difference]: Start difference. First operand 1118 states and 1727 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:22,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:03:22,935 INFO L93 Difference]: Finished difference Result 1120 states and 1729 transitions. [2024-11-14 03:03:22,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-14 03:03:22,936 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2024-11-14 03:03:22,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:03:22,942 INFO L225 Difference]: With dead ends: 1120 [2024-11-14 03:03:22,942 INFO L226 Difference]: Without dead ends: 1120 [2024-11-14 03:03:22,942 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-14 03:03:22,943 INFO L432 NwaCegarLoop]: 682 mSDtfsCounter, 2 mSDsluCounter, 680 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 1362 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 03:03:22,943 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 1362 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 03:03:22,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1120 states. [2024-11-14 03:03:22,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1120 to 1120. [2024-11-14 03:03:22,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1120 states, 806 states have (on average 1.6166253101736974) internal successors, (1303), 922 states have internal predecessors, (1303), 162 states have call successors, (162), 31 states have call predecessors, (162), 42 states have return successors, (264), 172 states have call predecessors, (264), 161 states have call successors, (264) [2024-11-14 03:03:22,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1120 states to 1120 states and 1729 transitions. [2024-11-14 03:03:22,984 INFO L78 Accepts]: Start accepts. Automaton has 1120 states and 1729 transitions. Word has length 24 [2024-11-14 03:03:22,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:03:22,984 INFO L471 AbstractCegarLoop]: Abstraction has 1120 states and 1729 transitions. [2024-11-14 03:03:22,984 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:22,985 INFO L276 IsEmpty]: Start isEmpty. Operand 1120 states and 1729 transitions. [2024-11-14 03:03:22,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2024-11-14 03:03:22,986 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:03:22,986 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:03:22,995 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Ended with exit code 0 [2024-11-14 03:03:23,187 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:23,187 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:03:23,187 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:03:23,187 INFO L85 PathProgramCache]: Analyzing trace with hash -1308928037, now seen corresponding path program 1 times [2024-11-14 03:03:23,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:03:23,188 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1843983921] [2024-11-14 03:03:23,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:23,188 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:23,188 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:03:23,192 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:03:23,193 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2024-11-14 03:03:23,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:23,940 INFO L255 TraceCheckSpWp]: Trace formula consists of 309 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-14 03:03:23,943 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:23,977 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-11-14 03:03:24,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2024-11-14 03:03:24,275 WARN L873 $PredicateComparison]: unable to prove that (exists ((|ldv_zalloc_#t~malloc15#1.base| (_ BitVec 64))) (and (= (_ bv0 1) (select |c_old(#valid)| |ldv_zalloc_#t~malloc15#1.base|)) (= |c_#length| (store |c_old(#length)| |ldv_zalloc_#t~malloc15#1.base| (select |c_#length| |ldv_zalloc_#t~malloc15#1.base|))))) is different from true [2024-11-14 03:03:24,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-14 03:03:24,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-14 03:03:24,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-14 03:03:24,594 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-14 03:03:24,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2024-11-14 03:03:24,661 INFO L349 Elim1Store]: treesize reduction 6, result has 40.0 percent of original size [2024-11-14 03:03:24,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 13 [2024-11-14 03:03:24,955 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-14 03:03:24,955 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:03:24,955 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:03:24,955 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1843983921] [2024-11-14 03:03:24,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1843983921] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:03:24,955 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:03:24,955 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-14 03:03:24,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1719426270] [2024-11-14 03:03:24,955 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:03:24,956 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-14 03:03:24,956 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:03:24,956 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-14 03:03:24,956 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=21, Unknown=1, NotChecked=8, Total=42 [2024-11-14 03:03:24,956 INFO L87 Difference]: Start difference. First operand 1120 states and 1729 transitions. Second operand has 7 states, 5 states have (on average 3.2) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 03:03:26,981 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:28,997 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:31,003 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:33,007 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:43,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:03:43,215 INFO L93 Difference]: Finished difference Result 1672 states and 2586 transitions. [2024-11-14 03:03:43,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-14 03:03:43,216 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 5 states have (on average 3.2) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 27 [2024-11-14 03:03:43,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:03:43,224 INFO L225 Difference]: With dead ends: 1672 [2024-11-14 03:03:43,224 INFO L226 Difference]: Without dead ends: 1672 [2024-11-14 03:03:43,224 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=22, Invalid=37, Unknown=1, NotChecked=12, Total=72 [2024-11-14 03:03:43,225 INFO L432 NwaCegarLoop]: 476 mSDtfsCounter, 895 mSDsluCounter, 1191 mSDsCounter, 0 mSdLazyCounter, 1283 mSolverCounterSat, 205 mSolverCounterUnsat, 4 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 17.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 921 SdHoareTripleChecker+Valid, 1667 SdHoareTripleChecker+Invalid, 2997 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 205 IncrementalHoareTripleChecker+Valid, 1283 IncrementalHoareTripleChecker+Invalid, 4 IncrementalHoareTripleChecker+Unknown, 1505 IncrementalHoareTripleChecker+Unchecked, 18.0s IncrementalHoareTripleChecker+Time [2024-11-14 03:03:43,225 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [921 Valid, 1667 Invalid, 2997 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [205 Valid, 1283 Invalid, 4 Unknown, 1505 Unchecked, 18.0s Time] [2024-11-14 03:03:43,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1672 states. [2024-11-14 03:03:43,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1672 to 1272. [2024-11-14 03:03:43,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1272 states, 934 states have (on average 1.6241970021413277) internal successors, (1517), 1050 states have internal predecessors, (1517), 187 states have call successors, (187), 31 states have call predecessors, (187), 42 states have return successors, (310), 197 states have call predecessors, (310), 186 states have call successors, (310) [2024-11-14 03:03:43,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1272 states to 1272 states and 2014 transitions. [2024-11-14 03:03:43,278 INFO L78 Accepts]: Start accepts. Automaton has 1272 states and 2014 transitions. Word has length 27 [2024-11-14 03:03:43,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:03:43,278 INFO L471 AbstractCegarLoop]: Abstraction has 1272 states and 2014 transitions. [2024-11-14 03:03:43,278 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 5 states have (on average 3.2) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 03:03:43,279 INFO L276 IsEmpty]: Start isEmpty. Operand 1272 states and 2014 transitions. [2024-11-14 03:03:43,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2024-11-14 03:03:43,280 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:03:43,280 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:03:43,289 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Ended with exit code 0 [2024-11-14 03:03:43,480 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:43,481 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:03:43,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:03:43,481 INFO L85 PathProgramCache]: Analyzing trace with hash -1362738172, now seen corresponding path program 1 times [2024-11-14 03:03:43,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:03:43,481 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1302392376] [2024-11-14 03:03:43,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:43,482 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:43,482 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:03:43,484 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:03:43,485 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2024-11-14 03:03:43,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:43,949 INFO L255 TraceCheckSpWp]: Trace formula consists of 311 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-14 03:03:43,951 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:44,164 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:44,164 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:03:44,408 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:44,408 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:03:44,408 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1302392376] [2024-11-14 03:03:44,408 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1302392376] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 03:03:44,408 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1052008022] [2024-11-14 03:03:44,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:44,409 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-14 03:03:44,409 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 [2024-11-14 03:03:44,411 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-14 03:03:44,412 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2024-11-14 03:03:44,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:44,930 INFO L255 TraceCheckSpWp]: Trace formula consists of 311 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-14 03:03:44,931 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:45,058 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-14 03:03:45,059 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:03:45,059 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1052008022] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:03:45,059 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-14 03:03:45,059 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5, 5] total 9 [2024-11-14 03:03:45,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [328332140] [2024-11-14 03:03:45,059 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:03:45,060 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-14 03:03:45,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:03:45,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-14 03:03:45,061 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-14 03:03:45,061 INFO L87 Difference]: Start difference. First operand 1272 states and 2014 transitions. Second operand has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:47,080 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:47,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:03:47,194 INFO L93 Difference]: Finished difference Result 2480 states and 3929 transitions. [2024-11-14 03:03:47,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-14 03:03:47,194 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2024-11-14 03:03:47,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:03:47,205 INFO L225 Difference]: With dead ends: 2480 [2024-11-14 03:03:47,205 INFO L226 Difference]: Without dead ends: 2480 [2024-11-14 03:03:47,206 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-14 03:03:47,206 INFO L432 NwaCegarLoop]: 687 mSDtfsCounter, 643 mSDsluCounter, 671 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 3 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 643 SdHoareTripleChecker+Valid, 1358 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2024-11-14 03:03:47,206 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [643 Valid, 1358 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 11 Invalid, 1 Unknown, 0 Unchecked, 2.1s Time] [2024-11-14 03:03:47,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2480 states. [2024-11-14 03:03:47,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2480 to 2368. [2024-11-14 03:03:47,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2368 states, 1813 states have (on average 1.630446773303916) internal successors, (2956), 1937 states have internal predecessors, (2956), 364 states have call successors, (364), 60 states have call predecessors, (364), 82 states have return successors, (605), 384 states have call predecessors, (605), 363 states have call successors, (605) [2024-11-14 03:03:47,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2368 states to 2368 states and 3925 transitions. [2024-11-14 03:03:47,298 INFO L78 Accepts]: Start accepts. Automaton has 2368 states and 3925 transitions. Word has length 25 [2024-11-14 03:03:47,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:03:47,298 INFO L471 AbstractCegarLoop]: Abstraction has 2368 states and 3925 transitions. [2024-11-14 03:03:47,298 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:47,299 INFO L276 IsEmpty]: Start isEmpty. Operand 2368 states and 3925 transitions. [2024-11-14 03:03:47,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2024-11-14 03:03:47,300 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:03:47,300 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:03:47,309 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2024-11-14 03:03:47,506 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (8)] Ended with exit code 0 [2024-11-14 03:03:47,701 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt [2024-11-14 03:03:47,701 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting tegra_rtc_procErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:03:47,701 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:03:47,702 INFO L85 PathProgramCache]: Analyzing trace with hash -1375031678, now seen corresponding path program 1 times [2024-11-14 03:03:47,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:03:47,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1667657182] [2024-11-14 03:03:47,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:47,702 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:47,702 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:03:47,704 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:03:47,706 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2024-11-14 03:03:48,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:48,160 INFO L255 TraceCheckSpWp]: Trace formula consists of 322 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-14 03:03:48,162 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:48,383 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:48,383 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:03:48,629 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:48,629 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:03:48,629 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1667657182] [2024-11-14 03:03:48,630 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1667657182] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 03:03:48,630 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [598304977] [2024-11-14 03:03:48,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:48,630 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-14 03:03:48,630 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 [2024-11-14 03:03:48,634 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-14 03:03:48,637 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (10)] Waiting until timeout for monitored process [2024-11-14 03:03:49,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:49,247 INFO L255 TraceCheckSpWp]: Trace formula consists of 322 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-14 03:03:49,248 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:49,364 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-14 03:03:49,364 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:03:49,364 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [598304977] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:03:49,364 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-14 03:03:49,364 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5, 5] total 9 [2024-11-14 03:03:49,364 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [576418269] [2024-11-14 03:03:49,364 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:03:49,364 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-14 03:03:49,364 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:03:49,365 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-14 03:03:49,365 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-14 03:03:49,365 INFO L87 Difference]: Start difference. First operand 2368 states and 3925 transitions. Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:49,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:03:49,405 INFO L93 Difference]: Finished difference Result 1530 states and 2389 transitions. [2024-11-14 03:03:49,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-14 03:03:49,406 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2024-11-14 03:03:49,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:03:49,413 INFO L225 Difference]: With dead ends: 1530 [2024-11-14 03:03:49,413 INFO L226 Difference]: Without dead ends: 1530 [2024-11-14 03:03:49,413 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-14 03:03:49,414 INFO L432 NwaCegarLoop]: 431 mSDtfsCounter, 425 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 425 SdHoareTripleChecker+Valid, 431 SdHoareTripleChecker+Invalid, 3 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-14 03:03:49,414 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [425 Valid, 431 Invalid, 3 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-14 03:03:49,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1530 states. [2024-11-14 03:03:49,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1530 to 1530. [2024-11-14 03:03:49,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1530 states, 1169 states have (on average 1.474764756201882) internal successors, (1724), 1223 states have internal predecessors, (1724), 244 states have call successors, (244), 48 states have call predecessors, (244), 68 states have return successors, (421), 262 states have call predecessors, (421), 243 states have call successors, (421) [2024-11-14 03:03:49,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1530 states to 1530 states and 2389 transitions. [2024-11-14 03:03:49,488 INFO L78 Accepts]: Start accepts. Automaton has 1530 states and 2389 transitions. Word has length 29 [2024-11-14 03:03:49,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:03:49,488 INFO L471 AbstractCegarLoop]: Abstraction has 1530 states and 2389 transitions. [2024-11-14 03:03:49,488 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:49,488 INFO L276 IsEmpty]: Start isEmpty. Operand 1530 states and 2389 transitions. [2024-11-14 03:03:49,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-11-14 03:03:49,489 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:03:49,489 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:03:49,495 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (10)] Forceful destruction successful, exit code 0 [2024-11-14 03:03:49,694 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Ended with exit code 0 [2024-11-14 03:03:49,890 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:49,890 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:03:49,890 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:03:49,891 INFO L85 PathProgramCache]: Analyzing trace with hash -51743293, now seen corresponding path program 1 times [2024-11-14 03:03:49,891 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:03:49,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [610475836] [2024-11-14 03:03:49,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:49,891 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:49,891 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:03:49,894 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:03:49,895 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2024-11-14 03:03:50,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:50,351 INFO L255 TraceCheckSpWp]: Trace formula consists of 320 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-14 03:03:50,352 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:50,531 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:50,531 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:03:50,787 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:50,787 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:03:50,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [610475836] [2024-11-14 03:03:50,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [610475836] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 03:03:50,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [121844201] [2024-11-14 03:03:50,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:50,788 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-14 03:03:50,788 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 [2024-11-14 03:03:50,791 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-14 03:03:50,795 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (12)] Waiting until timeout for monitored process [2024-11-14 03:03:51,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:51,594 INFO L255 TraceCheckSpWp]: Trace formula consists of 320 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-14 03:03:51,596 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:51,673 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:51,674 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:03:51,752 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:51,752 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [121844201] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 03:03:51,753 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2107345936] [2024-11-14 03:03:51,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:03:51,753 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-14 03:03:51,753 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 [2024-11-14 03:03:51,755 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-14 03:03:51,756 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-14 03:03:52,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:03:52,171 INFO L255 TraceCheckSpWp]: Trace formula consists of 320 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-14 03:03:52,172 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:52,244 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:52,245 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-14 03:03:52,318 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-14 03:03:52,318 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2107345936] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-14 03:03:52,318 INFO L185 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2024-11-14 03:03:52,318 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5, 5] total 8 [2024-11-14 03:03:52,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1783379340] [2024-11-14 03:03:52,318 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2024-11-14 03:03:52,319 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-14 03:03:52,319 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:03:52,319 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-14 03:03:52,319 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-14 03:03:52,319 INFO L87 Difference]: Start difference. First operand 1530 states and 2389 transitions. Second operand has 8 states, 8 states have (on average 3.875) internal successors, (31), 8 states have internal predecessors, (31), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:52,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:03:52,586 INFO L93 Difference]: Finished difference Result 1536 states and 2395 transitions. [2024-11-14 03:03:52,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-14 03:03:52,588 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 3.875) internal successors, (31), 8 states have internal predecessors, (31), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2024-11-14 03:03:52,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:03:52,594 INFO L225 Difference]: With dead ends: 1536 [2024-11-14 03:03:52,594 INFO L226 Difference]: Without dead ends: 1536 [2024-11-14 03:03:52,595 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 156 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2024-11-14 03:03:52,595 INFO L432 NwaCegarLoop]: 429 mSDtfsCounter, 8 mSDsluCounter, 1280 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 1709 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 03:03:52,596 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 1709 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 03:03:52,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1536 states. [2024-11-14 03:03:52,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1536 to 1536. [2024-11-14 03:03:52,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1536 states, 1175 states have (on average 1.4723404255319148) internal successors, (1730), 1229 states have internal predecessors, (1730), 244 states have call successors, (244), 48 states have call predecessors, (244), 68 states have return successors, (421), 262 states have call predecessors, (421), 243 states have call successors, (421) [2024-11-14 03:03:52,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1536 states to 1536 states and 2395 transitions. [2024-11-14 03:03:52,648 INFO L78 Accepts]: Start accepts. Automaton has 1536 states and 2395 transitions. Word has length 28 [2024-11-14 03:03:52,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:03:52,649 INFO L471 AbstractCegarLoop]: Abstraction has 1536 states and 2395 transitions. [2024-11-14 03:03:52,649 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 3.875) internal successors, (31), 8 states have internal predecessors, (31), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:52,649 INFO L276 IsEmpty]: Start isEmpty. Operand 1536 states and 2395 transitions. [2024-11-14 03:03:52,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2024-11-14 03:03:52,650 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:03:52,650 INFO L215 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:03:52,657 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Ended with exit code 0 [2024-11-14 03:03:52,873 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-11-14 03:03:53,056 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt (12)] Ended with exit code 0 [2024-11-14 03:03:53,251 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 -smt2 -in SMTLIB2_COMPLIANT=true,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/cvc4 --incremental --print-success --lang smt [2024-11-14 03:03:53,251 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:03:53,251 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:03:53,252 INFO L85 PathProgramCache]: Analyzing trace with hash 1616577090, now seen corresponding path program 2 times [2024-11-14 03:03:53,252 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:03:53,252 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [868486511] [2024-11-14 03:03:53,252 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-14 03:03:53,252 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:03:53,252 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:03:53,255 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:03:53,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2024-11-14 03:03:53,911 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-14 03:03:53,911 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-14 03:03:53,923 INFO L255 TraceCheckSpWp]: Trace formula consists of 309 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-14 03:03:53,924 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:03:54,689 WARN L873 $PredicateComparison]: unable to prove that (exists ((|v_ULTIMATE.start_main_~#ldvarg2~0#1.base_10| (_ BitVec 64))) (and (= (_ bv0 1) (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_10|)) (= |c_#valid| (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_main_~#ldvarg2~0#1.base_10| (_ bv0 1))))) is different from true [2024-11-14 03:03:54,689 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-14 03:03:54,690 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:03:54,690 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:03:54,690 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [868486511] [2024-11-14 03:03:54,690 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [868486511] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:03:54,690 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:03:54,690 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:03:54,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557521775] [2024-11-14 03:03:54,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:03:54,690 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 03:03:54,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:03:54,691 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 03:03:54,691 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=8, Unknown=1, NotChecked=4, Total=20 [2024-11-14 03:03:54,691 INFO L87 Difference]: Start difference. First operand 1536 states and 2395 transitions. Second operand has 5 states, 4 states have (on average 6.5) internal successors, (26), 5 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:03:56,707 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:03:58,714 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2024-11-14 03:04:02,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:04:02,180 INFO L93 Difference]: Finished difference Result 1755 states and 2719 transitions. [2024-11-14 03:04:02,180 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-14 03:04:02,180 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 6.5) internal successors, (26), 5 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2024-11-14 03:04:02,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:04:02,187 INFO L225 Difference]: With dead ends: 1755 [2024-11-14 03:04:02,188 INFO L226 Difference]: Without dead ends: 1750 [2024-11-14 03:04:02,188 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=7, Invalid=8, Unknown=1, NotChecked=4, Total=20 [2024-11-14 03:04:02,188 INFO L432 NwaCegarLoop]: 457 mSDtfsCounter, 301 mSDsluCounter, 572 mSDsCounter, 0 mSdLazyCounter, 481 mSolverCounterSat, 84 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 316 SdHoareTripleChecker+Valid, 1029 SdHoareTripleChecker+Invalid, 1334 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 84 IncrementalHoareTripleChecker+Valid, 481 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 767 IncrementalHoareTripleChecker+Unchecked, 7.4s IncrementalHoareTripleChecker+Time [2024-11-14 03:04:02,188 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [316 Valid, 1029 Invalid, 1334 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [84 Valid, 481 Invalid, 2 Unknown, 767 Unchecked, 7.4s Time] [2024-11-14 03:04:02,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1750 states. [2024-11-14 03:04:02,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1750 to 1720. [2024-11-14 03:04:02,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1720 states, 1326 states have (on average 1.4705882352941178) internal successors, (1950), 1380 states have internal predecessors, (1950), 277 states have call successors, (277), 48 states have call predecessors, (277), 68 states have return successors, (485), 295 states have call predecessors, (485), 276 states have call successors, (485) [2024-11-14 03:04:02,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1720 states to 1720 states and 2712 transitions. [2024-11-14 03:04:02,244 INFO L78 Accepts]: Start accepts. Automaton has 1720 states and 2712 transitions. Word has length 31 [2024-11-14 03:04:02,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:04:02,245 INFO L471 AbstractCegarLoop]: Abstraction has 1720 states and 2712 transitions. [2024-11-14 03:04:02,245 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 6.5) internal successors, (26), 5 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-14 03:04:02,245 INFO L276 IsEmpty]: Start isEmpty. Operand 1720 states and 2712 transitions. [2024-11-14 03:04:02,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2024-11-14 03:04:02,246 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:04:02,246 INFO L215 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:04:02,255 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (14)] Ended with exit code 0 [2024-11-14 03:04:02,447 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:02,447 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_irq_1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:04:02,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:04:02,448 INFO L85 PathProgramCache]: Analyzing trace with hash 742592553, now seen corresponding path program 1 times [2024-11-14 03:04:02,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:04:02,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [904891987] [2024-11-14 03:04:02,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:04:02,449 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:02,450 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:04:02,452 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:04:02,458 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2024-11-14 03:04:02,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:04:03,012 INFO L255 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-14 03:04:03,013 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:04:03,441 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-14 03:04:03,441 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:04:03,441 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:04:03,441 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [904891987] [2024-11-14 03:04:03,441 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [904891987] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:04:03,441 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:04:03,441 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:04:03,442 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444131695] [2024-11-14 03:04:03,442 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:04:03,442 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 03:04:03,442 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:04:03,442 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 03:04:03,442 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 03:04:03,443 INFO L87 Difference]: Start difference. First operand 1720 states and 2712 transitions. Second operand has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 03:04:03,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:04:03,729 INFO L93 Difference]: Finished difference Result 1732 states and 2706 transitions. [2024-11-14 03:04:03,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 03:04:03,730 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 40 [2024-11-14 03:04:03,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:04:03,737 INFO L225 Difference]: With dead ends: 1732 [2024-11-14 03:04:03,737 INFO L226 Difference]: Without dead ends: 1732 [2024-11-14 03:04:03,738 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-14 03:04:03,738 INFO L432 NwaCegarLoop]: 429 mSDtfsCounter, 415 mSDsluCounter, 845 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 416 SdHoareTripleChecker+Valid, 1274 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-14 03:04:03,738 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [416 Valid, 1274 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-14 03:04:03,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1732 states. [2024-11-14 03:04:03,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1732 to 1730. [2024-11-14 03:04:03,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1730 states, 1334 states have (on average 1.464767616191904) internal successors, (1954), 1388 states have internal predecessors, (1954), 277 states have call successors, (277), 50 states have call predecessors, (277), 70 states have return successors, (473), 295 states have call predecessors, (473), 276 states have call successors, (473) [2024-11-14 03:04:03,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1730 states to 1730 states and 2704 transitions. [2024-11-14 03:04:03,789 INFO L78 Accepts]: Start accepts. Automaton has 1730 states and 2704 transitions. Word has length 40 [2024-11-14 03:04:03,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:04:03,789 INFO L471 AbstractCegarLoop]: Abstraction has 1730 states and 2704 transitions. [2024-11-14 03:04:03,790 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 03:04:03,790 INFO L276 IsEmpty]: Start isEmpty. Operand 1730 states and 2704 transitions. [2024-11-14 03:04:03,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2024-11-14 03:04:03,791 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:04:03,791 INFO L215 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:04:03,800 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2024-11-14 03:04:03,991 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:03,992 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ldv_irq_1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:04:03,992 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:04:03,993 INFO L85 PathProgramCache]: Analyzing trace with hash 916021131, now seen corresponding path program 1 times [2024-11-14 03:04:03,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:04:03,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [276667903] [2024-11-14 03:04:03,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:04:03,994 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:03,994 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:04:03,996 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:04:03,998 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2024-11-14 03:04:04,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:04:04,481 INFO L255 TraceCheckSpWp]: Trace formula consists of 389 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-14 03:04:04,482 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:04:04,821 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-14 03:04:04,821 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:04:04,821 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:04:04,821 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [276667903] [2024-11-14 03:04:04,821 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [276667903] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:04:04,821 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:04:04,821 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:04:04,822 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [549713430] [2024-11-14 03:04:04,822 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:04:04,822 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 03:04:04,822 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:04:04,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 03:04:04,822 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 03:04:04,823 INFO L87 Difference]: Start difference. First operand 1730 states and 2704 transitions. Second operand has 5 states, 5 states have (on average 5.8) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 03:04:05,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:04:05,102 INFO L93 Difference]: Finished difference Result 1742 states and 2698 transitions. [2024-11-14 03:04:05,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 03:04:05,103 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.8) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 39 [2024-11-14 03:04:05,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:04:05,110 INFO L225 Difference]: With dead ends: 1742 [2024-11-14 03:04:05,110 INFO L226 Difference]: Without dead ends: 1742 [2024-11-14 03:04:05,110 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-14 03:04:05,111 INFO L432 NwaCegarLoop]: 428 mSDtfsCounter, 415 mSDsluCounter, 843 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 416 SdHoareTripleChecker+Valid, 1271 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-14 03:04:05,111 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [416 Valid, 1271 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-14 03:04:05,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1742 states. [2024-11-14 03:04:05,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1742 to 1740. [2024-11-14 03:04:05,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1740 states, 1342 states have (on average 1.459016393442623) internal successors, (1958), 1396 states have internal predecessors, (1958), 277 states have call successors, (277), 52 states have call predecessors, (277), 72 states have return successors, (461), 295 states have call predecessors, (461), 276 states have call successors, (461) [2024-11-14 03:04:05,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1740 states to 1740 states and 2696 transitions. [2024-11-14 03:04:05,162 INFO L78 Accepts]: Start accepts. Automaton has 1740 states and 2696 transitions. Word has length 39 [2024-11-14 03:04:05,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:04:05,163 INFO L471 AbstractCegarLoop]: Abstraction has 1740 states and 2696 transitions. [2024-11-14 03:04:05,163 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.8) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 03:04:05,163 INFO L276 IsEmpty]: Start isEmpty. Operand 1740 states and 2696 transitions. [2024-11-14 03:04:05,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2024-11-14 03:04:05,164 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:04:05,164 INFO L215 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:04:05,172 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Ended with exit code 0 [2024-11-14 03:04:05,364 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:05,365 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ldv_irq_1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:04:05,365 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:04:05,365 INFO L85 PathProgramCache]: Analyzing trace with hash 2095033772, now seen corresponding path program 1 times [2024-11-14 03:04:05,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:04:05,366 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [991184254] [2024-11-14 03:04:05,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:04:05,366 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:05,366 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:04:05,369 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:04:05,371 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2024-11-14 03:04:05,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:04:05,960 INFO L255 TraceCheckSpWp]: Trace formula consists of 387 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-14 03:04:05,962 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:04:06,296 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-14 03:04:06,296 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:04:06,296 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:04:06,296 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [991184254] [2024-11-14 03:04:06,296 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [991184254] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:04:06,296 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:04:06,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:04:06,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2031185940] [2024-11-14 03:04:06,297 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:04:06,297 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 03:04:06,297 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:04:06,297 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 03:04:06,298 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 03:04:06,298 INFO L87 Difference]: Start difference. First operand 1740 states and 2696 transitions. Second operand has 5 states, 5 states have (on average 5.6) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 03:04:06,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:04:06,624 INFO L93 Difference]: Finished difference Result 3471 states and 5433 transitions. [2024-11-14 03:04:06,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-14 03:04:06,625 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 38 [2024-11-14 03:04:06,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:04:06,639 INFO L225 Difference]: With dead ends: 3471 [2024-11-14 03:04:06,639 INFO L226 Difference]: Without dead ends: 3471 [2024-11-14 03:04:06,640 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-14 03:04:06,640 INFO L432 NwaCegarLoop]: 454 mSDtfsCounter, 419 mSDsluCounter, 1311 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 420 SdHoareTripleChecker+Valid, 1765 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-14 03:04:06,640 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [420 Valid, 1765 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-14 03:04:06,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3471 states. [2024-11-14 03:04:06,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3471 to 3317. [2024-11-14 03:04:06,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3317 states, 2598 states have (on average 1.4719014626635873) internal successors, (3824), 2683 states have internal predecessors, (3824), 528 states have call successors, (528), 101 states have call predecessors, (528), 142 states have return successors, (956), 540 states have call predecessors, (956), 527 states have call successors, (956) [2024-11-14 03:04:06,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3317 states to 3317 states and 5308 transitions. [2024-11-14 03:04:06,734 INFO L78 Accepts]: Start accepts. Automaton has 3317 states and 5308 transitions. Word has length 38 [2024-11-14 03:04:06,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:04:06,735 INFO L471 AbstractCegarLoop]: Abstraction has 3317 states and 5308 transitions. [2024-11-14 03:04:06,736 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 03:04:06,736 INFO L276 IsEmpty]: Start isEmpty. Operand 3317 states and 5308 transitions. [2024-11-14 03:04:06,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2024-11-14 03:04:06,740 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:04:06,740 INFO L215 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:04:06,752 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (17)] Ended with exit code 0 [2024-11-14 03:04:06,941 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:06,941 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ldv_irq_1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:04:06,942 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:04:06,942 INFO L85 PathProgramCache]: Analyzing trace with hash 1677498856, now seen corresponding path program 1 times [2024-11-14 03:04:06,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:04:06,943 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1790739209] [2024-11-14 03:04:06,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:04:06,944 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:06,944 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:04:06,946 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:04:06,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2024-11-14 03:04:07,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:04:07,533 INFO L255 TraceCheckSpWp]: Trace formula consists of 393 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-14 03:04:07,534 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:04:07,907 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-14 03:04:07,907 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:04:07,907 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:04:07,907 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1790739209] [2024-11-14 03:04:07,907 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1790739209] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:04:07,907 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:04:07,908 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-14 03:04:07,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1315543482] [2024-11-14 03:04:07,908 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:04:07,908 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-14 03:04:07,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:04:07,909 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-14 03:04:07,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-14 03:04:07,909 INFO L87 Difference]: Start difference. First operand 3317 states and 5308 transitions. Second operand has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 03:04:08,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:04:08,213 INFO L93 Difference]: Finished difference Result 3255 states and 5152 transitions. [2024-11-14 03:04:08,214 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-14 03:04:08,214 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 41 [2024-11-14 03:04:08,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:04:08,227 INFO L225 Difference]: With dead ends: 3255 [2024-11-14 03:04:08,228 INFO L226 Difference]: Without dead ends: 3255 [2024-11-14 03:04:08,228 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-14 03:04:08,229 INFO L432 NwaCegarLoop]: 427 mSDtfsCounter, 412 mSDsluCounter, 841 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 413 SdHoareTripleChecker+Valid, 1268 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-14 03:04:08,229 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [413 Valid, 1268 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-14 03:04:08,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3255 states. [2024-11-14 03:04:08,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3255 to 3231. [2024-11-14 03:04:08,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3231 states, 2540 states have (on average 1.462992125984252) internal successors, (3716), 2609 states have internal predecessors, (3716), 502 states have call successors, (502), 101 states have call predecessors, (502), 140 states have return successors, (900), 524 states have call predecessors, (900), 501 states have call successors, (900) [2024-11-14 03:04:08,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3231 states to 3231 states and 5118 transitions. [2024-11-14 03:04:08,342 INFO L78 Accepts]: Start accepts. Automaton has 3231 states and 5118 transitions. Word has length 41 [2024-11-14 03:04:08,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:04:08,342 INFO L471 AbstractCegarLoop]: Abstraction has 3231 states and 5118 transitions. [2024-11-14 03:04:08,342 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-14 03:04:08,343 INFO L276 IsEmpty]: Start isEmpty. Operand 3231 states and 5118 transitions. [2024-11-14 03:04:08,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2024-11-14 03:04:08,344 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:04:08,345 INFO L215 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:04:08,354 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (18)] Ended with exit code 0 [2024-11-14 03:04:08,545 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:08,546 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting device_may_wakeupErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:04:08,546 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:04:08,546 INFO L85 PathProgramCache]: Analyzing trace with hash 2112475207, now seen corresponding path program 1 times [2024-11-14 03:04:08,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:04:08,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1833987374] [2024-11-14 03:04:08,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:04:08,548 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:08,548 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:04:08,550 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:04:08,553 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2024-11-14 03:04:09,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-14 03:04:09,190 INFO L255 TraceCheckSpWp]: Trace formula consists of 399 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-14 03:04:09,192 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-14 03:04:09,276 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-14 03:04:09,276 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-14 03:04:09,276 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2024-11-14 03:04:09,276 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1833987374] [2024-11-14 03:04:09,276 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1833987374] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-14 03:04:09,276 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-14 03:04:09,276 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-14 03:04:09,277 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1500566908] [2024-11-14 03:04:09,277 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-14 03:04:09,278 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-14 03:04:09,278 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2024-11-14 03:04:09,278 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-14 03:04:09,278 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-14 03:04:09,278 INFO L87 Difference]: Start difference. First operand 3231 states and 5118 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 03:04:09,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-14 03:04:09,486 INFO L93 Difference]: Finished difference Result 4266 states and 6609 transitions. [2024-11-14 03:04:09,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-14 03:04:09,486 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 47 [2024-11-14 03:04:09,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-14 03:04:09,518 INFO L225 Difference]: With dead ends: 4266 [2024-11-14 03:04:09,518 INFO L226 Difference]: Without dead ends: 4266 [2024-11-14 03:04:09,518 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-14 03:04:09,519 INFO L432 NwaCegarLoop]: 433 mSDtfsCounter, 177 mSDsluCounter, 391 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 177 SdHoareTripleChecker+Valid, 824 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-14 03:04:09,519 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [177 Valid, 824 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-14 03:04:09,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4266 states. [2024-11-14 03:04:09,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4266 to 4245. [2024-11-14 03:04:09,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4245 states, 3423 states have (on average 1.457785568215016) internal successors, (4990), 3511 states have internal predecessors, (4990), 595 states have call successors, (595), 130 states have call predecessors, (595), 178 states have return successors, (1015), 611 states have call predecessors, (1015), 594 states have call successors, (1015) [2024-11-14 03:04:09,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4245 states to 4245 states and 6600 transitions. [2024-11-14 03:04:09,645 INFO L78 Accepts]: Start accepts. Automaton has 4245 states and 6600 transitions. Word has length 47 [2024-11-14 03:04:09,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-14 03:04:09,646 INFO L471 AbstractCegarLoop]: Abstraction has 4245 states and 6600 transitions. [2024-11-14 03:04:09,646 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-14 03:04:09,646 INFO L276 IsEmpty]: Start isEmpty. Operand 4245 states and 6600 transitions. [2024-11-14 03:04:09,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2024-11-14 03:04:09,647 INFO L207 NwaCegarLoop]: Found error trace [2024-11-14 03:04:09,647 INFO L215 NwaCegarLoop]: trace histogram [4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:04:09,656 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Ended with exit code 0 [2024-11-14 03:04:09,848 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:09,848 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK === [kfreeErr0ASSERT_VIOLATIONMEMORY_FREE, kfreeErr1ASSERT_VIOLATIONMEMORY_FREE, kfreeErr2ASSERT_VIOLATIONMEMORY_FREE, tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 107 more)] === [2024-11-14 03:04:09,849 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-14 03:04:09,849 INFO L85 PathProgramCache]: Analyzing trace with hash -579803233, now seen corresponding path program 1 times [2024-11-14 03:04:09,849 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2024-11-14 03:04:09,849 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1024292800] [2024-11-14 03:04:09,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-14 03:04:09,850 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:09,850 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat [2024-11-14 03:04:09,852 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-14 03:04:09,855 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (20)] Waiting until timeout for monitored process [2024-11-14 03:04:10,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 03:04:10,932 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-14 03:04:11,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-14 03:04:11,677 INFO L130 FreeRefinementEngine]: Strategy WALRUS found a feasible trace [2024-11-14 03:04:11,677 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-14 03:04:11,678 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_LEAK (110 of 111 remaining) [2024-11-14 03:04:11,680 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location kfreeErr0ASSERT_VIOLATIONMEMORY_FREE (109 of 111 remaining) [2024-11-14 03:04:11,681 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location kfreeErr1ASSERT_VIOLATIONMEMORY_FREE (108 of 111 remaining) [2024-11-14 03:04:11,681 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location kfreeErr2ASSERT_VIOLATIONMEMORY_FREE (107 of 111 remaining) [2024-11-14 03:04:11,681 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (106 of 111 remaining) [2024-11-14 03:04:11,681 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (105 of 111 remaining) [2024-11-14 03:04:11,681 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (104 of 111 remaining) [2024-11-14 03:04:11,681 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (103 of 111 remaining) [2024-11-14 03:04:11,681 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (102 of 111 remaining) [2024-11-14 03:04:11,682 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (101 of 111 remaining) [2024-11-14 03:04:11,682 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (100 of 111 remaining) [2024-11-14 03:04:11,682 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (99 of 111 remaining) [2024-11-14 03:04:11,682 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr8REQUIRES_VIOLATIONMEMORY_DEREFERENCE (98 of 111 remaining) [2024-11-14 03:04:11,682 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr9REQUIRES_VIOLATIONMEMORY_DEREFERENCE (97 of 111 remaining) [2024-11-14 03:04:11,682 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE (96 of 111 remaining) [2024-11-14 03:04:11,682 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_alarmErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE (95 of 111 remaining) [2024-11-14 03:04:11,682 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (94 of 111 remaining) [2024-11-14 03:04:11,682 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (93 of 111 remaining) [2024-11-14 03:04:11,683 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (92 of 111 remaining) [2024-11-14 03:04:11,683 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (91 of 111 remaining) [2024-11-14 03:04:11,683 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (90 of 111 remaining) [2024-11-14 03:04:11,683 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (89 of 111 remaining) [2024-11-14 03:04:11,683 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (88 of 111 remaining) [2024-11-14 03:04:11,683 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_read_timeErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (87 of 111 remaining) [2024-11-14 03:04:11,683 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_errorErr0ASSERT_VIOLATIONMEMORY_LEAK (86 of 111 remaining) [2024-11-14 03:04:11,683 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (85 of 111 remaining) [2024-11-14 03:04:11,683 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (84 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (83 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (82 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (81 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_irq_1Err5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (80 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (79 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (78 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (77 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (76 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (75 of 111 remaining) [2024-11-14 03:04:11,684 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (74 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (73 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_procErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (72 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_wait_while_busyErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (71 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_wait_while_busyErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (70 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_wait_while_busyErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (69 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_wait_while_busyErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (68 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (67 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (66 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (65 of 111 remaining) [2024-11-14 03:04:11,685 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (64 of 111 remaining) [2024-11-14 03:04:11,686 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (63 of 111 remaining) [2024-11-14 03:04:11,686 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (62 of 111 remaining) [2024-11-14 03:04:11,686 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (61 of 111 remaining) [2024-11-14 03:04:11,686 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_alarm_irq_enableErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (60 of 111 remaining) [2024-11-14 03:04:11,686 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location outer_syncErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (59 of 111 remaining) [2024-11-14 03:04:11,686 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location outer_syncErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (58 of 111 remaining) [2024-11-14 03:04:11,686 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location outer_syncErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (57 of 111 remaining) [2024-11-14 03:04:11,686 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location outer_syncErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (56 of 111 remaining) [2024-11-14 03:04:11,686 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (55 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (54 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (53 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (52 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (51 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (50 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (49 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_removeErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (48 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location device_may_wakeupErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (47 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location device_may_wakeupErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (46 of 111 remaining) [2024-11-14 03:04:11,687 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location device_may_wakeupErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (45 of 111 remaining) [2024-11-14 03:04:11,688 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location device_may_wakeupErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (44 of 111 remaining) [2024-11-14 03:04:11,688 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location resource_sizeErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (43 of 111 remaining) [2024-11-14 03:04:11,688 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location resource_sizeErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (42 of 111 remaining) [2024-11-14 03:04:11,688 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location resource_sizeErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (41 of 111 remaining) [2024-11-14 03:04:11,688 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location resource_sizeErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (40 of 111 remaining) [2024-11-14 03:04:11,688 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (39 of 111 remaining) [2024-11-14 03:04:11,688 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (38 of 111 remaining) [2024-11-14 03:04:11,688 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (37 of 111 remaining) [2024-11-14 03:04:11,689 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (36 of 111 remaining) [2024-11-14 03:04:11,689 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (35 of 111 remaining) [2024-11-14 03:04:11,689 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location tegra_rtc_set_timeErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (34 of 111 remaining) [2024-11-14 03:04:11,689 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE (33 of 111 remaining) [2024-11-14 03:04:11,689 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE (32 of 111 remaining) [2024-11-14 03:04:11,689 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (31 of 111 remaining) [2024-11-14 03:04:11,689 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (30 of 111 remaining) [2024-11-14 03:04:11,689 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (29 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (28 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (27 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (26 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8REQUIRES_VIOLATIONMEMORY_DEREFERENCE (25 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9REQUIRES_VIOLATIONMEMORY_DEREFERENCE (24 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE (23 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE (22 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12REQUIRES_VIOLATIONMEMORY_DEREFERENCE (21 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13REQUIRES_VIOLATIONMEMORY_DEREFERENCE (20 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE (19 of 111 remaining) [2024-11-14 03:04:11,690 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE (18 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16REQUIRES_VIOLATIONMEMORY_DEREFERENCE (17 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17REQUIRES_VIOLATIONMEMORY_DEREFERENCE (16 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18REQUIRES_VIOLATIONMEMORY_DEREFERENCE (15 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE (14 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE (13 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE (12 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr22REQUIRES_VIOLATIONMEMORY_DEREFERENCE (11 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE (10 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE (9 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr25REQUIRES_VIOLATIONMEMORY_DEREFERENCE (8 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr26REQUIRES_VIOLATIONMEMORY_DEREFERENCE (7 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr27REQUIRES_VIOLATIONMEMORY_DEREFERENCE (6 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr28REQUIRES_VIOLATIONMEMORY_DEREFERENCE (5 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr29REQUIRES_VIOLATIONMEMORY_DEREFERENCE (4 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr30REQUIRES_VIOLATIONMEMORY_DEREFERENCE (3 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr31REQUIRES_VIOLATIONMEMORY_DEREFERENCE (2 of 111 remaining) [2024-11-14 03:04:11,691 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr32REQUIRES_VIOLATIONMEMORY_DEREFERENCE (1 of 111 remaining) [2024-11-14 03:04:11,692 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr33REQUIRES_VIOLATIONMEMORY_DEREFERENCE (0 of 111 remaining) [2024-11-14 03:04:11,707 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (20)] Forceful destruction successful, exit code 0 [2024-11-14 03:04:11,892 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-14 03:04:11,894 INFO L407 BasicCegarLoop]: Path program histogram: [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-14 03:04:11,963 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-14 03:04:11,977 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.11 03:04:11 BoogieIcfgContainer [2024-11-14 03:04:11,978 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-14 03:04:11,978 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-14 03:04:11,978 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-14 03:04:11,978 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-14 03:04:11,979 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:02:36" (3/4) ... [2024-11-14 03:04:11,982 INFO L145 WitnessPrinter]: No result that supports witness generation found [2024-11-14 03:04:11,983 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-14 03:04:11,984 INFO L158 Benchmark]: Toolchain (without parser) took 102143.48ms. Allocated memory was 117.4MB in the beginning and 243.3MB in the end (delta: 125.8MB). Free memory was 91.3MB in the beginning and 163.6MB in the end (delta: -72.3MB). Peak memory consumption was 57.7MB. Max. memory is 16.1GB. [2024-11-14 03:04:11,985 INFO L158 Benchmark]: CDTParser took 0.43ms. Allocated memory is still 83.9MB. Free memory is still 51.9MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 03:04:11,985 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1321.19ms. Allocated memory is still 117.4MB. Free memory was 91.1MB in the beginning and 40.2MB in the end (delta: 50.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-11-14 03:04:11,986 INFO L158 Benchmark]: Boogie Procedure Inliner took 146.82ms. Allocated memory is still 117.4MB. Free memory was 40.2MB in the beginning and 85.7MB in the end (delta: -45.5MB). Peak memory consumption was 15.9MB. Max. memory is 16.1GB. [2024-11-14 03:04:11,986 INFO L158 Benchmark]: Boogie Preprocessor took 70.86ms. Allocated memory is still 117.4MB. Free memory was 85.7MB in the beginning and 79.5MB in the end (delta: 6.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-14 03:04:11,987 INFO L158 Benchmark]: RCFGBuilder took 4961.80ms. Allocated memory is still 117.4MB. Free memory was 79.5MB in the beginning and 35.4MB in the end (delta: 44.1MB). Peak memory consumption was 56.2MB. Max. memory is 16.1GB. [2024-11-14 03:04:11,987 INFO L158 Benchmark]: TraceAbstraction took 95629.90ms. Allocated memory was 117.4MB in the beginning and 243.3MB in the end (delta: 125.8MB). Free memory was 34.7MB in the beginning and 163.6MB in the end (delta: -128.9MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 03:04:11,988 INFO L158 Benchmark]: Witness Printer took 5.35ms. Allocated memory is still 243.3MB. Free memory was 163.6MB in the beginning and 163.6MB in the end (delta: 19.5kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-14 03:04:11,989 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.43ms. Allocated memory is still 83.9MB. Free memory is still 51.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 1321.19ms. Allocated memory is still 117.4MB. Free memory was 91.1MB in the beginning and 40.2MB in the end (delta: 50.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 146.82ms. Allocated memory is still 117.4MB. Free memory was 40.2MB in the beginning and 85.7MB in the end (delta: -45.5MB). Peak memory consumption was 15.9MB. Max. memory is 16.1GB. * Boogie Preprocessor took 70.86ms. Allocated memory is still 117.4MB. Free memory was 85.7MB in the beginning and 79.5MB in the end (delta: 6.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 4961.80ms. Allocated memory is still 117.4MB. Free memory was 79.5MB in the beginning and 35.4MB in the end (delta: 44.1MB). Peak memory consumption was 56.2MB. Max. memory is 16.1GB. * TraceAbstraction took 95629.90ms. Allocated memory was 117.4MB in the beginning and 243.3MB in the end (delta: 125.8MB). Free memory was 34.7MB in the beginning and 163.6MB in the end (delta: -128.9MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 5.35ms. Allocated memory is still 243.3MB. Free memory was 163.6MB in the beginning and 163.6MB in the end (delta: 19.5kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 2396]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of large string literal at line 2227, overapproximation of memtrack at line 2396. Possible FailurePath: [L1695] int ldv_irq_1_2 = 0; [L1696] int LDV_IN_INTERRUPT = 1; [L1697] int ldv_irq_1_3 = 0; [L1698] struct platform_device *tegra_rtc_driver_group0 ; [L1699] void *ldv_irq_data_1_1 ; [L1700] int ldv_irq_1_1 = 0; [L1701] int ldv_irq_1_0 = 0; [L1702] int ldv_irq_line_1_3 ; [L1703] void *ldv_irq_data_1_0 ; [L1704] int ldv_state_variable_0 ; [L1705] struct device *tegra_rtc_ops_group1 ; [L1706] int ldv_state_variable_3 ; [L1707] int ldv_irq_line_1_0 ; [L1708] int ldv_state_variable_2 ; [L1709] void *ldv_irq_data_1_3 ; [L1710] int ref_cnt ; [L1711] int ldv_irq_line_1_1 ; [L1712] struct rtc_time *tegra_rtc_ops_group0 ; [L1713] void *ldv_irq_data_1_2 ; [L1714] int ldv_state_variable_1 ; [L1715] int ldv_irq_line_1_2 ; [L1716] struct rtc_wkalrm *tegra_rtc_ops_group2 ; [L2058-L2060] static struct rtc_class_ops tegra_rtc_ops = {0, 0, 0, & tegra_rtc_read_time, & tegra_rtc_set_time, & tegra_rtc_read_alarm, & tegra_rtc_set_alarm, & tegra_rtc_proc, 0, 0, & tegra_rtc_alarm_irq_enable}; [L2226-L2227] static struct platform_driver tegra_rtc_driver = {0, & tegra_rtc_remove, & tegra_rtc_shutdown, & tegra_rtc_suspend, & tegra_rtc_resume, {"tegra_rtc", 0, & __this_module, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0}; [L2243] int ldv_retval_2 ; [L2244] int ldv_retval_0 ; [L2246] int ldv_retval_1 ; [L2769] int ldv_init = 0; VAL [LDV_IN_INTERRUPT=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2398] struct seq_file *ldvarg1 ; [L2399] void *tmp ; [L2400] unsigned int ldvarg0 ; [L2401] unsigned int tmp___0 ; [L2402] pm_message_t ldvarg2 ; [L2403] int tmp___1 ; [L2404] int tmp___2 ; [L2405] int tmp___3 ; [L2406] int tmp___4 ; VAL [LDV_IN_INTERRUPT=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg2={28:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2408] CALL, EXPR ldv_zalloc(136U) VAL [LDV_IN_INTERRUPT=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1636] void *p ; [L1637] void *tmp ; [L1638] int tmp___0 ; [L1640] tmp___0 = __VERIFIER_nondet_int() [L1641] COND FALSE !(tmp___0 != 0) [L1644] EXPR, FCALL calloc(1U, size) [L1644] tmp = calloc(1U, size) [L1645] p = tmp VAL [LDV_IN_INTERRUPT=1, \old(size)=136, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, p={23:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1646] CALL assume_abort_if_not((unsigned long )p != (unsigned long )((void *)0)) VAL [LDV_IN_INTERRUPT=1, \old(cond)=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1613] COND FALSE !(!cond) VAL [LDV_IN_INTERRUPT=1, \old(cond)=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1646] RET assume_abort_if_not((unsigned long )p != (unsigned long )((void *)0)) VAL [LDV_IN_INTERRUPT=1, \old(size)=136, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, p={23:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1647] CALL, EXPR ldv_is_err(p) VAL [LDV_IN_INTERRUPT=1, \old(ptr)={23:0}, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2736] return ((unsigned long )ptr > 2012UL); VAL [LDV_IN_INTERRUPT=1, \old(ptr)={23:0}, \result=0, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1647] RET, EXPR ldv_is_err(p) VAL [LDV_IN_INTERRUPT=1, \old(size)=136, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, p={23:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1647] CALL assume_abort_if_not(ldv_is_err(p) == 0) VAL [LDV_IN_INTERRUPT=1, \old(cond)=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1613] COND FALSE !(!cond) VAL [LDV_IN_INTERRUPT=1, \old(cond)=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1647] RET assume_abort_if_not(ldv_is_err(p) == 0) VAL [LDV_IN_INTERRUPT=1, \old(size)=136, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, p={23:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1648] return (p); VAL [LDV_IN_INTERRUPT=1, \old(size)=136, \result={23:0}, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2408] RET, EXPR ldv_zalloc(136U) VAL [LDV_IN_INTERRUPT=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg2={28:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2408] tmp = ldv_zalloc(136U) [L2409] ldvarg1 = (struct seq_file *)tmp [L2410] tmp___0 = __VERIFIER_nondet_uint() [L2411] ldvarg0 = tmp___0 [L2412] FCALL ldv_initialize() [L2413] FCALL memset((void *)(& ldvarg2), 0, 4U) [L2414] ldv_state_variable_1 = 1 [L2415] ref_cnt = 0 [L2416] ldv_state_variable_0 = 1 [L2417] ldv_state_variable_3 = 0 [L2418] ldv_state_variable_2 = 0 VAL [LDV_IN_INTERRUPT=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=5, ldvarg1={23:0}, ldvarg2={28:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2420] tmp___1 = __VERIFIER_nondet_int() [L2422] case 0: [L2428] case 1: [L2430] tmp___2 = __VERIFIER_nondet_int() [L2432] case 0: VAL [LDV_IN_INTERRUPT=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=5, ldvarg1={23:0}, ldvarg2={28:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___1=1, tmp___2=1] [L2428] case 1: [L2440] case 1: VAL [LDV_IN_INTERRUPT=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=5, ldvarg1={23:0}, ldvarg2={28:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___1=1] [L2428] case 1: [L2442] CALL, EXPR tegra_rtc_init() [L2230] int tmp ; [L2232] CALL, EXPR platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2848] return __VERIFIER_nondet_int(); [L2232] RET, EXPR platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2232] tmp = platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2233] return (tmp); VAL [LDV_IN_INTERRUPT=1, \result=-2147483648, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2442] RET, EXPR tegra_rtc_init() [L2442] ldv_retval_0 = tegra_rtc_init() [L2428] case 1: [L2450] ldv_state_variable_0 = 2 VAL [LDV_IN_INTERRUPT=1, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=-2147483648, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=5, ldvarg1={23:0}, ldvarg2={28:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___1=1] [L2635] FCALL ldv_check_final_state() [L2636] return 0; [L2636] return 0; VAL [LDV_IN_INTERRUPT=1, \result=0, __this_module={0:0}, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=-2147483648, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=5, ldvarg1={23:0}, ref_cnt=0, tegra_rtc_driver={15:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={14:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___1=1] - UnprovableResult [Line: 2896]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 2896]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 2896]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: 12]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 33 procedures, 575 locations, 111 error locations. Started 1 CEGAR loops. OverallTime: 95.5s, OverallIterations: 15, TraceHistogramMax: 4, PathProgramHistogramMax: 2, EmptinessCheckTime: 0.0s, AutomataDifference: 71.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 16 mSolverCounterUnknown, 5645 SdHoareTripleChecker+Valid, 69.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 5535 mSDsluCounter, 19007 SdHoareTripleChecker+Invalid, 67.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 3482 IncrementalHoareTripleChecker+Unchecked, 12074 mSDsCounter, 747 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 5232 IncrementalHoareTripleChecker+Invalid, 9477 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 747 mSolverCounterUnsat, 6933 mSDtfsCounter, 5232 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 660 GetRequests, 588 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 3.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=4245occurred in iteration=14, InterpolantAutomatonStates: 75, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.0s AutomataMinimizationTime, 14 MinimizatonAttempts, 1124 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.8s SsaConstructionTime, 4.3s SatisfiabilityAnalysisTime, 7.1s InterpolantComputationTime, 573 NumberOfCodeBlocks, 569 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 641 ConstructedInterpolants, 15 QuantifiedInterpolants, 1718 SizeOfPredicates, 16 NumberOfNonLiveVariables, 5944 ConjunctsInSsa, 91 ConjunctsInUnsatCore, 23 InterpolantComputations, 13 PerfectInterpolantSequences, 70/80 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-14 03:04:12,057 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a1608850-4932-4ec1-9103-763cf483098b/bin/utaipan-verify-sOmjnqqW8E/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample