/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/product-lines/elevator_spec1_product18.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 18:17:17,469 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 18:17:17,475 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 18:17:17,541 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 18:17:17,542 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 18:17:17,546 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 18:17:17,551 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 18:17:17,556 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 18:17:17,560 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 18:17:17,566 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 18:17:17,570 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 18:17:17,571 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 18:17:17,572 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 18:17:17,576 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 18:17:17,578 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 18:17:17,580 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 18:17:17,581 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 18:17:17,584 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 18:17:17,609 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 18:17:17,612 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 18:17:17,622 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 18:17:17,624 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 18:17:17,625 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 18:17:17,628 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 18:17:17,644 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 18:17:17,645 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 18:17:17,645 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 18:17:17,647 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 18:17:17,648 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 18:17:17,649 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 18:17:17,649 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 18:17:17,650 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 18:17:17,652 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 18:17:17,653 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 18:17:17,654 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 18:17:17,655 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 18:17:17,656 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 18:17:17,663 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 18:17:17,664 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 18:17:17,665 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 18:17:17,666 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 18:17:17,672 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 18:17:17,720 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 18:17:17,720 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 18:17:17,724 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 18:17:17,724 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 18:17:17,725 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 18:17:17,725 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 18:17:17,725 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 18:17:17,726 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 18:17:17,726 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 18:17:17,726 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 18:17:17,727 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 18:17:17,728 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 18:17:17,728 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 18:17:17,728 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 18:17:17,729 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 18:17:17,729 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 18:17:17,729 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 18:17:17,729 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:17:17,730 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 18:17:17,730 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 18:17:17,730 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 18:17:17,730 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 18:17:17,731 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 18:17:17,731 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 18:17:17,731 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 18:17:17,732 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 18:17:18,088 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 18:17:18,118 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 18:17:18,121 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 18:17:18,123 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 18:17:18,123 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 18:17:18,124 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/product-lines/elevator_spec1_product18.cil.c [2021-01-06 18:17:18,219 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/b974c2afa/87c3994194a64ca397ed5d84d3df0761/FLAG3325ff598 [2021-01-06 18:17:19,165 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 18:17:19,168 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product18.cil.c [2021-01-06 18:17:19,211 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/b974c2afa/87c3994194a64ca397ed5d84d3df0761/FLAG3325ff598 [2021-01-06 18:17:19,248 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/b974c2afa/87c3994194a64ca397ed5d84d3df0761 [2021-01-06 18:17:19,251 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 18:17:19,254 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 18:17:19,258 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 18:17:19,258 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 18:17:19,262 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 18:17:19,264 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:17:19" (1/1) ... [2021-01-06 18:17:19,266 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@37879061 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:19, skipping insertion in model container [2021-01-06 18:17:19,267 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:17:19" (1/1) ... [2021-01-06 18:17:19,280 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 18:17:19,385 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-01-06 18:17:19,588 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product18.cil.c[1221,1234] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp2~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] [2021-01-06 18:17:20,132 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:17:20,151 INFO L203 MainTranslator]: Completed pre-run [2021-01-06 18:17:20,170 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product18.cil.c[1221,1234] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp2~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] [2021-01-06 18:17:20,374 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:17:20,441 INFO L208 MainTranslator]: Completed translation [2021-01-06 18:17:20,441 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20 WrapperNode [2021-01-06 18:17:20,442 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 18:17:20,443 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 18:17:20,443 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 18:17:20,443 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 18:17:20,453 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... [2021-01-06 18:17:20,487 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... [2021-01-06 18:17:20,781 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 18:17:20,782 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 18:17:20,782 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 18:17:20,782 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 18:17:20,792 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... [2021-01-06 18:17:20,792 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... [2021-01-06 18:17:20,820 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... [2021-01-06 18:17:20,821 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... [2021-01-06 18:17:20,999 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... [2021-01-06 18:17:21,106 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... [2021-01-06 18:17:21,210 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... [2021-01-06 18:17:21,250 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 18:17:21,251 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 18:17:21,251 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 18:17:21,251 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 18:17:21,252 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:17:21,362 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 18:17:21,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 18:17:21,363 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 18:17:21,364 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 18:17:30,732 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 18:17:30,733 INFO L299 CfgBuilder]: Removed 993 assume(true) statements. [2021-01-06 18:17:30,739 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:17:30 BoogieIcfgContainer [2021-01-06 18:17:30,739 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 18:17:30,741 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 18:17:30,742 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 18:17:30,745 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 18:17:30,746 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 06:17:19" (1/3) ... [2021-01-06 18:17:30,747 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@56b938d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:17:30, skipping insertion in model container [2021-01-06 18:17:30,747 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:20" (2/3) ... [2021-01-06 18:17:30,747 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@56b938d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:17:30, skipping insertion in model container [2021-01-06 18:17:30,747 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:17:30" (3/3) ... [2021-01-06 18:17:30,749 INFO L111 eAbstractionObserver]: Analyzing ICFG elevator_spec1_product18.cil.c [2021-01-06 18:17:30,756 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 18:17:30,763 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2021-01-06 18:17:30,782 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-06 18:17:30,830 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 18:17:30,830 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 18:17:30,831 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 18:17:30,831 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 18:17:30,831 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 18:17:30,831 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 18:17:30,831 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 18:17:30,831 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 18:17:30,908 INFO L276 IsEmpty]: Start isEmpty. Operand 4583 states. [2021-01-06 18:17:30,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-01-06 18:17:30,920 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:30,921 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:30,922 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:30,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:30,928 INFO L82 PathProgramCache]: Analyzing trace with hash -2055578945, now seen corresponding path program 1 times [2021-01-06 18:17:30,938 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:30,939 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1705628586] [2021-01-06 18:17:30,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:31,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:31,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:31,333 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1705628586] [2021-01-06 18:17:31,334 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:31,334 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:17:31,335 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [422576661] [2021-01-06 18:17:31,341 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:17:31,341 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:31,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:17:31,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:17:31,360 INFO L87 Difference]: Start difference. First operand 4583 states. Second operand 3 states. [2021-01-06 18:17:31,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:31,876 INFO L93 Difference]: Finished difference Result 13669 states and 25907 transitions. [2021-01-06 18:17:31,877 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:17:31,878 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2021-01-06 18:17:31,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:31,987 INFO L225 Difference]: With dead ends: 13669 [2021-01-06 18:17:31,987 INFO L226 Difference]: Without dead ends: 9091 [2021-01-06 18:17:32,008 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:17:32,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9091 states. [2021-01-06 18:17:32,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9091 to 4579. [2021-01-06 18:17:32,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4579 states. [2021-01-06 18:17:32,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4579 states to 4579 states and 8666 transitions. [2021-01-06 18:17:32,288 INFO L78 Accepts]: Start accepts. Automaton has 4579 states and 8666 transitions. Word has length 36 [2021-01-06 18:17:32,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:32,289 INFO L481 AbstractCegarLoop]: Abstraction has 4579 states and 8666 transitions. [2021-01-06 18:17:32,289 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:17:32,289 INFO L276 IsEmpty]: Start isEmpty. Operand 4579 states and 8666 transitions. [2021-01-06 18:17:32,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2021-01-06 18:17:32,299 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:32,300 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:32,301 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 18:17:32,301 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:32,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:32,303 INFO L82 PathProgramCache]: Analyzing trace with hash 1563964408, now seen corresponding path program 1 times [2021-01-06 18:17:32,303 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:32,303 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1435811789] [2021-01-06 18:17:32,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:32,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:32,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:32,529 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1435811789] [2021-01-06 18:17:32,530 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:32,530 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:17:32,530 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613903552] [2021-01-06 18:17:32,532 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:17:32,532 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:32,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:17:32,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:17:32,533 INFO L87 Difference]: Start difference. First operand 4579 states and 8666 transitions. Second operand 6 states. [2021-01-06 18:17:33,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:33,671 INFO L93 Difference]: Finished difference Result 18091 states and 34261 transitions. [2021-01-06 18:17:33,672 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:17:33,672 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2021-01-06 18:17:33,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:33,784 INFO L225 Difference]: With dead ends: 18091 [2021-01-06 18:17:33,785 INFO L226 Difference]: Without dead ends: 13555 [2021-01-06 18:17:33,798 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2021-01-06 18:17:33,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13555 states. [2021-01-06 18:17:34,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13555 to 4575. [2021-01-06 18:17:34,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4575 states. [2021-01-06 18:17:34,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4575 states to 4575 states and 8655 transitions. [2021-01-06 18:17:34,059 INFO L78 Accepts]: Start accepts. Automaton has 4575 states and 8655 transitions. Word has length 43 [2021-01-06 18:17:34,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:34,060 INFO L481 AbstractCegarLoop]: Abstraction has 4575 states and 8655 transitions. [2021-01-06 18:17:34,060 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:17:34,060 INFO L276 IsEmpty]: Start isEmpty. Operand 4575 states and 8655 transitions. [2021-01-06 18:17:34,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2021-01-06 18:17:34,065 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:34,065 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:34,065 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 18:17:34,066 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:34,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:34,068 INFO L82 PathProgramCache]: Analyzing trace with hash -1092574075, now seen corresponding path program 1 times [2021-01-06 18:17:34,068 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:34,069 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223767274] [2021-01-06 18:17:34,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:34,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:34,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:34,228 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223767274] [2021-01-06 18:17:34,229 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:34,229 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:34,229 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054036558] [2021-01-06 18:17:34,230 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:34,230 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:34,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:34,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:34,231 INFO L87 Difference]: Start difference. First operand 4575 states and 8655 transitions. Second operand 4 states. [2021-01-06 18:17:35,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:35,062 INFO L93 Difference]: Finished difference Result 13613 states and 25774 transitions. [2021-01-06 18:17:35,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:35,062 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 45 [2021-01-06 18:17:35,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:35,090 INFO L225 Difference]: With dead ends: 13613 [2021-01-06 18:17:35,091 INFO L226 Difference]: Without dead ends: 9081 [2021-01-06 18:17:35,099 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:35,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9081 states. [2021-01-06 18:17:35,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9081 to 4575. [2021-01-06 18:17:35,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4575 states. [2021-01-06 18:17:35,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4575 states to 4575 states and 8646 transitions. [2021-01-06 18:17:35,325 INFO L78 Accepts]: Start accepts. Automaton has 4575 states and 8646 transitions. Word has length 45 [2021-01-06 18:17:35,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:35,325 INFO L481 AbstractCegarLoop]: Abstraction has 4575 states and 8646 transitions. [2021-01-06 18:17:35,325 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:35,325 INFO L276 IsEmpty]: Start isEmpty. Operand 4575 states and 8646 transitions. [2021-01-06 18:17:35,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2021-01-06 18:17:35,327 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:35,327 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:35,328 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 18:17:35,328 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:35,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:35,328 INFO L82 PathProgramCache]: Analyzing trace with hash 808246098, now seen corresponding path program 1 times [2021-01-06 18:17:35,329 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:35,329 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171138141] [2021-01-06 18:17:35,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:35,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:35,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:35,400 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171138141] [2021-01-06 18:17:35,400 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:35,400 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:35,400 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111438933] [2021-01-06 18:17:35,401 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:35,401 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:35,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:35,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:35,402 INFO L87 Difference]: Start difference. First operand 4575 states and 8646 transitions. Second operand 4 states. [2021-01-06 18:17:36,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:36,116 INFO L93 Difference]: Finished difference Result 13613 states and 25756 transitions. [2021-01-06 18:17:36,117 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:36,117 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2021-01-06 18:17:36,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:36,148 INFO L225 Difference]: With dead ends: 13613 [2021-01-06 18:17:36,149 INFO L226 Difference]: Without dead ends: 9081 [2021-01-06 18:17:36,160 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:36,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9081 states. [2021-01-06 18:17:36,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9081 to 4575. [2021-01-06 18:17:36,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4575 states. [2021-01-06 18:17:36,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4575 states to 4575 states and 8637 transitions. [2021-01-06 18:17:36,411 INFO L78 Accepts]: Start accepts. Automaton has 4575 states and 8637 transitions. Word has length 47 [2021-01-06 18:17:36,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:36,412 INFO L481 AbstractCegarLoop]: Abstraction has 4575 states and 8637 transitions. [2021-01-06 18:17:36,412 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:36,412 INFO L276 IsEmpty]: Start isEmpty. Operand 4575 states and 8637 transitions. [2021-01-06 18:17:36,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-01-06 18:17:36,413 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:36,414 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:36,414 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 18:17:36,414 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:36,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:36,415 INFO L82 PathProgramCache]: Analyzing trace with hash -2141840251, now seen corresponding path program 1 times [2021-01-06 18:17:36,415 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:36,415 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158996673] [2021-01-06 18:17:36,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:36,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:36,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:36,488 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158996673] [2021-01-06 18:17:36,488 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:36,488 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:36,488 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242354425] [2021-01-06 18:17:36,489 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:36,489 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:36,490 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:36,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:36,490 INFO L87 Difference]: Start difference. First operand 4575 states and 8637 transitions. Second operand 4 states. [2021-01-06 18:17:37,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:37,739 INFO L93 Difference]: Finished difference Result 22565 states and 42692 transitions. [2021-01-06 18:17:37,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:37,740 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2021-01-06 18:17:37,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:37,804 INFO L225 Difference]: With dead ends: 22565 [2021-01-06 18:17:37,805 INFO L226 Difference]: Without dead ends: 18033 [2021-01-06 18:17:37,822 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:37,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18033 states. [2021-01-06 18:17:38,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18033 to 4575. [2021-01-06 18:17:38,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4575 states. [2021-01-06 18:17:38,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4575 states to 4575 states and 8633 transitions. [2021-01-06 18:17:38,203 INFO L78 Accepts]: Start accepts. Automaton has 4575 states and 8633 transitions. Word has length 49 [2021-01-06 18:17:38,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:38,203 INFO L481 AbstractCegarLoop]: Abstraction has 4575 states and 8633 transitions. [2021-01-06 18:17:38,203 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:38,204 INFO L276 IsEmpty]: Start isEmpty. Operand 4575 states and 8633 transitions. [2021-01-06 18:17:38,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-01-06 18:17:38,205 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:38,205 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:38,206 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 18:17:38,206 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:38,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:38,206 INFO L82 PathProgramCache]: Analyzing trace with hash -710330107, now seen corresponding path program 1 times [2021-01-06 18:17:38,207 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:38,207 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [677827233] [2021-01-06 18:17:38,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:38,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:38,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:38,277 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [677827233] [2021-01-06 18:17:38,277 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:38,278 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:38,278 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072838598] [2021-01-06 18:17:38,279 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:38,279 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:38,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:38,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:38,280 INFO L87 Difference]: Start difference. First operand 4575 states and 8633 transitions. Second operand 4 states. [2021-01-06 18:17:39,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:39,147 INFO L93 Difference]: Finished difference Result 18068 states and 34175 transitions. [2021-01-06 18:17:39,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:39,148 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2021-01-06 18:17:39,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:39,188 INFO L225 Difference]: With dead ends: 18068 [2021-01-06 18:17:39,188 INFO L226 Difference]: Without dead ends: 13515 [2021-01-06 18:17:39,200 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:39,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13515 states. [2021-01-06 18:17:39,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13515 to 4557. [2021-01-06 18:17:39,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4557 states. [2021-01-06 18:17:39,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4557 states to 4557 states and 8602 transitions. [2021-01-06 18:17:39,495 INFO L78 Accepts]: Start accepts. Automaton has 4557 states and 8602 transitions. Word has length 49 [2021-01-06 18:17:39,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:39,495 INFO L481 AbstractCegarLoop]: Abstraction has 4557 states and 8602 transitions. [2021-01-06 18:17:39,495 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:39,495 INFO L276 IsEmpty]: Start isEmpty. Operand 4557 states and 8602 transitions. [2021-01-06 18:17:39,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2021-01-06 18:17:39,497 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:39,497 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:39,497 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 18:17:39,497 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:39,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:39,498 INFO L82 PathProgramCache]: Analyzing trace with hash 141854634, now seen corresponding path program 1 times [2021-01-06 18:17:39,498 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:39,498 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264779371] [2021-01-06 18:17:39,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:39,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:39,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:39,562 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [264779371] [2021-01-06 18:17:39,562 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:39,562 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:39,563 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624416194] [2021-01-06 18:17:39,563 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:39,563 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:39,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:39,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:39,564 INFO L87 Difference]: Start difference. First operand 4557 states and 8602 transitions. Second operand 4 states. [2021-01-06 18:17:40,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:40,187 INFO L93 Difference]: Finished difference Result 13577 states and 25669 transitions. [2021-01-06 18:17:40,187 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:40,188 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 50 [2021-01-06 18:17:40,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:40,213 INFO L225 Difference]: With dead ends: 13577 [2021-01-06 18:17:40,214 INFO L226 Difference]: Without dead ends: 9042 [2021-01-06 18:17:40,224 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:40,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9042 states. [2021-01-06 18:17:40,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9042 to 4557. [2021-01-06 18:17:40,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4557 states. [2021-01-06 18:17:40,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4557 states to 4557 states and 8596 transitions. [2021-01-06 18:17:40,498 INFO L78 Accepts]: Start accepts. Automaton has 4557 states and 8596 transitions. Word has length 50 [2021-01-06 18:17:40,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:40,499 INFO L481 AbstractCegarLoop]: Abstraction has 4557 states and 8596 transitions. [2021-01-06 18:17:40,499 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:40,499 INFO L276 IsEmpty]: Start isEmpty. Operand 4557 states and 8596 transitions. [2021-01-06 18:17:40,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2021-01-06 18:17:40,500 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:40,500 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:40,501 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 18:17:40,501 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:40,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:40,501 INFO L82 PathProgramCache]: Analyzing trace with hash -324048278, now seen corresponding path program 1 times [2021-01-06 18:17:40,502 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:40,502 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610181974] [2021-01-06 18:17:40,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:40,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:40,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:40,579 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610181974] [2021-01-06 18:17:40,579 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:40,579 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:40,579 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [813444787] [2021-01-06 18:17:40,580 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:40,580 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:40,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:40,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:40,581 INFO L87 Difference]: Start difference. First operand 4557 states and 8596 transitions. Second operand 4 states. [2021-01-06 18:17:41,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:41,185 INFO L93 Difference]: Finished difference Result 13577 states and 25657 transitions. [2021-01-06 18:17:41,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:41,186 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 51 [2021-01-06 18:17:41,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:41,212 INFO L225 Difference]: With dead ends: 13577 [2021-01-06 18:17:41,213 INFO L226 Difference]: Without dead ends: 9042 [2021-01-06 18:17:41,224 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:41,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9042 states. [2021-01-06 18:17:41,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9042 to 4557. [2021-01-06 18:17:41,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4557 states. [2021-01-06 18:17:41,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4557 states to 4557 states and 8590 transitions. [2021-01-06 18:17:41,494 INFO L78 Accepts]: Start accepts. Automaton has 4557 states and 8590 transitions. Word has length 51 [2021-01-06 18:17:41,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:41,497 INFO L481 AbstractCegarLoop]: Abstraction has 4557 states and 8590 transitions. [2021-01-06 18:17:41,497 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:41,497 INFO L276 IsEmpty]: Start isEmpty. Operand 4557 states and 8590 transitions. [2021-01-06 18:17:41,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2021-01-06 18:17:41,498 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:41,498 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:41,499 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 18:17:41,499 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:41,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:41,499 INFO L82 PathProgramCache]: Analyzing trace with hash -128136977, now seen corresponding path program 1 times [2021-01-06 18:17:41,500 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:41,500 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477837763] [2021-01-06 18:17:41,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:41,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:41,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:41,627 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1477837763] [2021-01-06 18:17:41,627 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:41,627 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:17:41,628 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839784678] [2021-01-06 18:17:41,628 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:17:41,629 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:41,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:17:41,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:17:41,630 INFO L87 Difference]: Start difference. First operand 4557 states and 8590 transitions. Second operand 7 states. [2021-01-06 18:17:43,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:43,082 INFO L93 Difference]: Finished difference Result 22536 states and 42606 transitions. [2021-01-06 18:17:43,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:17:43,082 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2021-01-06 18:17:43,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:43,143 INFO L225 Difference]: With dead ends: 22536 [2021-01-06 18:17:43,143 INFO L226 Difference]: Without dead ends: 18007 [2021-01-06 18:17:43,156 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:17:43,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18007 states. [2021-01-06 18:17:43,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18007 to 4559. [2021-01-06 18:17:43,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4559 states. [2021-01-06 18:17:43,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4559 states to 4559 states and 8591 transitions. [2021-01-06 18:17:43,527 INFO L78 Accepts]: Start accepts. Automaton has 4559 states and 8591 transitions. Word has length 52 [2021-01-06 18:17:43,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:43,532 INFO L481 AbstractCegarLoop]: Abstraction has 4559 states and 8591 transitions. [2021-01-06 18:17:43,532 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:17:43,533 INFO L276 IsEmpty]: Start isEmpty. Operand 4559 states and 8591 transitions. [2021-01-06 18:17:43,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-01-06 18:17:43,534 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:43,534 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:43,534 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 18:17:43,535 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:43,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:43,535 INFO L82 PathProgramCache]: Analyzing trace with hash 249606868, now seen corresponding path program 1 times [2021-01-06 18:17:43,535 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:43,536 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078694592] [2021-01-06 18:17:43,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:43,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:43,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:43,643 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078694592] [2021-01-06 18:17:43,643 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:43,644 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:17:43,644 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1827520855] [2021-01-06 18:17:43,644 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:17:43,644 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:43,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:17:43,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:17:43,645 INFO L87 Difference]: Start difference. First operand 4559 states and 8591 transitions. Second operand 7 states. [2021-01-06 18:17:45,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:45,148 INFO L93 Difference]: Finished difference Result 22528 states and 42585 transitions. [2021-01-06 18:17:45,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:17:45,149 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2021-01-06 18:17:45,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:45,207 INFO L225 Difference]: With dead ends: 22528 [2021-01-06 18:17:45,208 INFO L226 Difference]: Without dead ends: 18002 [2021-01-06 18:17:45,218 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:17:45,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18002 states. [2021-01-06 18:17:45,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18002 to 4564. [2021-01-06 18:17:45,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4564 states. [2021-01-06 18:17:45,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4564 states to 4564 states and 8599 transitions. [2021-01-06 18:17:45,551 INFO L78 Accepts]: Start accepts. Automaton has 4564 states and 8599 transitions. Word has length 54 [2021-01-06 18:17:45,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:45,551 INFO L481 AbstractCegarLoop]: Abstraction has 4564 states and 8599 transitions. [2021-01-06 18:17:45,551 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:17:45,552 INFO L276 IsEmpty]: Start isEmpty. Operand 4564 states and 8599 transitions. [2021-01-06 18:17:45,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-01-06 18:17:45,553 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:45,553 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:45,553 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 18:17:45,554 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:45,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:45,554 INFO L82 PathProgramCache]: Analyzing trace with hash 175716207, now seen corresponding path program 1 times [2021-01-06 18:17:45,554 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:45,555 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835953666] [2021-01-06 18:17:45,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:45,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:45,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:45,636 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [835953666] [2021-01-06 18:17:45,636 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:45,636 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:17:45,637 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [395441361] [2021-01-06 18:17:45,637 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:17:45,637 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:45,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:17:45,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:17:45,639 INFO L87 Difference]: Start difference. First operand 4564 states and 8599 transitions. Second operand 3 states. [2021-01-06 18:17:45,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:45,833 INFO L93 Difference]: Finished difference Result 9070 states and 17116 transitions. [2021-01-06 18:17:45,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:17:45,834 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2021-01-06 18:17:45,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:45,847 INFO L225 Difference]: With dead ends: 9070 [2021-01-06 18:17:45,847 INFO L226 Difference]: Without dead ends: 4543 [2021-01-06 18:17:45,855 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:17:45,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4543 states. [2021-01-06 18:17:46,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4543 to 4543. [2021-01-06 18:17:46,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4543 states. [2021-01-06 18:17:46,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4543 states to 4543 states and 8563 transitions. [2021-01-06 18:17:46,093 INFO L78 Accepts]: Start accepts. Automaton has 4543 states and 8563 transitions. Word has length 56 [2021-01-06 18:17:46,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:46,093 INFO L481 AbstractCegarLoop]: Abstraction has 4543 states and 8563 transitions. [2021-01-06 18:17:46,093 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:17:46,093 INFO L276 IsEmpty]: Start isEmpty. Operand 4543 states and 8563 transitions. [2021-01-06 18:17:46,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-01-06 18:17:46,094 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:46,095 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:46,095 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 18:17:46,095 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:46,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:46,096 INFO L82 PathProgramCache]: Analyzing trace with hash 1962506410, now seen corresponding path program 1 times [2021-01-06 18:17:46,096 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:46,097 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470391930] [2021-01-06 18:17:46,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:46,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:46,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:46,185 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470391930] [2021-01-06 18:17:46,185 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:46,185 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:17:46,186 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1668232113] [2021-01-06 18:17:46,186 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:17:46,186 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:46,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:17:46,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:46,187 INFO L87 Difference]: Start difference. First operand 4543 states and 8563 transitions. Second operand 5 states. [2021-01-06 18:17:46,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:46,452 INFO L93 Difference]: Finished difference Result 9019 states and 17038 transitions. [2021-01-06 18:17:46,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:46,453 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2021-01-06 18:17:46,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:46,466 INFO L225 Difference]: With dead ends: 9019 [2021-01-06 18:17:46,467 INFO L226 Difference]: Without dead ends: 4537 [2021-01-06 18:17:46,474 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:17:46,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4537 states. [2021-01-06 18:17:46,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4537 to 4537. [2021-01-06 18:17:46,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4537 states. [2021-01-06 18:17:46,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4537 states to 4537 states and 8554 transitions. [2021-01-06 18:17:46,729 INFO L78 Accepts]: Start accepts. Automaton has 4537 states and 8554 transitions. Word has length 58 [2021-01-06 18:17:46,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:46,730 INFO L481 AbstractCegarLoop]: Abstraction has 4537 states and 8554 transitions. [2021-01-06 18:17:46,730 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:17:46,730 INFO L276 IsEmpty]: Start isEmpty. Operand 4537 states and 8554 transitions. [2021-01-06 18:17:46,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-01-06 18:17:46,734 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:46,734 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:46,734 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 18:17:46,735 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:46,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:46,735 INFO L82 PathProgramCache]: Analyzing trace with hash 1255951402, now seen corresponding path program 1 times [2021-01-06 18:17:46,736 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:46,736 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508068787] [2021-01-06 18:17:46,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:46,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:46,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:46,813 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [508068787] [2021-01-06 18:17:46,813 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:46,813 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:46,813 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1024757098] [2021-01-06 18:17:46,814 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:46,814 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:46,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:46,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:46,815 INFO L87 Difference]: Start difference. First operand 4537 states and 8554 transitions. Second operand 4 states. [2021-01-06 18:17:47,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:47,069 INFO L93 Difference]: Finished difference Result 9013 states and 17029 transitions. [2021-01-06 18:17:47,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:17:47,070 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2021-01-06 18:17:47,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:47,082 INFO L225 Difference]: With dead ends: 9013 [2021-01-06 18:17:47,082 INFO L226 Difference]: Without dead ends: 4523 [2021-01-06 18:17:47,090 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:47,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4523 states. [2021-01-06 18:17:47,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4523 to 4523. [2021-01-06 18:17:47,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4523 states. [2021-01-06 18:17:47,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4523 states to 4523 states and 8533 transitions. [2021-01-06 18:17:47,340 INFO L78 Accepts]: Start accepts. Automaton has 4523 states and 8533 transitions. Word has length 58 [2021-01-06 18:17:47,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:47,341 INFO L481 AbstractCegarLoop]: Abstraction has 4523 states and 8533 transitions. [2021-01-06 18:17:47,341 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:47,341 INFO L276 IsEmpty]: Start isEmpty. Operand 4523 states and 8533 transitions. [2021-01-06 18:17:47,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2021-01-06 18:17:47,342 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:47,343 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:47,343 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 18:17:47,343 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:47,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:47,343 INFO L82 PathProgramCache]: Analyzing trace with hash -244440867, now seen corresponding path program 1 times [2021-01-06 18:17:47,344 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:47,344 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1521983414] [2021-01-06 18:17:47,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:47,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:47,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:47,464 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1521983414] [2021-01-06 18:17:47,465 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:47,465 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:17:47,465 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587930209] [2021-01-06 18:17:47,465 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:17:47,465 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:47,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:17:47,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:17:47,467 INFO L87 Difference]: Start difference. First operand 4523 states and 8533 transitions. Second operand 6 states. [2021-01-06 18:17:47,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:47,908 INFO L93 Difference]: Finished difference Result 9013 states and 17024 transitions. [2021-01-06 18:17:47,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:17:47,909 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2021-01-06 18:17:47,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:47,922 INFO L225 Difference]: With dead ends: 9013 [2021-01-06 18:17:47,922 INFO L226 Difference]: Without dead ends: 4543 [2021-01-06 18:17:47,931 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:17:47,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4543 states. [2021-01-06 18:17:48,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4543 to 4523. [2021-01-06 18:17:48,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4523 states. [2021-01-06 18:17:48,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4523 states to 4523 states and 8532 transitions. [2021-01-06 18:17:48,183 INFO L78 Accepts]: Start accepts. Automaton has 4523 states and 8532 transitions. Word has length 59 [2021-01-06 18:17:48,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:48,183 INFO L481 AbstractCegarLoop]: Abstraction has 4523 states and 8532 transitions. [2021-01-06 18:17:48,183 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:17:48,183 INFO L276 IsEmpty]: Start isEmpty. Operand 4523 states and 8532 transitions. [2021-01-06 18:17:48,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-01-06 18:17:48,185 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:48,185 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:48,185 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 18:17:48,185 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:48,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:48,186 INFO L82 PathProgramCache]: Analyzing trace with hash -558837487, now seen corresponding path program 1 times [2021-01-06 18:17:48,186 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:48,186 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393053244] [2021-01-06 18:17:48,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:48,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:48,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:48,261 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393053244] [2021-01-06 18:17:48,261 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:48,262 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:17:48,262 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039473683] [2021-01-06 18:17:48,262 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:17:48,262 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:48,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:17:48,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:17:48,263 INFO L87 Difference]: Start difference. First operand 4523 states and 8532 transitions. Second operand 6 states. [2021-01-06 18:17:48,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:48,641 INFO L93 Difference]: Finished difference Result 9003 states and 17005 transitions. [2021-01-06 18:17:48,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:17:48,641 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2021-01-06 18:17:48,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:48,650 INFO L225 Difference]: With dead ends: 9003 [2021-01-06 18:17:48,650 INFO L226 Difference]: Without dead ends: 4538 [2021-01-06 18:17:48,658 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:17:48,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4538 states. [2021-01-06 18:17:48,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4538 to 4523. [2021-01-06 18:17:48,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4523 states. [2021-01-06 18:17:48,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4523 states to 4523 states and 8531 transitions. [2021-01-06 18:17:48,969 INFO L78 Accepts]: Start accepts. Automaton has 4523 states and 8531 transitions. Word has length 60 [2021-01-06 18:17:48,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:48,969 INFO L481 AbstractCegarLoop]: Abstraction has 4523 states and 8531 transitions. [2021-01-06 18:17:48,969 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:17:48,969 INFO L276 IsEmpty]: Start isEmpty. Operand 4523 states and 8531 transitions. [2021-01-06 18:17:48,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 18:17:48,971 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:48,971 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:48,971 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 18:17:48,971 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:48,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:48,972 INFO L82 PathProgramCache]: Analyzing trace with hash 2018540690, now seen corresponding path program 1 times [2021-01-06 18:17:48,972 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:48,972 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1436461331] [2021-01-06 18:17:48,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:49,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:49,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:49,063 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1436461331] [2021-01-06 18:17:49,064 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:49,064 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:17:49,064 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1138833392] [2021-01-06 18:17:49,064 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:17:49,065 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:49,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:17:49,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:17:49,065 INFO L87 Difference]: Start difference. First operand 4523 states and 8531 transitions. Second operand 3 states. [2021-01-06 18:17:49,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:49,851 INFO L93 Difference]: Finished difference Result 10647 states and 20121 transitions. [2021-01-06 18:17:49,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:17:49,852 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 18:17:49,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:49,869 INFO L225 Difference]: With dead ends: 10647 [2021-01-06 18:17:49,869 INFO L226 Difference]: Without dead ends: 8360 [2021-01-06 18:17:49,876 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:17:49,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8360 states. [2021-01-06 18:17:50,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8360 to 6381. [2021-01-06 18:17:50,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6381 states. [2021-01-06 18:17:50,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6381 states to 6381 states and 12049 transitions. [2021-01-06 18:17:50,295 INFO L78 Accepts]: Start accepts. Automaton has 6381 states and 12049 transitions. Word has length 61 [2021-01-06 18:17:50,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:50,295 INFO L481 AbstractCegarLoop]: Abstraction has 6381 states and 12049 transitions. [2021-01-06 18:17:50,295 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:17:50,295 INFO L276 IsEmpty]: Start isEmpty. Operand 6381 states and 12049 transitions. [2021-01-06 18:17:50,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-01-06 18:17:50,299 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:50,299 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:50,300 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 18:17:50,300 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:50,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:50,300 INFO L82 PathProgramCache]: Analyzing trace with hash 582803611, now seen corresponding path program 1 times [2021-01-06 18:17:50,300 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:50,301 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349293558] [2021-01-06 18:17:50,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:50,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:50,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:50,382 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349293558] [2021-01-06 18:17:50,382 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:50,382 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:50,383 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [643229625] [2021-01-06 18:17:50,383 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:17:50,383 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:50,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:17:50,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:50,384 INFO L87 Difference]: Start difference. First operand 6381 states and 12049 transitions. Second operand 5 states. [2021-01-06 18:17:51,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:51,131 INFO L93 Difference]: Finished difference Result 12669 states and 23770 transitions. [2021-01-06 18:17:51,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:17:51,132 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 74 [2021-01-06 18:17:51,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:51,144 INFO L225 Difference]: With dead ends: 12669 [2021-01-06 18:17:51,144 INFO L226 Difference]: Without dead ends: 7456 [2021-01-06 18:17:51,152 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:17:51,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7456 states. [2021-01-06 18:17:51,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7456 to 5210. [2021-01-06 18:17:51,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5210 states. [2021-01-06 18:17:51,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5210 states to 5210 states and 9778 transitions. [2021-01-06 18:17:51,719 INFO L78 Accepts]: Start accepts. Automaton has 5210 states and 9778 transitions. Word has length 74 [2021-01-06 18:17:51,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:51,719 INFO L481 AbstractCegarLoop]: Abstraction has 5210 states and 9778 transitions. [2021-01-06 18:17:51,719 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:17:51,719 INFO L276 IsEmpty]: Start isEmpty. Operand 5210 states and 9778 transitions. [2021-01-06 18:17:51,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-01-06 18:17:51,722 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:51,722 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:51,722 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 18:17:51,723 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:51,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:51,723 INFO L82 PathProgramCache]: Analyzing trace with hash -1996387262, now seen corresponding path program 1 times [2021-01-06 18:17:51,723 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:51,724 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785245814] [2021-01-06 18:17:51,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:51,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:51,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:51,812 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785245814] [2021-01-06 18:17:51,813 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:51,813 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:51,813 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310838443] [2021-01-06 18:17:51,814 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:17:51,814 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:51,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:17:51,814 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:51,815 INFO L87 Difference]: Start difference. First operand 5210 states and 9778 transitions. Second operand 5 states. [2021-01-06 18:17:54,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:54,720 INFO L93 Difference]: Finished difference Result 20931 states and 39209 transitions. [2021-01-06 18:17:54,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:17:54,721 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 75 [2021-01-06 18:17:54,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:54,739 INFO L225 Difference]: With dead ends: 20931 [2021-01-06 18:17:54,739 INFO L226 Difference]: Without dead ends: 15797 [2021-01-06 18:17:54,746 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:17:54,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15797 states. [2021-01-06 18:17:55,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15797 to 5224. [2021-01-06 18:17:55,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5224 states. [2021-01-06 18:17:55,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5224 states to 5224 states and 9792 transitions. [2021-01-06 18:17:55,208 INFO L78 Accepts]: Start accepts. Automaton has 5224 states and 9792 transitions. Word has length 75 [2021-01-06 18:17:55,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:55,209 INFO L481 AbstractCegarLoop]: Abstraction has 5224 states and 9792 transitions. [2021-01-06 18:17:55,209 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:17:55,209 INFO L276 IsEmpty]: Start isEmpty. Operand 5224 states and 9792 transitions. [2021-01-06 18:17:55,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-01-06 18:17:55,211 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:55,212 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:55,212 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 18:17:55,212 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:55,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:55,213 INFO L82 PathProgramCache]: Analyzing trace with hash 1669216304, now seen corresponding path program 1 times [2021-01-06 18:17:55,213 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:55,213 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [976654610] [2021-01-06 18:17:55,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:55,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:55,289 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:55,290 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [976654610] [2021-01-06 18:17:55,290 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:55,290 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:17:55,291 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [460787538] [2021-01-06 18:17:55,291 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:55,291 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:55,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:55,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:55,292 INFO L87 Difference]: Start difference. First operand 5224 states and 9792 transitions. Second operand 4 states. [2021-01-06 18:17:58,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:58,103 INFO L93 Difference]: Finished difference Result 15451 states and 28868 transitions. [2021-01-06 18:17:58,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:58,103 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2021-01-06 18:17:58,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:58,115 INFO L225 Difference]: With dead ends: 15451 [2021-01-06 18:17:58,116 INFO L226 Difference]: Without dead ends: 10290 [2021-01-06 18:17:58,123 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:58,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10290 states. [2021-01-06 18:17:58,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10290 to 6646. [2021-01-06 18:17:58,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6646 states. [2021-01-06 18:17:58,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6646 states to 6646 states and 12320 transitions. [2021-01-06 18:17:58,565 INFO L78 Accepts]: Start accepts. Automaton has 6646 states and 12320 transitions. Word has length 76 [2021-01-06 18:17:58,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:58,565 INFO L481 AbstractCegarLoop]: Abstraction has 6646 states and 12320 transitions. [2021-01-06 18:17:58,565 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:58,565 INFO L276 IsEmpty]: Start isEmpty. Operand 6646 states and 12320 transitions. [2021-01-06 18:17:58,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-01-06 18:17:58,569 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:58,569 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:58,569 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 18:17:58,569 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:58,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:58,570 INFO L82 PathProgramCache]: Analyzing trace with hash -688334952, now seen corresponding path program 1 times [2021-01-06 18:17:58,570 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:58,570 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782909286] [2021-01-06 18:17:58,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:58,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:58,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:58,649 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1782909286] [2021-01-06 18:17:58,649 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:58,649 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:58,650 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [397515582] [2021-01-06 18:17:58,650 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:17:58,650 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:58,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:17:58,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:58,651 INFO L87 Difference]: Start difference. First operand 6646 states and 12320 transitions. Second operand 5 states. [2021-01-06 18:18:00,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:00,690 INFO L93 Difference]: Finished difference Result 43958 states and 81859 transitions. [2021-01-06 18:18:00,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:00,691 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 78 [2021-01-06 18:18:00,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:00,740 INFO L225 Difference]: With dead ends: 43958 [2021-01-06 18:18:00,740 INFO L226 Difference]: Without dead ends: 37384 [2021-01-06 18:18:00,757 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:18:00,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37384 states. [2021-01-06 18:18:01,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37384 to 10546. [2021-01-06 18:18:01,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10546 states. [2021-01-06 18:18:01,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10546 states to 10546 states and 19586 transitions. [2021-01-06 18:18:01,800 INFO L78 Accepts]: Start accepts. Automaton has 10546 states and 19586 transitions. Word has length 78 [2021-01-06 18:18:01,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:01,800 INFO L481 AbstractCegarLoop]: Abstraction has 10546 states and 19586 transitions. [2021-01-06 18:18:01,800 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:01,800 INFO L276 IsEmpty]: Start isEmpty. Operand 10546 states and 19586 transitions. [2021-01-06 18:18:01,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-01-06 18:18:01,802 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:01,802 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:01,803 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 18:18:01,803 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:01,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:01,803 INFO L82 PathProgramCache]: Analyzing trace with hash -822348458, now seen corresponding path program 1 times [2021-01-06 18:18:01,804 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:01,804 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107420507] [2021-01-06 18:18:01,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:01,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:01,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:01,872 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [107420507] [2021-01-06 18:18:01,872 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:01,872 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:01,873 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [110288401] [2021-01-06 18:18:01,873 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:01,873 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:01,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:01,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:01,874 INFO L87 Difference]: Start difference. First operand 10546 states and 19586 transitions. Second operand 4 states. [2021-01-06 18:18:03,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:03,291 INFO L93 Difference]: Finished difference Result 31709 states and 58941 transitions. [2021-01-06 18:18:03,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:03,291 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2021-01-06 18:18:03,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:03,322 INFO L225 Difference]: With dead ends: 31709 [2021-01-06 18:18:03,322 INFO L226 Difference]: Without dead ends: 25303 [2021-01-06 18:18:03,331 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:03,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25303 states. [2021-01-06 18:18:04,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25303 to 16217. [2021-01-06 18:18:04,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16217 states. [2021-01-06 18:18:04,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16217 states to 16217 states and 30124 transitions. [2021-01-06 18:18:04,345 INFO L78 Accepts]: Start accepts. Automaton has 16217 states and 30124 transitions. Word has length 78 [2021-01-06 18:18:04,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:04,346 INFO L481 AbstractCegarLoop]: Abstraction has 16217 states and 30124 transitions. [2021-01-06 18:18:04,346 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:04,346 INFO L276 IsEmpty]: Start isEmpty. Operand 16217 states and 30124 transitions. [2021-01-06 18:18:04,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-01-06 18:18:04,348 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:04,348 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:04,348 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 18:18:04,349 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:04,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:04,349 INFO L82 PathProgramCache]: Analyzing trace with hash 988763232, now seen corresponding path program 1 times [2021-01-06 18:18:04,349 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:04,350 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33905996] [2021-01-06 18:18:04,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:04,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:04,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:04,433 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33905996] [2021-01-06 18:18:04,434 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:04,434 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:04,434 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555575705] [2021-01-06 18:18:04,434 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:04,435 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:04,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:04,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:04,436 INFO L87 Difference]: Start difference. First operand 16217 states and 30124 transitions. Second operand 4 states. [2021-01-06 18:18:05,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:05,971 INFO L93 Difference]: Finished difference Result 37479 states and 69568 transitions. [2021-01-06 18:18:05,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:05,972 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2021-01-06 18:18:05,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:06,003 INFO L225 Difference]: With dead ends: 37479 [2021-01-06 18:18:06,003 INFO L226 Difference]: Without dead ends: 25649 [2021-01-06 18:18:06,014 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:06,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25649 states. [2021-01-06 18:18:06,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25649 to 16237. [2021-01-06 18:18:06,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16237 states. [2021-01-06 18:18:06,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16237 states to 16237 states and 30132 transitions. [2021-01-06 18:18:06,831 INFO L78 Accepts]: Start accepts. Automaton has 16237 states and 30132 transitions. Word has length 80 [2021-01-06 18:18:06,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:06,831 INFO L481 AbstractCegarLoop]: Abstraction has 16237 states and 30132 transitions. [2021-01-06 18:18:06,831 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:06,832 INFO L276 IsEmpty]: Start isEmpty. Operand 16237 states and 30132 transitions. [2021-01-06 18:18:06,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-01-06 18:18:06,835 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:06,835 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:06,835 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 18:18:06,835 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:06,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:06,836 INFO L82 PathProgramCache]: Analyzing trace with hash -948934775, now seen corresponding path program 1 times [2021-01-06 18:18:06,836 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:06,836 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728945381] [2021-01-06 18:18:06,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:06,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:06,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:06,961 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728945381] [2021-01-06 18:18:06,962 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:06,962 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:18:06,962 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075211268] [2021-01-06 18:18:06,962 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:18:06,963 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:06,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:18:06,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:06,963 INFO L87 Difference]: Start difference. First operand 16237 states and 30132 transitions. Second operand 7 states. [2021-01-06 18:18:09,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:09,629 INFO L93 Difference]: Finished difference Result 49796 states and 92400 transitions. [2021-01-06 18:18:09,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-01-06 18:18:09,629 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 86 [2021-01-06 18:18:09,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:09,673 INFO L225 Difference]: With dead ends: 49796 [2021-01-06 18:18:09,673 INFO L226 Difference]: Without dead ends: 37724 [2021-01-06 18:18:09,687 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:18:09,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37724 states. [2021-01-06 18:18:10,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37724 to 16249. [2021-01-06 18:18:10,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16249 states. [2021-01-06 18:18:10,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16249 states to 16249 states and 30133 transitions. [2021-01-06 18:18:10,551 INFO L78 Accepts]: Start accepts. Automaton has 16249 states and 30133 transitions. Word has length 86 [2021-01-06 18:18:10,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:10,551 INFO L481 AbstractCegarLoop]: Abstraction has 16249 states and 30133 transitions. [2021-01-06 18:18:10,551 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:18:10,551 INFO L276 IsEmpty]: Start isEmpty. Operand 16249 states and 30133 transitions. [2021-01-06 18:18:10,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-01-06 18:18:10,554 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:10,554 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:10,554 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 18:18:10,555 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:10,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:10,555 INFO L82 PathProgramCache]: Analyzing trace with hash -730080057, now seen corresponding path program 1 times [2021-01-06 18:18:10,555 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:10,556 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [978915652] [2021-01-06 18:18:10,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:10,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:10,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:10,630 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [978915652] [2021-01-06 18:18:10,630 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:10,630 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:10,630 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [757241385] [2021-01-06 18:18:10,630 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:10,631 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:10,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:10,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:10,631 INFO L87 Difference]: Start difference. First operand 16249 states and 30133 transitions. Second operand 5 states. [2021-01-06 18:18:12,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:12,580 INFO L93 Difference]: Finished difference Result 28102 states and 52107 transitions. [2021-01-06 18:18:12,580 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:12,580 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 86 [2021-01-06 18:18:12,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:12,600 INFO L225 Difference]: With dead ends: 28102 [2021-01-06 18:18:12,600 INFO L226 Difference]: Without dead ends: 16276 [2021-01-06 18:18:12,611 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:12,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16276 states. [2021-01-06 18:18:13,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16276 to 16249. [2021-01-06 18:18:13,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16249 states. [2021-01-06 18:18:13,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16249 states to 16249 states and 30094 transitions. [2021-01-06 18:18:13,400 INFO L78 Accepts]: Start accepts. Automaton has 16249 states and 30094 transitions. Word has length 86 [2021-01-06 18:18:13,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:13,401 INFO L481 AbstractCegarLoop]: Abstraction has 16249 states and 30094 transitions. [2021-01-06 18:18:13,401 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:13,401 INFO L276 IsEmpty]: Start isEmpty. Operand 16249 states and 30094 transitions. [2021-01-06 18:18:13,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-01-06 18:18:13,403 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:13,403 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:13,403 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 18:18:13,403 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:13,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:13,404 INFO L82 PathProgramCache]: Analyzing trace with hash -1316886071, now seen corresponding path program 1 times [2021-01-06 18:18:13,404 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:13,404 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1521553011] [2021-01-06 18:18:13,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:13,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:13,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:13,468 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1521553011] [2021-01-06 18:18:13,468 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:13,468 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:13,468 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [548375146] [2021-01-06 18:18:13,468 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:18:13,469 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:13,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:18:13,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:13,469 INFO L87 Difference]: Start difference. First operand 16249 states and 30094 transitions. Second operand 3 states. [2021-01-06 18:18:14,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:14,634 INFO L93 Difference]: Finished difference Result 30569 states and 56618 transitions. [2021-01-06 18:18:14,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:18:14,635 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2021-01-06 18:18:14,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:14,655 INFO L225 Difference]: With dead ends: 30569 [2021-01-06 18:18:14,655 INFO L226 Difference]: Without dead ends: 16207 [2021-01-06 18:18:14,667 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:14,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16207 states. [2021-01-06 18:18:15,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16207 to 16207. [2021-01-06 18:18:15,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16207 states. [2021-01-06 18:18:15,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16207 states to 16207 states and 30012 transitions. [2021-01-06 18:18:15,586 INFO L78 Accepts]: Start accepts. Automaton has 16207 states and 30012 transitions. Word has length 86 [2021-01-06 18:18:15,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:15,586 INFO L481 AbstractCegarLoop]: Abstraction has 16207 states and 30012 transitions. [2021-01-06 18:18:15,586 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:18:15,587 INFO L276 IsEmpty]: Start isEmpty. Operand 16207 states and 30012 transitions. [2021-01-06 18:18:15,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-01-06 18:18:15,590 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:15,590 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:15,590 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 18:18:15,590 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:15,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:15,591 INFO L82 PathProgramCache]: Analyzing trace with hash -1846401811, now seen corresponding path program 1 times [2021-01-06 18:18:15,591 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:15,591 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876538436] [2021-01-06 18:18:15,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:15,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:15,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:15,668 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876538436] [2021-01-06 18:18:15,669 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:15,669 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:15,669 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1733791539] [2021-01-06 18:18:15,670 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:15,670 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:15,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:15,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:15,671 INFO L87 Difference]: Start difference. First operand 16207 states and 30012 transitions. Second operand 5 states. [2021-01-06 18:18:18,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:18,605 INFO L93 Difference]: Finished difference Result 53509 states and 99218 transitions. [2021-01-06 18:18:18,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:18,605 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2021-01-06 18:18:18,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:18,652 INFO L225 Difference]: With dead ends: 53509 [2021-01-06 18:18:18,652 INFO L226 Difference]: Without dead ends: 41730 [2021-01-06 18:18:18,664 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:18:18,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41730 states. [2021-01-06 18:18:19,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41730 to 16207. [2021-01-06 18:18:19,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16207 states. [2021-01-06 18:18:19,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16207 states to 16207 states and 29992 transitions. [2021-01-06 18:18:19,855 INFO L78 Accepts]: Start accepts. Automaton has 16207 states and 29992 transitions. Word has length 88 [2021-01-06 18:18:19,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:19,856 INFO L481 AbstractCegarLoop]: Abstraction has 16207 states and 29992 transitions. [2021-01-06 18:18:19,856 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:19,856 INFO L276 IsEmpty]: Start isEmpty. Operand 16207 states and 29992 transitions. [2021-01-06 18:18:19,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-01-06 18:18:19,859 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:19,859 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:19,859 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 18:18:19,859 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:19,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:19,860 INFO L82 PathProgramCache]: Analyzing trace with hash 2133257835, now seen corresponding path program 1 times [2021-01-06 18:18:19,860 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:19,860 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [387475505] [2021-01-06 18:18:19,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:19,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:19,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:19,958 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [387475505] [2021-01-06 18:18:19,958 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:19,958 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:19,958 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1086192653] [2021-01-06 18:18:19,959 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:19,959 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:19,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:19,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:19,959 INFO L87 Difference]: Start difference. First operand 16207 states and 29992 transitions. Second operand 5 states. [2021-01-06 18:18:21,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:21,643 INFO L93 Difference]: Finished difference Result 26821 states and 49809 transitions. [2021-01-06 18:18:21,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:21,644 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2021-01-06 18:18:21,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:21,676 INFO L225 Difference]: With dead ends: 26821 [2021-01-06 18:18:21,677 INFO L226 Difference]: Without dead ends: 26808 [2021-01-06 18:18:21,684 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:21,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26808 states. [2021-01-06 18:18:22,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26808 to 16222. [2021-01-06 18:18:22,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16222 states. [2021-01-06 18:18:22,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16222 states to 16222 states and 30007 transitions. [2021-01-06 18:18:22,767 INFO L78 Accepts]: Start accepts. Automaton has 16222 states and 30007 transitions. Word has length 88 [2021-01-06 18:18:22,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:22,767 INFO L481 AbstractCegarLoop]: Abstraction has 16222 states and 30007 transitions. [2021-01-06 18:18:22,767 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:22,767 INFO L276 IsEmpty]: Start isEmpty. Operand 16222 states and 30007 transitions. [2021-01-06 18:18:22,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2021-01-06 18:18:22,771 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:22,771 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:22,771 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-01-06 18:18:22,772 INFO L429 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:22,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:22,772 INFO L82 PathProgramCache]: Analyzing trace with hash -668119792, now seen corresponding path program 1 times [2021-01-06 18:18:22,772 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:22,772 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [149118946] [2021-01-06 18:18:22,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:22,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:22,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:22,976 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [149118946] [2021-01-06 18:18:22,976 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:22,976 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:18:22,977 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1516272094] [2021-01-06 18:18:22,977 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:18:22,977 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:22,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:18:22,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:22,978 INFO L87 Difference]: Start difference. First operand 16222 states and 30007 transitions. Second operand 7 states. [2021-01-06 18:18:24,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:24,711 INFO L93 Difference]: Finished difference Result 27860 states and 51449 transitions. [2021-01-06 18:18:24,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-01-06 18:18:24,712 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 90 [2021-01-06 18:18:24,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:24,742 INFO L225 Difference]: With dead ends: 27860 [2021-01-06 18:18:24,742 INFO L226 Difference]: Without dead ends: 27847 [2021-01-06 18:18:24,748 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=137, Unknown=0, NotChecked=0, Total=210 [2021-01-06 18:18:24,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27847 states. [2021-01-06 18:18:25,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27847 to 16482. [2021-01-06 18:18:25,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16482 states. [2021-01-06 18:18:25,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16482 states to 16482 states and 30398 transitions. [2021-01-06 18:18:25,755 INFO L78 Accepts]: Start accepts. Automaton has 16482 states and 30398 transitions. Word has length 90 [2021-01-06 18:18:25,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:25,756 INFO L481 AbstractCegarLoop]: Abstraction has 16482 states and 30398 transitions. [2021-01-06 18:18:25,756 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:18:25,756 INFO L276 IsEmpty]: Start isEmpty. Operand 16482 states and 30398 transitions. [2021-01-06 18:18:25,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2021-01-06 18:18:25,760 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:25,760 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:25,760 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-01-06 18:18:25,760 INFO L429 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:25,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:25,761 INFO L82 PathProgramCache]: Analyzing trace with hash 1664271706, now seen corresponding path program 1 times [2021-01-06 18:18:25,761 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:25,761 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845642555] [2021-01-06 18:18:25,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:25,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:25,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:25,839 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [845642555] [2021-01-06 18:18:25,839 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:25,839 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:25,839 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1322522982] [2021-01-06 18:18:25,840 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:25,840 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:25,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:25,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:25,840 INFO L87 Difference]: Start difference. First operand 16482 states and 30398 transitions. Second operand 5 states. [2021-01-06 18:18:28,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:28,445 INFO L93 Difference]: Finished difference Result 41794 states and 76929 transitions. [2021-01-06 18:18:28,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:18:28,446 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2021-01-06 18:18:28,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:28,477 INFO L225 Difference]: With dead ends: 41794 [2021-01-06 18:18:28,477 INFO L226 Difference]: Without dead ends: 27299 [2021-01-06 18:18:28,488 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:18:28,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27299 states. [2021-01-06 18:18:29,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27299 to 16482. [2021-01-06 18:18:29,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16482 states. [2021-01-06 18:18:29,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16482 states to 16482 states and 30383 transitions. [2021-01-06 18:18:29,734 INFO L78 Accepts]: Start accepts. Automaton has 16482 states and 30383 transitions. Word has length 97 [2021-01-06 18:18:29,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:29,735 INFO L481 AbstractCegarLoop]: Abstraction has 16482 states and 30383 transitions. [2021-01-06 18:18:29,735 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:29,735 INFO L276 IsEmpty]: Start isEmpty. Operand 16482 states and 30383 transitions. [2021-01-06 18:18:29,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2021-01-06 18:18:29,739 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:29,740 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:29,740 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2021-01-06 18:18:29,740 INFO L429 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:29,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:29,740 INFO L82 PathProgramCache]: Analyzing trace with hash -355351742, now seen corresponding path program 1 times [2021-01-06 18:18:29,741 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:29,741 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466783881] [2021-01-06 18:18:29,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:29,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:29,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:29,817 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466783881] [2021-01-06 18:18:29,817 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:29,817 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:29,818 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1617237708] [2021-01-06 18:18:29,818 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:29,818 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:29,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:29,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:29,819 INFO L87 Difference]: Start difference. First operand 16482 states and 30383 transitions. Second operand 5 states. [2021-01-06 18:18:32,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:32,495 INFO L93 Difference]: Finished difference Result 41220 states and 76027 transitions. [2021-01-06 18:18:32,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:32,495 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 101 [2021-01-06 18:18:32,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:32,530 INFO L225 Difference]: With dead ends: 41220 [2021-01-06 18:18:32,530 INFO L226 Difference]: Without dead ends: 26556 [2021-01-06 18:18:32,542 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:32,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26556 states. [2021-01-06 18:18:33,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26556 to 16482. [2021-01-06 18:18:33,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16482 states. [2021-01-06 18:18:33,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16482 states to 16482 states and 30119 transitions. [2021-01-06 18:18:33,717 INFO L78 Accepts]: Start accepts. Automaton has 16482 states and 30119 transitions. Word has length 101 [2021-01-06 18:18:33,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:33,717 INFO L481 AbstractCegarLoop]: Abstraction has 16482 states and 30119 transitions. [2021-01-06 18:18:33,717 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:33,717 INFO L276 IsEmpty]: Start isEmpty. Operand 16482 states and 30119 transitions. [2021-01-06 18:18:33,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2021-01-06 18:18:33,721 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:33,721 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:33,721 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-01-06 18:18:33,721 INFO L429 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:33,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:33,722 INFO L82 PathProgramCache]: Analyzing trace with hash 1021217847, now seen corresponding path program 1 times [2021-01-06 18:18:33,722 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:33,722 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138703687] [2021-01-06 18:18:33,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:33,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:33,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:33,857 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138703687] [2021-01-06 18:18:33,857 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:33,857 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:33,857 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1456741230] [2021-01-06 18:18:33,857 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:33,858 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:33,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:33,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:33,858 INFO L87 Difference]: Start difference. First operand 16482 states and 30119 transitions. Second operand 5 states. [2021-01-06 18:18:37,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:37,825 INFO L93 Difference]: Finished difference Result 56843 states and 104191 transitions. [2021-01-06 18:18:37,825 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:37,825 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 102 [2021-01-06 18:18:37,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:37,873 INFO L225 Difference]: With dead ends: 56843 [2021-01-06 18:18:37,874 INFO L226 Difference]: Without dead ends: 44563 [2021-01-06 18:18:37,883 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:18:37,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44563 states. [2021-01-06 18:18:39,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44563 to 16482. [2021-01-06 18:18:39,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16482 states. [2021-01-06 18:18:39,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16482 states to 16482 states and 30105 transitions. [2021-01-06 18:18:39,191 INFO L78 Accepts]: Start accepts. Automaton has 16482 states and 30105 transitions. Word has length 102 [2021-01-06 18:18:39,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:39,191 INFO L481 AbstractCegarLoop]: Abstraction has 16482 states and 30105 transitions. [2021-01-06 18:18:39,191 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:39,191 INFO L276 IsEmpty]: Start isEmpty. Operand 16482 states and 30105 transitions. [2021-01-06 18:18:39,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2021-01-06 18:18:39,195 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:39,195 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:39,195 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-01-06 18:18:39,195 INFO L429 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:39,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:39,196 INFO L82 PathProgramCache]: Analyzing trace with hash 258642984, now seen corresponding path program 1 times [2021-01-06 18:18:39,196 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:39,196 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685092863] [2021-01-06 18:18:39,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:39,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:39,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:39,264 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [685092863] [2021-01-06 18:18:39,264 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:39,264 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:39,265 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1739618910] [2021-01-06 18:18:39,265 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:39,265 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:39,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:39,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:39,266 INFO L87 Difference]: Start difference. First operand 16482 states and 30105 transitions. Second operand 5 states. [2021-01-06 18:18:40,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:40,753 INFO L93 Difference]: Finished difference Result 28944 states and 52726 transitions. [2021-01-06 18:18:40,753 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:40,753 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 103 [2021-01-06 18:18:40,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:40,774 INFO L225 Difference]: With dead ends: 28944 [2021-01-06 18:18:40,774 INFO L226 Difference]: Without dead ends: 16495 [2021-01-06 18:18:40,782 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:40,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16495 states. [2021-01-06 18:18:41,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16495 to 16482. [2021-01-06 18:18:41,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16482 states. [2021-01-06 18:18:41,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16482 states to 16482 states and 29839 transitions. [2021-01-06 18:18:41,953 INFO L78 Accepts]: Start accepts. Automaton has 16482 states and 29839 transitions. Word has length 103 [2021-01-06 18:18:41,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:41,953 INFO L481 AbstractCegarLoop]: Abstraction has 16482 states and 29839 transitions. [2021-01-06 18:18:41,953 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:41,954 INFO L276 IsEmpty]: Start isEmpty. Operand 16482 states and 29839 transitions. [2021-01-06 18:18:41,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2021-01-06 18:18:41,957 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:41,957 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:41,957 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-01-06 18:18:41,957 INFO L429 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:41,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:41,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1479569835, now seen corresponding path program 1 times [2021-01-06 18:18:41,958 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:41,958 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966363497] [2021-01-06 18:18:41,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:42,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:42,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:42,088 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [966363497] [2021-01-06 18:18:42,088 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:42,088 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:42,088 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242526712] [2021-01-06 18:18:42,088 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:42,088 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:42,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:42,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:42,089 INFO L87 Difference]: Start difference. First operand 16482 states and 29839 transitions. Second operand 5 states. [2021-01-06 18:18:45,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:45,233 INFO L93 Difference]: Finished difference Result 43157 states and 78416 transitions. [2021-01-06 18:18:45,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:45,233 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 104 [2021-01-06 18:18:45,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:45,267 INFO L225 Difference]: With dead ends: 43157 [2021-01-06 18:18:45,267 INFO L226 Difference]: Without dead ends: 31145 [2021-01-06 18:18:45,278 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:18:45,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31145 states. [2021-01-06 18:18:46,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31145 to 16494. [2021-01-06 18:18:46,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16494 states. [2021-01-06 18:18:46,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16494 states to 16494 states and 29836 transitions. [2021-01-06 18:18:46,515 INFO L78 Accepts]: Start accepts. Automaton has 16494 states and 29836 transitions. Word has length 104 [2021-01-06 18:18:46,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:46,516 INFO L481 AbstractCegarLoop]: Abstraction has 16494 states and 29836 transitions. [2021-01-06 18:18:46,516 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:46,516 INFO L276 IsEmpty]: Start isEmpty. Operand 16494 states and 29836 transitions. [2021-01-06 18:18:46,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2021-01-06 18:18:46,519 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:46,519 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:46,519 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-01-06 18:18:46,519 INFO L429 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:46,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:46,520 INFO L82 PathProgramCache]: Analyzing trace with hash 115998695, now seen corresponding path program 1 times [2021-01-06 18:18:46,520 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:46,520 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1525678307] [2021-01-06 18:18:46,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:46,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:46,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:46,638 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1525678307] [2021-01-06 18:18:46,639 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:46,639 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:18:46,639 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1553547686] [2021-01-06 18:18:46,639 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:18:46,639 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:46,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:18:46,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:46,640 INFO L87 Difference]: Start difference. First operand 16494 states and 29836 transitions. Second operand 7 states. [2021-01-06 18:18:48,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:48,771 INFO L93 Difference]: Finished difference Result 28141 states and 51032 transitions. [2021-01-06 18:18:48,771 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:48,771 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 104 [2021-01-06 18:18:48,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:48,803 INFO L225 Difference]: With dead ends: 28141 [2021-01-06 18:18:48,803 INFO L226 Difference]: Without dead ends: 28128 [2021-01-06 18:18:48,809 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:18:48,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28128 states. [2021-01-06 18:18:50,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28128 to 16524. [2021-01-06 18:18:50,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16524 states. [2021-01-06 18:18:50,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16524 states to 16524 states and 29861 transitions. [2021-01-06 18:18:50,132 INFO L78 Accepts]: Start accepts. Automaton has 16524 states and 29861 transitions. Word has length 104 [2021-01-06 18:18:50,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:50,132 INFO L481 AbstractCegarLoop]: Abstraction has 16524 states and 29861 transitions. [2021-01-06 18:18:50,133 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:18:50,133 INFO L276 IsEmpty]: Start isEmpty. Operand 16524 states and 29861 transitions. [2021-01-06 18:18:50,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2021-01-06 18:18:50,136 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:50,136 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:50,136 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2021-01-06 18:18:50,137 INFO L429 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:50,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:50,137 INFO L82 PathProgramCache]: Analyzing trace with hash 541712043, now seen corresponding path program 1 times [2021-01-06 18:18:50,137 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:50,137 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524783868] [2021-01-06 18:18:50,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:50,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:50,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:50,224 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524783868] [2021-01-06 18:18:50,225 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:50,225 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:50,225 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [155139028] [2021-01-06 18:18:50,225 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:50,226 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:50,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:50,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:50,226 INFO L87 Difference]: Start difference. First operand 16524 states and 29861 transitions. Second operand 5 states. [2021-01-06 18:18:57,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:57,159 INFO L93 Difference]: Finished difference Result 94187 states and 171850 transitions. [2021-01-06 18:18:57,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:57,160 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2021-01-06 18:18:57,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:57,255 INFO L225 Difference]: With dead ends: 94187 [2021-01-06 18:18:57,255 INFO L226 Difference]: Without dead ends: 79623 [2021-01-06 18:18:57,274 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:18:57,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79623 states. [2021-01-06 18:19:00,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79623 to 33022. [2021-01-06 18:19:00,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33022 states. [2021-01-06 18:19:00,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33022 states to 33022 states and 59688 transitions. [2021-01-06 18:19:00,471 INFO L78 Accepts]: Start accepts. Automaton has 33022 states and 59688 transitions. Word has length 120 [2021-01-06 18:19:00,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:00,471 INFO L481 AbstractCegarLoop]: Abstraction has 33022 states and 59688 transitions. [2021-01-06 18:19:00,471 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:00,472 INFO L276 IsEmpty]: Start isEmpty. Operand 33022 states and 59688 transitions. [2021-01-06 18:19:00,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2021-01-06 18:19:00,478 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:00,478 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:00,478 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-01-06 18:19:00,478 INFO L429 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:00,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:00,479 INFO L82 PathProgramCache]: Analyzing trace with hash 396054011, now seen corresponding path program 1 times [2021-01-06 18:19:00,479 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:00,479 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128756849] [2021-01-06 18:19:00,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:00,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:00,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:00,557 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128756849] [2021-01-06 18:19:00,557 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:00,557 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:19:00,559 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862624489] [2021-01-06 18:19:00,559 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:00,560 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:00,560 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:00,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:00,560 INFO L87 Difference]: Start difference. First operand 33022 states and 59688 transitions. Second operand 3 states. [2021-01-06 18:19:05,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:05,390 INFO L93 Difference]: Finished difference Result 82752 states and 149404 transitions. [2021-01-06 18:19:05,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:19:05,390 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 121 [2021-01-06 18:19:05,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:05,451 INFO L225 Difference]: With dead ends: 82752 [2021-01-06 18:19:05,451 INFO L226 Difference]: Without dead ends: 53327 [2021-01-06 18:19:05,468 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:05,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53327 states. [2021-01-06 18:19:08,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53327 to 32326. [2021-01-06 18:19:08,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32326 states. [2021-01-06 18:19:08,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32326 states to 32326 states and 58254 transitions. [2021-01-06 18:19:08,144 INFO L78 Accepts]: Start accepts. Automaton has 32326 states and 58254 transitions. Word has length 121 [2021-01-06 18:19:08,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:08,145 INFO L481 AbstractCegarLoop]: Abstraction has 32326 states and 58254 transitions. [2021-01-06 18:19:08,145 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:19:08,145 INFO L276 IsEmpty]: Start isEmpty. Operand 32326 states and 58254 transitions. [2021-01-06 18:19:08,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2021-01-06 18:19:08,153 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:08,153 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:08,154 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-01-06 18:19:08,154 INFO L429 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:08,154 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:08,154 INFO L82 PathProgramCache]: Analyzing trace with hash -457959647, now seen corresponding path program 1 times [2021-01-06 18:19:08,154 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:08,154 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568202856] [2021-01-06 18:19:08,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:08,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:08,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:08,218 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568202856] [2021-01-06 18:19:08,218 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:08,218 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:08,219 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672976558] [2021-01-06 18:19:08,219 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:08,219 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:08,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:08,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:08,220 INFO L87 Difference]: Start difference. First operand 32326 states and 58254 transitions. Second operand 5 states. [2021-01-06 18:19:11,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:11,001 INFO L93 Difference]: Finished difference Result 47923 states and 86379 transitions. [2021-01-06 18:19:11,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:19:11,002 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 121 [2021-01-06 18:19:11,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:11,036 INFO L225 Difference]: With dead ends: 47923 [2021-01-06 18:19:11,036 INFO L226 Difference]: Without dead ends: 31627 [2021-01-06 18:19:11,048 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:19:11,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31627 states. [2021-01-06 18:19:13,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31627 to 31627. [2021-01-06 18:19:13,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31627 states. [2021-01-06 18:19:13,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31627 states to 31627 states and 57015 transitions. [2021-01-06 18:19:13,576 INFO L78 Accepts]: Start accepts. Automaton has 31627 states and 57015 transitions. Word has length 121 [2021-01-06 18:19:13,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:13,577 INFO L481 AbstractCegarLoop]: Abstraction has 31627 states and 57015 transitions. [2021-01-06 18:19:13,577 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:13,577 INFO L276 IsEmpty]: Start isEmpty. Operand 31627 states and 57015 transitions. [2021-01-06 18:19:13,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-01-06 18:19:13,588 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:13,588 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:13,589 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-01-06 18:19:13,589 INFO L429 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:13,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:13,589 INFO L82 PathProgramCache]: Analyzing trace with hash -93958885, now seen corresponding path program 1 times [2021-01-06 18:19:13,589 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:13,589 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046641646] [2021-01-06 18:19:13,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:13,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:13,694 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:13,694 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046641646] [2021-01-06 18:19:13,694 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:13,695 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:19:13,695 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1736418631] [2021-01-06 18:19:13,695 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:19:13,695 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:13,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:19:13,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:19:13,696 INFO L87 Difference]: Start difference. First operand 31627 states and 57015 transitions. Second operand 6 states. [2021-01-06 18:19:22,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:22,563 INFO L93 Difference]: Finished difference Result 101298 states and 183371 transitions. [2021-01-06 18:19:22,563 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-01-06 18:19:22,563 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 139 [2021-01-06 18:19:22,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:22,646 INFO L225 Difference]: With dead ends: 101298 [2021-01-06 18:19:22,647 INFO L226 Difference]: Without dead ends: 72606 [2021-01-06 18:19:22,668 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2021-01-06 18:19:22,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72606 states. [2021-01-06 18:19:26,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72606 to 48511. [2021-01-06 18:19:26,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48511 states. [2021-01-06 18:19:26,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48511 states to 48511 states and 88086 transitions. [2021-01-06 18:19:26,712 INFO L78 Accepts]: Start accepts. Automaton has 48511 states and 88086 transitions. Word has length 139 [2021-01-06 18:19:26,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:26,712 INFO L481 AbstractCegarLoop]: Abstraction has 48511 states and 88086 transitions. [2021-01-06 18:19:26,712 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:19:26,712 INFO L276 IsEmpty]: Start isEmpty. Operand 48511 states and 88086 transitions. [2021-01-06 18:19:26,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-01-06 18:19:26,722 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:26,722 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:26,722 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-01-06 18:19:26,723 INFO L429 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:26,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:26,723 INFO L82 PathProgramCache]: Analyzing trace with hash 456933250, now seen corresponding path program 1 times [2021-01-06 18:19:26,723 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:26,723 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829027092] [2021-01-06 18:19:26,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:26,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:26,819 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-01-06 18:19:26,819 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829027092] [2021-01-06 18:19:26,820 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:26,820 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:26,820 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072072285] [2021-01-06 18:19:26,820 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:26,821 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:26,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:26,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:26,821 INFO L87 Difference]: Start difference. First operand 48511 states and 88086 transitions. Second operand 5 states. [2021-01-06 18:19:34,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:34,091 INFO L93 Difference]: Finished difference Result 137352 states and 249461 transitions. [2021-01-06 18:19:34,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:34,092 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 140 [2021-01-06 18:19:34,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:34,232 INFO L225 Difference]: With dead ends: 137352 [2021-01-06 18:19:34,232 INFO L226 Difference]: Without dead ends: 96901 [2021-01-06 18:19:34,269 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:19:34,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96901 states. [2021-01-06 18:19:42,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96901 to 96901. [2021-01-06 18:19:42,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96901 states. [2021-01-06 18:19:42,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96901 states to 96901 states and 175986 transitions. [2021-01-06 18:19:42,183 INFO L78 Accepts]: Start accepts. Automaton has 96901 states and 175986 transitions. Word has length 140 [2021-01-06 18:19:42,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:42,183 INFO L481 AbstractCegarLoop]: Abstraction has 96901 states and 175986 transitions. [2021-01-06 18:19:42,183 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:42,183 INFO L276 IsEmpty]: Start isEmpty. Operand 96901 states and 175986 transitions. [2021-01-06 18:19:42,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-01-06 18:19:42,205 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:42,205 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:42,205 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-01-06 18:19:42,205 INFO L429 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:42,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:42,205 INFO L82 PathProgramCache]: Analyzing trace with hash 428026876, now seen corresponding path program 1 times [2021-01-06 18:19:42,206 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:42,206 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908852185] [2021-01-06 18:19:42,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:42,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:42,304 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:42,305 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1908852185] [2021-01-06 18:19:42,305 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:42,305 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:19:42,305 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533054859] [2021-01-06 18:19:42,306 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:19:42,306 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:42,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:19:42,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:19:42,306 INFO L87 Difference]: Start difference. First operand 96901 states and 175986 transitions. Second operand 6 states. [2021-01-06 18:20:00,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:00,544 INFO L93 Difference]: Finished difference Result 270759 states and 491302 transitions. [2021-01-06 18:20:00,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-01-06 18:20:00,544 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 140 [2021-01-06 18:20:00,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:00,866 INFO L225 Difference]: With dead ends: 270759 [2021-01-06 18:20:00,866 INFO L226 Difference]: Without dead ends: 179736 [2021-01-06 18:20:00,946 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2021-01-06 18:20:01,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179736 states. [2021-01-06 18:20:12,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179736 to 130643. [2021-01-06 18:20:12,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130643 states. [2021-01-06 18:20:12,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130643 states to 130643 states and 237970 transitions. [2021-01-06 18:20:12,508 INFO L78 Accepts]: Start accepts. Automaton has 130643 states and 237970 transitions. Word has length 140 [2021-01-06 18:20:12,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:12,509 INFO L481 AbstractCegarLoop]: Abstraction has 130643 states and 237970 transitions. [2021-01-06 18:20:12,509 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:20:12,509 INFO L276 IsEmpty]: Start isEmpty. Operand 130643 states and 237970 transitions. [2021-01-06 18:20:12,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-01-06 18:20:12,526 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:12,526 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:12,527 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2021-01-06 18:20:12,527 INFO L429 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:12,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:12,527 INFO L82 PathProgramCache]: Analyzing trace with hash -1344246038, now seen corresponding path program 1 times [2021-01-06 18:20:12,527 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:12,527 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [442564036] [2021-01-06 18:20:12,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:12,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:12,874 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-01-06 18:20:12,875 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [442564036] [2021-01-06 18:20:12,875 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:12,875 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:12,875 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [536679007] [2021-01-06 18:20:12,875 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:12,875 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:12,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:12,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:12,876 INFO L87 Difference]: Start difference. First operand 130643 states and 237970 transitions. Second operand 5 states. [2021-01-06 18:20:35,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:35,851 INFO L93 Difference]: Finished difference Result 416956 states and 759892 transitions. [2021-01-06 18:20:35,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:35,852 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2021-01-06 18:20:35,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:36,639 INFO L225 Difference]: With dead ends: 416956 [2021-01-06 18:20:36,639 INFO L226 Difference]: Without dead ends: 302357 [2021-01-06 18:20:36,766 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:20:36,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 302357 states.