/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/product-lines/elevator_spec1_product20.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 18:17:36,325 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 18:17:36,329 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 18:17:36,393 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 18:17:36,393 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 18:17:36,398 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 18:17:36,401 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 18:17:36,407 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 18:17:36,411 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 18:17:36,418 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 18:17:36,422 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 18:17:36,424 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 18:17:36,425 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 18:17:36,428 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 18:17:36,431 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 18:17:36,433 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 18:17:36,434 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 18:17:36,438 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 18:17:36,447 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 18:17:36,455 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 18:17:36,457 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 18:17:36,459 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 18:17:36,461 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 18:17:36,464 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 18:17:36,473 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 18:17:36,474 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 18:17:36,474 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 18:17:36,477 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 18:17:36,478 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 18:17:36,479 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 18:17:36,480 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 18:17:36,481 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 18:17:36,484 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 18:17:36,485 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 18:17:36,486 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 18:17:36,487 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 18:17:36,488 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 18:17:36,490 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 18:17:36,490 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 18:17:36,492 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 18:17:36,495 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 18:17:36,497 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 18:17:36,524 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 18:17:36,524 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 18:17:36,526 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 18:17:36,526 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 18:17:36,527 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 18:17:36,527 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 18:17:36,527 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 18:17:36,528 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 18:17:36,528 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 18:17:36,528 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 18:17:36,528 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 18:17:36,529 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 18:17:36,529 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 18:17:36,529 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 18:17:36,530 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 18:17:36,530 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 18:17:36,530 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 18:17:36,530 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:17:36,531 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 18:17:36,531 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 18:17:36,531 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 18:17:36,531 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 18:17:36,532 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 18:17:36,532 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 18:17:36,532 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 18:17:36,532 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 18:17:36,939 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 18:17:36,973 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 18:17:36,976 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 18:17:36,978 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 18:17:36,979 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 18:17:36,980 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/product-lines/elevator_spec1_product20.cil.c [2021-01-06 18:17:37,058 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/8e96073cb/4ab1045013db414195c2868f0142200e/FLAG0eca43dfd [2021-01-06 18:17:37,988 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 18:17:37,989 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product20.cil.c [2021-01-06 18:17:38,034 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/8e96073cb/4ab1045013db414195c2868f0142200e/FLAG0eca43dfd [2021-01-06 18:17:38,122 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/8e96073cb/4ab1045013db414195c2868f0142200e [2021-01-06 18:17:38,127 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 18:17:38,131 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 18:17:38,135 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 18:17:38,135 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 18:17:38,140 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 18:17:38,141 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:17:38" (1/1) ... [2021-01-06 18:17:38,143 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1d5d3a81 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:38, skipping insertion in model container [2021-01-06 18:17:38,143 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:17:38" (1/1) ... [2021-01-06 18:17:38,153 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 18:17:38,258 INFO L178 MainTranslator]: Built tables and reachable declarations left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp2~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] [2021-01-06 18:17:38,969 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product20.cil.c[45090,45103] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~28,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] [2021-01-06 18:17:39,069 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:17:39,083 INFO L203 MainTranslator]: Completed pre-run left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~blocked~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp2~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] [2021-01-06 18:17:39,256 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product20.cil.c[45090,45103] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~28,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] [2021-01-06 18:17:39,300 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:17:39,367 INFO L208 MainTranslator]: Completed translation [2021-01-06 18:17:39,368 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39 WrapperNode [2021-01-06 18:17:39,368 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 18:17:39,369 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 18:17:39,370 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 18:17:39,370 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 18:17:39,378 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... [2021-01-06 18:17:39,414 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... [2021-01-06 18:17:39,736 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 18:17:39,740 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 18:17:39,740 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 18:17:39,740 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 18:17:39,751 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... [2021-01-06 18:17:39,751 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... [2021-01-06 18:17:39,809 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... [2021-01-06 18:17:39,809 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... [2021-01-06 18:17:40,106 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... [2021-01-06 18:17:40,296 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... [2021-01-06 18:17:40,332 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... [2021-01-06 18:17:40,387 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 18:17:40,389 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 18:17:40,389 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 18:17:40,389 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 18:17:40,390 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:17:40,486 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 18:17:40,486 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 18:17:40,486 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 18:17:40,486 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 18:17:50,139 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 18:17:50,140 INFO L299 CfgBuilder]: Removed 1113 assume(true) statements. [2021-01-06 18:17:50,147 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:17:50 BoogieIcfgContainer [2021-01-06 18:17:50,147 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 18:17:50,149 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 18:17:50,149 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 18:17:50,153 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 18:17:50,154 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 06:17:38" (1/3) ... [2021-01-06 18:17:50,154 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7139723e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:17:50, skipping insertion in model container [2021-01-06 18:17:50,155 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:17:39" (2/3) ... [2021-01-06 18:17:50,155 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7139723e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:17:50, skipping insertion in model container [2021-01-06 18:17:50,155 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:17:50" (3/3) ... [2021-01-06 18:17:50,157 INFO L111 eAbstractionObserver]: Analyzing ICFG elevator_spec1_product20.cil.c [2021-01-06 18:17:50,164 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 18:17:50,172 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2021-01-06 18:17:50,193 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-06 18:17:50,239 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 18:17:50,239 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 18:17:50,239 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 18:17:50,239 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 18:17:50,240 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 18:17:50,240 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 18:17:50,240 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 18:17:50,240 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 18:17:50,327 INFO L276 IsEmpty]: Start isEmpty. Operand 4767 states. [2021-01-06 18:17:50,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-01-06 18:17:50,340 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:50,341 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:50,342 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:50,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:50,348 INFO L82 PathProgramCache]: Analyzing trace with hash 120180799, now seen corresponding path program 1 times [2021-01-06 18:17:50,359 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:50,360 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [448348626] [2021-01-06 18:17:50,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:50,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:50,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:50,870 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [448348626] [2021-01-06 18:17:50,872 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:50,872 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:17:50,873 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [143353115] [2021-01-06 18:17:50,878 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:17:50,878 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:50,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:17:50,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:17:50,896 INFO L87 Difference]: Start difference. First operand 4767 states. Second operand 3 states. [2021-01-06 18:17:51,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:51,450 INFO L93 Difference]: Finished difference Result 14221 states and 26831 transitions. [2021-01-06 18:17:51,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:17:51,452 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2021-01-06 18:17:51,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:51,554 INFO L225 Difference]: With dead ends: 14221 [2021-01-06 18:17:51,555 INFO L226 Difference]: Without dead ends: 9459 [2021-01-06 18:17:51,576 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:17:51,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9459 states. [2021-01-06 18:17:51,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9459 to 4763. [2021-01-06 18:17:51,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4763 states. [2021-01-06 18:17:51,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4763 states to 4763 states and 8974 transitions. [2021-01-06 18:17:51,928 INFO L78 Accepts]: Start accepts. Automaton has 4763 states and 8974 transitions. Word has length 36 [2021-01-06 18:17:51,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:51,929 INFO L481 AbstractCegarLoop]: Abstraction has 4763 states and 8974 transitions. [2021-01-06 18:17:51,929 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:17:51,929 INFO L276 IsEmpty]: Start isEmpty. Operand 4763 states and 8974 transitions. [2021-01-06 18:17:51,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2021-01-06 18:17:51,939 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:51,939 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:51,940 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 18:17:51,941 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:51,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:51,942 INFO L82 PathProgramCache]: Analyzing trace with hash 808650680, now seen corresponding path program 1 times [2021-01-06 18:17:51,943 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:51,943 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383921032] [2021-01-06 18:17:51,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:52,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:52,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:52,180 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383921032] [2021-01-06 18:17:52,181 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:52,181 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:17:52,182 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522791957] [2021-01-06 18:17:52,184 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:17:52,184 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:52,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:17:52,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:17:52,186 INFO L87 Difference]: Start difference. First operand 4763 states and 8974 transitions. Second operand 6 states. [2021-01-06 18:17:53,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:53,328 INFO L93 Difference]: Finished difference Result 18827 states and 35493 transitions. [2021-01-06 18:17:53,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:17:53,328 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2021-01-06 18:17:53,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:53,438 INFO L225 Difference]: With dead ends: 18827 [2021-01-06 18:17:53,438 INFO L226 Difference]: Without dead ends: 14107 [2021-01-06 18:17:53,452 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2021-01-06 18:17:53,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14107 states. [2021-01-06 18:17:53,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14107 to 4759. [2021-01-06 18:17:53,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4759 states. [2021-01-06 18:17:53,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4759 states to 4759 states and 8963 transitions. [2021-01-06 18:17:53,732 INFO L78 Accepts]: Start accepts. Automaton has 4759 states and 8963 transitions. Word has length 43 [2021-01-06 18:17:53,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:53,733 INFO L481 AbstractCegarLoop]: Abstraction has 4759 states and 8963 transitions. [2021-01-06 18:17:53,733 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:17:53,733 INFO L276 IsEmpty]: Start isEmpty. Operand 4759 states and 8963 transitions. [2021-01-06 18:17:53,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2021-01-06 18:17:53,736 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:53,737 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:53,737 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 18:17:53,737 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:53,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:53,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1847887803, now seen corresponding path program 1 times [2021-01-06 18:17:53,738 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:53,738 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081950323] [2021-01-06 18:17:53,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:53,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:53,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:53,868 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081950323] [2021-01-06 18:17:53,868 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:53,868 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:53,869 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625362628] [2021-01-06 18:17:53,870 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:53,870 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:53,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:53,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:53,872 INFO L87 Difference]: Start difference. First operand 4759 states and 8963 transitions. Second operand 4 states. [2021-01-06 18:17:54,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:54,649 INFO L93 Difference]: Finished difference Result 14165 states and 26698 transitions. [2021-01-06 18:17:54,649 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:54,650 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 45 [2021-01-06 18:17:54,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:54,677 INFO L225 Difference]: With dead ends: 14165 [2021-01-06 18:17:54,677 INFO L226 Difference]: Without dead ends: 9449 [2021-01-06 18:17:54,687 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:54,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9449 states. [2021-01-06 18:17:54,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9449 to 4759. [2021-01-06 18:17:54,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4759 states. [2021-01-06 18:17:54,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4759 states to 4759 states and 8954 transitions. [2021-01-06 18:17:54,965 INFO L78 Accepts]: Start accepts. Automaton has 4759 states and 8954 transitions. Word has length 45 [2021-01-06 18:17:54,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:54,970 INFO L481 AbstractCegarLoop]: Abstraction has 4759 states and 8954 transitions. [2021-01-06 18:17:54,970 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:54,971 INFO L276 IsEmpty]: Start isEmpty. Operand 4759 states and 8954 transitions. [2021-01-06 18:17:54,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2021-01-06 18:17:54,975 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:54,975 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:54,975 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 18:17:54,976 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:54,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:54,976 INFO L82 PathProgramCache]: Analyzing trace with hash 52932370, now seen corresponding path program 1 times [2021-01-06 18:17:54,978 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:54,978 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818488570] [2021-01-06 18:17:54,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:55,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:55,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:55,077 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [818488570] [2021-01-06 18:17:55,078 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:55,078 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:55,079 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1326809952] [2021-01-06 18:17:55,079 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:55,079 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:55,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:55,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:55,082 INFO L87 Difference]: Start difference. First operand 4759 states and 8954 transitions. Second operand 4 states. [2021-01-06 18:17:55,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:55,759 INFO L93 Difference]: Finished difference Result 14165 states and 26680 transitions. [2021-01-06 18:17:55,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:55,760 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2021-01-06 18:17:55,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:55,793 INFO L225 Difference]: With dead ends: 14165 [2021-01-06 18:17:55,794 INFO L226 Difference]: Without dead ends: 9449 [2021-01-06 18:17:55,807 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:55,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9449 states. [2021-01-06 18:17:56,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9449 to 4759. [2021-01-06 18:17:56,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4759 states. [2021-01-06 18:17:56,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4759 states to 4759 states and 8945 transitions. [2021-01-06 18:17:56,204 INFO L78 Accepts]: Start accepts. Automaton has 4759 states and 8945 transitions. Word has length 47 [2021-01-06 18:17:56,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:56,205 INFO L481 AbstractCegarLoop]: Abstraction has 4759 states and 8945 transitions. [2021-01-06 18:17:56,205 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:56,205 INFO L276 IsEmpty]: Start isEmpty. Operand 4759 states and 8945 transitions. [2021-01-06 18:17:56,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-01-06 18:17:56,206 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:56,206 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:56,206 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 18:17:56,206 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:56,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:56,207 INFO L82 PathProgramCache]: Analyzing trace with hash 1397813317, now seen corresponding path program 1 times [2021-01-06 18:17:56,207 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:56,207 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557766126] [2021-01-06 18:17:56,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:56,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:56,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:56,309 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1557766126] [2021-01-06 18:17:56,309 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:56,309 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:56,309 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439522859] [2021-01-06 18:17:56,310 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:56,310 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:56,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:56,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:56,312 INFO L87 Difference]: Start difference. First operand 4759 states and 8945 transitions. Second operand 4 states. [2021-01-06 18:17:57,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:57,432 INFO L93 Difference]: Finished difference Result 23485 states and 44232 transitions. [2021-01-06 18:17:57,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:57,435 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2021-01-06 18:17:57,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:57,494 INFO L225 Difference]: With dead ends: 23485 [2021-01-06 18:17:57,494 INFO L226 Difference]: Without dead ends: 18769 [2021-01-06 18:17:57,507 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:57,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18769 states. [2021-01-06 18:17:57,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18769 to 4759. [2021-01-06 18:17:57,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4759 states. [2021-01-06 18:17:57,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4759 states to 4759 states and 8941 transitions. [2021-01-06 18:17:57,844 INFO L78 Accepts]: Start accepts. Automaton has 4759 states and 8941 transitions. Word has length 49 [2021-01-06 18:17:57,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:57,846 INFO L481 AbstractCegarLoop]: Abstraction has 4759 states and 8941 transitions. [2021-01-06 18:17:57,846 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:57,846 INFO L276 IsEmpty]: Start isEmpty. Operand 4759 states and 8941 transitions. [2021-01-06 18:17:57,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-01-06 18:17:57,849 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:57,849 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:57,849 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 18:17:57,850 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:57,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:57,850 INFO L82 PathProgramCache]: Analyzing trace with hash -1465643835, now seen corresponding path program 1 times [2021-01-06 18:17:57,851 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:57,851 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498687837] [2021-01-06 18:17:57,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:57,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:57,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:57,962 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [498687837] [2021-01-06 18:17:57,962 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:57,962 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:57,962 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739226477] [2021-01-06 18:17:57,964 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:57,964 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:57,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:57,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:57,965 INFO L87 Difference]: Start difference. First operand 4759 states and 8941 transitions. Second operand 4 states. [2021-01-06 18:17:58,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:58,716 INFO L93 Difference]: Finished difference Result 18804 states and 35407 transitions. [2021-01-06 18:17:58,716 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:58,716 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2021-01-06 18:17:58,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:58,755 INFO L225 Difference]: With dead ends: 18804 [2021-01-06 18:17:58,755 INFO L226 Difference]: Without dead ends: 14067 [2021-01-06 18:17:58,768 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:58,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14067 states. [2021-01-06 18:17:59,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14067 to 4741. [2021-01-06 18:17:59,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4741 states. [2021-01-06 18:17:59,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4741 states to 4741 states and 8910 transitions. [2021-01-06 18:17:59,014 INFO L78 Accepts]: Start accepts. Automaton has 4741 states and 8910 transitions. Word has length 49 [2021-01-06 18:17:59,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:17:59,014 INFO L481 AbstractCegarLoop]: Abstraction has 4741 states and 8910 transitions. [2021-01-06 18:17:59,014 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:17:59,014 INFO L276 IsEmpty]: Start isEmpty. Operand 4741 states and 8910 transitions. [2021-01-06 18:17:59,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2021-01-06 18:17:59,015 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:17:59,016 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:17:59,016 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 18:17:59,016 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:17:59,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:17:59,021 INFO L82 PathProgramCache]: Analyzing trace with hash -613459094, now seen corresponding path program 1 times [2021-01-06 18:17:59,022 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:17:59,022 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1403695597] [2021-01-06 18:17:59,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:17:59,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:17:59,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:17:59,099 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1403695597] [2021-01-06 18:17:59,099 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:17:59,100 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:17:59,100 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [785564034] [2021-01-06 18:17:59,101 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:17:59,101 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:17:59,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:17:59,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:17:59,102 INFO L87 Difference]: Start difference. First operand 4741 states and 8910 transitions. Second operand 4 states. [2021-01-06 18:17:59,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:17:59,756 INFO L93 Difference]: Finished difference Result 14129 states and 26593 transitions. [2021-01-06 18:17:59,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:17:59,757 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 50 [2021-01-06 18:17:59,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:17:59,785 INFO L225 Difference]: With dead ends: 14129 [2021-01-06 18:17:59,785 INFO L226 Difference]: Without dead ends: 9410 [2021-01-06 18:17:59,796 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:17:59,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9410 states. [2021-01-06 18:18:00,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9410 to 4741. [2021-01-06 18:18:00,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4741 states. [2021-01-06 18:18:00,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4741 states to 4741 states and 8904 transitions. [2021-01-06 18:18:00,014 INFO L78 Accepts]: Start accepts. Automaton has 4741 states and 8904 transitions. Word has length 50 [2021-01-06 18:18:00,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:00,015 INFO L481 AbstractCegarLoop]: Abstraction has 4741 states and 8904 transitions. [2021-01-06 18:18:00,015 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:00,015 INFO L276 IsEmpty]: Start isEmpty. Operand 4741 states and 8904 transitions. [2021-01-06 18:18:00,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2021-01-06 18:18:00,016 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:00,016 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:00,016 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 18:18:00,016 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:00,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:00,017 INFO L82 PathProgramCache]: Analyzing trace with hash -1079362006, now seen corresponding path program 1 times [2021-01-06 18:18:00,017 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:00,017 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535813108] [2021-01-06 18:18:00,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:00,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:00,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:00,103 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [535813108] [2021-01-06 18:18:00,103 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:00,104 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:00,104 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910080468] [2021-01-06 18:18:00,104 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:00,104 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:00,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:00,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:00,105 INFO L87 Difference]: Start difference. First operand 4741 states and 8904 transitions. Second operand 4 states. [2021-01-06 18:18:00,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:00,655 INFO L93 Difference]: Finished difference Result 14129 states and 26581 transitions. [2021-01-06 18:18:00,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:00,656 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 51 [2021-01-06 18:18:00,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:00,682 INFO L225 Difference]: With dead ends: 14129 [2021-01-06 18:18:00,682 INFO L226 Difference]: Without dead ends: 9410 [2021-01-06 18:18:00,692 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:00,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9410 states. [2021-01-06 18:18:00,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9410 to 4741. [2021-01-06 18:18:00,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4741 states. [2021-01-06 18:18:01,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4741 states to 4741 states and 8898 transitions. [2021-01-06 18:18:01,005 INFO L78 Accepts]: Start accepts. Automaton has 4741 states and 8898 transitions. Word has length 51 [2021-01-06 18:18:01,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:01,007 INFO L481 AbstractCegarLoop]: Abstraction has 4741 states and 8898 transitions. [2021-01-06 18:18:01,007 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:01,007 INFO L276 IsEmpty]: Start isEmpty. Operand 4741 states and 8898 transitions. [2021-01-06 18:18:01,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2021-01-06 18:18:01,008 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:01,008 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:01,009 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 18:18:01,009 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:01,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:01,009 INFO L82 PathProgramCache]: Analyzing trace with hash -883450705, now seen corresponding path program 1 times [2021-01-06 18:18:01,010 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:01,010 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709114180] [2021-01-06 18:18:01,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:01,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:01,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:01,124 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709114180] [2021-01-06 18:18:01,125 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:01,125 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:18:01,125 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42382832] [2021-01-06 18:18:01,126 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:18:01,127 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:01,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:18:01,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:01,128 INFO L87 Difference]: Start difference. First operand 4741 states and 8898 transitions. Second operand 7 states. [2021-01-06 18:18:02,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:02,516 INFO L93 Difference]: Finished difference Result 23456 states and 44146 transitions. [2021-01-06 18:18:02,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:02,517 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2021-01-06 18:18:02,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:02,578 INFO L225 Difference]: With dead ends: 23456 [2021-01-06 18:18:02,579 INFO L226 Difference]: Without dead ends: 18743 [2021-01-06 18:18:02,593 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:18:02,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18743 states. [2021-01-06 18:18:02,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18743 to 4743. [2021-01-06 18:18:02,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4743 states. [2021-01-06 18:18:02,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4743 states to 4743 states and 8899 transitions. [2021-01-06 18:18:02,996 INFO L78 Accepts]: Start accepts. Automaton has 4743 states and 8899 transitions. Word has length 52 [2021-01-06 18:18:02,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:02,996 INFO L481 AbstractCegarLoop]: Abstraction has 4743 states and 8899 transitions. [2021-01-06 18:18:02,996 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:18:02,996 INFO L276 IsEmpty]: Start isEmpty. Operand 4743 states and 8899 transitions. [2021-01-06 18:18:02,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-01-06 18:18:02,998 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:02,998 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:02,999 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 18:18:02,999 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:02,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:02,999 INFO L82 PathProgramCache]: Analyzing trace with hash -505706860, now seen corresponding path program 1 times [2021-01-06 18:18:03,000 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:03,000 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98206104] [2021-01-06 18:18:03,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:03,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:03,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:03,093 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98206104] [2021-01-06 18:18:03,094 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:03,094 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:18:03,094 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034132706] [2021-01-06 18:18:03,095 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:18:03,095 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:03,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:18:03,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:03,096 INFO L87 Difference]: Start difference. First operand 4743 states and 8899 transitions. Second operand 7 states. [2021-01-06 18:18:04,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:04,300 INFO L93 Difference]: Finished difference Result 23448 states and 44125 transitions. [2021-01-06 18:18:04,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:04,300 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2021-01-06 18:18:04,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:04,353 INFO L225 Difference]: With dead ends: 23448 [2021-01-06 18:18:04,353 INFO L226 Difference]: Without dead ends: 18738 [2021-01-06 18:18:04,368 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:18:04,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18738 states. [2021-01-06 18:18:04,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18738 to 4748. [2021-01-06 18:18:04,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4748 states. [2021-01-06 18:18:04,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4748 states to 4748 states and 8907 transitions. [2021-01-06 18:18:04,833 INFO L78 Accepts]: Start accepts. Automaton has 4748 states and 8907 transitions. Word has length 54 [2021-01-06 18:18:04,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:04,833 INFO L481 AbstractCegarLoop]: Abstraction has 4748 states and 8907 transitions. [2021-01-06 18:18:04,834 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:18:04,835 INFO L276 IsEmpty]: Start isEmpty. Operand 4748 states and 8907 transitions. [2021-01-06 18:18:04,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-01-06 18:18:04,836 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:04,836 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:04,836 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 18:18:04,836 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:04,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:04,837 INFO L82 PathProgramCache]: Analyzing trace with hash -579597521, now seen corresponding path program 1 times [2021-01-06 18:18:04,837 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:04,837 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [719749296] [2021-01-06 18:18:04,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:04,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:04,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:04,896 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [719749296] [2021-01-06 18:18:04,897 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:04,897 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:04,897 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [713172270] [2021-01-06 18:18:04,897 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:18:04,898 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:04,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:18:04,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:04,900 INFO L87 Difference]: Start difference. First operand 4748 states and 8907 transitions. Second operand 3 states. [2021-01-06 18:18:05,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:05,107 INFO L93 Difference]: Finished difference Result 9438 states and 17732 transitions. [2021-01-06 18:18:05,107 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:18:05,107 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2021-01-06 18:18:05,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:05,120 INFO L225 Difference]: With dead ends: 9438 [2021-01-06 18:18:05,120 INFO L226 Difference]: Without dead ends: 4727 [2021-01-06 18:18:05,128 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:05,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4727 states. [2021-01-06 18:18:05,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4727 to 4727. [2021-01-06 18:18:05,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4727 states. [2021-01-06 18:18:05,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4727 states to 4727 states and 8871 transitions. [2021-01-06 18:18:05,362 INFO L78 Accepts]: Start accepts. Automaton has 4727 states and 8871 transitions. Word has length 56 [2021-01-06 18:18:05,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:05,362 INFO L481 AbstractCegarLoop]: Abstraction has 4727 states and 8871 transitions. [2021-01-06 18:18:05,362 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:18:05,362 INFO L276 IsEmpty]: Start isEmpty. Operand 4727 states and 8871 transitions. [2021-01-06 18:18:05,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-01-06 18:18:05,363 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:05,363 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:05,364 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 18:18:05,364 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:05,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:05,364 INFO L82 PathProgramCache]: Analyzing trace with hash 1207192682, now seen corresponding path program 1 times [2021-01-06 18:18:05,365 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:05,365 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745742542] [2021-01-06 18:18:05,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:05,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:05,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:05,444 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1745742542] [2021-01-06 18:18:05,444 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:05,444 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:05,444 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400314149] [2021-01-06 18:18:05,445 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:05,445 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:05,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:05,446 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:05,446 INFO L87 Difference]: Start difference. First operand 4727 states and 8871 transitions. Second operand 5 states. [2021-01-06 18:18:05,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:05,781 INFO L93 Difference]: Finished difference Result 9387 states and 17654 transitions. [2021-01-06 18:18:05,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:05,782 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2021-01-06 18:18:05,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:05,792 INFO L225 Difference]: With dead ends: 9387 [2021-01-06 18:18:05,793 INFO L226 Difference]: Without dead ends: 4721 [2021-01-06 18:18:05,800 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:05,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4721 states. [2021-01-06 18:18:06,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4721 to 4721. [2021-01-06 18:18:06,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4721 states. [2021-01-06 18:18:06,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4721 states to 4721 states and 8862 transitions. [2021-01-06 18:18:06,107 INFO L78 Accepts]: Start accepts. Automaton has 4721 states and 8862 transitions. Word has length 58 [2021-01-06 18:18:06,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:06,107 INFO L481 AbstractCegarLoop]: Abstraction has 4721 states and 8862 transitions. [2021-01-06 18:18:06,107 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:06,107 INFO L276 IsEmpty]: Start isEmpty. Operand 4721 states and 8862 transitions. [2021-01-06 18:18:06,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-01-06 18:18:06,111 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:06,112 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:06,112 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 18:18:06,112 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:06,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:06,113 INFO L82 PathProgramCache]: Analyzing trace with hash 500637674, now seen corresponding path program 1 times [2021-01-06 18:18:06,113 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:06,113 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579508299] [2021-01-06 18:18:06,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:06,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:06,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:06,204 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579508299] [2021-01-06 18:18:06,204 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:06,204 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:06,205 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [880533106] [2021-01-06 18:18:06,205 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:06,205 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:06,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:06,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:06,207 INFO L87 Difference]: Start difference. First operand 4721 states and 8862 transitions. Second operand 4 states. [2021-01-06 18:18:06,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:06,550 INFO L93 Difference]: Finished difference Result 9381 states and 17645 transitions. [2021-01-06 18:18:06,550 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:18:06,551 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2021-01-06 18:18:06,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:06,559 INFO L225 Difference]: With dead ends: 9381 [2021-01-06 18:18:06,559 INFO L226 Difference]: Without dead ends: 4707 [2021-01-06 18:18:06,577 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:06,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4707 states. [2021-01-06 18:18:06,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4707 to 4707. [2021-01-06 18:18:06,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4707 states. [2021-01-06 18:18:06,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4707 states to 4707 states and 8841 transitions. [2021-01-06 18:18:06,906 INFO L78 Accepts]: Start accepts. Automaton has 4707 states and 8841 transitions. Word has length 58 [2021-01-06 18:18:06,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:06,908 INFO L481 AbstractCegarLoop]: Abstraction has 4707 states and 8841 transitions. [2021-01-06 18:18:06,908 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:06,908 INFO L276 IsEmpty]: Start isEmpty. Operand 4707 states and 8841 transitions. [2021-01-06 18:18:06,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2021-01-06 18:18:06,913 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:06,913 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:06,913 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 18:18:06,914 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:06,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:06,914 INFO L82 PathProgramCache]: Analyzing trace with hash -999754595, now seen corresponding path program 1 times [2021-01-06 18:18:06,914 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:06,915 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [473949485] [2021-01-06 18:18:06,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:06,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:06,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:06,996 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [473949485] [2021-01-06 18:18:06,997 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:06,997 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:18:06,997 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [616762069] [2021-01-06 18:18:06,997 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:18:06,997 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:06,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:18:06,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:06,998 INFO L87 Difference]: Start difference. First operand 4707 states and 8841 transitions. Second operand 6 states. [2021-01-06 18:18:07,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:07,327 INFO L93 Difference]: Finished difference Result 9381 states and 17640 transitions. [2021-01-06 18:18:07,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:07,328 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2021-01-06 18:18:07,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:07,334 INFO L225 Difference]: With dead ends: 9381 [2021-01-06 18:18:07,334 INFO L226 Difference]: Without dead ends: 4727 [2021-01-06 18:18:07,339 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:18:07,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4727 states. [2021-01-06 18:18:07,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4727 to 4707. [2021-01-06 18:18:07,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4707 states. [2021-01-06 18:18:07,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4707 states to 4707 states and 8840 transitions. [2021-01-06 18:18:07,572 INFO L78 Accepts]: Start accepts. Automaton has 4707 states and 8840 transitions. Word has length 59 [2021-01-06 18:18:07,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:07,572 INFO L481 AbstractCegarLoop]: Abstraction has 4707 states and 8840 transitions. [2021-01-06 18:18:07,573 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:18:07,573 INFO L276 IsEmpty]: Start isEmpty. Operand 4707 states and 8840 transitions. [2021-01-06 18:18:07,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-01-06 18:18:07,574 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:07,574 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:07,574 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 18:18:07,574 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:07,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:07,575 INFO L82 PathProgramCache]: Analyzing trace with hash -1314151215, now seen corresponding path program 1 times [2021-01-06 18:18:07,575 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:07,575 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [222338110] [2021-01-06 18:18:07,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:07,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:07,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:07,650 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [222338110] [2021-01-06 18:18:07,651 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:07,651 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:18:07,651 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [36444814] [2021-01-06 18:18:07,651 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:18:07,651 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:07,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:18:07,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:07,652 INFO L87 Difference]: Start difference. First operand 4707 states and 8840 transitions. Second operand 6 states. [2021-01-06 18:18:07,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:07,990 INFO L93 Difference]: Finished difference Result 9371 states and 17621 transitions. [2021-01-06 18:18:07,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:07,991 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2021-01-06 18:18:07,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:07,997 INFO L225 Difference]: With dead ends: 9371 [2021-01-06 18:18:07,997 INFO L226 Difference]: Without dead ends: 4722 [2021-01-06 18:18:08,002 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:18:08,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4722 states. [2021-01-06 18:18:08,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4722 to 4707. [2021-01-06 18:18:08,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4707 states. [2021-01-06 18:18:08,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4707 states to 4707 states and 8839 transitions. [2021-01-06 18:18:08,206 INFO L78 Accepts]: Start accepts. Automaton has 4707 states and 8839 transitions. Word has length 60 [2021-01-06 18:18:08,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:08,206 INFO L481 AbstractCegarLoop]: Abstraction has 4707 states and 8839 transitions. [2021-01-06 18:18:08,206 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:18:08,206 INFO L276 IsEmpty]: Start isEmpty. Operand 4707 states and 8839 transitions. [2021-01-06 18:18:08,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 18:18:08,207 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:08,207 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:08,207 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 18:18:08,207 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:08,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:08,208 INFO L82 PathProgramCache]: Analyzing trace with hash 1263226962, now seen corresponding path program 1 times [2021-01-06 18:18:08,208 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:08,208 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665373438] [2021-01-06 18:18:08,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:08,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:08,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:08,285 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665373438] [2021-01-06 18:18:08,285 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:08,285 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:18:08,285 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864206761] [2021-01-06 18:18:08,285 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:18:08,286 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:08,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:18:08,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:08,286 INFO L87 Difference]: Start difference. First operand 4707 states and 8839 transitions. Second operand 3 states. [2021-01-06 18:18:08,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:08,837 INFO L93 Difference]: Finished difference Result 11015 states and 20737 transitions. [2021-01-06 18:18:08,838 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:18:08,838 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-01-06 18:18:08,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:08,851 INFO L225 Difference]: With dead ends: 11015 [2021-01-06 18:18:08,851 INFO L226 Difference]: Without dead ends: 8636 [2021-01-06 18:18:08,857 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:08,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8636 states. [2021-01-06 18:18:09,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8636 to 6657. [2021-01-06 18:18:09,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6657 states. [2021-01-06 18:18:09,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6657 states to 6657 states and 12511 transitions. [2021-01-06 18:18:09,302 INFO L78 Accepts]: Start accepts. Automaton has 6657 states and 12511 transitions. Word has length 61 [2021-01-06 18:18:09,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:09,303 INFO L481 AbstractCegarLoop]: Abstraction has 6657 states and 12511 transitions. [2021-01-06 18:18:09,303 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:18:09,303 INFO L276 IsEmpty]: Start isEmpty. Operand 6657 states and 12511 transitions. [2021-01-06 18:18:09,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-01-06 18:18:09,307 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:09,307 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:09,308 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 18:18:09,308 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:09,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:09,308 INFO L82 PathProgramCache]: Analyzing trace with hash -1157513391, now seen corresponding path program 1 times [2021-01-06 18:18:09,308 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:09,309 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497272104] [2021-01-06 18:18:09,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:09,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:09,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:09,392 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497272104] [2021-01-06 18:18:09,393 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:09,393 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:09,393 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [646842779] [2021-01-06 18:18:09,394 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:09,394 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:09,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:09,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:09,395 INFO L87 Difference]: Start difference. First operand 6657 states and 12511 transitions. Second operand 5 states. [2021-01-06 18:18:09,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:09,978 INFO L93 Difference]: Finished difference Result 13241 states and 24726 transitions. [2021-01-06 18:18:09,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:18:09,978 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2021-01-06 18:18:09,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:09,987 INFO L225 Difference]: With dead ends: 13241 [2021-01-06 18:18:09,987 INFO L226 Difference]: Without dead ends: 7778 [2021-01-06 18:18:09,993 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:18:10,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7778 states. [2021-01-06 18:18:10,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7778 to 5492. [2021-01-06 18:18:10,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5492 states. [2021-01-06 18:18:10,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5492 states to 5492 states and 10253 transitions. [2021-01-06 18:18:10,285 INFO L78 Accepts]: Start accepts. Automaton has 5492 states and 10253 transitions. Word has length 80 [2021-01-06 18:18:10,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:10,286 INFO L481 AbstractCegarLoop]: Abstraction has 5492 states and 10253 transitions. [2021-01-06 18:18:10,286 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:10,286 INFO L276 IsEmpty]: Start isEmpty. Operand 5492 states and 10253 transitions. [2021-01-06 18:18:10,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-01-06 18:18:10,289 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:10,289 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:10,289 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 18:18:10,289 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:10,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:10,290 INFO L82 PathProgramCache]: Analyzing trace with hash 1737547905, now seen corresponding path program 1 times [2021-01-06 18:18:10,290 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:10,290 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361905771] [2021-01-06 18:18:10,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:10,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:10,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:10,369 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361905771] [2021-01-06 18:18:10,369 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:10,369 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:10,369 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1871869585] [2021-01-06 18:18:10,370 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:18:10,370 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:10,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:18:10,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:10,370 INFO L87 Difference]: Start difference. First operand 5492 states and 10253 transitions. Second operand 6 states. [2021-01-06 18:18:14,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:14,727 INFO L93 Difference]: Finished difference Result 37141 states and 69317 transitions. [2021-01-06 18:18:14,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:18:14,727 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2021-01-06 18:18:14,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:14,768 INFO L225 Difference]: With dead ends: 37141 [2021-01-06 18:18:14,768 INFO L226 Difference]: Without dead ends: 31734 [2021-01-06 18:18:14,779 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:18:14,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31734 states. [2021-01-06 18:18:15,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31734 to 5513. [2021-01-06 18:18:15,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5513 states. [2021-01-06 18:18:15,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5513 states to 5513 states and 10274 transitions. [2021-01-06 18:18:15,182 INFO L78 Accepts]: Start accepts. Automaton has 5513 states and 10274 transitions. Word has length 81 [2021-01-06 18:18:15,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:15,182 INFO L481 AbstractCegarLoop]: Abstraction has 5513 states and 10274 transitions. [2021-01-06 18:18:15,182 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:18:15,182 INFO L276 IsEmpty]: Start isEmpty. Operand 5513 states and 10274 transitions. [2021-01-06 18:18:15,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-01-06 18:18:15,184 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:15,184 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:15,184 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 18:18:15,184 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:15,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:15,185 INFO L82 PathProgramCache]: Analyzing trace with hash 1823236591, now seen corresponding path program 1 times [2021-01-06 18:18:15,185 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:15,185 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852110363] [2021-01-06 18:18:15,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:15,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:15,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:15,279 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852110363] [2021-01-06 18:18:15,279 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:15,279 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:18:15,279 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1739776714] [2021-01-06 18:18:15,280 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:18:15,280 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:15,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:18:15,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:15,281 INFO L87 Difference]: Start difference. First operand 5513 states and 10274 transitions. Second operand 7 states. [2021-01-06 18:18:20,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:20,006 INFO L93 Difference]: Finished difference Result 21454 states and 39974 transitions. [2021-01-06 18:18:20,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-01-06 18:18:20,007 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 82 [2021-01-06 18:18:20,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:20,027 INFO L225 Difference]: With dead ends: 21454 [2021-01-06 18:18:20,027 INFO L226 Difference]: Without dead ends: 16013 [2021-01-06 18:18:20,035 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2021-01-06 18:18:20,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16013 states. [2021-01-06 18:18:20,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16013 to 7112. [2021-01-06 18:18:20,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7112 states. [2021-01-06 18:18:20,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7112 states to 7112 states and 12997 transitions. [2021-01-06 18:18:20,470 INFO L78 Accepts]: Start accepts. Automaton has 7112 states and 12997 transitions. Word has length 82 [2021-01-06 18:18:20,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:20,470 INFO L481 AbstractCegarLoop]: Abstraction has 7112 states and 12997 transitions. [2021-01-06 18:18:20,470 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:18:20,470 INFO L276 IsEmpty]: Start isEmpty. Operand 7112 states and 12997 transitions. [2021-01-06 18:18:20,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2021-01-06 18:18:20,472 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:20,472 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:20,472 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 18:18:20,472 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:20,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:20,472 INFO L82 PathProgramCache]: Analyzing trace with hash -1870240361, now seen corresponding path program 1 times [2021-01-06 18:18:20,473 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:20,473 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574801070] [2021-01-06 18:18:20,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:20,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:20,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:20,568 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1574801070] [2021-01-06 18:18:20,569 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:20,569 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:20,569 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1121545519] [2021-01-06 18:18:20,569 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:20,569 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:20,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:20,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:20,570 INFO L87 Difference]: Start difference. First operand 7112 states and 12997 transitions. Second operand 4 states. [2021-01-06 18:18:22,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:22,256 INFO L93 Difference]: Finished difference Result 19516 states and 35963 transitions. [2021-01-06 18:18:22,257 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:18:22,257 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 83 [2021-01-06 18:18:22,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:22,270 INFO L225 Difference]: With dead ends: 19516 [2021-01-06 18:18:22,271 INFO L226 Difference]: Without dead ends: 12474 [2021-01-06 18:18:22,276 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:22,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12474 states. [2021-01-06 18:18:22,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12474 to 7112. [2021-01-06 18:18:22,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7112 states. [2021-01-06 18:18:22,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7112 states to 7112 states and 12972 transitions. [2021-01-06 18:18:22,678 INFO L78 Accepts]: Start accepts. Automaton has 7112 states and 12972 transitions. Word has length 83 [2021-01-06 18:18:22,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:22,679 INFO L481 AbstractCegarLoop]: Abstraction has 7112 states and 12972 transitions. [2021-01-06 18:18:22,679 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:22,679 INFO L276 IsEmpty]: Start isEmpty. Operand 7112 states and 12972 transitions. [2021-01-06 18:18:22,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2021-01-06 18:18:22,681 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:22,681 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:22,681 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 18:18:22,681 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:22,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:22,682 INFO L82 PathProgramCache]: Analyzing trace with hash 369307767, now seen corresponding path program 1 times [2021-01-06 18:18:22,682 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:22,682 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927745943] [2021-01-06 18:18:22,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:22,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:22,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:22,782 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [927745943] [2021-01-06 18:18:22,782 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:22,782 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:22,782 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [820601734] [2021-01-06 18:18:22,783 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:22,783 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:22,783 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:22,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:22,784 INFO L87 Difference]: Start difference. First operand 7112 states and 12972 transitions. Second operand 4 states. [2021-01-06 18:18:24,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:24,544 INFO L93 Difference]: Finished difference Result 19516 states and 35914 transitions. [2021-01-06 18:18:24,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:18:24,545 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 85 [2021-01-06 18:18:24,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:24,560 INFO L225 Difference]: With dead ends: 19516 [2021-01-06 18:18:24,561 INFO L226 Difference]: Without dead ends: 12474 [2021-01-06 18:18:24,569 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:24,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12474 states. [2021-01-06 18:18:24,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12474 to 7112. [2021-01-06 18:18:24,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7112 states. [2021-01-06 18:18:24,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7112 states to 7112 states and 12947 transitions. [2021-01-06 18:18:24,988 INFO L78 Accepts]: Start accepts. Automaton has 7112 states and 12947 transitions. Word has length 85 [2021-01-06 18:18:24,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:24,989 INFO L481 AbstractCegarLoop]: Abstraction has 7112 states and 12947 transitions. [2021-01-06 18:18:24,989 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:24,989 INFO L276 IsEmpty]: Start isEmpty. Operand 7112 states and 12947 transitions. [2021-01-06 18:18:24,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2021-01-06 18:18:24,991 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:24,992 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:24,992 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 18:18:24,992 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:24,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:24,993 INFO L82 PathProgramCache]: Analyzing trace with hash 1801240119, now seen corresponding path program 1 times [2021-01-06 18:18:24,993 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:24,993 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158066632] [2021-01-06 18:18:24,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:25,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:25,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:25,069 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158066632] [2021-01-06 18:18:25,069 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:25,069 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:25,069 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449935134] [2021-01-06 18:18:25,069 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:18:25,070 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:25,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:18:25,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:25,070 INFO L87 Difference]: Start difference. First operand 7112 states and 12947 transitions. Second operand 6 states. [2021-01-06 18:18:33,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:33,171 INFO L93 Difference]: Finished difference Result 84216 states and 153983 transitions. [2021-01-06 18:18:33,173 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-01-06 18:18:33,173 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 87 [2021-01-06 18:18:33,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:33,269 INFO L225 Difference]: With dead ends: 84216 [2021-01-06 18:18:33,269 INFO L226 Difference]: Without dead ends: 77192 [2021-01-06 18:18:33,288 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2021-01-06 18:18:33,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77192 states. [2021-01-06 18:18:34,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77192 to 14176. [2021-01-06 18:18:34,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14176 states. [2021-01-06 18:18:34,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14176 states to 14176 states and 25838 transitions. [2021-01-06 18:18:34,772 INFO L78 Accepts]: Start accepts. Automaton has 14176 states and 25838 transitions. Word has length 87 [2021-01-06 18:18:34,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:34,772 INFO L481 AbstractCegarLoop]: Abstraction has 14176 states and 25838 transitions. [2021-01-06 18:18:34,772 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:18:34,772 INFO L276 IsEmpty]: Start isEmpty. Operand 14176 states and 25838 transitions. [2021-01-06 18:18:34,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-01-06 18:18:34,777 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:34,777 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:34,777 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 18:18:34,777 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:34,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:34,778 INFO L82 PathProgramCache]: Analyzing trace with hash 1488973642, now seen corresponding path program 1 times [2021-01-06 18:18:34,778 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:34,778 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996469522] [2021-01-06 18:18:34,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:34,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:34,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:34,857 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996469522] [2021-01-06 18:18:34,857 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:34,857 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:34,860 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201378332] [2021-01-06 18:18:34,860 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:18:34,860 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:34,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:18:34,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:34,861 INFO L87 Difference]: Start difference. First operand 14176 states and 25838 transitions. Second operand 6 states. [2021-01-06 18:18:48,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:48,107 INFO L93 Difference]: Finished difference Result 159011 states and 291399 transitions. [2021-01-06 18:18:48,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-01-06 18:18:48,108 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 88 [2021-01-06 18:18:48,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:48,342 INFO L225 Difference]: With dead ends: 159011 [2021-01-06 18:18:48,342 INFO L226 Difference]: Without dead ends: 144978 [2021-01-06 18:18:48,377 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2021-01-06 18:18:48,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144978 states. [2021-01-06 18:18:51,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144978 to 28144. [2021-01-06 18:18:51,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28144 states. [2021-01-06 18:18:51,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28144 states to 28144 states and 51365 transitions. [2021-01-06 18:18:51,207 INFO L78 Accepts]: Start accepts. Automaton has 28144 states and 51365 transitions. Word has length 88 [2021-01-06 18:18:51,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:51,208 INFO L481 AbstractCegarLoop]: Abstraction has 28144 states and 51365 transitions. [2021-01-06 18:18:51,208 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:18:51,208 INFO L276 IsEmpty]: Start isEmpty. Operand 28144 states and 51365 transitions. [2021-01-06 18:18:51,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-01-06 18:18:51,214 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:51,214 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:51,214 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 18:18:51,215 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:51,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:51,215 INFO L82 PathProgramCache]: Analyzing trace with hash 971379675, now seen corresponding path program 1 times [2021-01-06 18:18:51,215 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:51,215 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511264772] [2021-01-06 18:18:51,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:51,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:51,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:51,277 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511264772] [2021-01-06 18:18:51,278 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:51,278 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:51,278 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313845849] [2021-01-06 18:18:51,278 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:51,278 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:51,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:51,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:51,279 INFO L87 Difference]: Start difference. First operand 28144 states and 51365 transitions. Second operand 5 states. [2021-01-06 18:18:52,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:52,823 INFO L93 Difference]: Finished difference Result 49156 states and 89748 transitions. [2021-01-06 18:18:52,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:18:52,824 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2021-01-06 18:18:52,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:52,849 INFO L225 Difference]: With dead ends: 49156 [2021-01-06 18:18:52,849 INFO L226 Difference]: Without dead ends: 21114 [2021-01-06 18:18:53,017 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:18:53,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21114 states. [2021-01-06 18:18:54,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21114 to 21099. [2021-01-06 18:18:54,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21099 states. [2021-01-06 18:18:54,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21099 states to 21099 states and 38492 transitions. [2021-01-06 18:18:54,511 INFO L78 Accepts]: Start accepts. Automaton has 21099 states and 38492 transitions. Word has length 88 [2021-01-06 18:18:54,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:54,512 INFO L481 AbstractCegarLoop]: Abstraction has 21099 states and 38492 transitions. [2021-01-06 18:18:54,512 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:54,512 INFO L276 IsEmpty]: Start isEmpty. Operand 21099 states and 38492 transitions. [2021-01-06 18:18:54,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2021-01-06 18:18:54,517 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:54,517 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:54,517 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 18:18:54,517 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:54,518 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:54,518 INFO L82 PathProgramCache]: Analyzing trace with hash 133532183, now seen corresponding path program 1 times [2021-01-06 18:18:54,518 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:54,518 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139445020] [2021-01-06 18:18:54,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:54,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:54,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:54,594 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1139445020] [2021-01-06 18:18:54,595 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:54,595 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:54,595 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709674856] [2021-01-06 18:18:54,596 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:54,596 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:54,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:54,596 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:54,597 INFO L87 Difference]: Start difference. First operand 21099 states and 38492 transitions. Second operand 5 states. [2021-01-06 18:19:00,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:00,766 INFO L93 Difference]: Finished difference Result 84841 states and 154444 transitions. [2021-01-06 18:19:00,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:19:00,766 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2021-01-06 18:19:00,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:00,847 INFO L225 Difference]: With dead ends: 84841 [2021-01-06 18:19:00,847 INFO L226 Difference]: Without dead ends: 63932 [2021-01-06 18:19:00,864 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:19:00,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63932 states. [2021-01-06 18:19:02,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63932 to 21177. [2021-01-06 18:19:02,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21177 states. [2021-01-06 18:19:02,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21177 states to 21177 states and 38570 transitions. [2021-01-06 18:19:02,763 INFO L78 Accepts]: Start accepts. Automaton has 21177 states and 38570 transitions. Word has length 89 [2021-01-06 18:19:02,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:02,764 INFO L481 AbstractCegarLoop]: Abstraction has 21177 states and 38570 transitions. [2021-01-06 18:19:02,764 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:02,764 INFO L276 IsEmpty]: Start isEmpty. Operand 21177 states and 38570 transitions. [2021-01-06 18:19:02,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2021-01-06 18:19:02,768 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:02,769 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:02,769 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 18:19:02,769 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:02,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:02,770 INFO L82 PathProgramCache]: Analyzing trace with hash 1184496124, now seen corresponding path program 1 times [2021-01-06 18:19:02,770 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:02,770 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246028709] [2021-01-06 18:19:02,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:02,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:02,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:02,840 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [246028709] [2021-01-06 18:19:02,840 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:02,840 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:02,840 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1226610152] [2021-01-06 18:19:02,841 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:02,841 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:02,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:02,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:02,842 INFO L87 Difference]: Start difference. First operand 21177 states and 38570 transitions. Second operand 5 states. [2021-01-06 18:19:03,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:03,527 INFO L93 Difference]: Finished difference Result 28137 states and 51266 transitions. [2021-01-06 18:19:03,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:19:03,527 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2021-01-06 18:19:03,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:03,536 INFO L225 Difference]: With dead ends: 28137 [2021-01-06 18:19:03,536 INFO L226 Difference]: Without dead ends: 6990 [2021-01-06 18:19:03,549 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:19:03,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6990 states. [2021-01-06 18:19:04,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6990 to 6990. [2021-01-06 18:19:04,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6990 states. [2021-01-06 18:19:04,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6990 states to 6990 states and 12731 transitions. [2021-01-06 18:19:04,175 INFO L78 Accepts]: Start accepts. Automaton has 6990 states and 12731 transitions. Word has length 89 [2021-01-06 18:19:04,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:04,175 INFO L481 AbstractCegarLoop]: Abstraction has 6990 states and 12731 transitions. [2021-01-06 18:19:04,175 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:04,175 INFO L276 IsEmpty]: Start isEmpty. Operand 6990 states and 12731 transitions. [2021-01-06 18:19:04,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2021-01-06 18:19:04,177 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:04,177 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:04,177 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 18:19:04,177 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:04,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:04,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1700186788, now seen corresponding path program 1 times [2021-01-06 18:19:04,178 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:04,178 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375280270] [2021-01-06 18:19:04,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:04,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:04,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:04,237 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375280270] [2021-01-06 18:19:04,238 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:04,238 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:19:04,238 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2137112812] [2021-01-06 18:19:04,238 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:04,238 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:04,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:04,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:04,239 INFO L87 Difference]: Start difference. First operand 6990 states and 12731 transitions. Second operand 4 states. [2021-01-06 18:19:06,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:06,557 INFO L93 Difference]: Finished difference Result 16828 states and 30797 transitions. [2021-01-06 18:19:06,558 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:06,558 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 90 [2021-01-06 18:19:06,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:06,569 INFO L225 Difference]: With dead ends: 16828 [2021-01-06 18:19:06,569 INFO L226 Difference]: Without dead ends: 9904 [2021-01-06 18:19:06,576 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:06,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9904 states. [2021-01-06 18:19:07,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9904 to 6884. [2021-01-06 18:19:07,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6884 states. [2021-01-06 18:19:07,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6884 states to 6884 states and 12497 transitions. [2021-01-06 18:19:07,060 INFO L78 Accepts]: Start accepts. Automaton has 6884 states and 12497 transitions. Word has length 90 [2021-01-06 18:19:07,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:07,060 INFO L481 AbstractCegarLoop]: Abstraction has 6884 states and 12497 transitions. [2021-01-06 18:19:07,061 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:07,061 INFO L276 IsEmpty]: Start isEmpty. Operand 6884 states and 12497 transitions. [2021-01-06 18:19:07,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2021-01-06 18:19:07,062 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:07,062 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:07,062 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-01-06 18:19:07,062 INFO L429 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:07,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:07,063 INFO L82 PathProgramCache]: Analyzing trace with hash 1379233558, now seen corresponding path program 1 times [2021-01-06 18:19:07,063 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:07,063 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139023140] [2021-01-06 18:19:07,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:07,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:07,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:07,136 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1139023140] [2021-01-06 18:19:07,137 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:07,137 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:07,137 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313649797] [2021-01-06 18:19:07,137 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:19:07,137 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:07,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:19:07,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:19:07,138 INFO L87 Difference]: Start difference. First operand 6884 states and 12497 transitions. Second operand 6 states. [2021-01-06 18:19:10,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:10,356 INFO L93 Difference]: Finished difference Result 34813 states and 63758 transitions. [2021-01-06 18:19:10,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:19:10,357 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2021-01-06 18:19:10,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:10,397 INFO L225 Difference]: With dead ends: 34813 [2021-01-06 18:19:10,397 INFO L226 Difference]: Without dead ends: 30617 [2021-01-06 18:19:10,405 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:19:10,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30617 states. [2021-01-06 18:19:11,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30617 to 6932. [2021-01-06 18:19:11,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6932 states. [2021-01-06 18:19:11,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6932 states to 6932 states and 12545 transitions. [2021-01-06 18:19:11,100 INFO L78 Accepts]: Start accepts. Automaton has 6932 states and 12545 transitions. Word has length 92 [2021-01-06 18:19:11,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:11,100 INFO L481 AbstractCegarLoop]: Abstraction has 6932 states and 12545 transitions. [2021-01-06 18:19:11,100 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:19:11,100 INFO L276 IsEmpty]: Start isEmpty. Operand 6932 states and 12545 transitions. [2021-01-06 18:19:11,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2021-01-06 18:19:11,102 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:11,102 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:11,102 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-01-06 18:19:11,102 INFO L429 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:11,103 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:11,103 INFO L82 PathProgramCache]: Analyzing trace with hash 1039461537, now seen corresponding path program 1 times [2021-01-06 18:19:11,103 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:11,103 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1412834123] [2021-01-06 18:19:11,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:11,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:11,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:11,178 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1412834123] [2021-01-06 18:19:11,178 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:11,178 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:11,178 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231514748] [2021-01-06 18:19:11,178 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:19:11,179 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:11,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:19:11,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:19:11,179 INFO L87 Difference]: Start difference. First operand 6932 states and 12545 transitions. Second operand 6 states. [2021-01-06 18:19:14,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:14,342 INFO L93 Difference]: Finished difference Result 24737 states and 44875 transitions. [2021-01-06 18:19:14,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:19:14,342 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2021-01-06 18:19:14,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:14,365 INFO L225 Difference]: With dead ends: 24737 [2021-01-06 18:19:14,365 INFO L226 Difference]: Without dead ends: 20502 [2021-01-06 18:19:14,372 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:19:14,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20502 states. [2021-01-06 18:19:14,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20502 to 6868. [2021-01-06 18:19:14,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6868 states. [2021-01-06 18:19:14,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6868 states to 6868 states and 12465 transitions. [2021-01-06 18:19:14,905 INFO L78 Accepts]: Start accepts. Automaton has 6868 states and 12465 transitions. Word has length 93 [2021-01-06 18:19:14,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:14,905 INFO L481 AbstractCegarLoop]: Abstraction has 6868 states and 12465 transitions. [2021-01-06 18:19:14,905 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:19:14,905 INFO L276 IsEmpty]: Start isEmpty. Operand 6868 states and 12465 transitions. [2021-01-06 18:19:14,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2021-01-06 18:19:14,907 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:14,907 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:14,907 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2021-01-06 18:19:14,907 INFO L429 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:14,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:14,908 INFO L82 PathProgramCache]: Analyzing trace with hash 1212399964, now seen corresponding path program 1 times [2021-01-06 18:19:14,908 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:14,908 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259045816] [2021-01-06 18:19:14,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:14,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:15,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:15,043 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259045816] [2021-01-06 18:19:15,043 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:15,043 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:15,043 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772348085] [2021-01-06 18:19:15,044 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:15,044 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:15,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:15,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:15,045 INFO L87 Difference]: Start difference. First operand 6868 states and 12465 transitions. Second operand 5 states. [2021-01-06 18:19:16,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:16,803 INFO L93 Difference]: Finished difference Result 25796 states and 47031 transitions. [2021-01-06 18:19:16,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-01-06 18:19:16,803 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2021-01-06 18:19:16,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:16,830 INFO L225 Difference]: With dead ends: 25796 [2021-01-06 18:19:16,830 INFO L226 Difference]: Without dead ends: 21612 [2021-01-06 18:19:16,839 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:19:16,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21612 states. [2021-01-06 18:19:17,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21612 to 10503. [2021-01-06 18:19:17,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10503 states. [2021-01-06 18:19:17,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10503 states to 10503 states and 19056 transitions. [2021-01-06 18:19:17,699 INFO L78 Accepts]: Start accepts. Automaton has 10503 states and 19056 transitions. Word has length 94 [2021-01-06 18:19:17,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:17,699 INFO L481 AbstractCegarLoop]: Abstraction has 10503 states and 19056 transitions. [2021-01-06 18:19:17,699 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:17,699 INFO L276 IsEmpty]: Start isEmpty. Operand 10503 states and 19056 transitions. [2021-01-06 18:19:17,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2021-01-06 18:19:17,701 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:17,701 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:17,701 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-01-06 18:19:17,701 INFO L429 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:17,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:17,702 INFO L82 PathProgramCache]: Analyzing trace with hash -1816659536, now seen corresponding path program 1 times [2021-01-06 18:19:17,702 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:17,702 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545987792] [2021-01-06 18:19:17,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:17,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:17,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:17,774 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [545987792] [2021-01-06 18:19:17,774 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:17,774 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:17,774 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166666855] [2021-01-06 18:19:17,775 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:17,775 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:17,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:17,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:17,776 INFO L87 Difference]: Start difference. First operand 10503 states and 19056 transitions. Second operand 5 states. [2021-01-06 18:19:19,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:19,363 INFO L93 Difference]: Finished difference Result 24171 states and 43811 transitions. [2021-01-06 18:19:19,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:19:19,364 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2021-01-06 18:19:19,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:19,381 INFO L225 Difference]: With dead ends: 24171 [2021-01-06 18:19:19,382 INFO L226 Difference]: Without dead ends: 16569 [2021-01-06 18:19:19,387 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:19:19,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16569 states. [2021-01-06 18:19:20,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16569 to 10528. [2021-01-06 18:19:20,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10528 states. [2021-01-06 18:19:20,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10528 states to 10528 states and 19073 transitions. [2021-01-06 18:19:20,170 INFO L78 Accepts]: Start accepts. Automaton has 10528 states and 19073 transitions. Word has length 96 [2021-01-06 18:19:20,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:20,170 INFO L481 AbstractCegarLoop]: Abstraction has 10528 states and 19073 transitions. [2021-01-06 18:19:20,170 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:20,170 INFO L276 IsEmpty]: Start isEmpty. Operand 10528 states and 19073 transitions. [2021-01-06 18:19:20,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2021-01-06 18:19:20,172 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:20,172 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:20,172 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-01-06 18:19:20,173 INFO L429 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:20,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:20,173 INFO L82 PathProgramCache]: Analyzing trace with hash -1894588899, now seen corresponding path program 1 times [2021-01-06 18:19:20,173 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:20,173 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118593432] [2021-01-06 18:19:20,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:20,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:20,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:20,250 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118593432] [2021-01-06 18:19:20,250 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:20,250 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:19:20,251 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802569542] [2021-01-06 18:19:20,251 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:19:20,251 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:20,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:19:20,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:19:20,252 INFO L87 Difference]: Start difference. First operand 10528 states and 19073 transitions. Second operand 6 states. [2021-01-06 18:19:21,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:21,284 INFO L93 Difference]: Finished difference Result 18504 states and 33422 transitions. [2021-01-06 18:19:21,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:19:21,284 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 103 [2021-01-06 18:19:21,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:21,295 INFO L225 Difference]: With dead ends: 18504 [2021-01-06 18:19:21,296 INFO L226 Difference]: Without dead ends: 10543 [2021-01-06 18:19:21,301 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:19:21,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10543 states. [2021-01-06 18:19:22,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10543 to 10528. [2021-01-06 18:19:22,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10528 states. [2021-01-06 18:19:22,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10528 states to 10528 states and 18893 transitions. [2021-01-06 18:19:22,060 INFO L78 Accepts]: Start accepts. Automaton has 10528 states and 18893 transitions. Word has length 103 [2021-01-06 18:19:22,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:22,060 INFO L481 AbstractCegarLoop]: Abstraction has 10528 states and 18893 transitions. [2021-01-06 18:19:22,061 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:19:22,061 INFO L276 IsEmpty]: Start isEmpty. Operand 10528 states and 18893 transitions. [2021-01-06 18:19:22,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2021-01-06 18:19:22,062 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:22,063 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:22,063 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-01-06 18:19:22,063 INFO L429 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:22,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:22,063 INFO L82 PathProgramCache]: Analyzing trace with hash 1197851061, now seen corresponding path program 1 times [2021-01-06 18:19:22,064 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:22,064 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818632532] [2021-01-06 18:19:22,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:22,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:22,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:22,137 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [818632532] [2021-01-06 18:19:22,137 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:22,137 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:19:22,137 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2097268745] [2021-01-06 18:19:22,138 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:22,138 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:22,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:22,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:22,139 INFO L87 Difference]: Start difference. First operand 10528 states and 18893 transitions. Second operand 3 states. [2021-01-06 18:19:23,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:23,104 INFO L93 Difference]: Finished difference Result 19689 states and 35315 transitions. [2021-01-06 18:19:23,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:19:23,107 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 104 [2021-01-06 18:19:23,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:23,120 INFO L225 Difference]: With dead ends: 19689 [2021-01-06 18:19:23,120 INFO L226 Difference]: Without dead ends: 10498 [2021-01-06 18:19:23,125 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:23,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10498 states. [2021-01-06 18:19:23,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10498 to 10498. [2021-01-06 18:19:23,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10498 states. [2021-01-06 18:19:23,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10498 states to 10498 states and 18835 transitions. [2021-01-06 18:19:23,885 INFO L78 Accepts]: Start accepts. Automaton has 10498 states and 18835 transitions. Word has length 104 [2021-01-06 18:19:23,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:23,885 INFO L481 AbstractCegarLoop]: Abstraction has 10498 states and 18835 transitions. [2021-01-06 18:19:23,885 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:19:23,886 INFO L276 IsEmpty]: Start isEmpty. Operand 10498 states and 18835 transitions. [2021-01-06 18:19:23,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2021-01-06 18:19:23,888 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:23,888 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:23,888 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-01-06 18:19:23,888 INFO L429 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:23,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:23,888 INFO L82 PathProgramCache]: Analyzing trace with hash 1033362699, now seen corresponding path program 1 times [2021-01-06 18:19:23,889 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:23,889 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [142639457] [2021-01-06 18:19:23,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:23,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:23,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:23,971 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [142639457] [2021-01-06 18:19:23,971 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:23,971 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:23,972 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857747002] [2021-01-06 18:19:23,972 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:23,972 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:23,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:23,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:23,973 INFO L87 Difference]: Start difference. First operand 10498 states and 18835 transitions. Second operand 5 states. [2021-01-06 18:19:26,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:26,605 INFO L93 Difference]: Finished difference Result 34306 states and 61560 transitions. [2021-01-06 18:19:26,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:19:26,606 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 106 [2021-01-06 18:19:26,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:26,637 INFO L225 Difference]: With dead ends: 34306 [2021-01-06 18:19:26,637 INFO L226 Difference]: Without dead ends: 26755 [2021-01-06 18:19:26,645 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:19:26,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26755 states. [2021-01-06 18:19:27,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26755 to 10498. [2021-01-06 18:19:27,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10498 states. [2021-01-06 18:19:27,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10498 states to 10498 states and 18821 transitions. [2021-01-06 18:19:27,527 INFO L78 Accepts]: Start accepts. Automaton has 10498 states and 18821 transitions. Word has length 106 [2021-01-06 18:19:27,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:27,527 INFO L481 AbstractCegarLoop]: Abstraction has 10498 states and 18821 transitions. [2021-01-06 18:19:27,527 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:27,527 INFO L276 IsEmpty]: Start isEmpty. Operand 10498 states and 18821 transitions. [2021-01-06 18:19:27,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2021-01-06 18:19:27,529 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:27,529 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:27,529 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2021-01-06 18:19:27,530 INFO L429 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:27,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:27,530 INFO L82 PathProgramCache]: Analyzing trace with hash 718055049, now seen corresponding path program 1 times [2021-01-06 18:19:27,530 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:27,530 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1486202850] [2021-01-06 18:19:27,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:27,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:27,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:27,614 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1486202850] [2021-01-06 18:19:27,614 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:27,614 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:19:27,614 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206627467] [2021-01-06 18:19:27,614 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:27,615 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:27,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:27,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:27,615 INFO L87 Difference]: Start difference. First operand 10498 states and 18821 transitions. Second operand 4 states. [2021-01-06 18:19:29,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:29,707 INFO L93 Difference]: Finished difference Result 27214 states and 48984 transitions. [2021-01-06 18:19:29,708 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:19:29,708 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 106 [2021-01-06 18:19:29,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:29,731 INFO L225 Difference]: With dead ends: 27214 [2021-01-06 18:19:29,731 INFO L226 Difference]: Without dead ends: 16778 [2021-01-06 18:19:29,743 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:29,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16778 states. [2021-01-06 18:19:30,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16778 to 10498. [2021-01-06 18:19:30,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10498 states. [2021-01-06 18:19:30,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10498 states to 10498 states and 18636 transitions. [2021-01-06 18:19:30,713 INFO L78 Accepts]: Start accepts. Automaton has 10498 states and 18636 transitions. Word has length 106 [2021-01-06 18:19:30,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:30,713 INFO L481 AbstractCegarLoop]: Abstraction has 10498 states and 18636 transitions. [2021-01-06 18:19:30,713 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:30,713 INFO L276 IsEmpty]: Start isEmpty. Operand 10498 states and 18636 transitions. [2021-01-06 18:19:30,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2021-01-06 18:19:30,715 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:30,715 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:30,715 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-01-06 18:19:30,715 INFO L429 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:30,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:30,716 INFO L82 PathProgramCache]: Analyzing trace with hash -1651835289, now seen corresponding path program 1 times [2021-01-06 18:19:30,716 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:30,716 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186290288] [2021-01-06 18:19:30,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:30,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:30,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:30,829 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [186290288] [2021-01-06 18:19:30,830 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:30,830 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:30,830 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1866092877] [2021-01-06 18:19:30,830 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:30,830 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:30,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:30,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:30,831 INFO L87 Difference]: Start difference. First operand 10498 states and 18636 transitions. Second operand 5 states. [2021-01-06 18:19:32,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:32,376 INFO L93 Difference]: Finished difference Result 17949 states and 32137 transitions. [2021-01-06 18:19:32,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:19:32,377 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 108 [2021-01-06 18:19:32,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:32,403 INFO L225 Difference]: With dead ends: 17949 [2021-01-06 18:19:32,404 INFO L226 Difference]: Without dead ends: 17936 [2021-01-06 18:19:32,410 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:19:32,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17936 states. [2021-01-06 18:19:33,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17936 to 10510. [2021-01-06 18:19:33,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10510 states. [2021-01-06 18:19:33,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10510 states to 10510 states and 18648 transitions. [2021-01-06 18:19:33,401 INFO L78 Accepts]: Start accepts. Automaton has 10510 states and 18648 transitions. Word has length 108 [2021-01-06 18:19:33,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:33,401 INFO L481 AbstractCegarLoop]: Abstraction has 10510 states and 18648 transitions. [2021-01-06 18:19:33,402 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:33,402 INFO L276 IsEmpty]: Start isEmpty. Operand 10510 states and 18648 transitions. [2021-01-06 18:19:33,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2021-01-06 18:19:33,403 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:33,404 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:33,404 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-01-06 18:19:33,404 INFO L429 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:33,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:33,404 INFO L82 PathProgramCache]: Analyzing trace with hash -658014004, now seen corresponding path program 1 times [2021-01-06 18:19:33,404 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:33,404 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484347254] [2021-01-06 18:19:33,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:33,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:33,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:33,511 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484347254] [2021-01-06 18:19:33,511 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:33,511 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:33,512 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1239345518] [2021-01-06 18:19:33,513 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:33,513 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:33,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:33,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:33,514 INFO L87 Difference]: Start difference. First operand 10510 states and 18648 transitions. Second operand 5 states. [2021-01-06 18:19:35,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:35,068 INFO L93 Difference]: Finished difference Result 16600 states and 29505 transitions. [2021-01-06 18:19:35,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:19:35,068 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 110 [2021-01-06 18:19:35,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:35,090 INFO L225 Difference]: With dead ends: 16600 [2021-01-06 18:19:35,090 INFO L226 Difference]: Without dead ends: 16587 [2021-01-06 18:19:35,095 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:19:35,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16587 states. [2021-01-06 18:19:36,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16587 to 10640. [2021-01-06 18:19:36,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10640 states. [2021-01-06 18:19:36,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10640 states to 10640 states and 18841 transitions. [2021-01-06 18:19:36,141 INFO L78 Accepts]: Start accepts. Automaton has 10640 states and 18841 transitions. Word has length 110 [2021-01-06 18:19:36,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:36,141 INFO L481 AbstractCegarLoop]: Abstraction has 10640 states and 18841 transitions. [2021-01-06 18:19:36,141 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:36,141 INFO L276 IsEmpty]: Start isEmpty. Operand 10640 states and 18841 transitions. [2021-01-06 18:19:36,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2021-01-06 18:19:36,143 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:36,144 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:36,144 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-01-06 18:19:36,144 INFO L429 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:36,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:36,144 INFO L82 PathProgramCache]: Analyzing trace with hash 123303796, now seen corresponding path program 1 times [2021-01-06 18:19:36,144 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:36,144 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24225647] [2021-01-06 18:19:36,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:36,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:36,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:36,245 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [24225647] [2021-01-06 18:19:36,245 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:36,246 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:19:36,246 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380837464] [2021-01-06 18:19:36,246 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:36,246 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:36,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:36,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:36,247 INFO L87 Difference]: Start difference. First operand 10640 states and 18841 transitions. Second operand 5 states. [2021-01-06 18:19:38,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:38,651 INFO L93 Difference]: Finished difference Result 26734 states and 47355 transitions. [2021-01-06 18:19:38,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:19:38,652 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 117 [2021-01-06 18:19:38,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:38,673 INFO L225 Difference]: With dead ends: 26734 [2021-01-06 18:19:38,673 INFO L226 Difference]: Without dead ends: 17511 [2021-01-06 18:19:38,685 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:19:38,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17511 states. [2021-01-06 18:19:39,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17511 to 10640. [2021-01-06 18:19:39,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10640 states. [2021-01-06 18:19:39,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10640 states to 10640 states and 18831 transitions. [2021-01-06 18:19:39,656 INFO L78 Accepts]: Start accepts. Automaton has 10640 states and 18831 transitions. Word has length 117 [2021-01-06 18:19:39,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:39,657 INFO L481 AbstractCegarLoop]: Abstraction has 10640 states and 18831 transitions. [2021-01-06 18:19:39,657 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:39,657 INFO L276 IsEmpty]: Start isEmpty. Operand 10640 states and 18831 transitions. [2021-01-06 18:19:39,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2021-01-06 18:19:39,659 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:39,659 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:39,659 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-01-06 18:19:39,659 INFO L429 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:39,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:39,660 INFO L82 PathProgramCache]: Analyzing trace with hash 868549355, now seen corresponding path program 1 times [2021-01-06 18:19:39,660 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:39,660 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594203709] [2021-01-06 18:19:39,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:39,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:39,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:39,740 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [594203709] [2021-01-06 18:19:39,740 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:39,741 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:19:39,741 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [532825463] [2021-01-06 18:19:39,741 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:39,741 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:39,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:39,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:39,742 INFO L87 Difference]: Start difference. First operand 10640 states and 18831 transitions. Second operand 3 states. [2021-01-06 18:19:41,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:41,298 INFO L93 Difference]: Finished difference Result 26222 states and 46602 transitions. [2021-01-06 18:19:41,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:19:41,298 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 118 [2021-01-06 18:19:41,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:41,318 INFO L225 Difference]: With dead ends: 26222 [2021-01-06 18:19:41,319 INFO L226 Difference]: Without dead ends: 16999 [2021-01-06 18:19:41,326 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:41,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16999 states. [2021-01-06 18:19:42,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16999 to 16986. [2021-01-06 18:19:42,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16986 states. [2021-01-06 18:19:42,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16986 states to 16986 states and 30262 transitions. [2021-01-06 18:19:42,750 INFO L78 Accepts]: Start accepts. Automaton has 16986 states and 30262 transitions. Word has length 118 [2021-01-06 18:19:42,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:42,750 INFO L481 AbstractCegarLoop]: Abstraction has 16986 states and 30262 transitions. [2021-01-06 18:19:42,750 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:19:42,750 INFO L276 IsEmpty]: Start isEmpty. Operand 16986 states and 30262 transitions. [2021-01-06 18:19:42,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2021-01-06 18:19:42,754 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:42,754 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:42,754 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-01-06 18:19:42,754 INFO L429 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:42,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:42,755 INFO L82 PathProgramCache]: Analyzing trace with hash 821094003, now seen corresponding path program 1 times [2021-01-06 18:19:42,755 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:42,755 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494562951] [2021-01-06 18:19:42,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:42,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:42,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:42,902 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1494562951] [2021-01-06 18:19:42,902 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:42,902 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-06 18:19:42,903 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [779087114] [2021-01-06 18:19:42,903 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-06 18:19:42,903 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:42,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-06 18:19:42,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:19:42,904 INFO L87 Difference]: Start difference. First operand 16986 states and 30262 transitions. Second operand 7 states. [2021-01-06 18:19:45,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:45,629 INFO L93 Difference]: Finished difference Result 28972 states and 51777 transitions. [2021-01-06 18:19:45,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:19:45,629 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 122 [2021-01-06 18:19:45,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:45,663 INFO L225 Difference]: With dead ends: 28972 [2021-01-06 18:19:45,663 INFO L226 Difference]: Without dead ends: 28959 [2021-01-06 18:19:45,668 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:19:45,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28959 states. [2021-01-06 18:19:47,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28959 to 17016. [2021-01-06 18:19:47,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17016 states. [2021-01-06 18:19:47,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17016 states to 17016 states and 30287 transitions. [2021-01-06 18:19:47,234 INFO L78 Accepts]: Start accepts. Automaton has 17016 states and 30287 transitions. Word has length 122 [2021-01-06 18:19:47,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:47,234 INFO L481 AbstractCegarLoop]: Abstraction has 17016 states and 30287 transitions. [2021-01-06 18:19:47,235 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2021-01-06 18:19:47,235 INFO L276 IsEmpty]: Start isEmpty. Operand 17016 states and 30287 transitions. [2021-01-06 18:19:47,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-01-06 18:19:47,238 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:47,238 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:47,238 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2021-01-06 18:19:47,238 INFO L429 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:47,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:47,239 INFO L82 PathProgramCache]: Analyzing trace with hash 1566351915, now seen corresponding path program 1 times [2021-01-06 18:19:47,239 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:47,239 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1389104022] [2021-01-06 18:19:47,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:47,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:47,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:47,348 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1389104022] [2021-01-06 18:19:47,349 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:47,349 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:47,349 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799726450] [2021-01-06 18:19:47,349 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:47,349 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:47,350 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:47,350 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:47,350 INFO L87 Difference]: Start difference. First operand 17016 states and 30287 transitions. Second operand 5 states. [2021-01-06 18:19:55,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:55,040 INFO L93 Difference]: Finished difference Result 94015 states and 170384 transitions. [2021-01-06 18:19:55,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:19:55,041 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2021-01-06 18:19:55,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:55,138 INFO L225 Difference]: With dead ends: 94015 [2021-01-06 18:19:55,138 INFO L226 Difference]: Without dead ends: 79007 [2021-01-06 18:19:55,158 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:19:55,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79007 states. [2021-01-06 18:19:58,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79007 to 33256. [2021-01-06 18:19:58,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33256 states. [2021-01-06 18:19:59,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33256 states to 33256 states and 59234 transitions. [2021-01-06 18:19:59,038 INFO L78 Accepts]: Start accepts. Automaton has 33256 states and 59234 transitions. Word has length 141 [2021-01-06 18:19:59,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:59,038 INFO L481 AbstractCegarLoop]: Abstraction has 33256 states and 59234 transitions. [2021-01-06 18:19:59,038 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:59,038 INFO L276 IsEmpty]: Start isEmpty. Operand 33256 states and 59234 transitions. [2021-01-06 18:19:59,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-01-06 18:19:59,043 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:59,044 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:59,044 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2021-01-06 18:19:59,044 INFO L429 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:59,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:59,044 INFO L82 PathProgramCache]: Analyzing trace with hash -351343075, now seen corresponding path program 1 times [2021-01-06 18:19:59,044 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:59,044 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661208834] [2021-01-06 18:19:59,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:59,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:59,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:59,120 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1661208834] [2021-01-06 18:19:59,121 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:59,121 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:19:59,121 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092907241] [2021-01-06 18:19:59,121 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:59,121 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:59,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:59,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:59,123 INFO L87 Difference]: Start difference. First operand 33256 states and 59234 transitions. Second operand 3 states. [2021-01-06 18:20:04,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:04,903 INFO L93 Difference]: Finished difference Result 82315 states and 147467 transitions. [2021-01-06 18:20:04,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:04,903 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 142 [2021-01-06 18:20:04,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:04,973 INFO L225 Difference]: With dead ends: 82315 [2021-01-06 18:20:04,974 INFO L226 Difference]: Without dead ends: 52109 [2021-01-06 18:20:04,996 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:05,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52109 states. [2021-01-06 18:20:08,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52109 to 32566. [2021-01-06 18:20:08,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32566 states. [2021-01-06 18:20:08,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32566 states to 32566 states and 57844 transitions. [2021-01-06 18:20:08,606 INFO L78 Accepts]: Start accepts. Automaton has 32566 states and 57844 transitions. Word has length 142 [2021-01-06 18:20:08,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:08,607 INFO L481 AbstractCegarLoop]: Abstraction has 32566 states and 57844 transitions. [2021-01-06 18:20:08,607 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:08,607 INFO L276 IsEmpty]: Start isEmpty. Operand 32566 states and 57844 transitions. [2021-01-06 18:20:08,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2021-01-06 18:20:08,614 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:08,614 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:08,614 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2021-01-06 18:20:08,614 INFO L429 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:08,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:08,615 INFO L82 PathProgramCache]: Analyzing trace with hash 1833171928, now seen corresponding path program 1 times [2021-01-06 18:20:08,615 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:08,615 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160645057] [2021-01-06 18:20:08,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:08,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:08,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:08,699 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [160645057] [2021-01-06 18:20:08,699 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:08,700 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:08,700 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310374334] [2021-01-06 18:20:08,700 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:08,700 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:08,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:08,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:08,701 INFO L87 Difference]: Start difference. First operand 32566 states and 57844 transitions. Second operand 5 states. [2021-01-06 18:20:13,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:13,906 INFO L93 Difference]: Finished difference Result 73475 states and 128292 transitions. [2021-01-06 18:20:13,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:20:13,907 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 154 [2021-01-06 18:20:13,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:13,955 INFO L225 Difference]: With dead ends: 73475 [2021-01-06 18:20:13,955 INFO L226 Difference]: Without dead ends: 41183 [2021-01-06 18:20:13,971 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:20:13,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41183 states. [2021-01-06 18:20:17,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41183 to 32695. [2021-01-06 18:20:17,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32695 states. [2021-01-06 18:20:17,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32695 states to 32695 states and 57973 transitions. [2021-01-06 18:20:17,579 INFO L78 Accepts]: Start accepts. Automaton has 32695 states and 57973 transitions. Word has length 154 [2021-01-06 18:20:17,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:17,579 INFO L481 AbstractCegarLoop]: Abstraction has 32695 states and 57973 transitions. [2021-01-06 18:20:17,579 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:17,579 INFO L276 IsEmpty]: Start isEmpty. Operand 32695 states and 57973 transitions. [2021-01-06 18:20:17,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2021-01-06 18:20:17,588 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:17,589 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:17,589 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2021-01-06 18:20:17,589 INFO L429 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:17,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:17,589 INFO L82 PathProgramCache]: Analyzing trace with hash 1861672218, now seen corresponding path program 1 times [2021-01-06 18:20:17,590 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:17,590 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132514750] [2021-01-06 18:20:17,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:17,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:17,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:17,701 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132514750] [2021-01-06 18:20:17,701 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:17,701 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:17,701 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994991279] [2021-01-06 18:20:17,702 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:17,702 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:17,702 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:17,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:17,703 INFO L87 Difference]: Start difference. First operand 32695 states and 57973 transitions. Second operand 5 states. [2021-01-06 18:20:27,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:27,304 INFO L93 Difference]: Finished difference Result 106538 states and 184109 transitions. [2021-01-06 18:20:27,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:27,304 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 154 [2021-01-06 18:20:27,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:27,393 INFO L225 Difference]: With dead ends: 106538 [2021-01-06 18:20:27,393 INFO L226 Difference]: Without dead ends: 73921 [2021-01-06 18:20:27,416 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-01-06 18:20:27,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73921 states. [2021-01-06 18:20:31,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73921 to 32781. [2021-01-06 18:20:31,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32781 states. [2021-01-06 18:20:31,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32781 states to 32781 states and 58059 transitions. [2021-01-06 18:20:31,474 INFO L78 Accepts]: Start accepts. Automaton has 32781 states and 58059 transitions. Word has length 154 [2021-01-06 18:20:31,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:31,474 INFO L481 AbstractCegarLoop]: Abstraction has 32781 states and 58059 transitions. [2021-01-06 18:20:31,474 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:31,474 INFO L276 IsEmpty]: Start isEmpty. Operand 32781 states and 58059 transitions. [2021-01-06 18:20:31,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2021-01-06 18:20:31,481 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:31,481 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:31,481 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2021-01-06 18:20:31,482 INFO L429 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:31,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:31,482 INFO L82 PathProgramCache]: Analyzing trace with hash 1322719401, now seen corresponding path program 1 times [2021-01-06 18:20:31,482 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:31,482 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151369174] [2021-01-06 18:20:31,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:31,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:31,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:31,554 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151369174] [2021-01-06 18:20:31,555 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:31,555 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:20:31,555 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834448735] [2021-01-06 18:20:31,555 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:20:31,555 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:31,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:20:31,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:20:31,556 INFO L87 Difference]: Start difference. First operand 32781 states and 58059 transitions. Second operand 4 states. [2021-01-06 18:20:37,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:37,610 INFO L93 Difference]: Finished difference Result 81852 states and 144246 transitions. [2021-01-06 18:20:37,610 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:20:37,610 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 155 [2021-01-06 18:20:37,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:37,678 INFO L225 Difference]: With dead ends: 81852 [2021-01-06 18:20:37,679 INFO L226 Difference]: Without dead ends: 49140 [2021-01-06 18:20:37,705 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:37,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49140 states. [2021-01-06 18:20:40,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49140 to 24711. [2021-01-06 18:20:40,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24711 states. [2021-01-06 18:20:40,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24711 states to 24711 states and 43375 transitions. [2021-01-06 18:20:40,933 INFO L78 Accepts]: Start accepts. Automaton has 24711 states and 43375 transitions. Word has length 155 [2021-01-06 18:20:40,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:40,933 INFO L481 AbstractCegarLoop]: Abstraction has 24711 states and 43375 transitions. [2021-01-06 18:20:40,933 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:20:40,933 INFO L276 IsEmpty]: Start isEmpty. Operand 24711 states and 43375 transitions. [2021-01-06 18:20:40,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2021-01-06 18:20:40,944 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:40,944 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:40,944 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2021-01-06 18:20:40,945 INFO L429 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:40,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:40,945 INFO L82 PathProgramCache]: Analyzing trace with hash -1061484342, now seen corresponding path program 1 times [2021-01-06 18:20:40,945 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:40,945 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329490445] [2021-01-06 18:20:40,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:40,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:41,089 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:41,089 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329490445] [2021-01-06 18:20:41,090 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:41,090 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:41,090 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914760141] [2021-01-06 18:20:41,090 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:41,090 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:41,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:41,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:41,091 INFO L87 Difference]: Start difference. First operand 24711 states and 43375 transitions. Second operand 5 states. [2021-01-06 18:20:49,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:49,214 INFO L93 Difference]: Finished difference Result 71812 states and 126943 transitions. [2021-01-06 18:20:49,214 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:20:49,214 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 173 [2021-01-06 18:20:49,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:49,292 INFO L225 Difference]: With dead ends: 71812 [2021-01-06 18:20:49,292 INFO L226 Difference]: Without dead ends: 47371 [2021-01-06 18:20:49,309 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:20:49,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47371 states. [2021-01-06 18:20:54,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47371 to 42837. [2021-01-06 18:20:54,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42837 states. [2021-01-06 18:20:54,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42837 states to 42837 states and 76581 transitions. [2021-01-06 18:20:54,423 INFO L78 Accepts]: Start accepts. Automaton has 42837 states and 76581 transitions. Word has length 173 [2021-01-06 18:20:54,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:54,423 INFO L481 AbstractCegarLoop]: Abstraction has 42837 states and 76581 transitions. [2021-01-06 18:20:54,423 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:20:54,423 INFO L276 IsEmpty]: Start isEmpty. Operand 42837 states and 76581 transitions. [2021-01-06 18:20:54,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2021-01-06 18:20:54,433 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:54,433 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:54,433 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2021-01-06 18:20:54,433 INFO L429 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:54,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:54,434 INFO L82 PathProgramCache]: Analyzing trace with hash -964900857, now seen corresponding path program 1 times [2021-01-06 18:20:54,434 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:54,434 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985263074] [2021-01-06 18:20:54,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:54,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:54,571 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:54,572 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [985263074] [2021-01-06 18:20:54,572 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:54,572 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:20:54,572 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [659068496] [2021-01-06 18:20:54,573 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:54,573 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:54,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:54,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:54,574 INFO L87 Difference]: Start difference. First operand 42837 states and 76581 transitions. Second operand 5 states. [2021-01-06 18:21:06,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:06,086 INFO L93 Difference]: Finished difference Result 126898 states and 227569 transitions. [2021-01-06 18:21:06,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:21:06,086 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 174 [2021-01-06 18:21:06,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:06,210 INFO L225 Difference]: With dead ends: 126898 [2021-01-06 18:21:06,210 INFO L226 Difference]: Without dead ends: 84331 [2021-01-06 18:21:06,250 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:06,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84331 states. [2021-01-06 18:21:14,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84331 to 80601. [2021-01-06 18:21:14,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80601 states. [2021-01-06 18:21:15,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80601 states to 80601 states and 145051 transitions. [2021-01-06 18:21:15,106 INFO L78 Accepts]: Start accepts. Automaton has 80601 states and 145051 transitions. Word has length 174 [2021-01-06 18:21:15,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:21:15,106 INFO L481 AbstractCegarLoop]: Abstraction has 80601 states and 145051 transitions. [2021-01-06 18:21:15,106 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:21:15,106 INFO L276 IsEmpty]: Start isEmpty. Operand 80601 states and 145051 transitions. [2021-01-06 18:21:15,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2021-01-06 18:21:15,121 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:21:15,121 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:21:15,121 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2021-01-06 18:21:15,121 INFO L429 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:21:15,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:21:15,122 INFO L82 PathProgramCache]: Analyzing trace with hash -214296017, now seen corresponding path program 1 times [2021-01-06 18:21:15,122 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:21:15,122 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [809108503] [2021-01-06 18:21:15,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:21:15,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:21:15,268 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:21:15,269 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [809108503] [2021-01-06 18:21:15,269 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:21:15,269 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:21:15,269 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1247792495] [2021-01-06 18:21:15,270 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:21:15,270 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:21:15,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:21:15,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:21:15,271 INFO L87 Difference]: Start difference. First operand 80601 states and 145051 transitions. Second operand 5 states. [2021-01-06 18:21:26,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:26,910 INFO L93 Difference]: Finished difference Result 164482 states and 295157 transitions. [2021-01-06 18:21:26,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:21:26,910 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 175 [2021-01-06 18:21:26,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:27,066 INFO L225 Difference]: With dead ends: 164482 [2021-01-06 18:21:27,066 INFO L226 Difference]: Without dead ends: 84151 [2021-01-06 18:21:27,121 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:27,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84151 states.