/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc config/AutomizerReach.xml -s config/svcomp-Reach-64bit-Automizer_Default.epf -i ../sv-benchmarks/c/product-lines/elevator_spec1_product23.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.2.1-bitabs-178dd20 [2021-01-06 18:18:13,689 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-06 18:18:13,692 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-06 18:18:13,725 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-06 18:18:13,726 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-06 18:18:13,727 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-06 18:18:13,729 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-06 18:18:13,731 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-06 18:18:13,734 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-06 18:18:13,735 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-06 18:18:13,736 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-06 18:18:13,737 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-06 18:18:13,738 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-06 18:18:13,739 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-06 18:18:13,740 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-06 18:18:13,742 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-06 18:18:13,743 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-06 18:18:13,753 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-06 18:18:13,756 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-06 18:18:13,758 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-06 18:18:13,760 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-06 18:18:13,761 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-06 18:18:13,762 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-06 18:18:13,763 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-06 18:18:13,766 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-01-06 18:18:13,767 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-01-06 18:18:13,767 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-01-06 18:18:13,768 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-01-06 18:18:13,769 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-01-06 18:18:13,770 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-01-06 18:18:13,770 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-06 18:18:13,771 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-06 18:18:13,772 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-06 18:18:13,773 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-06 18:18:13,774 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-06 18:18:13,775 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-06 18:18:13,775 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-06 18:18:13,776 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-06 18:18:13,776 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-06 18:18:13,777 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-06 18:18:13,778 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-06 18:18:13,779 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-01-06 18:18:13,806 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-06 18:18:13,806 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-06 18:18:13,808 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-06 18:18:13,808 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-06 18:18:13,808 INFO L138 SettingsManager]: * Use SBE=true [2021-01-06 18:18:13,809 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-06 18:18:13,809 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-06 18:18:13,809 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-06 18:18:13,809 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-06 18:18:13,810 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-06 18:18:13,810 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-06 18:18:13,810 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-06 18:18:13,810 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-06 18:18:13,810 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-06 18:18:13,811 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-06 18:18:13,811 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-06 18:18:13,811 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-06 18:18:13,811 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:18:13,812 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-06 18:18:13,812 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-06 18:18:13,812 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-06 18:18:13,812 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-06 18:18:13,812 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-06 18:18:13,813 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-06 18:18:13,813 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-01-06 18:18:13,813 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-06 18:18:14,231 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-06 18:18:14,256 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-06 18:18:14,259 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-06 18:18:14,260 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-06 18:18:14,261 INFO L275 PluginConnector]: CDTParser initialized [2021-01-06 18:18:14,262 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/product-lines/elevator_spec1_product23.cil.c [2021-01-06 18:18:14,341 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/0771ade21/11f894f35d7645108a10687e420643b8/FLAG5eb12e5a7 [2021-01-06 18:18:15,055 INFO L306 CDTParser]: Found 1 translation units. [2021-01-06 18:18:15,056 INFO L160 CDTParser]: Scanning /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product23.cil.c [2021-01-06 18:18:15,086 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/0771ade21/11f894f35d7645108a10687e420643b8/FLAG5eb12e5a7 [2021-01-06 18:18:15,264 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/data/0771ade21/11f894f35d7645108a10687e420643b8 [2021-01-06 18:18:15,267 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-06 18:18:15,269 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-01-06 18:18:15,274 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-06 18:18:15,274 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-06 18:18:15,282 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-06 18:18:15,283 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:18:15" (1/1) ... [2021-01-06 18:18:15,286 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@14c240a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:15, skipping insertion in model container [2021-01-06 18:18:15,287 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.01 06:18:15" (1/1) ... [2021-01-06 18:18:15,296 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-06 18:18:15,399 INFO L178 MainTranslator]: Built tables and reachable declarations left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~overload~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~buttonPressed~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~28,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~13,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] [2021-01-06 18:18:15,981 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product23.cil.c[58014,58027] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~31,] [2021-01-06 18:18:16,054 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:18:16,066 INFO L203 MainTranslator]: Completed pre-run left hand side expression in assignment: lhs: VariableLHS[~tmp~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~0,] left hand side expression in assignment: lhs: VariableLHS[~i~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~1,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~1,] left hand side expression in assignment: lhs: VariableLHS[~i~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_15~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_16~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~0,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_15~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~1,] left hand side expression in assignment: address: IdentifierExpression[~mem_17~1,] left hand side expression in assignment: lhs: VariableLHS[~excep~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~1,] left hand side expression in assignment: lhs: VariableLHS[~mem_16~2,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_17~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~1,] left hand side expression in assignment: lhs: VariableLHS[~cf~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp~4,] left hand side expression in assignment: lhs: VariableLHS[~new~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_18~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_18~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_19~2,] left hand side expression in assignment: address: IdentifierExpression[~mem_19~2,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_20~0,] left hand side expression in assignment: lhs: VariableLHS[~next~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_21~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~3,] left hand side expression in assignment: lhs: VariableLHS[~temp~0,] left hand side expression in assignment: lhs: VariableLHS[~count,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_22~0,] left hand side expression in assignment: lhs: VariableLHS[~head~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~mem_23~0,] left hand side expression in assignment: lhs: VariableLHS[~excep~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~mem_24~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~2,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~3,] left hand side expression in assignment: lhs: VariableLHS[~mem_12~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~4,] left hand side expression in assignment: lhs: VariableLHS[~mem_13~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~2,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~5,] left hand side expression in assignment: lhs: VariableLHS[~floor~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~0,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~2,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~2,] left hand side expression in assignment: lhs: VariableLHS[~landingButtons_spc1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~nd~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~8,] left hand side expression in assignment: lhs: VariableLHS[~tmp~9,] left hand side expression in assignment: lhs: VariableLHS[~tmp~10,] left hand side expression in assignment: lhs: VariableLHS[~tmp~11,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp~12,] left hand side expression in assignment: lhs: VariableLHS[~i~2,] left hand side expression in assignment: lhs: VariableLHS[~maxLength~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~13,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~counter~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~4,] left hand side expression in assignment: lhs: VariableLHS[~action~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~3,] left hand side expression in assignment: lhs: VariableLHS[~origin~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~7,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~9,] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~10,] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~15,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~persons_5~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~16,] left hand side expression in assignment: lhs: VariableLHS[~weight~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~floorButtons_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~11,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~12,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~13,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~14,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~15,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~4,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~17,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~16,] left hand side expression in assignment: lhs: VariableLHS[~tmp~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~17,] left hand side expression in assignment: lhs: VariableLHS[~tmp~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~1,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~2,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~5,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~18,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~5,] left hand side expression in assignment: lhs: VariableLHS[~overload~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~20,] left hand side expression in assignment: lhs: VariableLHS[~buttonPressed~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~19,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp~21,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~6,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~20,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~21,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~22,] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentHeading~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~currentFloorID~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~8,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~tmp~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~22,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp4~3,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp5~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp~24,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~9,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~23,] left hand side expression in assignment: lhs: VariableLHS[~tmp~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~10,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~24,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~25,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~11,] left hand side expression in assignment: lhs: VariableLHS[~tmp~26,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~6,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~3,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___10~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~1,] left hand side expression in assignment: lhs: VariableLHS[~tmp___9~2,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp~27,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~12,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~7,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~5,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~4,] left hand side expression in assignment: lhs: VariableLHS[~tmp___4~3,] left hand side expression in assignment: lhs: VariableLHS[~doorState~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~tmp___8~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___6~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___7~2,] left hand side expression in assignment: lhs: VariableLHS[~tmp___5~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp6~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp7~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp8~7,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp9~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp10~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp11~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp12~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp13~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp14~4,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp15~2,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp16~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp17~1,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp18~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp19~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp20~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp~28,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp21~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___0~13,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp22~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___1~8,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp23~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___2~6,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp24~0,] left hand side expression in assignment: lhs: VariableLHS[~tmp___3~5,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp25~0,] left hand side expression in assignment: lhs: VariableLHS[~__cil_tmp26~0,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~i~3,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~i___0~0,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~26,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~27,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~28,] [2021-01-06 18:18:16,197 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-bitabs/releaseScripts/default/sv-benchmarks/c/product-lines/elevator_spec1_product23.cil.c[58014,58027] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~29,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~__utac__ad__arg1~0,] left hand side expression in assignment: lhs: VariableLHS[~calls_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~calls_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~30,] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_0~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_1~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_2~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_3~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_0_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_1_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_2_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_3_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_4_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~personOnFloor_5_4~0,GLOBAL] left hand side expression in assignment: lhs: VariableLHS[~retValue_acc~31,] [2021-01-06 18:18:16,219 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-06 18:18:16,290 INFO L208 MainTranslator]: Completed translation [2021-01-06 18:18:16,290 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16 WrapperNode [2021-01-06 18:18:16,291 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-06 18:18:16,292 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-06 18:18:16,292 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-06 18:18:16,292 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-06 18:18:16,300 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... [2021-01-06 18:18:16,340 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... [2021-01-06 18:18:16,628 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-06 18:18:16,629 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-06 18:18:16,629 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-06 18:18:16,630 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-06 18:18:16,639 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... [2021-01-06 18:18:16,640 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... [2021-01-06 18:18:16,669 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... [2021-01-06 18:18:16,669 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... [2021-01-06 18:18:16,789 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... [2021-01-06 18:18:17,027 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... [2021-01-06 18:18:17,054 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... [2021-01-06 18:18:17,098 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-06 18:18:17,099 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-06 18:18:17,100 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-06 18:18:17,100 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-06 18:18:17,101 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (1/1) ... No working directory specified, using /storage/repos/ultimate-bitabs/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-06 18:18:17,267 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-06 18:18:17,268 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-06 18:18:17,268 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-06 18:18:17,268 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-06 18:18:24,950 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-06 18:18:24,950 INFO L299 CfgBuilder]: Removed 833 assume(true) statements. [2021-01-06 18:18:24,957 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:18:24 BoogieIcfgContainer [2021-01-06 18:18:24,958 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-06 18:18:24,959 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-06 18:18:24,959 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-06 18:18:24,963 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-06 18:18:24,963 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.01 06:18:15" (1/3) ... [2021-01-06 18:18:24,964 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@62d5efde and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:18:24, skipping insertion in model container [2021-01-06 18:18:24,964 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.01 06:18:16" (2/3) ... [2021-01-06 18:18:24,965 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@62d5efde and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.01 06:18:24, skipping insertion in model container [2021-01-06 18:18:24,965 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.01 06:18:24" (3/3) ... [2021-01-06 18:18:24,966 INFO L111 eAbstractionObserver]: Analyzing ICFG elevator_spec1_product23.cil.c [2021-01-06 18:18:24,973 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-06 18:18:24,980 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2021-01-06 18:18:24,998 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-06 18:18:25,037 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-06 18:18:25,037 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-06 18:18:25,037 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-06 18:18:25,037 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-06 18:18:25,038 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-06 18:18:25,038 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-06 18:18:25,038 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-01-06 18:18:25,038 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-01-06 18:18:25,117 INFO L276 IsEmpty]: Start isEmpty. Operand 3567 states. [2021-01-06 18:18:25,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-01-06 18:18:25,148 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:25,149 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:25,149 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:25,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:25,156 INFO L82 PathProgramCache]: Analyzing trace with hash 352127062, now seen corresponding path program 1 times [2021-01-06 18:18:25,164 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:25,165 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218312837] [2021-01-06 18:18:25,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:25,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:25,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:25,610 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218312837] [2021-01-06 18:18:25,611 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:25,611 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:25,612 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290405746] [2021-01-06 18:18:25,616 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:18:25,616 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:25,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:18:25,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:25,633 INFO L87 Difference]: Start difference. First operand 3567 states. Second operand 3 states. [2021-01-06 18:18:26,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:26,063 INFO L93 Difference]: Finished difference Result 10621 states and 20021 transitions. [2021-01-06 18:18:26,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:18:26,068 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2021-01-06 18:18:26,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:26,154 INFO L225 Difference]: With dead ends: 10621 [2021-01-06 18:18:26,154 INFO L226 Difference]: Without dead ends: 7059 [2021-01-06 18:18:26,171 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:26,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7059 states. [2021-01-06 18:18:26,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7059 to 3563. [2021-01-06 18:18:26,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3563 states. [2021-01-06 18:18:26,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3563 states to 3563 states and 6704 transitions. [2021-01-06 18:18:26,500 INFO L78 Accepts]: Start accepts. Automaton has 3563 states and 6704 transitions. Word has length 53 [2021-01-06 18:18:26,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:26,500 INFO L481 AbstractCegarLoop]: Abstraction has 3563 states and 6704 transitions. [2021-01-06 18:18:26,500 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:18:26,500 INFO L276 IsEmpty]: Start isEmpty. Operand 3563 states and 6704 transitions. [2021-01-06 18:18:26,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-01-06 18:18:26,505 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:26,505 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:26,506 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-06 18:18:26,506 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:26,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:26,507 INFO L82 PathProgramCache]: Analyzing trace with hash -311998835, now seen corresponding path program 1 times [2021-01-06 18:18:26,507 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:26,508 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1117258697] [2021-01-06 18:18:26,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:26,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:26,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:26,634 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1117258697] [2021-01-06 18:18:26,634 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:26,634 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:26,635 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786719686] [2021-01-06 18:18:26,636 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:26,636 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:26,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:26,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:26,637 INFO L87 Difference]: Start difference. First operand 3563 states and 6704 transitions. Second operand 4 states. [2021-01-06 18:18:27,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:27,143 INFO L93 Difference]: Finished difference Result 14006 states and 26371 transitions. [2021-01-06 18:18:27,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:27,145 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2021-01-06 18:18:27,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:27,218 INFO L225 Difference]: With dead ends: 14006 [2021-01-06 18:18:27,219 INFO L226 Difference]: Without dead ends: 10465 [2021-01-06 18:18:27,234 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:27,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10465 states. [2021-01-06 18:18:27,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10465 to 3539. [2021-01-06 18:18:27,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3539 states. [2021-01-06 18:18:27,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3539 states to 3539 states and 6651 transitions. [2021-01-06 18:18:27,407 INFO L78 Accepts]: Start accepts. Automaton has 3539 states and 6651 transitions. Word has length 60 [2021-01-06 18:18:27,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:27,408 INFO L481 AbstractCegarLoop]: Abstraction has 3539 states and 6651 transitions. [2021-01-06 18:18:27,408 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:27,408 INFO L276 IsEmpty]: Start isEmpty. Operand 3539 states and 6651 transitions. [2021-01-06 18:18:27,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-01-06 18:18:27,412 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:27,412 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:27,413 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-06 18:18:27,414 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:27,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:27,417 INFO L82 PathProgramCache]: Analyzing trace with hash 1465282347, now seen corresponding path program 1 times [2021-01-06 18:18:27,417 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:27,418 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847907443] [2021-01-06 18:18:27,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:27,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:27,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:27,543 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847907443] [2021-01-06 18:18:27,544 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:27,544 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:27,544 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268787977] [2021-01-06 18:18:27,545 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:27,545 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:27,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:27,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:27,546 INFO L87 Difference]: Start difference. First operand 3539 states and 6651 transitions. Second operand 4 states. [2021-01-06 18:18:28,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:28,005 INFO L93 Difference]: Finished difference Result 10525 states and 19804 transitions. [2021-01-06 18:18:28,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:28,007 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 61 [2021-01-06 18:18:28,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:28,062 INFO L225 Difference]: With dead ends: 10525 [2021-01-06 18:18:28,062 INFO L226 Difference]: Without dead ends: 7008 [2021-01-06 18:18:28,071 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:28,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7008 states. [2021-01-06 18:18:28,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7008 to 3539. [2021-01-06 18:18:28,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3539 states. [2021-01-06 18:18:28,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3539 states to 3539 states and 6645 transitions. [2021-01-06 18:18:28,340 INFO L78 Accepts]: Start accepts. Automaton has 3539 states and 6645 transitions. Word has length 61 [2021-01-06 18:18:28,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:28,348 INFO L481 AbstractCegarLoop]: Abstraction has 3539 states and 6645 transitions. [2021-01-06 18:18:28,348 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:28,348 INFO L276 IsEmpty]: Start isEmpty. Operand 3539 states and 6645 transitions. [2021-01-06 18:18:28,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-01-06 18:18:28,353 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:28,353 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:28,353 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-06 18:18:28,353 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:28,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:28,354 INFO L82 PathProgramCache]: Analyzing trace with hash -1312379910, now seen corresponding path program 1 times [2021-01-06 18:18:28,356 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:28,356 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196851760] [2021-01-06 18:18:28,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:28,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:28,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:28,502 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [196851760] [2021-01-06 18:18:28,503 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:28,503 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:28,503 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2012233791] [2021-01-06 18:18:28,504 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:28,504 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:28,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:28,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:28,506 INFO L87 Difference]: Start difference. First operand 3539 states and 6645 transitions. Second operand 4 states. [2021-01-06 18:18:29,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:29,023 INFO L93 Difference]: Finished difference Result 10525 states and 19792 transitions. [2021-01-06 18:18:29,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:29,024 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2021-01-06 18:18:29,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:29,047 INFO L225 Difference]: With dead ends: 10525 [2021-01-06 18:18:29,047 INFO L226 Difference]: Without dead ends: 7008 [2021-01-06 18:18:29,056 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:29,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7008 states. [2021-01-06 18:18:29,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7008 to 3539. [2021-01-06 18:18:29,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3539 states. [2021-01-06 18:18:29,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3539 states to 3539 states and 6639 transitions. [2021-01-06 18:18:29,249 INFO L78 Accepts]: Start accepts. Automaton has 3539 states and 6639 transitions. Word has length 63 [2021-01-06 18:18:29,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:29,251 INFO L481 AbstractCegarLoop]: Abstraction has 3539 states and 6639 transitions. [2021-01-06 18:18:29,252 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:29,252 INFO L276 IsEmpty]: Start isEmpty. Operand 3539 states and 6639 transitions. [2021-01-06 18:18:29,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-01-06 18:18:29,257 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:29,258 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:29,258 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-06 18:18:29,258 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:29,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:29,259 INFO L82 PathProgramCache]: Analyzing trace with hash -720441579, now seen corresponding path program 1 times [2021-01-06 18:18:29,259 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:29,259 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158452722] [2021-01-06 18:18:29,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:29,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:29,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:29,375 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158452722] [2021-01-06 18:18:29,375 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:29,375 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:29,376 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785007187] [2021-01-06 18:18:29,377 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:29,377 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:29,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:29,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:29,379 INFO L87 Difference]: Start difference. First operand 3539 states and 6639 transitions. Second operand 4 states. [2021-01-06 18:18:30,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:30,202 INFO L93 Difference]: Finished difference Result 17445 states and 32810 transitions. [2021-01-06 18:18:30,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:30,204 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2021-01-06 18:18:30,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:30,247 INFO L225 Difference]: With dead ends: 17445 [2021-01-06 18:18:30,247 INFO L226 Difference]: Without dead ends: 13928 [2021-01-06 18:18:30,258 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:30,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13928 states. [2021-01-06 18:18:30,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13928 to 3539. [2021-01-06 18:18:30,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3539 states. [2021-01-06 18:18:30,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3539 states to 3539 states and 6638 transitions. [2021-01-06 18:18:30,505 INFO L78 Accepts]: Start accepts. Automaton has 3539 states and 6638 transitions. Word has length 65 [2021-01-06 18:18:30,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:30,506 INFO L481 AbstractCegarLoop]: Abstraction has 3539 states and 6638 transitions. [2021-01-06 18:18:30,506 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:30,506 INFO L276 IsEmpty]: Start isEmpty. Operand 3539 states and 6638 transitions. [2021-01-06 18:18:30,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-01-06 18:18:30,509 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:30,509 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:30,510 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-06 18:18:30,510 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:30,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:30,510 INFO L82 PathProgramCache]: Analyzing trace with hash 159674426, now seen corresponding path program 1 times [2021-01-06 18:18:30,511 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:30,511 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1274719606] [2021-01-06 18:18:30,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:30,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:30,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:30,601 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1274719606] [2021-01-06 18:18:30,601 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:30,601 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:30,601 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1512090403] [2021-01-06 18:18:30,602 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:30,602 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:30,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:30,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:30,603 INFO L87 Difference]: Start difference. First operand 3539 states and 6638 transitions. Second operand 4 states. [2021-01-06 18:18:31,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:31,083 INFO L93 Difference]: Finished difference Result 10525 states and 19779 transitions. [2021-01-06 18:18:31,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:31,084 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2021-01-06 18:18:31,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:31,102 INFO L225 Difference]: With dead ends: 10525 [2021-01-06 18:18:31,102 INFO L226 Difference]: Without dead ends: 7008 [2021-01-06 18:18:31,108 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:31,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7008 states. [2021-01-06 18:18:31,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7008 to 3539. [2021-01-06 18:18:31,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3539 states. [2021-01-06 18:18:31,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3539 states to 3539 states and 6632 transitions. [2021-01-06 18:18:31,260 INFO L78 Accepts]: Start accepts. Automaton has 3539 states and 6632 transitions. Word has length 66 [2021-01-06 18:18:31,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:31,260 INFO L481 AbstractCegarLoop]: Abstraction has 3539 states and 6632 transitions. [2021-01-06 18:18:31,260 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:31,260 INFO L276 IsEmpty]: Start isEmpty. Operand 3539 states and 6632 transitions. [2021-01-06 18:18:31,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-01-06 18:18:31,264 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:31,264 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:31,264 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-06 18:18:31,264 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:31,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:31,270 INFO L82 PathProgramCache]: Analyzing trace with hash -1356737798, now seen corresponding path program 1 times [2021-01-06 18:18:31,270 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:31,270 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843111861] [2021-01-06 18:18:31,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:31,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:31,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:31,363 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843111861] [2021-01-06 18:18:31,363 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:31,363 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:31,364 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1226765126] [2021-01-06 18:18:31,365 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:31,365 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:31,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:31,377 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:31,377 INFO L87 Difference]: Start difference. First operand 3539 states and 6632 transitions. Second operand 4 states. [2021-01-06 18:18:31,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:31,812 INFO L93 Difference]: Finished difference Result 10525 states and 19767 transitions. [2021-01-06 18:18:31,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:31,813 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2021-01-06 18:18:31,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:31,832 INFO L225 Difference]: With dead ends: 10525 [2021-01-06 18:18:31,833 INFO L226 Difference]: Without dead ends: 7008 [2021-01-06 18:18:31,842 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:31,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7008 states. [2021-01-06 18:18:31,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7008 to 3539. [2021-01-06 18:18:31,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3539 states. [2021-01-06 18:18:32,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3539 states to 3539 states and 6626 transitions. [2021-01-06 18:18:32,011 INFO L78 Accepts]: Start accepts. Automaton has 3539 states and 6626 transitions. Word has length 67 [2021-01-06 18:18:32,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:32,011 INFO L481 AbstractCegarLoop]: Abstraction has 3539 states and 6626 transitions. [2021-01-06 18:18:32,011 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:32,011 INFO L276 IsEmpty]: Start isEmpty. Operand 3539 states and 6626 transitions. [2021-01-06 18:18:32,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2021-01-06 18:18:32,015 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:32,015 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:32,015 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-06 18:18:32,015 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:32,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:32,016 INFO L82 PathProgramCache]: Analyzing trace with hash 143886207, now seen corresponding path program 1 times [2021-01-06 18:18:32,016 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:32,017 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [828755133] [2021-01-06 18:18:32,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:32,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:32,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:32,111 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [828755133] [2021-01-06 18:18:32,111 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:32,111 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:32,112 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [138516704] [2021-01-06 18:18:32,112 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:32,112 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:32,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:32,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:32,113 INFO L87 Difference]: Start difference. First operand 3539 states and 6626 transitions. Second operand 4 states. [2021-01-06 18:18:32,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:32,654 INFO L93 Difference]: Finished difference Result 13964 states and 26237 transitions. [2021-01-06 18:18:32,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:32,655 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 68 [2021-01-06 18:18:32,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:32,685 INFO L225 Difference]: With dead ends: 13964 [2021-01-06 18:18:32,685 INFO L226 Difference]: Without dead ends: 10453 [2021-01-06 18:18:32,695 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:32,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10453 states. [2021-01-06 18:18:32,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10453 to 3541. [2021-01-06 18:18:32,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3541 states. [2021-01-06 18:18:32,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3541 states to 3541 states and 6627 transitions. [2021-01-06 18:18:32,890 INFO L78 Accepts]: Start accepts. Automaton has 3541 states and 6627 transitions. Word has length 68 [2021-01-06 18:18:32,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:32,892 INFO L481 AbstractCegarLoop]: Abstraction has 3541 states and 6627 transitions. [2021-01-06 18:18:32,892 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:32,892 INFO L276 IsEmpty]: Start isEmpty. Operand 3541 states and 6627 transitions. [2021-01-06 18:18:32,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2021-01-06 18:18:32,902 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:32,902 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:32,902 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-01-06 18:18:32,902 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:32,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:32,903 INFO L82 PathProgramCache]: Analyzing trace with hash -736370769, now seen corresponding path program 1 times [2021-01-06 18:18:32,903 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:32,904 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783595563] [2021-01-06 18:18:32,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:32,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:33,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:33,018 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1783595563] [2021-01-06 18:18:33,019 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:33,019 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:33,019 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2036944546] [2021-01-06 18:18:33,019 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:33,019 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:33,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:33,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:33,021 INFO L87 Difference]: Start difference. First operand 3541 states and 6627 transitions. Second operand 4 states. [2021-01-06 18:18:33,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:33,599 INFO L93 Difference]: Finished difference Result 13956 states and 26217 transitions. [2021-01-06 18:18:33,600 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:33,600 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 69 [2021-01-06 18:18:33,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:33,631 INFO L225 Difference]: With dead ends: 13956 [2021-01-06 18:18:33,631 INFO L226 Difference]: Without dead ends: 10448 [2021-01-06 18:18:33,641 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:33,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10448 states. [2021-01-06 18:18:33,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10448 to 3546. [2021-01-06 18:18:33,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3546 states. [2021-01-06 18:18:33,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3546 states to 3546 states and 6635 transitions. [2021-01-06 18:18:33,851 INFO L78 Accepts]: Start accepts. Automaton has 3546 states and 6635 transitions. Word has length 69 [2021-01-06 18:18:33,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:33,855 INFO L481 AbstractCegarLoop]: Abstraction has 3546 states and 6635 transitions. [2021-01-06 18:18:33,855 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:33,856 INFO L276 IsEmpty]: Start isEmpty. Operand 3546 states and 6635 transitions. [2021-01-06 18:18:33,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-01-06 18:18:33,859 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:33,860 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:33,860 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-01-06 18:18:33,860 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:33,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:33,861 INFO L82 PathProgramCache]: Analyzing trace with hash 1415560500, now seen corresponding path program 1 times [2021-01-06 18:18:33,861 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:33,862 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1988611802] [2021-01-06 18:18:33,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:33,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:33,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:33,924 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1988611802] [2021-01-06 18:18:33,925 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:33,925 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:33,925 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295105168] [2021-01-06 18:18:33,926 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:18:33,926 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:33,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:18:33,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:33,927 INFO L87 Difference]: Start difference. First operand 3546 states and 6635 transitions. Second operand 3 states. [2021-01-06 18:18:34,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:34,108 INFO L93 Difference]: Finished difference Result 7049 states and 13212 transitions. [2021-01-06 18:18:34,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:18:34,108 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2021-01-06 18:18:34,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:34,118 INFO L225 Difference]: With dead ends: 7049 [2021-01-06 18:18:34,118 INFO L226 Difference]: Without dead ends: 3540 [2021-01-06 18:18:34,125 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:18:34,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3540 states. [2021-01-06 18:18:34,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3540 to 3540. [2021-01-06 18:18:34,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3540 states. [2021-01-06 18:18:34,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3540 states to 3540 states and 6623 transitions. [2021-01-06 18:18:34,279 INFO L78 Accepts]: Start accepts. Automaton has 3540 states and 6623 transitions. Word has length 70 [2021-01-06 18:18:34,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:34,280 INFO L481 AbstractCegarLoop]: Abstraction has 3540 states and 6623 transitions. [2021-01-06 18:18:34,280 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:18:34,280 INFO L276 IsEmpty]: Start isEmpty. Operand 3540 states and 6623 transitions. [2021-01-06 18:18:34,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-01-06 18:18:34,284 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:34,284 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:34,284 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-01-06 18:18:34,285 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:34,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:34,285 INFO L82 PathProgramCache]: Analyzing trace with hash -898909393, now seen corresponding path program 1 times [2021-01-06 18:18:34,285 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:34,286 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1483883934] [2021-01-06 18:18:34,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:34,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:34,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:34,387 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1483883934] [2021-01-06 18:18:34,387 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:34,387 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:34,388 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1097441974] [2021-01-06 18:18:34,388 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:34,388 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:34,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:34,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:34,390 INFO L87 Difference]: Start difference. First operand 3540 states and 6623 transitions. Second operand 5 states. [2021-01-06 18:18:34,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:34,632 INFO L93 Difference]: Finished difference Result 6993 states and 13125 transitions. [2021-01-06 18:18:34,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:18:34,633 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2021-01-06 18:18:34,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:34,644 INFO L225 Difference]: With dead ends: 6993 [2021-01-06 18:18:34,645 INFO L226 Difference]: Without dead ends: 3527 [2021-01-06 18:18:34,650 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:18:34,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3527 states. [2021-01-06 18:18:34,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3527 to 3527. [2021-01-06 18:18:34,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3527 states. [2021-01-06 18:18:34,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3527 states to 3527 states and 6601 transitions. [2021-01-06 18:18:34,857 INFO L78 Accepts]: Start accepts. Automaton has 3527 states and 6601 transitions. Word has length 72 [2021-01-06 18:18:34,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:34,858 INFO L481 AbstractCegarLoop]: Abstraction has 3527 states and 6601 transitions. [2021-01-06 18:18:34,858 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:34,858 INFO L276 IsEmpty]: Start isEmpty. Operand 3527 states and 6601 transitions. [2021-01-06 18:18:34,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-01-06 18:18:34,861 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:34,862 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:34,862 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-01-06 18:18:34,862 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:34,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:34,862 INFO L82 PathProgramCache]: Analyzing trace with hash -1656374245, now seen corresponding path program 1 times [2021-01-06 18:18:34,863 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:34,863 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217985361] [2021-01-06 18:18:34,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:34,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:34,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:34,937 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [217985361] [2021-01-06 18:18:34,937 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:34,937 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:34,937 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941881567] [2021-01-06 18:18:34,937 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:18:34,938 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:34,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:18:34,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:34,938 INFO L87 Difference]: Start difference. First operand 3527 states and 6601 transitions. Second operand 5 states. [2021-01-06 18:18:35,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:35,177 INFO L93 Difference]: Finished difference Result 6987 states and 13114 transitions. [2021-01-06 18:18:35,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-01-06 18:18:35,178 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 75 [2021-01-06 18:18:35,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:35,195 INFO L225 Difference]: With dead ends: 6987 [2021-01-06 18:18:35,195 INFO L226 Difference]: Without dead ends: 3521 [2021-01-06 18:18:35,201 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-01-06 18:18:35,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3521 states. [2021-01-06 18:18:35,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3521 to 3521. [2021-01-06 18:18:35,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3521 states. [2021-01-06 18:18:35,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3521 states to 3521 states and 6592 transitions. [2021-01-06 18:18:35,361 INFO L78 Accepts]: Start accepts. Automaton has 3521 states and 6592 transitions. Word has length 75 [2021-01-06 18:18:35,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:35,362 INFO L481 AbstractCegarLoop]: Abstraction has 3521 states and 6592 transitions. [2021-01-06 18:18:35,362 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:18:35,362 INFO L276 IsEmpty]: Start isEmpty. Operand 3521 states and 6592 transitions. [2021-01-06 18:18:35,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-01-06 18:18:35,366 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:35,366 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:35,366 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-01-06 18:18:35,367 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:35,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:35,367 INFO L82 PathProgramCache]: Analyzing trace with hash -1913366373, now seen corresponding path program 1 times [2021-01-06 18:18:35,367 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:35,368 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [790951585] [2021-01-06 18:18:35,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:35,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:35,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:35,447 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [790951585] [2021-01-06 18:18:35,447 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:35,447 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-01-06 18:18:35,447 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1223199763] [2021-01-06 18:18:35,448 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:35,448 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:35,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:35,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:35,449 INFO L87 Difference]: Start difference. First operand 3521 states and 6592 transitions. Second operand 4 states. [2021-01-06 18:18:35,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:35,648 INFO L93 Difference]: Finished difference Result 6981 states and 13105 transitions. [2021-01-06 18:18:35,649 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:18:35,649 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2021-01-06 18:18:35,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:35,656 INFO L225 Difference]: With dead ends: 6981 [2021-01-06 18:18:35,656 INFO L226 Difference]: Without dead ends: 3507 [2021-01-06 18:18:35,666 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:18:35,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3507 states. [2021-01-06 18:18:35,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3507 to 3507. [2021-01-06 18:18:35,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3507 states. [2021-01-06 18:18:35,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3507 states to 3507 states and 6571 transitions. [2021-01-06 18:18:35,828 INFO L78 Accepts]: Start accepts. Automaton has 3507 states and 6571 transitions. Word has length 75 [2021-01-06 18:18:35,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:35,828 INFO L481 AbstractCegarLoop]: Abstraction has 3507 states and 6571 transitions. [2021-01-06 18:18:35,828 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:35,828 INFO L276 IsEmpty]: Start isEmpty. Operand 3507 states and 6571 transitions. [2021-01-06 18:18:35,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-01-06 18:18:35,832 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:35,832 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:35,832 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-01-06 18:18:35,832 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:35,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:35,833 INFO L82 PathProgramCache]: Analyzing trace with hash -54124472, now seen corresponding path program 1 times [2021-01-06 18:18:35,833 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:35,834 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589568266] [2021-01-06 18:18:35,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:35,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:35,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:35,934 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589568266] [2021-01-06 18:18:35,934 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:35,934 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:18:35,934 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [29806304] [2021-01-06 18:18:35,935 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:18:35,935 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:35,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:18:35,936 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:35,936 INFO L87 Difference]: Start difference. First operand 3507 states and 6571 transitions. Second operand 6 states. [2021-01-06 18:18:36,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:36,255 INFO L93 Difference]: Finished difference Result 6981 states and 13100 transitions. [2021-01-06 18:18:36,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:36,256 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 76 [2021-01-06 18:18:36,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:36,263 INFO L225 Difference]: With dead ends: 6981 [2021-01-06 18:18:36,263 INFO L226 Difference]: Without dead ends: 3527 [2021-01-06 18:18:36,268 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:18:36,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3527 states. [2021-01-06 18:18:36,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3527 to 3507. [2021-01-06 18:18:36,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3507 states. [2021-01-06 18:18:36,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3507 states to 3507 states and 6570 transitions. [2021-01-06 18:18:36,517 INFO L78 Accepts]: Start accepts. Automaton has 3507 states and 6570 transitions. Word has length 76 [2021-01-06 18:18:36,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:36,518 INFO L481 AbstractCegarLoop]: Abstraction has 3507 states and 6570 transitions. [2021-01-06 18:18:36,518 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:18:36,518 INFO L276 IsEmpty]: Start isEmpty. Operand 3507 states and 6570 transitions. [2021-01-06 18:18:36,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-01-06 18:18:36,522 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:36,523 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:36,523 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-01-06 18:18:36,523 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:36,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:36,524 INFO L82 PathProgramCache]: Analyzing trace with hash 886791828, now seen corresponding path program 1 times [2021-01-06 18:18:36,524 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:36,524 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214734197] [2021-01-06 18:18:36,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:36,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:36,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:36,636 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214734197] [2021-01-06 18:18:36,636 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:36,636 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:18:36,637 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074102330] [2021-01-06 18:18:36,637 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:18:36,637 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:36,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:18:36,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:36,638 INFO L87 Difference]: Start difference. First operand 3507 states and 6570 transitions. Second operand 6 states. [2021-01-06 18:18:36,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:36,990 INFO L93 Difference]: Finished difference Result 6971 states and 13081 transitions. [2021-01-06 18:18:36,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:18:36,991 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2021-01-06 18:18:36,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:36,997 INFO L225 Difference]: With dead ends: 6971 [2021-01-06 18:18:36,997 INFO L226 Difference]: Without dead ends: 3522 [2021-01-06 18:18:37,004 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:18:37,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3522 states. [2021-01-06 18:18:37,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3522 to 3507. [2021-01-06 18:18:37,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3507 states. [2021-01-06 18:18:37,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3507 states to 3507 states and 6569 transitions. [2021-01-06 18:18:37,211 INFO L78 Accepts]: Start accepts. Automaton has 3507 states and 6569 transitions. Word has length 77 [2021-01-06 18:18:37,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:37,212 INFO L481 AbstractCegarLoop]: Abstraction has 3507 states and 6569 transitions. [2021-01-06 18:18:37,212 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:18:37,212 INFO L276 IsEmpty]: Start isEmpty. Operand 3507 states and 6569 transitions. [2021-01-06 18:18:37,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-01-06 18:18:37,215 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:37,216 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:37,216 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-01-06 18:18:37,216 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:37,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:37,217 INFO L82 PathProgramCache]: Analyzing trace with hash -1398143693, now seen corresponding path program 1 times [2021-01-06 18:18:37,217 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:37,217 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [708562624] [2021-01-06 18:18:37,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:37,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:37,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:37,326 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [708562624] [2021-01-06 18:18:37,329 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:37,329 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:37,329 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1943350558] [2021-01-06 18:18:37,329 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:18:37,330 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:37,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:18:37,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:37,331 INFO L87 Difference]: Start difference. First operand 3507 states and 6569 transitions. Second operand 6 states. [2021-01-06 18:18:43,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:43,213 INFO L93 Difference]: Finished difference Result 23963 states and 44851 transitions. [2021-01-06 18:18:43,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:18:43,213 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 78 [2021-01-06 18:18:43,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:43,238 INFO L225 Difference]: With dead ends: 23963 [2021-01-06 18:18:43,238 INFO L226 Difference]: Without dead ends: 20547 [2021-01-06 18:18:43,249 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:18:43,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20547 states. [2021-01-06 18:18:43,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20547 to 3513. [2021-01-06 18:18:43,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3513 states. [2021-01-06 18:18:43,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3513 states to 3513 states and 6575 transitions. [2021-01-06 18:18:43,689 INFO L78 Accepts]: Start accepts. Automaton has 3513 states and 6575 transitions. Word has length 78 [2021-01-06 18:18:43,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:43,689 INFO L481 AbstractCegarLoop]: Abstraction has 3513 states and 6575 transitions. [2021-01-06 18:18:43,689 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:18:43,689 INFO L276 IsEmpty]: Start isEmpty. Operand 3513 states and 6575 transitions. [2021-01-06 18:18:43,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-01-06 18:18:43,693 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:43,693 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:43,693 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-01-06 18:18:43,693 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:43,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:43,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1908235167, now seen corresponding path program 1 times [2021-01-06 18:18:43,694 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:43,694 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191267261] [2021-01-06 18:18:43,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:43,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:43,800 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:43,801 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191267261] [2021-01-06 18:18:43,801 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:43,801 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:43,802 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [573696947] [2021-01-06 18:18:43,802 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:43,802 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:43,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:43,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:43,803 INFO L87 Difference]: Start difference. First operand 3513 states and 6575 transitions. Second operand 4 states. [2021-01-06 18:18:46,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:46,396 INFO L93 Difference]: Finished difference Result 9222 states and 17371 transitions. [2021-01-06 18:18:46,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:18:46,397 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2021-01-06 18:18:46,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:46,405 INFO L225 Difference]: With dead ends: 9222 [2021-01-06 18:18:46,405 INFO L226 Difference]: Without dead ends: 5802 [2021-01-06 18:18:46,414 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:46,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5802 states. [2021-01-06 18:18:46,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5802 to 3513. [2021-01-06 18:18:46,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3513 states. [2021-01-06 18:18:46,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3513 states to 3513 states and 6569 transitions. [2021-01-06 18:18:46,663 INFO L78 Accepts]: Start accepts. Automaton has 3513 states and 6569 transitions. Word has length 79 [2021-01-06 18:18:46,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:46,663 INFO L481 AbstractCegarLoop]: Abstraction has 3513 states and 6569 transitions. [2021-01-06 18:18:46,663 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:46,663 INFO L276 IsEmpty]: Start isEmpty. Operand 3513 states and 6569 transitions. [2021-01-06 18:18:46,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-01-06 18:18:46,666 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:46,667 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:46,667 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-01-06 18:18:46,667 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:46,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:46,667 INFO L82 PathProgramCache]: Analyzing trace with hash 1376691913, now seen corresponding path program 1 times [2021-01-06 18:18:46,668 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:46,668 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626262086] [2021-01-06 18:18:46,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:46,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:46,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:46,761 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626262086] [2021-01-06 18:18:46,761 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:46,761 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:46,761 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2124348463] [2021-01-06 18:18:46,762 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:46,762 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:46,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:46,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:46,763 INFO L87 Difference]: Start difference. First operand 3513 states and 6569 transitions. Second operand 4 states. [2021-01-06 18:18:49,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:49,461 INFO L93 Difference]: Finished difference Result 9248 states and 17406 transitions. [2021-01-06 18:18:49,461 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:18:49,461 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2021-01-06 18:18:49,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:49,468 INFO L225 Difference]: With dead ends: 9248 [2021-01-06 18:18:49,468 INFO L226 Difference]: Without dead ends: 5802 [2021-01-06 18:18:49,474 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:49,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5802 states. [2021-01-06 18:18:49,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5802 to 3513. [2021-01-06 18:18:49,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3513 states. [2021-01-06 18:18:49,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3513 states to 3513 states and 6563 transitions. [2021-01-06 18:18:49,718 INFO L78 Accepts]: Start accepts. Automaton has 3513 states and 6563 transitions. Word has length 80 [2021-01-06 18:18:49,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:49,719 INFO L481 AbstractCegarLoop]: Abstraction has 3513 states and 6563 transitions. [2021-01-06 18:18:49,719 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:49,719 INFO L276 IsEmpty]: Start isEmpty. Operand 3513 states and 6563 transitions. [2021-01-06 18:18:49,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-01-06 18:18:49,722 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:49,722 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:49,722 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-01-06 18:18:49,722 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:49,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:49,723 INFO L82 PathProgramCache]: Analyzing trace with hash -1178446551, now seen corresponding path program 1 times [2021-01-06 18:18:49,723 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:49,723 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925446431] [2021-01-06 18:18:49,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:49,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:49,813 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:49,814 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925446431] [2021-01-06 18:18:49,814 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:49,814 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:18:49,814 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [365871008] [2021-01-06 18:18:49,815 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:18:49,815 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:49,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:18:49,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:49,816 INFO L87 Difference]: Start difference. First operand 3513 states and 6563 transitions. Second operand 4 states. [2021-01-06 18:18:52,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:18:52,544 INFO L93 Difference]: Finished difference Result 9248 states and 17395 transitions. [2021-01-06 18:18:52,550 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:18:52,550 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2021-01-06 18:18:52,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:18:52,557 INFO L225 Difference]: With dead ends: 9248 [2021-01-06 18:18:52,557 INFO L226 Difference]: Without dead ends: 5802 [2021-01-06 18:18:52,561 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:18:52,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5802 states. [2021-01-06 18:18:52,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5802 to 3513. [2021-01-06 18:18:52,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3513 states. [2021-01-06 18:18:52,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3513 states to 3513 states and 6557 transitions. [2021-01-06 18:18:52,734 INFO L78 Accepts]: Start accepts. Automaton has 3513 states and 6557 transitions. Word has length 82 [2021-01-06 18:18:52,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:18:52,734 INFO L481 AbstractCegarLoop]: Abstraction has 3513 states and 6557 transitions. [2021-01-06 18:18:52,734 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:18:52,734 INFO L276 IsEmpty]: Start isEmpty. Operand 3513 states and 6557 transitions. [2021-01-06 18:18:52,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2021-01-06 18:18:52,737 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:18:52,737 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:18:52,737 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-01-06 18:18:52,737 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:18:52,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:18:52,738 INFO L82 PathProgramCache]: Analyzing trace with hash 497540969, now seen corresponding path program 1 times [2021-01-06 18:18:52,738 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:18:52,738 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249056818] [2021-01-06 18:18:52,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:18:52,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:18:52,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:18:52,815 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249056818] [2021-01-06 18:18:52,815 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:18:52,815 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:18:52,816 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831188306] [2021-01-06 18:18:52,816 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:18:52,816 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:18:52,817 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:18:52,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:18:52,817 INFO L87 Difference]: Start difference. First operand 3513 states and 6557 transitions. Second operand 6 states. [2021-01-06 18:19:02,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:02,561 INFO L93 Difference]: Finished difference Result 44486 states and 83155 transitions. [2021-01-06 18:19:02,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-01-06 18:19:02,561 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2021-01-06 18:19:02,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:02,619 INFO L225 Difference]: With dead ends: 44486 [2021-01-06 18:19:02,619 INFO L226 Difference]: Without dead ends: 41067 [2021-01-06 18:19:02,632 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2021-01-06 18:19:02,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41067 states. [2021-01-06 18:19:03,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41067 to 6978. [2021-01-06 18:19:03,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6978 states. [2021-01-06 18:19:03,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6978 states to 6978 states and 13058 transitions. [2021-01-06 18:19:03,364 INFO L78 Accepts]: Start accepts. Automaton has 6978 states and 13058 transitions. Word has length 84 [2021-01-06 18:19:03,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:03,364 INFO L481 AbstractCegarLoop]: Abstraction has 6978 states and 13058 transitions. [2021-01-06 18:19:03,364 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:19:03,364 INFO L276 IsEmpty]: Start isEmpty. Operand 6978 states and 13058 transitions. [2021-01-06 18:19:03,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2021-01-06 18:19:03,369 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:03,369 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:03,369 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-01-06 18:19:03,369 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:03,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:03,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1758798276, now seen corresponding path program 1 times [2021-01-06 18:19:03,370 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:03,370 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1528235804] [2021-01-06 18:19:03,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:03,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:03,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:03,444 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1528235804] [2021-01-06 18:19:03,444 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:03,444 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:03,444 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1728369599] [2021-01-06 18:19:03,445 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:19:03,445 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:03,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:19:03,446 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:19:03,446 INFO L87 Difference]: Start difference. First operand 6978 states and 13058 transitions. Second operand 6 states. [2021-01-06 18:19:17,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:17,483 INFO L93 Difference]: Finished difference Result 82614 states and 154739 transitions. [2021-01-06 18:19:17,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-01-06 18:19:17,484 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 85 [2021-01-06 18:19:17,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:17,601 INFO L225 Difference]: With dead ends: 82614 [2021-01-06 18:19:17,601 INFO L226 Difference]: Without dead ends: 75791 [2021-01-06 18:19:17,623 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2021-01-06 18:19:17,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75791 states. [2021-01-06 18:19:18,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75791 to 13825. [2021-01-06 18:19:18,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13825 states. [2021-01-06 18:19:18,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13825 states to 13825 states and 25929 transitions. [2021-01-06 18:19:18,990 INFO L78 Accepts]: Start accepts. Automaton has 13825 states and 25929 transitions. Word has length 85 [2021-01-06 18:19:18,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:18,990 INFO L481 AbstractCegarLoop]: Abstraction has 13825 states and 25929 transitions. [2021-01-06 18:19:18,990 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:19:18,990 INFO L276 IsEmpty]: Start isEmpty. Operand 13825 states and 25929 transitions. [2021-01-06 18:19:18,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2021-01-06 18:19:18,998 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:18,998 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:18,998 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-01-06 18:19:18,999 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:18,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:18,999 INFO L82 PathProgramCache]: Analyzing trace with hash 497224773, now seen corresponding path program 1 times [2021-01-06 18:19:18,999 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:19,000 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2143074917] [2021-01-06 18:19:19,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:19,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:19,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:19,062 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2143074917] [2021-01-06 18:19:19,063 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:19,063 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:19,063 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1961646019] [2021-01-06 18:19:19,063 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:19,063 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:19,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:19,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:19,064 INFO L87 Difference]: Start difference. First operand 13825 states and 25929 transitions. Second operand 5 states. [2021-01-06 18:19:19,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:19,873 INFO L93 Difference]: Finished difference Result 24117 states and 45266 transitions. [2021-01-06 18:19:19,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:19:19,876 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 85 [2021-01-06 18:19:19,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:19,888 INFO L225 Difference]: With dead ends: 24117 [2021-01-06 18:19:19,888 INFO L226 Difference]: Without dead ends: 10394 [2021-01-06 18:19:19,898 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:19:19,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10394 states. [2021-01-06 18:19:20,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10394 to 10379. [2021-01-06 18:19:20,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10379 states. [2021-01-06 18:19:20,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10379 states to 10379 states and 19446 transitions. [2021-01-06 18:19:20,555 INFO L78 Accepts]: Start accepts. Automaton has 10379 states and 19446 transitions. Word has length 85 [2021-01-06 18:19:20,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:20,555 INFO L481 AbstractCegarLoop]: Abstraction has 10379 states and 19446 transitions. [2021-01-06 18:19:20,555 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:20,556 INFO L276 IsEmpty]: Start isEmpty. Operand 10379 states and 19446 transitions. [2021-01-06 18:19:20,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-01-06 18:19:20,561 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:20,561 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:20,562 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-01-06 18:19:20,562 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:20,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:20,562 INFO L82 PathProgramCache]: Analyzing trace with hash -934231612, now seen corresponding path program 1 times [2021-01-06 18:19:20,562 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:20,562 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390938040] [2021-01-06 18:19:20,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:20,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:20,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:20,621 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390938040] [2021-01-06 18:19:20,621 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:20,621 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:20,621 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [487879059] [2021-01-06 18:19:20,622 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:19:20,622 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:20,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:19:20,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:19:20,623 INFO L87 Difference]: Start difference. First operand 10379 states and 19446 transitions. Second operand 5 states. [2021-01-06 18:19:20,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:20,891 INFO L93 Difference]: Finished difference Result 13799 states and 25858 transitions. [2021-01-06 18:19:20,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-01-06 18:19:20,891 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 86 [2021-01-06 18:19:20,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:20,895 INFO L225 Difference]: With dead ends: 13799 [2021-01-06 18:19:20,895 INFO L226 Difference]: Without dead ends: 3450 [2021-01-06 18:19:20,902 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-01-06 18:19:20,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3450 states. [2021-01-06 18:19:21,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3450 to 3450. [2021-01-06 18:19:21,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3450 states. [2021-01-06 18:19:21,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3450 states to 3450 states and 6447 transitions. [2021-01-06 18:19:21,084 INFO L78 Accepts]: Start accepts. Automaton has 3450 states and 6447 transitions. Word has length 86 [2021-01-06 18:19:21,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:21,085 INFO L481 AbstractCegarLoop]: Abstraction has 3450 states and 6447 transitions. [2021-01-06 18:19:21,085 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-01-06 18:19:21,085 INFO L276 IsEmpty]: Start isEmpty. Operand 3450 states and 6447 transitions. [2021-01-06 18:19:21,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2021-01-06 18:19:21,087 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:21,088 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:21,088 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-01-06 18:19:21,088 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:21,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:21,088 INFO L82 PathProgramCache]: Analyzing trace with hash -539114110, now seen corresponding path program 1 times [2021-01-06 18:19:21,089 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:21,089 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [858999337] [2021-01-06 18:19:21,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:21,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:21,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:21,188 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [858999337] [2021-01-06 18:19:21,188 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:21,188 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-01-06 18:19:21,189 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [14060540] [2021-01-06 18:19:21,189 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-01-06 18:19:21,189 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:21,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-01-06 18:19:21,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:21,190 INFO L87 Difference]: Start difference. First operand 3450 states and 6447 transitions. Second operand 4 states. [2021-01-06 18:19:23,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:23,950 INFO L93 Difference]: Finished difference Result 9128 states and 17177 transitions. [2021-01-06 18:19:23,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-01-06 18:19:23,950 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 87 [2021-01-06 18:19:23,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:23,957 INFO L225 Difference]: With dead ends: 9128 [2021-01-06 18:19:23,958 INFO L226 Difference]: Without dead ends: 5737 [2021-01-06 18:19:23,962 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-01-06 18:19:23,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5737 states. [2021-01-06 18:19:24,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5737 to 3450. [2021-01-06 18:19:24,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3450 states. [2021-01-06 18:19:24,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3450 states to 3450 states and 6441 transitions. [2021-01-06 18:19:24,213 INFO L78 Accepts]: Start accepts. Automaton has 3450 states and 6441 transitions. Word has length 87 [2021-01-06 18:19:24,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:24,213 INFO L481 AbstractCegarLoop]: Abstraction has 3450 states and 6441 transitions. [2021-01-06 18:19:24,213 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-01-06 18:19:24,213 INFO L276 IsEmpty]: Start isEmpty. Operand 3450 states and 6441 transitions. [2021-01-06 18:19:24,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2021-01-06 18:19:24,215 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:24,216 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:24,216 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-01-06 18:19:24,216 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:24,216 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:24,217 INFO L82 PathProgramCache]: Analyzing trace with hash 85915244, now seen corresponding path program 1 times [2021-01-06 18:19:24,217 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:24,217 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2071314606] [2021-01-06 18:19:24,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:24,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:24,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:24,318 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2071314606] [2021-01-06 18:19:24,318 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:24,318 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:24,319 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648559036] [2021-01-06 18:19:24,319 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:19:24,319 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:24,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:19:24,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:19:24,320 INFO L87 Difference]: Start difference. First operand 3450 states and 6441 transitions. Second operand 6 states. [2021-01-06 18:19:26,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:26,978 INFO L93 Difference]: Finished difference Result 10023 states and 18701 transitions. [2021-01-06 18:19:26,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-01-06 18:19:26,978 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 89 [2021-01-06 18:19:26,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:26,987 INFO L225 Difference]: With dead ends: 10023 [2021-01-06 18:19:26,987 INFO L226 Difference]: Without dead ends: 7853 [2021-01-06 18:19:26,990 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-01-06 18:19:26,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7853 states. [2021-01-06 18:19:27,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7853 to 3446. [2021-01-06 18:19:27,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3446 states. [2021-01-06 18:19:27,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3446 states to 3446 states and 6433 transitions. [2021-01-06 18:19:27,192 INFO L78 Accepts]: Start accepts. Automaton has 3446 states and 6433 transitions. Word has length 89 [2021-01-06 18:19:27,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:27,192 INFO L481 AbstractCegarLoop]: Abstraction has 3446 states and 6433 transitions. [2021-01-06 18:19:27,192 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:19:27,192 INFO L276 IsEmpty]: Start isEmpty. Operand 3446 states and 6433 transitions. [2021-01-06 18:19:27,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2021-01-06 18:19:27,194 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:27,195 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:27,195 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-01-06 18:19:27,195 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:27,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:27,195 INFO L82 PathProgramCache]: Analyzing trace with hash 78522526, now seen corresponding path program 1 times [2021-01-06 18:19:27,195 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:27,196 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341748005] [2021-01-06 18:19:27,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:27,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:27,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:27,262 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [341748005] [2021-01-06 18:19:27,262 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:27,262 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:19:27,262 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [484515832] [2021-01-06 18:19:27,263 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:27,263 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:27,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:27,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:27,264 INFO L87 Difference]: Start difference. First operand 3446 states and 6433 transitions. Second operand 3 states. [2021-01-06 18:19:27,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:27,804 INFO L93 Difference]: Finished difference Result 8269 states and 15485 transitions. [2021-01-06 18:19:27,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:19:27,805 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 95 [2021-01-06 18:19:27,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:27,812 INFO L225 Difference]: With dead ends: 8269 [2021-01-06 18:19:27,812 INFO L226 Difference]: Without dead ends: 5724 [2021-01-06 18:19:27,816 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:27,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5724 states. [2021-01-06 18:19:28,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5724 to 5709. [2021-01-06 18:19:28,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5709 states. [2021-01-06 18:19:28,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5709 states to 5709 states and 10671 transitions. [2021-01-06 18:19:28,187 INFO L78 Accepts]: Start accepts. Automaton has 5709 states and 10671 transitions. Word has length 95 [2021-01-06 18:19:28,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:28,188 INFO L481 AbstractCegarLoop]: Abstraction has 5709 states and 10671 transitions. [2021-01-06 18:19:28,188 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:19:28,188 INFO L276 IsEmpty]: Start isEmpty. Operand 5709 states and 10671 transitions. [2021-01-06 18:19:28,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2021-01-06 18:19:28,190 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:28,190 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:28,190 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-01-06 18:19:28,191 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:28,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:28,191 INFO L82 PathProgramCache]: Analyzing trace with hash -1596051306, now seen corresponding path program 1 times [2021-01-06 18:19:28,191 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:28,191 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1382105113] [2021-01-06 18:19:28,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:28,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:28,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:28,267 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1382105113] [2021-01-06 18:19:28,267 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:28,267 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:19:28,267 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355048460] [2021-01-06 18:19:28,268 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:28,268 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:28,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:28,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:28,269 INFO L87 Difference]: Start difference. First operand 5709 states and 10671 transitions. Second operand 3 states. [2021-01-06 18:19:29,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:29,024 INFO L93 Difference]: Finished difference Result 14370 states and 26904 transitions. [2021-01-06 18:19:29,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:19:29,024 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2021-01-06 18:19:29,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:29,038 INFO L225 Difference]: With dead ends: 14370 [2021-01-06 18:19:29,038 INFO L226 Difference]: Without dead ends: 10152 [2021-01-06 18:19:29,045 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:29,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10152 states. [2021-01-06 18:19:29,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10152 to 10137. [2021-01-06 18:19:29,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10137 states. [2021-01-06 18:19:29,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10137 states to 10137 states and 18961 transitions. [2021-01-06 18:19:29,699 INFO L78 Accepts]: Start accepts. Automaton has 10137 states and 18961 transitions. Word has length 96 [2021-01-06 18:19:29,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:29,699 INFO L481 AbstractCegarLoop]: Abstraction has 10137 states and 18961 transitions. [2021-01-06 18:19:29,700 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:19:29,700 INFO L276 IsEmpty]: Start isEmpty. Operand 10137 states and 18961 transitions. [2021-01-06 18:19:29,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2021-01-06 18:19:29,702 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:29,702 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:29,702 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-01-06 18:19:29,703 INFO L429 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:29,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:29,703 INFO L82 PathProgramCache]: Analyzing trace with hash 1991700985, now seen corresponding path program 1 times [2021-01-06 18:19:29,703 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:29,704 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258581367] [2021-01-06 18:19:29,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:29,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:29,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:29,793 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [258581367] [2021-01-06 18:19:29,793 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:29,793 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:19:29,793 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837383883] [2021-01-06 18:19:29,793 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:29,794 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:29,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:29,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:29,794 INFO L87 Difference]: Start difference. First operand 10137 states and 18961 transitions. Second operand 3 states. [2021-01-06 18:19:30,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:30,847 INFO L93 Difference]: Finished difference Result 26376 states and 49357 transitions. [2021-01-06 18:19:30,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:19:30,848 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 97 [2021-01-06 18:19:30,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:30,870 INFO L225 Difference]: With dead ends: 26376 [2021-01-06 18:19:30,871 INFO L226 Difference]: Without dead ends: 18802 [2021-01-06 18:19:30,879 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:30,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18802 states. [2021-01-06 18:19:31,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18802 to 18787. [2021-01-06 18:19:31,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18787 states. [2021-01-06 18:19:31,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18787 states to 18787 states and 35136 transitions. [2021-01-06 18:19:31,999 INFO L78 Accepts]: Start accepts. Automaton has 18787 states and 35136 transitions. Word has length 97 [2021-01-06 18:19:31,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:31,999 INFO L481 AbstractCegarLoop]: Abstraction has 18787 states and 35136 transitions. [2021-01-06 18:19:31,999 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:19:31,999 INFO L276 IsEmpty]: Start isEmpty. Operand 18787 states and 35136 transitions. [2021-01-06 18:19:32,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2021-01-06 18:19:32,002 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:32,003 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:32,003 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-01-06 18:19:32,003 INFO L429 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:32,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:32,003 INFO L82 PathProgramCache]: Analyzing trace with hash 1207838545, now seen corresponding path program 1 times [2021-01-06 18:19:32,004 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:32,004 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768084019] [2021-01-06 18:19:32,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:32,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:32,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:32,070 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768084019] [2021-01-06 18:19:32,070 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:32,070 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:19:32,071 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [3726601] [2021-01-06 18:19:32,071 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:32,071 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:32,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:32,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:32,072 INFO L87 Difference]: Start difference. First operand 18787 states and 35136 transitions. Second operand 3 states. [2021-01-06 18:19:34,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:34,150 INFO L93 Difference]: Finished difference Result 49976 states and 93428 transitions. [2021-01-06 18:19:34,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:19:34,150 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2021-01-06 18:19:34,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:34,193 INFO L225 Difference]: With dead ends: 49976 [2021-01-06 18:19:34,193 INFO L226 Difference]: Without dead ends: 35680 [2021-01-06 18:19:34,207 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:34,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35680 states. [2021-01-06 18:19:36,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35680 to 35665. [2021-01-06 18:19:36,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35665 states. [2021-01-06 18:19:36,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35665 states to 35665 states and 66643 transitions. [2021-01-06 18:19:36,430 INFO L78 Accepts]: Start accepts. Automaton has 35665 states and 66643 transitions. Word has length 98 [2021-01-06 18:19:36,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:36,430 INFO L481 AbstractCegarLoop]: Abstraction has 35665 states and 66643 transitions. [2021-01-06 18:19:36,430 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:19:36,430 INFO L276 IsEmpty]: Start isEmpty. Operand 35665 states and 66643 transitions. [2021-01-06 18:19:36,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2021-01-06 18:19:36,434 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:36,434 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:36,434 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2021-01-06 18:19:36,434 INFO L429 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:36,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:36,435 INFO L82 PathProgramCache]: Analyzing trace with hash -1952094380, now seen corresponding path program 1 times [2021-01-06 18:19:36,435 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:36,435 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952615264] [2021-01-06 18:19:36,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:36,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:36,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:36,503 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952615264] [2021-01-06 18:19:36,503 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:36,503 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:19:36,503 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [215063150] [2021-01-06 18:19:36,503 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:19:36,503 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:36,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:19:36,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:36,504 INFO L87 Difference]: Start difference. First operand 35665 states and 66643 transitions. Second operand 3 states. [2021-01-06 18:19:40,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:40,663 INFO L93 Difference]: Finished difference Result 96332 states and 179835 transitions. [2021-01-06 18:19:40,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:19:40,664 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2021-01-06 18:19:40,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:40,758 INFO L225 Difference]: With dead ends: 96332 [2021-01-06 18:19:40,758 INFO L226 Difference]: Without dead ends: 68582 [2021-01-06 18:19:40,784 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:19:40,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68582 states. [2021-01-06 18:19:45,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68582 to 68567. [2021-01-06 18:19:45,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68567 states. [2021-01-06 18:19:45,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68567 states to 68567 states and 127938 transitions. [2021-01-06 18:19:45,184 INFO L78 Accepts]: Start accepts. Automaton has 68567 states and 127938 transitions. Word has length 99 [2021-01-06 18:19:45,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:19:45,185 INFO L481 AbstractCegarLoop]: Abstraction has 68567 states and 127938 transitions. [2021-01-06 18:19:45,185 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:19:45,185 INFO L276 IsEmpty]: Start isEmpty. Operand 68567 states and 127938 transitions. [2021-01-06 18:19:45,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2021-01-06 18:19:45,188 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:19:45,188 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:19:45,188 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-01-06 18:19:45,188 INFO L429 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:19:45,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:19:45,188 INFO L82 PathProgramCache]: Analyzing trace with hash -2086107886, now seen corresponding path program 1 times [2021-01-06 18:19:45,189 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:19:45,189 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [635264210] [2021-01-06 18:19:45,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:19:45,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:19:45,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:19:45,274 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [635264210] [2021-01-06 18:19:45,274 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:19:45,274 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:19:45,274 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986607459] [2021-01-06 18:19:45,274 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:19:45,275 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:19:45,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:19:45,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:19:45,275 INFO L87 Difference]: Start difference. First operand 68567 states and 127938 transitions. Second operand 6 states. [2021-01-06 18:19:57,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:19:57,976 INFO L93 Difference]: Finished difference Result 286820 states and 534418 transitions. [2021-01-06 18:19:57,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-01-06 18:19:57,977 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 99 [2021-01-06 18:19:57,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:19:58,660 INFO L225 Difference]: With dead ends: 286820 [2021-01-06 18:19:58,660 INFO L226 Difference]: Without dead ends: 232344 [2021-01-06 18:19:58,725 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2021-01-06 18:19:58,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232344 states. [2021-01-06 18:20:07,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232344 to 116004. [2021-01-06 18:20:07,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116004 states. [2021-01-06 18:20:07,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116004 states to 116004 states and 215903 transitions. [2021-01-06 18:20:07,683 INFO L78 Accepts]: Start accepts. Automaton has 116004 states and 215903 transitions. Word has length 99 [2021-01-06 18:20:07,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:07,683 INFO L481 AbstractCegarLoop]: Abstraction has 116004 states and 215903 transitions. [2021-01-06 18:20:07,683 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:20:07,683 INFO L276 IsEmpty]: Start isEmpty. Operand 116004 states and 215903 transitions. [2021-01-06 18:20:07,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2021-01-06 18:20:07,686 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:07,687 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:07,687 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-01-06 18:20:07,687 INFO L429 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:07,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:07,687 INFO L82 PathProgramCache]: Analyzing trace with hash -1515884260, now seen corresponding path program 1 times [2021-01-06 18:20:07,688 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:07,688 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836654039] [2021-01-06 18:20:07,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:07,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:08,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:08,018 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836654039] [2021-01-06 18:20:08,018 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:08,018 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-06 18:20:08,018 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653724053] [2021-01-06 18:20:08,018 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-06 18:20:08,019 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:08,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-06 18:20:08,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:20:08,023 INFO L87 Difference]: Start difference. First operand 116004 states and 215903 transitions. Second operand 6 states. [2021-01-06 18:20:20,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:20,054 INFO L93 Difference]: Finished difference Result 283210 states and 524746 transitions. [2021-01-06 18:20:20,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-01-06 18:20:20,055 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 101 [2021-01-06 18:20:20,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:20,401 INFO L225 Difference]: With dead ends: 283210 [2021-01-06 18:20:20,402 INFO L226 Difference]: Without dead ends: 181712 [2021-01-06 18:20:20,488 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-01-06 18:20:20,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181712 states. [2021-01-06 18:20:28,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181712 to 116394. [2021-01-06 18:20:28,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116394 states. [2021-01-06 18:20:29,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116394 states to 116394 states and 216293 transitions. [2021-01-06 18:20:29,084 INFO L78 Accepts]: Start accepts. Automaton has 116394 states and 216293 transitions. Word has length 101 [2021-01-06 18:20:29,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:29,085 INFO L481 AbstractCegarLoop]: Abstraction has 116394 states and 216293 transitions. [2021-01-06 18:20:29,085 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-01-06 18:20:29,085 INFO L276 IsEmpty]: Start isEmpty. Operand 116394 states and 216293 transitions. [2021-01-06 18:20:29,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2021-01-06 18:20:29,089 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:29,089 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:29,090 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-01-06 18:20:29,090 INFO L429 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:29,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:29,090 INFO L82 PathProgramCache]: Analyzing trace with hash -1009368732, now seen corresponding path program 1 times [2021-01-06 18:20:29,090 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:29,091 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233529916] [2021-01-06 18:20:29,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:29,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:29,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:29,164 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233529916] [2021-01-06 18:20:29,164 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:29,164 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-06 18:20:29,164 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [9649403] [2021-01-06 18:20:29,164 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-06 18:20:29,165 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:29,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-06 18:20:29,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:29,165 INFO L87 Difference]: Start difference. First operand 116394 states and 216293 transitions. Second operand 3 states. [2021-01-06 18:20:40,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:20:40,751 INFO L93 Difference]: Finished difference Result 265306 states and 491571 transitions. [2021-01-06 18:20:40,751 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-01-06 18:20:40,751 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 106 [2021-01-06 18:20:40,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:20:41,041 INFO L225 Difference]: With dead ends: 265306 [2021-01-06 18:20:41,041 INFO L226 Difference]: Without dead ends: 162826 [2021-01-06 18:20:41,120 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-06 18:20:41,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162826 states. [2021-01-06 18:20:52,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162826 to 162363. [2021-01-06 18:20:52,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162363 states. [2021-01-06 18:20:52,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162363 states to 162363 states and 297743 transitions. [2021-01-06 18:20:52,737 INFO L78 Accepts]: Start accepts. Automaton has 162363 states and 297743 transitions. Word has length 106 [2021-01-06 18:20:52,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-01-06 18:20:52,737 INFO L481 AbstractCegarLoop]: Abstraction has 162363 states and 297743 transitions. [2021-01-06 18:20:52,737 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-01-06 18:20:52,737 INFO L276 IsEmpty]: Start isEmpty. Operand 162363 states and 297743 transitions. [2021-01-06 18:20:52,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2021-01-06 18:20:52,743 INFO L414 BasicCegarLoop]: Found error trace [2021-01-06 18:20:52,743 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-01-06 18:20:52,744 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-01-06 18:20:52,744 INFO L429 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-06 18:20:52,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-06 18:20:52,744 INFO L82 PathProgramCache]: Analyzing trace with hash -1147788177, now seen corresponding path program 1 times [2021-01-06 18:20:52,744 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-06 18:20:52,748 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [13990364] [2021-01-06 18:20:52,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-06 18:20:52,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-06 18:20:52,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-06 18:20:52,840 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [13990364] [2021-01-06 18:20:52,840 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-06 18:20:52,840 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-01-06 18:20:52,841 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [70213228] [2021-01-06 18:20:52,841 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-01-06 18:20:52,841 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-06 18:20:52,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-01-06 18:20:52,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-01-06 18:20:52,842 INFO L87 Difference]: Start difference. First operand 162363 states and 297743 transitions. Second operand 5 states. [2021-01-06 18:21:12,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-01-06 18:21:12,882 INFO L93 Difference]: Finished difference Result 424806 states and 782815 transitions. [2021-01-06 18:21:12,882 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-01-06 18:21:12,883 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 108 [2021-01-06 18:21:12,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-01-06 18:21:13,688 INFO L225 Difference]: With dead ends: 424806 [2021-01-06 18:21:13,688 INFO L226 Difference]: Without dead ends: 276404 [2021-01-06 18:21:13,819 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2021-01-06 18:21:14,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276404 states.